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Return error from extclk_config.
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312fabad13
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@ -30,7 +30,6 @@
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#define OV7725_PID 0x77
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#define OV7725_PID 0x77
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#define XCLK_FREQ (12000000)
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#define XCLK_FREQ (12000000)
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#define BREAK() __asm__ volatile ("BKPT")
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#define MAX_XFER_SIZE (0xFFFC)
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#define MAX_XFER_SIZE (0xFFFC)
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@ -56,7 +55,7 @@ const int resolution[][2] = {
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{1600, 1200}, /* UXGA */
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{1600, 1200}, /* UXGA */
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};
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};
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static void extclk_config(int frequency)
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static int extclk_config(int frequency)
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{
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{
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/* TCLK (PCLK2 * 2) */
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/* TCLK (PCLK2 * 2) */
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int tclk = HAL_RCC_GetPCLK2Freq() * 2;
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int tclk = HAL_RCC_GetPCLK2Freq() * 2;
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@ -81,18 +80,15 @@ static void extclk_config(int frequency)
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TIMOCHandle.OCPolarity = TIM_OCPOLARITY_HIGH;
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TIMOCHandle.OCPolarity = TIM_OCPOLARITY_HIGH;
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TIMOCHandle.OCFastMode = TIM_OCFAST_DISABLE;
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TIMOCHandle.OCFastMode = TIM_OCFAST_DISABLE;
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TIMOCHandle.OCIdleState = TIM_OCIDLESTATE_RESET;
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TIMOCHandle.OCIdleState = TIM_OCIDLESTATE_RESET;
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if (HAL_TIM_PWM_Init(&TIMHandle) != HAL_OK) {
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/* Initialization Error */
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if (HAL_TIM_PWM_Init(&TIMHandle) != HAL_OK
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BREAK();
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|| HAL_TIM_PWM_ConfigChannel(&TIMHandle, &TIMOCHandle, DCMI_TIM_CHANNEL) != HAL_OK
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|| HAL_TIM_PWM_Start(&TIMHandle, DCMI_TIM_CHANNEL) != HAL_OK) {
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// Initialization Error
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return -1;
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}
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}
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if (HAL_TIM_PWM_ConfigChannel(&TIMHandle, &TIMOCHandle, DCMI_TIM_CHANNEL) != HAL_OK) {
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return 0;
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BREAK();
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}
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if (HAL_TIM_PWM_Start(&TIMHandle, DCMI_TIM_CHANNEL) != HAL_OK) {
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BREAK();
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}
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}
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}
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static int dcmi_config(uint32_t jpeg_mode)
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static int dcmi_config(uint32_t jpeg_mode)
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@ -119,7 +115,7 @@ static int dcmi_config(uint32_t jpeg_mode)
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/* Init DCMI */
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/* Init DCMI */
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if (HAL_DCMI_Init(&DCMIHandle) != HAL_OK) {
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if (HAL_DCMI_Init(&DCMIHandle) != HAL_OK) {
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/* Initialization Error */
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// Initialization Error
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return -1;
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return -1;
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}
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}
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@ -149,8 +145,8 @@ static int dma_config()
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/* Initialize the DMA stream */
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/* Initialize the DMA stream */
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if (HAL_DMA_Init(&DMAHandle) != HAL_OK) {
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if (HAL_DMA_Init(&DMAHandle) != HAL_OK) {
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/* Initialization Error */
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/// Initialization Error
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return 1;
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return -1;
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}
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}
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return 0;
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return 0;
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@ -178,7 +174,10 @@ int sensor_init()
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/* Configure the sensor external clock (XCLK) to XCLK_FREQ.
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/* Configure the sensor external clock (XCLK) to XCLK_FREQ.
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Note: The sensor's internal PLL (when CLKRC=0x80) doubles the XCLK_FREQ
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Note: The sensor's internal PLL (when CLKRC=0x80) doubles the XCLK_FREQ
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(XCLK=XCLK_FREQ*2), and the unscaled PIXCLK output is XCLK_FREQ*4 */
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(XCLK=XCLK_FREQ*2), and the unscaled PIXCLK output is XCLK_FREQ*4 */
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extclk_config(XCLK_FREQ);
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if (extclk_config(XCLK_FREQ) != 0) {
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// Timer problem
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return -1;
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}
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/* Uncomment this to pass through the MCO1 clock (HSI=16MHz) this results in a
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/* Uncomment this to pass through the MCO1 clock (HSI=16MHz) this results in a
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64MHz PIXCLK output from the sensor.
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64MHz PIXCLK output from the sensor.
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@ -218,8 +217,8 @@ int sensor_init()
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/* Probe again to set the slave addr */
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/* Probe again to set the slave addr */
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sensor.slv_addr = SCCB_Probe();
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sensor.slv_addr = SCCB_Probe();
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if (sensor.slv_addr == 0) {
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if (sensor.slv_addr == 0) {
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/* Probe failed */
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// Probe failed
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return -1;
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return -2;
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}
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}
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}
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}
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@ -242,20 +241,20 @@ int sensor_init()
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break;
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break;
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default:
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default:
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/* Sensor not supported */
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/* Sensor not supported */
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return -2;
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return -3;
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}
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}
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/* Configure the DCMI DMA Stream */
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/* Configure the DCMI DMA Stream */
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if (dma_config() != 0) {
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if (dma_config() != 0) {
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/* DMA problem */
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// DMA problem
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return -3;
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return -4;
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}
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}
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/* Configure the DCMI interface. This should be called
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/* Configure the DCMI interface. This should be called
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after ovxxx_init to set VSYNC/HSYNC/PCLK polarities */
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after ovxxx_init to set VSYNC/HSYNC/PCLK polarities */
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if (dcmi_config(DCMI_JPEG_DISABLE) != 0){
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if (dcmi_config(DCMI_JPEG_DISABLE) != 0){
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/* DCMI config failed */
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// DCMI config failed
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return -4;
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return -5;
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}
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}
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/* All good! */
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/* All good! */
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