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Merge pull request #1374 from openmv/rp2_dcmi_pio_updates
Rp2 dcmi pio updates
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commit
0d1fc25a25
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src/omv/boards/ARDUINO_NANO_RP2040_CONNECT/dcmi.pio
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src/omv/boards/ARDUINO_NANO_RP2040_CONNECT/dcmi.pio
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@ -0,0 +1,110 @@
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; This file is part of the OpenMV project.
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;
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; Copyright (c) 2013-2021 Ibrahim Abdelkader <iabdalkader@openmv.io>
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; Copyright (c) 2013-2021 Kwabena W. Agyeman <kwagyeman@openmv.io>
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;
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; This work is licensed under the MIT license, see the file LICENSE for details.
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; Image Sensor PIO program.
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.define public PXCLK 29
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.define public HSYNC 12
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.define public VSYNC 13
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.program dcmi_default
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.wrap_target
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pull block ; Read number of lines in OSR
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mov y, osr ; Copy OSR to Y
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pull block ; Read line width in bytes in OSR
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wait 1 gpio VSYNC ; Wait for VSYNC to go low
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wait 0 gpio VSYNC
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HSYNC_LOOP:
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mov x, osr ; Copy line width from OSR to X
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wait 0 gpio HSYNC ; Wait for HSYNC to go high
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wait 1 gpio HSYNC
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PIXEL_LOOP:
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wait 0 gpio PXCLK
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wait 1 gpio PXCLK
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in pins 7 ; Workaround for NANO noncontiguous data bus.
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jmp pin SET_MSB
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in null, 1
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jmp DONE
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SET_MSB:
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in osr, 1 ; OSR always has an odd value (width - 1)
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DONE:
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jmp x-- PIXEL_LOOP ; Keep reading pixels while x != 0
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jmp y-- HSYNC_LOOP ; Keep reading lines while y != 0
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.wrap
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.program dcmi_odd_byte
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.wrap_target
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pull block ; Read number of lines in OSR
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mov y, osr ; Copy OSR to Y
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pull block ; Read line width in bytes in OSR
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wait 1 gpio VSYNC ; Wait for VSYNC to go low
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wait 0 gpio VSYNC
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HSYNC_LOOP:
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mov x, osr ; Copy line width from OSR to X
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wait 0 gpio HSYNC ; Wait for HSYNC to go high
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wait 1 gpio HSYNC
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PIXEL_LOOP:
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wait 0 gpio PXCLK
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wait 1 gpio PXCLK
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in pins 7 ; Workaround for NANO noncontiguous data bus.
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jmp pin SET_MSB
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in null, 1
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jmp DONE
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SET_MSB:
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in osr, 1 ; OSR always has an odd value (width - 1)
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DONE:
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wait 0 gpio PXCLK
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wait 1 gpio PXCLK
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jmp x-- PIXEL_LOOP ; Keep reading pixels while x != 0
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jmp y-- HSYNC_LOOP ; Keep reading lines while y != 0
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.wrap
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% c-sdk {
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static inline int dcmi_config(uint32_t pixformat)
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{
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uint offset;
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pio_sm_config config;
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pio_sm_set_enabled(DCMI_PIO, DCMI_SM, false);
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pio_sm_clear_fifos(DCMI_PIO, DCMI_SM);
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for(uint i=DCMI_D0_PIN; i<DCMI_D0_PIN+7; i++) {
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pio_gpio_init(DCMI_PIO, i);
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}
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pio_sm_set_consecutive_pindirs(DCMI_PIO, DCMI_SM, DCMI_D0_PIN, 7, false);
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if (pixformat == PIXFORMAT_GRAYSCALE) {
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offset = pio_add_program(DCMI_PIO, &dcmi_odd_byte_program);
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config = dcmi_odd_byte_program_get_default_config(offset);
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} else {
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offset = pio_add_program(DCMI_PIO, &dcmi_default_program);
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config = dcmi_default_program_get_default_config(offset);
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}
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sm_config_set_clkdiv(&config, 1);
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sm_config_set_in_pins(&config, DCMI_D0_PIN);
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gpio_init(DCMI_D7_PIN);
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gpio_set_dir(DCMI_D7_PIN, GPIO_IN);
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sm_config_set_jmp_pin(&config, DCMI_D7_PIN);
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sm_config_set_in_shift(&config, true, true, 32);
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pio_sm_init(DCMI_PIO, DCMI_SM, offset, &config);
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pio_sm_set_enabled(DCMI_PIO, DCMI_SM, true);
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return 0;
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}
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%}
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@ -1,4 +1,4 @@
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set(MICROPY_PY_SENSOR 0)
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set(MICROPY_PY_SENSOR 1)
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set(MICROPY_PY_ULAB 1)
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set(MICROPY_PY_WINC1500 0)
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set(MICROPY_PY_LWIP 0)
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@ -131,7 +131,7 @@ extern unsigned char *OMV_UNIQUE_ID_ADDR;
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#define LCD_RST_PIN (4)
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#define LCD_RST_PIN_WRITE(bit) gpio_put(LCD_RST_PIN, bit);
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#define LCD_RS_PIN (25)
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#define LCD_RS_PIN (0)
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#define LCD_RS_PIN_WRITE(bit) gpio_put(LCD_RS_PIN, bit);
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#define LCD_CS_PIN (5)
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@ -164,7 +164,7 @@ extern unsigned char *OMV_UNIQUE_ID_ADDR;
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#define DCMI_D4_PIN (19)
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#define DCMI_D5_PIN (20)
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#define DCMI_D6_PIN (21)
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#define DCMI_D7_PIN (22) // This pin is missing
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#define DCMI_D7_PIN (25) // MSB is read separately.
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#define DCMI_XCLK_PIN (28)
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@ -19,17 +19,17 @@
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wait 1 gpio VSYNC ; Wait for VSYNC to go low
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wait 0 gpio VSYNC
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line_loop:
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HSYNC_LOOP:
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mov x, osr ; Copy line width from OSR to X
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wait 0 gpio HSYNC ; Wait for HSYNC to go high
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wait 1 gpio HSYNC
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pixels_loop:
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PIXEL_LOOP:
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wait 0 gpio PXCLK
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wait 1 gpio PXCLK
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in pins 8
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jmp x-- pixels_loop ; Keep reading pixels while x != 0
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jmp y-- line_loop ; Keep reading lines while y != 0
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jmp x-- PIXEL_LOOP ; Keep reading pixels while x != 0
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jmp y-- HSYNC_LOOP ; Keep reading lines while y != 0
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.wrap
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.program dcmi_odd_byte
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@ -41,17 +41,48 @@ pixels_loop:
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wait 1 gpio VSYNC ; Wait for VSYNC to go low
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wait 0 gpio VSYNC
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line_loop:
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HSYNC_LOOP:
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mov x, osr ; Copy line width from OSR to X
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wait 0 gpio HSYNC ; Wait for HSYNC to go high
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wait 1 gpio HSYNC
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pixels_loop:
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PIXEL_LOOP:
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wait 0 gpio PXCLK
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wait 1 gpio PXCLK
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in pins 8
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wait 0 gpio PXCLK
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wait 1 gpio PXCLK
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jmp x-- pixels_loop ; Keep reading pixels while x != 0
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jmp y-- line_loop ; Keep reading lines while y != 0
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jmp x-- PIXEL_LOOP ; Keep reading pixels while x != 0
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jmp y-- HSYNC_LOOP ; Keep reading lines while y != 0
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.wrap
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% c-sdk {
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static inline int dcmi_config(uint32_t pixformat)
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{
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uint offset;
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pio_sm_config config;
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pio_sm_set_enabled(DCMI_PIO, DCMI_SM, false);
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pio_sm_clear_fifos(DCMI_PIO, DCMI_SM);
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for(uint i=DCMI_D0_PIN; i<DCMI_D0_PIN+8; i++) {
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pio_gpio_init(DCMI_PIO, i);
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}
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pio_sm_set_consecutive_pindirs(DCMI_PIO, DCMI_SM, DCMI_D0_PIN, 8, false);
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if (pixformat == PIXFORMAT_GRAYSCALE) {
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offset = pio_add_program(DCMI_PIO, &dcmi_odd_byte_program);
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config = dcmi_odd_byte_program_get_default_config(offset);
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} else {
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offset = pio_add_program(DCMI_PIO, &dcmi_default_program);
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config = dcmi_default_program_get_default_config(offset);
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}
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sm_config_set_clkdiv(&config, 1);
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sm_config_set_in_pins(&config, DCMI_D0_PIN);
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sm_config_set_in_shift(&config, true, true, 32);
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pio_sm_init(DCMI_PIO, DCMI_SM, offset, &config);
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pio_sm_set_enabled(DCMI_PIO, DCMI_SM, true);
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return 0;
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}
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%}
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@ -183,7 +183,7 @@ if(MICROPY_PY_SENSOR)
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# Generate DCMI PIO header
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pico_generate_pio_header(${MICROPY_TARGET}
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${TOP_DIR}/${OMV_DIR}/ports/${PORT}/dcmi.pio
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${OMV_BOARD_CONFIG_DIR}/dcmi.pio
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)
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endif()
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@ -137,35 +137,6 @@ static void dma_config(int w, int h, int bpp, uint32_t *capture_buf, bool rev_by
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dma_irqn_set_channel_enabled(DCMI_DMA, DCMI_DMA_CHANNEL, true);
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}
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static int dcmi_config(uint32_t pixformat)
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{
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uint offset;
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pio_sm_config config;
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pio_sm_set_enabled(DCMI_PIO, DCMI_SM, false);
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pio_sm_clear_fifos(DCMI_PIO, DCMI_SM);
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for(uint i=DCMI_D0_PIN; i<DCMI_D0_PIN+8; i++) {
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pio_gpio_init(DCMI_PIO, i);
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}
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pio_sm_set_consecutive_pindirs(DCMI_PIO, DCMI_SM, DCMI_D0_PIN, 8, false);
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if (pixformat == PIXFORMAT_GRAYSCALE) {
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offset = pio_add_program(DCMI_PIO, &dcmi_odd_byte_program);
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config = dcmi_odd_byte_program_get_default_config(offset);
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} else {
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offset = pio_add_program(DCMI_PIO, &dcmi_default_program);
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config = dcmi_default_program_get_default_config(offset);
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}
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sm_config_set_clkdiv(&config, 1);
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sm_config_set_in_pins(&config, DCMI_D0_PIN);
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sm_config_set_in_shift(&config, true, true, 32);
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pio_sm_init(DCMI_PIO, DCMI_SM, offset, &config);
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pio_sm_set_enabled(DCMI_PIO, DCMI_SM, true);
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return 0;
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}
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void dcmi_abort()
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{
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// Disable DMA channel
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