From 2bb8b2d91737be47e3d1a2853c5bb10fc367e99c Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Tue, 22 Oct 2019 01:31:44 +0200 Subject: [PATCH 1/3] System clock config cleanup. * Use HAL_PWREx_ConfigSupply to enable LDO. * Use __HAL_PWR_GET_FLAG to check for VOSRDY. --- src/cmsis/src/st/system_stm32fxxx.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/src/cmsis/src/st/system_stm32fxxx.c b/src/cmsis/src/st/system_stm32fxxx.c index 6d3f2a0ef..857e7c939 100644 --- a/src/cmsis/src/st/system_stm32fxxx.c +++ b/src/cmsis/src/st/system_stm32fxxx.c @@ -180,7 +180,7 @@ void SystemClock_Config(void) #if defined(MCU_SERIES_H7) /* Supply configuration update enable */ - MODIFY_REG(PWR->CR3, PWR_CR3_SCUEN, 0); + HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); #else /* Enable Power Control clock */ __PWR_CLK_ENABLE(); @@ -201,11 +201,8 @@ void SystemClock_Config(void) } // Wait for PWR_FLAG_VOSRDY - #if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7) - //while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) { - //} - #elif defined(MCU_SERIES_H7) - while ((PWR->D3CR & (PWR_D3CR_VOSRDY)) != PWR_D3CR_VOSRDY) { + #if defined(MCU_SERIES_H7) + while (__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET) { } #endif From 132f1706e0b47961a6f08c04dbdda38fa3118522 Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Tue, 22 Oct 2019 01:51:41 +0200 Subject: [PATCH 2/3] Switch to VSCALE1 before entering low-power mode. * For H7 revision V devices where VSCALE0 is possible, the regulator must be switched back to VSCALE1 before entering low-power modes. --- src/micropython | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/micropython b/src/micropython index dac67f735..00069f12c 160000 --- a/src/micropython +++ b/src/micropython @@ -1 +1 @@ -Subproject commit dac67f735da2fc2138a76947936521ffe914b8f4 +Subproject commit 00069f12cf48d12f6a84c242cc33966008637dfa From 25020a1bb5d91a0420b5d8fbfdfa2f3b62a6ccfb Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Tue, 22 Oct 2019 02:03:21 +0200 Subject: [PATCH 3/3] Enable SYSCFG clock before selecting VSCALE0 --- src/cmsis/src/st/system_stm32fxxx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/cmsis/src/st/system_stm32fxxx.c b/src/cmsis/src/st/system_stm32fxxx.c index 857e7c939..a4e8801a6 100644 --- a/src/cmsis/src/st/system_stm32fxxx.c +++ b/src/cmsis/src/st/system_stm32fxxx.c @@ -192,6 +192,7 @@ void SystemClock_Config(void) #if defined(MCU_SERIES_H7) // Enable VSCALE0 for revision V devices. if (HAL_GetREVID() >= 0x2003) { + __HAL_RCC_SYSCFG_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); } else { #else