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Add flag to disable the cache for testing.
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69cb030c44
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@ -66,23 +66,27 @@ void HAL_MspInit(void)
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#endif
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#endif
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/* Enable I/D cache */
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/* Enable I/D cache */
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#if defined(MCU_SERIES_F7) ||\
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#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_H7)
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defined(MCU_SERIES_H7)
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#ifdef OMV_DISABLE_CACHE
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if (SCB->CCR & (uint32_t)SCB_CCR_IC_Msk) {
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// Disable caches for testing.
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/* Disable and Invalidate I-Cache */
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SCB_DisableICache();
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SCB_DisableICache();
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SCB_InvalidateICache();
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}
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if (SCB->CCR & (uint32_t)SCB_CCR_DC_Msk) {
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/* Disable, Clean and Invalidate D-Cache */
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SCB_DisableDCache();
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SCB_DisableDCache();
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SCB_CleanInvalidateDCache();
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#else
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// Enable caches if not enabled, or clean and invalidate.
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if (!(SCB->CCR & (uint32_t)SCB_CCR_IC_Msk)) {
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SCB_EnableICache();
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} else {
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SCB_InvalidateICache();
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__ISB(); __DSB(); __DMB();
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}
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}
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// Enable the CPU Caches
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if (!(SCB->CCR & (uint32_t)SCB_CCR_DC_Msk)) {
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SCB_EnableICache();
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SCB_EnableDCache();
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SCB_EnableDCache();
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} else {
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SCB_CleanInvalidateDCache();
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__ISB(); __DSB(); __DMB();
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}
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#endif
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#endif
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#endif
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/* Config Systick */
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/* Config Systick */
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