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Merge pull request #1201 from kwagyeman/kwabena/flir_dma_fix
Improve FLIR module DMA efficiency
This commit is contained in:
commit
397941930b
@ -55,11 +55,7 @@ static DMA_HandleTypeDef fir_lepton_spi_rx_dma = {};
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#define VOSPI_SEG_SIZE_PIXELS (VOSPI_PIDS_PER_SEG * VOSPI_PID_SIZE_PIXELS) // 16-bits
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#define VOSPI_SEG_SIZE_PIXELS (VOSPI_PIDS_PER_SEG * VOSPI_PID_SIZE_PIXELS) // 16-bits
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#define VOSPI_BUFFER_SIZE (VOSPI_PACKET_SIZE * 2) // 16-bits
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#define VOSPI_BUFFER_SIZE (VOSPI_PACKET_SIZE * 2) // 16-bits
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#if defined(MCU_SERIES_H7)
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#define VOSPI_CLOCK_SPEED 10000000 // hz
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#else
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#define VOSPI_CLOCK_SPEED 20000000 // hz
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#define VOSPI_CLOCK_SPEED 20000000 // hz
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#endif
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#define VOSPI_SYNC_MS 200 // ms
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#define VOSPI_SYNC_MS 200 // ms
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static soft_timer_entry_t flir_lepton_spi_rx_timer = {};
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static soft_timer_entry_t flir_lepton_spi_rx_timer = {};
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@ -472,13 +468,13 @@ int fir_lepton_init(cambus_t *bus, int *w, int *h, int *refresh, int *resolution
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fir_lepton_spi_rx_dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
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fir_lepton_spi_rx_dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
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#endif
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#endif
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#if defined(MCU_SERIES_H7)
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fir_lepton_spi_rx_dma.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
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fir_lepton_spi_rx_dma.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
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#else
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fir_lepton_spi_rx_dma.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
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#endif
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fir_lepton_spi_rx_dma.Init.Mode = DMA_CIRCULAR;
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fir_lepton_spi_rx_dma.Init.Mode = DMA_CIRCULAR;
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fir_lepton_spi_rx_dma.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
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fir_lepton_spi_rx_dma.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_1QUARTERFULL;
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fir_lepton_spi_rx_dma.Init.MemBurst = DMA_MBURST_SINGLE;
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fir_lepton_spi_rx_dma.Init.PeriphBurst = DMA_PBURST_SINGLE;
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((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR =
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((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR =
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(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR & ~DMA_SxCR_PSIZE_Msk) |
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(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR & ~DMA_SxCR_PSIZE_Msk) |
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@ -490,16 +486,28 @@ int fir_lepton_init(cambus_t *bus, int *w, int *h, int *refresh, int *resolution
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((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR =
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((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR =
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(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR & ~DMA_SxCR_MSIZE_Msk) |
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(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR & ~DMA_SxCR_MSIZE_Msk) |
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#if defined(MCU_SERIES_H7)
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DMA_MDATAALIGN_WORD;
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DMA_MDATAALIGN_WORD;
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#else
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DMA_MDATAALIGN_HALFWORD;
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#endif
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((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR =
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((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR =
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(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR & ~DMA_SxCR_CIRC_Msk) |
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(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR & ~DMA_SxCR_CIRC_Msk) |
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DMA_CIRCULAR;
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DMA_CIRCULAR;
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((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->FCR =
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(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->FCR & ~DMA_SxFCR_DMDIS_Msk) |
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DMA_FIFOMODE_ENABLE;
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((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->FCR =
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(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->FCR & ~DMA_SxFCR_FTH_Msk) |
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DMA_FIFO_THRESHOLD_1QUARTERFULL;
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((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR =
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(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR & ~DMA_SxCR_MBURST_Msk) |
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DMA_MBURST_SINGLE;
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((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR =
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(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR & ~DMA_SxCR_PBURST_Msk) |
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DMA_PBURST_SINGLE;
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fb_alloc_mark_permanent();
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fb_alloc_mark_permanent();
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fir_lepton_spi_resync();
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fir_lepton_spi_resync();
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return 0;
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return 0;
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