Merge pull request #1857 from openmv/stm32_pin_refactor

ports/stm32: Refactor all pins defintiions.
This commit is contained in:
Ibrahim Abdelkader 2023-06-10 18:30:49 +03:00 committed by GitHub
commit 4dad177263
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52 changed files with 2309 additions and 2880 deletions

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@ -1,44 +1,52 @@
#include "pixspi.h" /*
#include <stdbool.h> * This file is part of the OpenMV project.
#include STM32_HAL_H *
* Copyright (c) 2021 Lake Fu at <lake_fu@pixart.com>
* Copyright (c) 2023 Ibrahim Abdelkader <iabdalkader@openmv.io>
* Copyright (c) 2023 Kwabena W. Agyeman <kwagyeman@openmv.io>
*
* This work is licensed under the MIT license, see the file LICENSE for details.
*
* Pixart SPI driver.
*/
#include "omv_boardconfig.h"
#ifdef ISC_SPI
#include <stdio.h> #include <stdio.h>
#include <string.h> #include <string.h>
#include <stdbool.h>
#include STM32_HAL_H
#include "common.h" #include "common.h"
#include "omv_boardconfig.h" #include "omv_gpio.h"
#include <py/mpconfig.h>
#ifdef ISC_SPI #include "pixspi.h"
#define SPI_TIMEOUT (5000) /* in ms */
#define CS_PORT ISC_SPI_SSEL_PORT #define SPI_TIMEOUT (5000) // in ms
#define CS_PIN ISC_SPI_SSEL_PIN
#define W_CS_LOW() HAL_GPIO_WritePin(CS_PORT, CS_PIN, GPIO_PIN_RESET)
#define W_CS_HIGH() HAL_GPIO_WritePin(CS_PORT, CS_PIN, GPIO_PIN_SET)
extern SPI_HandleTypeDef ISC_SPIHandle; extern SPI_HandleTypeDef ISC_SPIHandle;
static bool spi_send(uint8_t *data, uint16_t len) static bool spi_send(uint8_t *data, uint16_t len)
{ {
HAL_StatusTypeDef status = HAL_OK; HAL_StatusTypeDef status = HAL_OK;
W_CS_LOW(); omv_gpio_write(ISC_SPI_SSEL_PIN, 0);
//mp_uint_t atomic_state = MICROPY_BEGIN_ATOMIC_SECTION(); // mp_uint_t atomic_state = MICROPY_BEGIN_ATOMIC_SECTION();
status = HAL_SPI_Transmit( status = HAL_SPI_Transmit(
&ISC_SPIHandle, data, len, SPI_TIMEOUT); &ISC_SPIHandle, data, len, SPI_TIMEOUT);
//MICROPY_END_ATOMIC_SECTION(atomic_state); // MICROPY_END_ATOMIC_SECTION(atomic_state);
W_CS_HIGH(); omv_gpio_write(ISC_SPI_SSEL_PIN, 1);
return (status == HAL_OK); return (status == HAL_OK);
} }
static bool spi_send_recv(uint8_t *txData, uint8_t *rxData, uint16_t len) static bool spi_send_recv(uint8_t *txData, uint8_t *rxData, uint16_t len)
{ {
W_CS_LOW(); omv_gpio_write(ISC_SPI_SSEL_PIN, 0);
//mp_uint_t atomic_state = MICROPY_BEGIN_ATOMIC_SECTION(); // mp_uint_t atomic_state = MICROPY_BEGIN_ATOMIC_SECTION();
bool res = (HAL_SPI_Transmit(&ISC_SPIHandle, txData, 1, SPI_TIMEOUT) == HAL_OK); bool res = (HAL_SPI_Transmit(&ISC_SPIHandle, txData, 1, SPI_TIMEOUT) == HAL_OK);
res = (HAL_SPI_Receive(&ISC_SPIHandle, rxData, len, SPI_TIMEOUT) == HAL_OK); res = (HAL_SPI_Receive(&ISC_SPIHandle, rxData, len, SPI_TIMEOUT) == HAL_OK);
//MICROPY_END_ATOMIC_SECTION(atomic_state); // MICROPY_END_ATOMIC_SECTION(atomic_state);
W_CS_HIGH(); omv_gpio_write(ISC_SPI_SSEL_PIN, 1);
return res; return res;
} }
@ -59,47 +67,38 @@ bool pixspi_init()
ISC_SPIHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED; ISC_SPIHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
ISC_SPIHandle.Init.CRCPolynomial = 0; ISC_SPIHandle.Init.CRCPolynomial = 0;
if (HAL_SPI_Init(&ISC_SPIHandle) != HAL_OK) if (HAL_SPI_Init(&ISC_SPIHandle) != HAL_OK) {
{ // Initialization Error
/* Initialization Error */
return false; return false;
} }
GPIO_InitTypeDef GPIO_InitStructure;
// Re-Init GPIO for SPI SS(CS) pin, software control. // Re-Init GPIO for SPI SS(CS) pin, software control.
GPIO_InitStructure.Pin = ISC_SPI_SSEL_PIN; omv_gpio_config(ISC_SPI_SSEL_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStructure.Pull = GPIO_PULLUP;
GPIO_InitStructure.Alternate = ISC_SPI_SSEL_AF;
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(ISC_SPI_SSEL_PORT, &GPIO_InitStructure);
// Default high. // Default high.
W_CS_HIGH(); omv_gpio_write(ISC_SPI_SSEL_PIN, 1);
return true; return true;
} }
void pixspi_release() void pixspi_release()
{ {
W_CS_LOW(); omv_gpio_write(ISC_SPI_SSEL_PIN, 0);
HAL_SPI_DeInit(&ISC_SPIHandle); HAL_SPI_DeInit(&ISC_SPIHandle);
} }
int pixspi_regs_read(uint8_t addr, uint8_t * data, uint16_t length) int pixspi_regs_read(uint8_t addr, uint8_t * data, uint16_t length)
{ {
if ((addr & 0x80)) if ((addr & 0x80)) {
{ #ifdef DEBUG
#ifdef DEBUG
printf("pixspi_regs_read() address (0x%x) overflow.\n", addr); printf("pixspi_regs_read() address (0x%x) overflow.\n", addr);
#endif #endif
return -1; return -1;
} }
addr |= 0x80; addr |= 0x80;
if (!spi_send_recv(&addr, data, length)) if (!spi_send_recv(&addr, data, length)) {
{ #ifdef DEBUG
#ifdef DEBUG
printf("spi_send_recv() failed.\n"); printf("spi_send_recv() failed.\n");
#endif #endif
return -1; return -1;
} }
return 0; return 0;
@ -108,38 +107,29 @@ int pixspi_regs_read(uint8_t addr, uint8_t * data, uint16_t length)
int pixspi_regs_write(uint8_t addr, const uint8_t * data, uint16_t length) int pixspi_regs_write(uint8_t addr, const uint8_t * data, uint16_t length)
{ {
uint8_t buff[64] = {}; uint8_t buff[64] = {};
if ((addr & 0x80) == 0x80) if ((addr & 0x80) == 0x80) {
{ #ifdef DEBUG
#ifdef DEBUG
printf("pixspi_regs_read() address (0x%x) overflow.\n", addr); printf("pixspi_regs_read() address (0x%x) overflow.\n", addr);
#endif #endif
return -1; return -1;
} }
int32_t remaining = length; int32_t remaining = length;
const static uint16_t MAX_LENGTH = 255; const static uint16_t MAX_LENGTH = 255;
do do {
{
uint16_t len = remaining>MAX_LENGTH?MAX_LENGTH:remaining; uint16_t len = remaining>MAX_LENGTH?MAX_LENGTH:remaining;
buff[0] = addr; buff[0] = addr;
memcpy(buff+1, data, len); memcpy(buff+1, data, len);
bool res = spi_send(buff, len + 1); bool res = spi_send(buff, len + 1);
if (!res) if (!res) {
{ #ifdef DEBUG
#ifdef DEBUG
printf("spi_send() failed.\n"); printf("spi_send() failed.\n");
#endif #endif
return -1; return -1;
} }
remaining = remaining - MAX_LENGTH; remaining = remaining - MAX_LENGTH;
} } while (remaining > 0);
while (remaining > 0);
return 0; return 0;
} }
#else #endif
bool pixspi_init() { return false; }
void pixspi_release() {}
int pixspi_regs_read(uint8_t addr, uint8_t * data, uint16_t length) { return -1; }
int pixspi_regs_write(uint8_t addr, const uint8_t * data, uint16_t length) { return -1; }
#endif

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@ -10,10 +10,9 @@
#include "extint.h" #include "extint.h"
#include "systick.h" #include "systick.h"
#include "omv_boardconfig.h" #include "omv_boardconfig.h"
#include "omv_gpio.h"
static tpfNmBspIsr gpfIsr; static tpfNmBspIsr gpfIsr;
static const mp_obj_fun_builtin_fixed_t irq_callback_obj;
/* /*
* @fn nm_bsp_init * @fn nm_bsp_init
* @brief Initialize BSP * @brief Initialize BSP
@ -23,45 +22,21 @@ sint8 nm_bsp_init(void)
{ {
gpfIsr = NULL; gpfIsr = NULL;
// Enable SPI clock
WINC_SPI_CLK_ENABLE();
// Configure SPI pins // Configure SPI pins
GPIO_InitTypeDef GPIO_InitStructure; omv_gpio_config(WINC_SPI_MISO_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_HIGH, -1);
GPIO_InitStructure.Pull = GPIO_PULLDOWN; omv_gpio_config(WINC_SPI_MOSI_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_HIGH, -1);
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP; omv_gpio_config(WINC_SPI_SCLK_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_DOWN, OMV_GPIO_SPEED_HIGH, -1);
GPIO_InitStructure.Speed = GPIO_SPEED_HIGH; omv_gpio_config(WINC_SPI_SSEL_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStructure.Alternate = WINC_SPI_AF; omv_gpio_write(WINC_SPI_SSEL_PIN, 1);
GPIO_InitStructure.Pin = WINC_SPI_MISO_PIN;
HAL_GPIO_Init(WINC_SPI_MISO_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Pin = WINC_SPI_MOSI_PIN;
HAL_GPIO_Init(WINC_SPI_MOSI_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Pin = WINC_SPI_SCLK_PIN;
HAL_GPIO_Init(WINC_SPI_SCLK_PORT, &GPIO_InitStructure);
// Configure GPIO pins // Configure GPIO pins
GPIO_InitStructure.Pull = GPIO_PULLUP; omv_gpio_config(WINC_EN_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP; omv_gpio_write(WINC_EN_PIN, 1);
GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
GPIO_InitStructure.Alternate = 0;
GPIO_InitStructure.Pin = WINC_EN_PIN; omv_gpio_config(WINC_RST_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_LOW, -1);
HAL_GPIO_Init(WINC_EN_PORT, &GPIO_InitStructure); omv_gpio_write(WINC_RST_PIN, 1);
GPIO_InitStructure.Pin = WINC_CS_PIN; // Perform chip reset.
HAL_GPIO_Init(WINC_CS_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Pin = WINC_RST_PIN;
HAL_GPIO_Init(WINC_RST_PORT, &GPIO_InitStructure);
HAL_GPIO_WritePin(WINC_EN_PORT, WINC_EN_PIN, GPIO_PIN_SET);
HAL_GPIO_WritePin(WINC_CS_PORT, WINC_CS_PIN, GPIO_PIN_SET);
HAL_GPIO_WritePin(WINC_RST_PORT, WINC_RST_PIN, GPIO_PIN_SET);
/* Perform chip reset. */
nm_bsp_reset(); nm_bsp_reset();
return M2M_SUCCESS; return M2M_SUCCESS;
@ -74,12 +49,12 @@ sint8 nm_bsp_init(void)
*/ */
void nm_bsp_reset(void) void nm_bsp_reset(void)
{ {
HAL_GPIO_WritePin(WINC_EN_PORT, WINC_EN_PIN, GPIO_PIN_RESET); omv_gpio_write(WINC_EN_PIN, 0);
HAL_GPIO_WritePin(WINC_RST_PORT, WINC_RST_PIN, GPIO_PIN_RESET); omv_gpio_write(WINC_RST_PIN, 0);
nm_bsp_sleep(100); nm_bsp_sleep(100);
HAL_GPIO_WritePin(WINC_EN_PORT, WINC_EN_PIN, GPIO_PIN_SET); omv_gpio_write(WINC_EN_PIN, 1);
nm_bsp_sleep(100); nm_bsp_sleep(100);
HAL_GPIO_WritePin(WINC_RST_PORT, WINC_RST_PIN, GPIO_PIN_SET); omv_gpio_write(WINC_RST_PIN, 1);
nm_bsp_sleep(100); nm_bsp_sleep(100);
} }
@ -95,6 +70,14 @@ void nm_bsp_sleep(uint32 u32TimeMsec)
systick_sleep(u32TimeMsec); systick_sleep(u32TimeMsec);
} }
// Pin IRQ handler
static void nm_bsp_extint_callback(omv_gpio_t pin, void *data)
{
if (gpfIsr) {
gpfIsr();
}
}
/* /*
* @fn nm_bsp_register_isr * @fn nm_bsp_register_isr
* @brief Register interrupt service routine * @brief Register interrupt service routine
@ -104,9 +87,9 @@ void nm_bsp_sleep(uint32 u32TimeMsec)
void nm_bsp_register_isr(tpfNmBspIsr pfIsr) void nm_bsp_register_isr(tpfNmBspIsr pfIsr)
{ {
gpfIsr = pfIsr; gpfIsr = pfIsr;
// register EXTI omv_gpio_config(WINC_IRQ_PIN, OMV_GPIO_MODE_IT_FALL, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_LOW, -1);
extint_register((mp_obj_t)WINC_IRQ_PIN, GPIO_MODE_IT_FALLING, GPIO_PULLUP, (mp_obj_t)&irq_callback_obj, true); omv_gpio_irq_register(WINC_IRQ_PIN, nm_bsp_extint_callback, NULL);
extint_enable(WINC_IRQ_PIN->pin); omv_gpio_irq_enable(WINC_IRQ_PIN, true);
} }
/* /*
@ -115,20 +98,7 @@ void nm_bsp_register_isr(tpfNmBspIsr pfIsr)
* @param[IN] u8Enable * @param[IN] u8Enable
* '0' disable interrupts. '1' enable interrupts * '0' disable interrupts. '1' enable interrupts
*/ */
void nm_bsp_interrupt_ctrl(uint8 u8Enable) void nm_bsp_interrupt_ctrl(uint8 enable)
{ {
if (u8Enable) { omv_gpio_irq_enable(WINC_IRQ_PIN, enable);
extint_enable(WINC_IRQ_PIN->pin);
} else {
extint_disable(WINC_IRQ_PIN->pin);
}
} }
static mp_obj_t irq_callback(mp_obj_t line) {
if (gpfIsr) {
gpfIsr();
}
return mp_const_none;
}
STATIC MP_DEFINE_CONST_FUN_OBJ_1(irq_callback_obj, irq_callback);

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@ -52,6 +52,7 @@
#include "genhdr/pins.h" #include "genhdr/pins.h"
#include "extint.h" #include "extint.h"
#include "omv_boardconfig.h" #include "omv_boardconfig.h"
#include "omv_gpio.h"
static SPI_HandleTypeDef SPI_HANDLE; static SPI_HandleTypeDef SPI_HANDLE;
@ -93,7 +94,7 @@ static sint8 nm_i2c_write_special(uint8 *wb1, uint16 sz1, uint8 *wb2, uint16 sz2
static sint8 spi_rw(uint8 *tx_buf, uint8 *rx_buf, uint16 u16Sz) static sint8 spi_rw(uint8 *tx_buf, uint8 *rx_buf, uint16 u16Sz)
{ {
sint8 result = M2M_SUCCESS; sint8 result = M2M_SUCCESS;
WINC_CS_LOW(); omv_gpio_write(WINC_SPI_SSEL_PIN, 0);
if (tx_buf != 0) { if (tx_buf != 0) {
if (HAL_SPI_Transmit(&SPI_HANDLE, tx_buf, u16Sz, WINC_SPI_TIMEOUT) != HAL_OK) { if (HAL_SPI_Transmit(&SPI_HANDLE, tx_buf, u16Sz, WINC_SPI_TIMEOUT) != HAL_OK) {
result = M2M_ERR_BUS_FAIL; result = M2M_ERR_BUS_FAIL;
@ -104,7 +105,7 @@ static sint8 spi_rw(uint8 *tx_buf, uint8 *rx_buf, uint16 u16Sz)
result = M2M_ERR_BUS_FAIL; result = M2M_ERR_BUS_FAIL;
} }
} }
WINC_CS_HIGH(); omv_gpio_write(WINC_SPI_SSEL_PIN, 1);
return result; return result;
} }
#endif #endif
@ -118,7 +119,7 @@ sint8 nm_bus_init(void *pvinit)
{ {
sint8 result = M2M_SUCCESS; sint8 result = M2M_SUCCESS;
WINC_CS_HIGH(); omv_gpio_write(WINC_SPI_SSEL_PIN, 1);
// SPI configuration // SPI configuration
SPI_HANDLE.Instance = WINC_SPI; SPI_HANDLE.Instance = WINC_SPI;
@ -134,6 +135,9 @@ sint8 nm_bus_init(void *pvinit)
SPI_HANDLE.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED; SPI_HANDLE.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
SPI_HANDLE.Init.CRCPolynomial = 7; SPI_HANDLE.Init.CRCPolynomial = 7;
// Enable SPI clock
WINC_SPI_CLK_ENABLE();
// Init SPI // Init SPI
HAL_SPI_DeInit(&SPI_HANDLE); HAL_SPI_DeInit(&SPI_HANDLE);
if (HAL_SPI_Init(&SPI_HANDLE) != HAL_OK) { if (HAL_SPI_Init(&SPI_HANDLE) != HAL_OK) {
@ -141,7 +145,7 @@ sint8 nm_bus_init(void *pvinit)
} }
nm_bsp_reset(); nm_bsp_reset();
WINC_CS_HIGH(); omv_gpio_write(WINC_SPI_SSEL_PIN, 1);
return result; return result;
} }

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@ -8,13 +8,13 @@
* *
* WINC1500 driver. * WINC1500 driver.
*/ */
#include "winc.h" #include STM32_HAL_H
#include "common.h"
#include <string.h> #include <string.h>
#include <stdbool.h> #include <stdbool.h>
#include <stdint.h> #include <stdint.h>
#include <errno.h> #include <errno.h>
#include STM32_HAL_H #include "winc.h"
#include "common.h"
// WINC's includes // WINC's includes
#include "driver/include/nmasic.h" #include "driver/include/nmasic.h"

@ -1 +1 @@
Subproject commit 84260c659ca1dfda9b94e5821b57dfdc005d9154 Subproject commit ad78d24e47cb1d0f7940c039d873f832bbcf7c0f

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@ -134,16 +134,6 @@ extern unsigned char *OMV_UNIQUE_ID_ADDR; // Unique address.
#define LCD_RST_PIN (4) #define LCD_RST_PIN (4)
#define LCD_RS_PIN (0) #define LCD_RS_PIN (0)
// WiFi/NINA config.
#define WIFI_SPI (spi1)
#define WIFI_CS_PIN (9)
#define WIFI_MOSI_PIN (11)
#define WIFI_MISO_PIN (8)
#define WIFI_SCLK_PIN (14)
#define WIFI_RST_PIN (3)
#define WIFI_GPIO0_PIN (2)
#define WIFI_ACK_PIN (10)
// AUDIO config. // AUDIO config.
#define PDM_PIO (pio1) #define PDM_PIO (pio1)
#define PDM_SM (0) #define PDM_SM (0)
@ -161,7 +151,7 @@ extern unsigned char *OMV_UNIQUE_ID_ADDR; // Unique address.
#define DCMI_DMA_IRQ (DMA_IRQ_0) #define DCMI_DMA_IRQ (DMA_IRQ_0)
#define DCMI_DMA_CHANNEL (0) #define DCMI_DMA_CHANNEL (0)
#define DCMI_PWDN_PIN (0) #define DCMI_POWER_PIN (0)
#define DCMI_RESET_PIN (1) #define DCMI_RESET_PIN (1)
#define DCMI_D0_PIN (15) #define DCMI_D0_PIN (15)
@ -175,24 +165,9 @@ extern unsigned char *OMV_UNIQUE_ID_ADDR; // Unique address.
#define DCMI_XCLK_PIN (28) #define DCMI_XCLK_PIN (28)
// Must match the pins defined in dcmi.pio.
#define DCMI_PXCLK_PIN (29) #define DCMI_PXCLK_PIN (29)
#define DCMI_HSYNC_PIN (27) #define DCMI_HSYNC_PIN (27)
#define DCMI_VSYNC_PIN (26) #define DCMI_VSYNC_PIN (26)
#if defined(DCMI_RESET_PIN)
#define DCMI_RESET_LOW() gpio_put(DCMI_RESET_PIN, 0)
#define DCMI_RESET_HIGH() gpio_put(DCMI_RESET_PIN, 1)
#else
#define DCMI_RESET_LOW()
#define DCMI_RESET_HIGH()
#endif
#if defined(DCMI_PWDN_PIN)
#define DCMI_PWDN_LOW() gpio_put(DCMI_PWDN_PIN, 0)
#define DCMI_PWDN_HIGH() gpio_put(DCMI_PWDN_PIN, 1)
#else
#define DCMI_PWDN_LOW()
#define DCMI_PWDN_HIGH()
#endif
#endif //__OMV_BOARDCONFIG_H__ #endif //__OMV_BOARDCONFIG_H__

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@ -23,10 +23,10 @@
#define OMV_XCLK_TIM (1U) #define OMV_XCLK_TIM (1U)
#define OMV_XCLK_OSC (2U) #define OMV_XCLK_OSC (2U)
// Sensor external clock source. // Sensor external clock source
#define OMV_XCLK_SOURCE (OMV_XCLK_TIM) #define OMV_XCLK_SOURCE (OMV_XCLK_TIM)
// Sensor external clock timer frequency. // Sensor external clock timer frequency
#define OMV_XCLK_FREQUENCY (12000000) #define OMV_XCLK_FREQUENCY (12000000)
// GC4145 Sensor Settings // GC4145 Sensor Settings
@ -35,10 +35,18 @@
// Enable hardware JPEG // Enable hardware JPEG
#define OMV_HARDWARE_JPEG (1) #define OMV_HARDWARE_JPEG (1)
// Enable MDMA sensor offload. // Enable MDMA sensor offload
#define OMV_ENABLE_SENSOR_MDMA (1) #define OMV_ENABLE_SENSOR_MDMA (1)
// Enable sensor drivers // Enable additional GPIO banks
#define OMV_ENABLE_GPIO_BANK_F (1)
#define OMV_ENABLE_GPIO_BANK_G (1)
#define OMV_ENABLE_GPIO_BANK_H (1)
#define OMV_ENABLE_GPIO_BANK_I (1)
#define OMV_ENABLE_GPIO_BANK_J (1)
#define OMV_ENABLE_GPIO_BANK_K (1)
// Configure image sensor drivers
#define OMV_ENABLE_OV2640 (0) #define OMV_ENABLE_OV2640 (0)
#define OMV_ENABLE_OV5640 (0) #define OMV_ENABLE_OV5640 (0)
#define OMV_ENABLE_OV7690 (1) #define OMV_ENABLE_OV7690 (1)
@ -50,8 +58,12 @@
#define OMV_ENABLE_HM01B0 (0) #define OMV_ENABLE_HM01B0 (0)
#define OMV_ENABLE_GC2145 (1) #define OMV_ENABLE_GC2145 (1)
// Enable sensor features // Configure FIR sensors drivers
#define OMV_ENABLE_OV5640_AF (0) #define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// Enable WiFi debug // Enable WiFi debug
#define OMV_ENABLE_WIFIDBG (0) #define OMV_ENABLE_WIFIDBG (0)
@ -76,9 +88,8 @@
// USB IRQn. // USB IRQn.
#define OMV_USB_IRQN (OTG_HS_IRQn) #define OMV_USB_IRQN (OTG_HS_IRQn)
#define OMV_USB_ULPI (1) #define OMV_USB_ULPI (1)
#define OMV_USB_ULPI_DIR_PORT (GPIOC) #define OMV_USB_ULPI_STP_PIN (&omv_pin_C0_OTG_HS)
#define OMV_USB_ULPI_DIR_PIN (GPIO_PIN_2) #define OMV_USB_ULPI_DIR_PIN (&omv_pin_C2_OTG_HS)
#define OMV_USB_ULPI_DIR_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
// Defined for cpu frequency scaling to override the revid. // Defined for cpu frequency scaling to override the revid.
#define OMV_MAX_CPU_FREQ (400) #define OMV_MAX_CPU_FREQ (400)
@ -210,118 +221,53 @@
// Image sensor I2C // Image sensor I2C
#define ISC_I2C (I2C3) #define ISC_I2C (I2C3)
#define ISC_I2C_ID (3) #define ISC_I2C_ID (3)
#define ISC_I2C_AF (GPIO_AF4_I2C3) #define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_SCL_PIN (&omv_pin_A8_I2C3)
#define ISC_I2C_SDA_PIN (&omv_pin_C9_I2C3)
#define ISC_I2C_CLK_ENABLE() __I2C3_CLK_ENABLE() #define ISC_I2C_CLK_ENABLE() __I2C3_CLK_ENABLE()
#define ISC_I2C_CLK_DISABLE() __I2C3_CLK_DISABLE() #define ISC_I2C_CLK_DISABLE() __I2C3_CLK_DISABLE()
#define ISC_I2C_SCL_PORT (GPIOA)
#define ISC_I2C_SCL_PIN (GPIO_PIN_8)
#define ISC_I2C_SDA_PORT (GPIOC)
#define ISC_I2C_SDA_PIN (GPIO_PIN_9)
#define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C3_FORCE_RESET() #define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C3_FORCE_RESET()
#define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C3_RELEASE_RESET() #define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C3_RELEASE_RESET()
// FIR I2C // FIR I2C
#define FIR_I2C (I2C1) #define FIR_I2C (I2C1)
#define FIR_I2C_ID (1) #define FIR_I2C_ID (1)
#define FIR_I2C_AF (GPIO_AF4_I2C1) #define FIR_I2C_SPEED (CAMBUS_SPEED_FULL)
#define FIR_I2C_SCL_PIN (&omv_pin_B8_I2C1)
#define FIR_I2C_SDA_PIN (&omv_pin_B9_I2C1)
#define FIR_I2C_CLK_ENABLE() __I2C1_CLK_ENABLE() #define FIR_I2C_CLK_ENABLE() __I2C1_CLK_ENABLE()
#define FIR_I2C_CLK_DISABLE() __I2C1_CLK_DISABLE() #define FIR_I2C_CLK_DISABLE() __I2C1_CLK_DISABLE()
#define FIR_I2C_SCL_PORT (GPIOB)
#define FIR_I2C_SCL_PIN (GPIO_PIN_8)
#define FIR_I2C_SDA_PORT (GPIOB)
#define FIR_I2C_SDA_PIN (GPIO_PIN_9)
#define FIR_I2C_SPEED (CAMBUS_SPEED_FULL)
#define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET() #define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET()
#define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET() #define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET()
#define SOFT_I2C_SIOC_PIN (&omv_pin_C10_GPIO)
#define SOFT_I2C_SIOD_PIN (&omv_pin_C11_GPIO)
#define SOFT_I2C_SPIN_DELAY 64
/* DCMI */ /* DCMI */
#define DCMI_TIM (TIM3) #define DCMI_TIM (TIM3)
#define DCMI_TIM_PORT (GPIOA) #define DCMI_TIM_PIN (&omv_pin_A7_TIM3)
#define DCMI_TIM_PIN (GPIO_PIN_7)
#define DCMI_TIM_AF (GPIO_AF2_TIM3)
#define DCMI_TIM_CHANNEL (TIM_CHANNEL_2) #define DCMI_TIM_CHANNEL (TIM_CHANNEL_2)
#define DCMI_TIM_CLK_ENABLE() __TIM3_CLK_ENABLE() #define DCMI_TIM_CLK_ENABLE() __TIM3_CLK_ENABLE()
#define DCMI_TIM_CLK_DISABLE() __TIM3_CLK_DISABLE() #define DCMI_TIM_CLK_DISABLE() __TIM3_CLK_DISABLE()
#define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK1Freq() #define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK1Freq()
//#define DCMI_RESET_PORT (GPIOA) //#define DCMI_RESET_PIN (&omv_pin_A10_GPIO)
//#define DCMI_RESET_PIN (GPIO_PIN_10) //#define DCMI_POWER_PIN (&omv_pin_G3_GPIO)
//#define DCMI_FSYNC_PIN (&omv_pin_B4_GPIO)
//#define DCMI_PWDN_PORT (GPIOG) #define DCMI_D0_PIN (&omv_pin_C6_DCMI)
//#define DCMI_PWDN_PIN (GPIO_PIN_3) #define DCMI_D1_PIN (&omv_pin_C7_DCMI)
#define DCMI_D2_PIN (&omv_pin_E0_DCMI)
#define DCMI_D3_PIN (&omv_pin_E1_DCMI)
#define DCMI_D4_PIN (&omv_pin_E4_DCMI)
#define DCMI_D5_PIN (&omv_pin_D3_DCMI)
#define DCMI_D6_PIN (&omv_pin_E5_DCMI)
#define DCMI_D7_PIN (&omv_pin_E6_DCMI)
//#define DCMI_FSYNC_PORT (GPIOB) #define DCMI_HSYNC_PIN (&omv_pin_A4_DCMI)
//#define DCMI_FSYNC_PIN (GPIO_PIN_4) #define DCMI_VSYNC_PIN (&omv_pin_G9_DCMI)
#define DCMI_PXCLK_PIN (&omv_pin_A6_DCMI)
#define DCMI_D0_PORT (GPIOC)
#define DCMI_D0_PIN (GPIO_PIN_6)
#define DCMI_D1_PORT (GPIOC)
#define DCMI_D1_PIN (GPIO_PIN_7)
#define DCMI_D2_PORT (GPIOE)
#define DCMI_D2_PIN (GPIO_PIN_0)
#define DCMI_D3_PORT (GPIOE)
#define DCMI_D3_PIN (GPIO_PIN_1)
#define DCMI_D4_PORT (GPIOE)
#define DCMI_D4_PIN (GPIO_PIN_4)
#define DCMI_D5_PORT (GPIOD)
#define DCMI_D5_PIN (GPIO_PIN_3)
#define DCMI_D6_PORT (GPIOE)
#define DCMI_D6_PIN (GPIO_PIN_5)
#define DCMI_D7_PORT (GPIOE)
#define DCMI_D7_PIN (GPIO_PIN_6)
#define DCMI_HSYNC_PORT (GPIOA)
#define DCMI_HSYNC_PIN (GPIO_PIN_4)
#define DCMI_VSYNC_PORT (GPIOG)
#define DCMI_VSYNC_PIN (GPIO_PIN_9)
#define DCMI_PXCLK_PORT (GPIOA)
#define DCMI_PXCLK_PIN (GPIO_PIN_6)
#if defined(DCMI_RESET_PIN)
#define DCMI_RESET_LOW() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_RESET)
#define DCMI_RESET_HIGH() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_SET)
#else
#define DCMI_RESET_LOW()
#define DCMI_RESET_HIGH()
#endif
#if defined(DCMI_PWDN_PIN)
#define DCMI_PWDN_LOW() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_SET)
#define DCMI_PWDN_HIGH() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_RESET)
#else
#define DCMI_PWDN_LOW()
#define DCMI_PWDN_HIGH()
#endif
#define DCMI_VSYNC_EXTI_IRQN (EXTI9_5_IRQn)
#define DCMI_VSYNC_EXTI_LINE (9)
#define DCMI_VSYNC_EXTI_GPIO (EXTI_GPIOG)
#define DCMI_VSYNC_EXTI_SHARED (0)
#define SOFT_I2C_PORT GPIOC
#define SOFT_I2C_SIOC_PIN GPIO_PIN_10
#define SOFT_I2C_SIOD_PIN GPIO_PIN_11
#define SOFT_I2C_SIOC_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOC_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOD_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_READ() HAL_GPIO_ReadPin (SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN)
#define SOFT_I2C_SIOD_WRITE(bit) HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, bit);
#define SOFT_I2C_SPIN_DELAY 64
// DFSDM1 // DFSDM1
#define AUDIO_DFSDM (DFSDM1_Channel2) #define AUDIO_DFSDM (DFSDM1_Channel2)
@ -331,13 +277,8 @@
#define AUDIO_DFSDM_FREQMHZ (50) #define AUDIO_DFSDM_FREQMHZ (50)
#define AUDIO_MAX_CHANNELS (1) // Maximum number of channels. #define AUDIO_MAX_CHANNELS (1) // Maximum number of channels.
#define AUDIO_DFSDM_CK_PORT (GPIOD) #define AUDIO_DFSDM_CK_PIN (&omv_pin_D10_DFSDM1)
#define AUDIO_DFSDM_CK_PIN (GPIO_PIN_10) #define AUDIO_DFSDM_D1_PIN (&omv_pin_E7_DFSDM1)
#define AUDIO_DFSDM_CK_AF (GPIO_AF3_DFSDM1)
#define AUDIO_DFSDM_D1_PORT (GPIOE)
#define AUDIO_DFSDM_D1_PIN (GPIO_PIN_7)
#define AUDIO_DFSDM_D1_AF (GPIO_AF3_DFSDM1)
#define AUDIO_DFSDM_FLT0 DFSDM1_Filter0 #define AUDIO_DFSDM_FLT0 DFSDM1_Filter0
#define AUDIO_DFSDM_FLT0_IRQ DFSDM1_FLT0_IRQn #define AUDIO_DFSDM_FLT0_IRQ DFSDM1_FLT0_IRQn
@ -351,9 +292,7 @@
#define AUDIO_DFSDM_CLK_DISABLE() __HAL_RCC_DFSDM1_CLK_DISABLE() #define AUDIO_DFSDM_CLK_DISABLE() __HAL_RCC_DFSDM1_CLK_DISABLE()
#define AUDIO_DFSDM_DMA_CLK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE() #define AUDIO_DFSDM_DMA_CLK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE()
#define IMU_CHIP_LSM6DSOX (1)
#define IMU_SPI (SPI5) #define IMU_SPI (SPI5)
#define IMU_SPI_AF (GPIO_AF5_SPI5)
// SPI4/5 clock source is PLL3 (160MHz/16 == 10MHz). // SPI4/5 clock source is PLL3 (160MHz/16 == 10MHz).
#define IMU_SPI_PRESCALER (SPI_BAUDRATEPRESCALER_16) #define IMU_SPI_PRESCALER (SPI_BAUDRATEPRESCALER_16)
@ -363,67 +302,37 @@
#define IMU_SPI_CLK_ENABLE() __HAL_RCC_SPI5_CLK_ENABLE() #define IMU_SPI_CLK_ENABLE() __HAL_RCC_SPI5_CLK_ENABLE()
#define IMU_SPI_CLK_DISABLE() __HAL_RCC_SPI5_CLK_DISABLE() #define IMU_SPI_CLK_DISABLE() __HAL_RCC_SPI5_CLK_DISABLE()
#define IMU_SPI_SSEL_PORT (GPIOF) #define IMU_SPI_SCLK_PIN (&omv_pin_F7_SPI5)
#define IMU_SPI_SSEL_PIN (GPIO_PIN_6) #define IMU_SPI_MISO_PIN (&omv_pin_F8_SPI5)
#define IMU_SPI_MOSI_PIN (&omv_pin_F11_SPI5)
#define IMU_SPI_SSEL_PIN (&omv_pin_F6_SPI5)
#define IMU_SPI_SCLK_PORT (GPIOF) // IMU configuration
#define IMU_SPI_SCLK_PIN (GPIO_PIN_7) #define OMV_IMU_X_Y_ROTATION_DEGREES 90
#define OMV_IMU_MOUNTING_Z_DIRECTION -1
#define IMU_SPI_MISO_PORT (GPIOF) #define IMU_CHIP_LSM6DSOX (1)
#define IMU_SPI_MISO_PIN (GPIO_PIN_8)
#define IMU_SPI_MOSI_PORT (GPIOF)
#define IMU_SPI_MOSI_PIN (GPIO_PIN_11)
// SPI LCD Interface // SPI LCD Interface
#define OMV_SPI_LCD_CONTROLLER (&spi_obj[3]) #define OMV_SPI_LCD_CONTROLLER (&spi_obj[3])
#define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI4) #define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI4)
#define OMV_SPI_LCD_MOSI_PIN (GPIO_PIN_14) #define OMV_SPI_LCD_MOSI_PIN (&omv_pin_E14_SPI4)
#define OMV_SPI_LCD_MOSI_PORT (GPIOE) #define OMV_SPI_LCD_MISO_PIN (&omv_pin_E13_SPI4)
#define OMV_SPI_LCD_MOSI_ALT (GPIO_AF5_SPI4) #define OMV_SPI_LCD_SCLK_PIN (&omv_pin_E12_SPI4)
#define OMV_SPI_LCD_SSEL_PIN (&omv_pin_E11_GPIO)
#define OMV_SPI_LCD_MISO_PIN (GPIO_PIN_13) #define OMV_SPI_LCD_RS_PIN (&omv_pin_C11_GPIO)
#define OMV_SPI_LCD_MISO_PORT (GPIOE) //#define OMV_SPI_LCD_BL_PIN (&omv_pin_A4_GPIO)
#define OMV_SPI_LCD_MISO_ALT (GPIO_AF5_SPI4) #define OMV_SPI_LCD_RST_PIN (&omv_pin_C10_GPIO)
#define OMV_SPI_LCD_SCLK_PIN (GPIO_PIN_12) #ifdef OMV_SPI_LCD_BL_PIN
#define OMV_SPI_LCD_SCLK_PORT (GPIOE) #define OMV_SPI_LCD_BL_DAC (DAC1)
#define OMV_SPI_LCD_SCLK_ALT (GPIO_AF5_SPI4) #define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_1)
#define OMV_SPI_LCD_BL_DAC_CLK_ENABLE() __HAL_RCC_DAC12_CLK_ENABLE()
#define OMV_SPI_LCD_CS_PIN (GPIO_PIN_11) #define OMV_SPI_LCD_BL_DAC_CLK_DISABLE() __HAL_RCC_DAC12_CLK_DISABLE()
#define OMV_SPI_LCD_CS_PORT (GPIOE) #define OMV_SPI_LCD_BL_DAC_FORCE_RESET() __HAL_RCC_DAC12_FORCE_RESET()
#define OMV_SPI_LCD_CS_HIGH() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_SET) #define OMV_SPI_LCD_BL_DAC_RELEASE_RESET() __HAL_RCC_DAC12_RELEASE_RESET()
#define OMV_SPI_LCD_CS_LOW() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_RESET) #endif
#define OMV_SPI_LCD_RST_PIN (GPIO_PIN_10)
#define OMV_SPI_LCD_RST_PORT (GPIOC)
#define OMV_SPI_LCD_RST_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RST_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_RS_PIN (GPIO_PIN_11)
#define OMV_SPI_LCD_RS_PORT (GPIOC)
#define OMV_SPI_LCD_RS_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RS_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_RESET)
//#define OMV_SPI_LCD_BL_PIN (GPIO_PIN_4)
//#define OMV_SPI_LCD_BL_PORT (GPIOA)
//#define OMV_SPI_LCD_BL_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_SET)
//#define OMV_SPI_LCD_BL_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_RESET)
//#define OMV_SPI_LCD_BL_DAC (DAC1)
//#define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_1)
//#define OMV_SPI_LCD_BL_DAC_CLK_ENABLE() __HAL_RCC_DAC12_CLK_ENABLE()
//#define OMV_SPI_LCD_BL_DAC_CLK_DISABLE() __HAL_RCC_DAC12_CLK_DISABLE()
//#define OMV_SPI_LCD_BL_DAC_FORCE_RESET() __HAL_RCC_DAC12_FORCE_RESET()
//#define OMV_SPI_LCD_BL_DAC_RELEASE_RESET() __HAL_RCC_DAC12_RELEASE_RESET()
// FIR Module
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// FIR Lepton // FIR Lepton
#define OMV_FIR_LEPTON_I2C_BUS (FIR_I2C_ID) #define OMV_FIR_LEPTON_I2C_BUS (FIR_I2C_ID)
@ -431,33 +340,9 @@
#define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[3]) #define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[3])
#define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI4) #define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI4)
#define OMV_FIR_LEPTON_MOSI_PIN (GPIO_PIN_14) #define OMV_FIR_LEPTON_MOSI_PIN (&omv_pin_E14_SPI4)
#define OMV_FIR_LEPTON_MOSI_PORT (GPIOE) #define OMV_FIR_LEPTON_MISO_PIN (&omv_pin_E13_SPI4)
#define OMV_FIR_LEPTON_MOSI_ALT (GPIO_AF5_SPI4) #define OMV_FIR_LEPTON_SCLK_PIN (&omv_pin_E12_SPI4)
#define OMV_FIR_LEPTON_SSEL_PIN (&omv_pin_E11_GPIO)
#define OMV_FIR_LEPTON_MISO_PIN (GPIO_PIN_13)
#define OMV_FIR_LEPTON_MISO_PORT (GPIOE)
#define OMV_FIR_LEPTON_MISO_ALT (GPIO_AF5_SPI4)
#define OMV_FIR_LEPTON_SCLK_PIN (GPIO_PIN_12)
#define OMV_FIR_LEPTON_SCLK_PORT (GPIOE)
#define OMV_FIR_LEPTON_SCLK_ALT (GPIO_AF5_SPI4)
#define OMV_FIR_LEPTON_CS_PIN (GPIO_PIN_11)
#define OMV_FIR_LEPTON_CS_PORT (GPIOE)
#define OMV_FIR_LEPTON_CS_HIGH() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_SET)
#define OMV_FIR_LEPTON_CS_LOW() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_RESET)
// IMU Orientation
#define OMV_IMU_X_Y_ROTATION_DEGREES 90
#define OMV_IMU_MOUNTING_Z_DIRECTION -1
// Enable additional GPIO banks for DRAM...
#define OMV_ENABLE_GPIO_BANK_F
#define OMV_ENABLE_GPIO_BANK_G
#define OMV_ENABLE_GPIO_BANK_H
#define OMV_ENABLE_GPIO_BANK_I
#define OMV_ENABLE_GPIO_BANK_J
#define OMV_ENABLE_GPIO_BANK_K
#endif //__OMV_BOARDCONFIG_H__ #endif //__OMV_BOARDCONFIG_H__

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@ -0,0 +1,34 @@
OMV_GPIO_DEFINE(A, 4, NONE, GPIO)
OMV_GPIO_DEFINE(A, 4, AF13, DCMI)
OMV_GPIO_DEFINE(A, 6, AF13, DCMI)
OMV_GPIO_DEFINE(A, 7, AF2, TIM3)
OMV_GPIO_DEFINE(A, 8, AF4, I2C3)
OMV_GPIO_DEFINE(A, 10, NONE, GPIO)
OMV_GPIO_DEFINE(B, 4, NONE, GPIO)
OMV_GPIO_DEFINE(B, 8, AF4, I2C1)
OMV_GPIO_DEFINE(B, 9, AF4, I2C1)
OMV_GPIO_DEFINE(C, 0, AF10, OTG_HS)
OMV_GPIO_DEFINE(C, 2, AF10, OTG_HS)
OMV_GPIO_DEFINE(C, 6, AF13, DCMI)
OMV_GPIO_DEFINE(C, 7, AF13, DCMI)
OMV_GPIO_DEFINE(C, 9, AF4, I2C3)
OMV_GPIO_DEFINE(C, 10, NONE, GPIO)
OMV_GPIO_DEFINE(C, 11, NONE, GPIO)
OMV_GPIO_DEFINE(D, 3, AF13, DCMI)
OMV_GPIO_DEFINE(D, 10, AF3, DFSDM1)
OMV_GPIO_DEFINE(E, 0, AF13, DCMI)
OMV_GPIO_DEFINE(E, 1, AF13, DCMI)
OMV_GPIO_DEFINE(E, 4, AF13, DCMI)
OMV_GPIO_DEFINE(E, 5, AF13, DCMI)
OMV_GPIO_DEFINE(E, 6, AF13, DCMI)
OMV_GPIO_DEFINE(E, 7, AF3, DFSDM1)
OMV_GPIO_DEFINE(E, 11, NONE, GPIO)
OMV_GPIO_DEFINE(E, 12, AF5, SPI4)
OMV_GPIO_DEFINE(E, 13, AF5, SPI4)
OMV_GPIO_DEFINE(E, 14, AF5, SPI4)
OMV_GPIO_DEFINE(F, 6, AF5, SPI5)
OMV_GPIO_DEFINE(F, 7, AF5, SPI5)
OMV_GPIO_DEFINE(F, 8, AF5, SPI5)
OMV_GPIO_DEFINE(F, 11, AF5, SPI5)
OMV_GPIO_DEFINE(G, 3, NONE, GPIO)
OMV_GPIO_DEFINE(G, 9, AF13, DCMI)

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@ -28,27 +28,20 @@
// Sensor external clock timer frequency. // Sensor external clock timer frequency.
#define OMV_XCLK_FREQUENCY (12000000) #define OMV_XCLK_FREQUENCY (12000000)
// Sensor PLL register value.
#define OMV_OV7725_PLL_CONFIG (0x41) // x4
// Sensor Banding Filter Value
#define OMV_OV7725_BANDING (0x7F)
// OV5640 Sensor Settings
#define OMV_OV5640_XCLK_FREQ (12500000)
#define OMV_OV5640_PLL_CTRL2 (0x7E)
#define OMV_OV5640_PLL_CTRL3 (0x13)
#define OMV_OV5640_REV_Y_CHECK (0)
#define OMV_OV5640_REV_Y_FREQ (12500000)
#define OMV_OV5640_REV_Y_CTRL2 (0x7E)
#define OMV_OV5640_REV_Y_CTRL3 (0x13)
// Enable hardware JPEG // Enable hardware JPEG
#define OMV_HARDWARE_JPEG (1) #define OMV_HARDWARE_JPEG (1)
// Enable MDMA sensor offload. // Enable MDMA sensor offload.
#define OMV_ENABLE_SENSOR_MDMA (1) #define OMV_ENABLE_SENSOR_MDMA (1)
// Enable additional GPIO banks.
#define OMV_ENABLE_GPIO_BANK_F (1)
#define OMV_ENABLE_GPIO_BANK_G (1)
#define OMV_ENABLE_GPIO_BANK_H (1)
#define OMV_ENABLE_GPIO_BANK_I (1)
#define OMV_ENABLE_GPIO_BANK_J (1)
#define OMV_ENABLE_GPIO_BANK_K (1)
// Enable sensor drivers // Enable sensor drivers
#define OMV_ENABLE_OV2640 (0) #define OMV_ENABLE_OV2640 (0)
#define OMV_ENABLE_OV5640 (1) #define OMV_ENABLE_OV5640 (1)
@ -62,10 +55,30 @@
#define OMV_ENABLE_HM0360 (1) #define OMV_ENABLE_HM0360 (1)
#define OMV_ENABLE_GC2145 (0) #define OMV_ENABLE_GC2145 (0)
// Enable sensor features // OV7725 sensor settings
#define OMV_ENABLE_OV5640_AF (1) #define OMV_OV7725_PLL_CONFIG (0x41) // x4
#define OMV_OV7725_BANDING (0x7F)
// MT9V0XX sensor settings
#define MT9V0XX_XCLK_FREQ (25000000) #define MT9V0XX_XCLK_FREQ (25000000)
// OV5640 sensor settings
#define OMV_ENABLE_OV5640_AF (1)
#define OMV_OV5640_XCLK_FREQ (12500000)
#define OMV_OV5640_PLL_CTRL2 (0x7E)
#define OMV_OV5640_PLL_CTRL3 (0x13)
#define OMV_OV5640_REV_Y_CHECK (0)
#define OMV_OV5640_REV_Y_FREQ (12500000)
#define OMV_OV5640_REV_Y_CTRL2 (0x7E)
#define OMV_OV5640_REV_Y_CTRL3 (0x13)
// FIR Module
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// Enable WiFi debug // Enable WiFi debug
#define OMV_ENABLE_WIFIDBG (0) #define OMV_ENABLE_WIFIDBG (0)
@ -89,9 +102,8 @@
// USB IRQn. // USB IRQn.
#define OMV_USB_IRQN (OTG_HS_IRQn) #define OMV_USB_IRQN (OTG_HS_IRQn)
#define OMV_USB_ULPI (1) #define OMV_USB_ULPI (1)
#define OMV_USB_ULPI_DIR_PORT (GPIOI) #define OMV_USB_ULPI_STP_PIN (&omv_pin_C0_OTG_HS)
#define OMV_USB_ULPI_DIR_PIN (GPIO_PIN_11) #define OMV_USB_ULPI_DIR_PIN (&omv_pin_I11_OTG_HS)
#define OMV_USB_ULPI_DIR_CLK_ENABLE() __HAL_RCC_GPIOI_CLK_ENABLE()
// Defined for cpu frequency scaling to override the revid. // Defined for cpu frequency scaling to override the revid.
#define OMV_MAX_CPU_FREQ (400) #define OMV_MAX_CPU_FREQ (400)
@ -223,146 +235,78 @@
// Image sensor I2C // Image sensor I2C
#define ISC_I2C (I2C3) #define ISC_I2C (I2C3)
#define ISC_I2C_ID (3) #define ISC_I2C_ID (3)
#define ISC_I2C_AF (GPIO_AF4_I2C3) #define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_SCL_PIN (&omv_pin_H7_I2C3)
#define ISC_I2C_SDA_PIN (&omv_pin_H8_I2C3)
#define ISC_I2C_CLK_ENABLE() __I2C3_CLK_ENABLE() #define ISC_I2C_CLK_ENABLE() __I2C3_CLK_ENABLE()
#define ISC_I2C_CLK_DISABLE() __I2C3_CLK_DISABLE() #define ISC_I2C_CLK_DISABLE() __I2C3_CLK_DISABLE()
#define ISC_I2C_SCL_PORT (GPIOH)
#define ISC_I2C_SCL_PIN (GPIO_PIN_7)
#define ISC_I2C_SDA_PORT (GPIOH)
#define ISC_I2C_SDA_PIN (GPIO_PIN_8)
#define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C3_FORCE_RESET() #define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C3_FORCE_RESET()
#define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C3_RELEASE_RESET() #define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C3_RELEASE_RESET()
// Alternate I2C bus for the Portenta breakout // Alternate I2C bus for the Portenta breakout
#define ISC_I2C_ALT (I2C4) #define ISC_I2C_ALT (I2C4)
#define ISC_I2C_ALT_ID (4) #define ISC_I2C_ALT_ID (4)
#define ISC_I2C_ALT_AF (GPIO_AF4_I2C4) #define ISC_I2C_ALT_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_ALT_SCL_PIN (&omv_pin_H11_I2C4)
#define ISC_I2C_ALT_SDA_PIN (&omv_pin_H12_I2C4)
#define ISC_I2C_ALT_CLK_ENABLE() __HAL_RCC_I2C4_CLK_ENABLE() #define ISC_I2C_ALT_CLK_ENABLE() __HAL_RCC_I2C4_CLK_ENABLE()
#define ISC_I2C_ALT_CLK_DISABLE() __HAL_RCC_I2C4_CLK_DISABLE() #define ISC_I2C_ALT_CLK_DISABLE() __HAL_RCC_I2C4_CLK_DISABLE()
#define ISC_I2C_ALT_SCL_PORT (GPIOH)
#define ISC_I2C_ALT_SCL_PIN (GPIO_PIN_11)
#define ISC_I2C_ALT_SDA_PORT (GPIOH)
#define ISC_I2C_ALT_SDA_PIN (GPIO_PIN_12)
#define ISC_I2C_ALT_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_ALT_FORCE_RESET() __HAL_RCC_I2C4_FORCE_RESET() #define ISC_I2C_ALT_FORCE_RESET() __HAL_RCC_I2C4_FORCE_RESET()
#define ISC_I2C_ALT_RELEASE_RESET() __HAL_RCC_I2C4_RELEASE_RESET() #define ISC_I2C_ALT_RELEASE_RESET() __HAL_RCC_I2C4_RELEASE_RESET()
// FIR I2C // FIR I2C
#define FIR_I2C (I2C3) #define FIR_I2C (I2C3)
#define FIR_I2C_ID (3) #define FIR_I2C_ID (3)
#define FIR_I2C_AF (GPIO_AF4_I2C3) #define FIR_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define FIR_I2C_SCL_PIN (&omv_pin_H7_I2C3)
#define FIR_I2C_SDA_PIN (&omv_pin_H8_I2C3)
#define FIR_I2C_CLK_ENABLE() __I2C3_CLK_ENABLE() #define FIR_I2C_CLK_ENABLE() __I2C3_CLK_ENABLE()
#define FIR_I2C_CLK_DISABLE() __I2C3_CLK_DISABLE() #define FIR_I2C_CLK_DISABLE() __I2C3_CLK_DISABLE()
#define FIR_I2C_SCL_PORT (GPIOH)
#define FIR_I2C_SCL_PIN (GPIO_PIN_7)
#define FIR_I2C_SDA_PORT (GPIOH)
#define FIR_I2C_SDA_PIN (GPIO_PIN_8)
#define FIR_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C3_FORCE_RESET() #define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C3_FORCE_RESET()
#define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C3_RELEASE_RESET() #define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C3_RELEASE_RESET()
//#define SOFT_I2C_SIOC_PIN (&omv_pin_B10_GPIO)
//#define SOFT_I2C_SIOD_PIN (&omv_pin_B11_GPIO)
//#define SOFT_I2C_SPIN_DELAY 64
// GPIO.0 is connected to the sensor module reset pin on the Portenta // GPIO.0 is connected to the sensor module reset pin on the Portenta
// breakout board and to the LDO's LDO_ENABLE pin on the Himax shield. // breakout board and to the LDO's LDO_ENABLE pin on the Himax shield.
// The sensor probing process will detect the right reset or powerdown // The sensor probing process will detect the right reset or powerdown
// polarity, so it should be fine to enable it for both boards. // polarity, so it should be fine to enable it for both boards.
#define DCMI_RESET_PIN (GPIO_PIN_13) #define DCMI_RESET_PIN (&omv_pin_C13_GPIO)
#define DCMI_RESET_PORT (GPIOC)
// GPIO.1 is connected to the sensor module frame sync pin (OUTPUT) on // GPIO.1 is connected to the sensor module frame sync pin (OUTPUT) on
// the Portenta breakout board and to the INT pin (OUTPUT) on the Himax // the Portenta breakout board and to the INT pin (OUTPUT) on the Himax
// shield, so it can't be enabled for the two boards at the same time. // shield, so it can't be enabled for the two boards at the same time.
//#define DCMI_FSYNC_PIN (GPIO_PIN_15) //#define DCMI_FSYNC_PIN (&omv_pin_C15_GPIO)
//#define DCMI_FSYNC_PORT (GPIOC)
// GPIO.3 is connected to the powerdown pin on the Portenta breakout board, // GPIO.3 is connected to the powerdown pin on the Portenta breakout board,
// and to the STROBE pin on the Himax shield, however it's not actually // and to the STROBE pin on the Himax shield, however it's not actually
// used on the Himax shield and can be safely enable for the two boards. // used on the Himax shield and can be safely enable for the two boards.
#define DCMI_PWDN_PIN (GPIO_PIN_5) #define DCMI_POWER_PIN (&omv_pin_D5_GPIO)
#define DCMI_PWDN_PORT (GPIOD)
/* DCMI */ /* DCMI */
#define DCMI_TIM (TIM1) #define DCMI_TIM (TIM1)
#define DCMI_TIM_PIN (GPIO_PIN_1) #define DCMI_TIM_PIN (&omv_pin_K1_TIM1)
#define DCMI_TIM_PORT (GPIOK)
// Enable TIM1-CH1 on PA8 too for Portenta breakout. // Enable TIM1-CH1 on PA8 too for Portenta breakout.
#define DCMI_TIM_EXT_PIN (GPIO_PIN_8) #define DCMI_TIM_EXT_PIN (&omv_pin_A8_TIM1)
#define DCMI_TIM_EXT_PORT (GPIOA)
#define DCMI_TIM_AF (GPIO_AF1_TIM1)
#define DCMI_TIM_CHANNEL (TIM_CHANNEL_1) #define DCMI_TIM_CHANNEL (TIM_CHANNEL_1)
#define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE() #define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE()
#define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE() #define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE()
#define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq() #define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq()
#define DCMI_D0_PIN (GPIO_PIN_9) #define DCMI_D0_PIN (&omv_pin_H9_DCMI)
#define DCMI_D1_PIN (GPIO_PIN_10) #define DCMI_D1_PIN (&omv_pin_H10_DCMI)
#define DCMI_D2_PIN (GPIO_PIN_11) #define DCMI_D2_PIN (&omv_pin_H11_DCMI)
#define DCMI_D3_PIN (GPIO_PIN_12) #define DCMI_D3_PIN (&omv_pin_H12_DCMI)
#define DCMI_D4_PIN (GPIO_PIN_14) #define DCMI_D4_PIN (&omv_pin_H14_DCMI)
#define DCMI_D5_PIN (GPIO_PIN_4) #define DCMI_D5_PIN (&omv_pin_I4_DCMI)
#define DCMI_D6_PIN (GPIO_PIN_6) #define DCMI_D6_PIN (&omv_pin_I6_DCMI)
#define DCMI_D7_PIN (GPIO_PIN_7) #define DCMI_D7_PIN (&omv_pin_I7_DCMI)
#define DCMI_D0_PORT (GPIOH) #define DCMI_HSYNC_PIN (&omv_pin_A4_DCMI)
#define DCMI_D1_PORT (GPIOH) #define DCMI_VSYNC_PIN (&omv_pin_I5_DCMI)
#define DCMI_D2_PORT (GPIOH) #define DCMI_PXCLK_PIN (&omv_pin_A6_DCMI)
#define DCMI_D3_PORT (GPIOH)
#define DCMI_D4_PORT (GPIOH)
#define DCMI_D5_PORT (GPIOI)
#define DCMI_D6_PORT (GPIOI)
#define DCMI_D7_PORT (GPIOI)
#define DCMI_HSYNC_PIN (GPIO_PIN_4)
#define DCMI_VSYNC_PIN (GPIO_PIN_5)
#define DCMI_PXCLK_PIN (GPIO_PIN_6)
#define DCMI_HSYNC_PORT (GPIOA)
#define DCMI_VSYNC_PORT (GPIOI)
#define DCMI_PXCLK_PORT (GPIOA)
#if defined(DCMI_RESET_PIN)
#define DCMI_RESET_LOW() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_RESET)
#define DCMI_RESET_HIGH() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_SET)
#else
#define DCMI_RESET_LOW()
#define DCMI_RESET_HIGH()
#endif
#if defined(DCMI_PWDN_PIN)
#define DCMI_PWDN_LOW() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_RESET)
#define DCMI_PWDN_HIGH() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_SET)
#else
#define DCMI_PWDN_LOW()
#define DCMI_PWDN_HIGH()
#endif
#if defined(DCMI_FSYNC_PIN)
#define DCMI_FSYNC_LOW() HAL_GPIO_WritePin(DCMI_FSYNC_PORT, DCMI_FSYNC_PIN, GPIO_PIN_RESET)
#define DCMI_FSYNC_HIGH() HAL_GPIO_WritePin(DCMI_FSYNC_PORT, DCMI_FSYNC_PIN, GPIO_PIN_SET)
#else
#define DCMI_FSYNC_LOW()
#define DCMI_FSYNC_HIGH()
#endif
#define DCMI_VSYNC_EXTI_IRQN (EXTI9_5_IRQn)
#define DCMI_VSYNC_EXTI_LINE (5)
#define DCMI_VSYNC_EXTI_GPIO (EXTI_GPIOI)
#define DCMI_VSYNC_EXTI_SHARED (1)
#define SOFT_I2C_PORT GPIOB
#define SOFT_I2C_SIOC_PIN GPIO_PIN_10
#define SOFT_I2C_SIOD_PIN GPIO_PIN_11
#define SOFT_I2C_SIOC_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOC_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOD_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_READ() HAL_GPIO_ReadPin (SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN)
#define SOFT_I2C_SIOD_WRITE(bit) HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, bit);
#define SOFT_I2C_SPIN_DELAY 64
// SAI4 // SAI4
#define AUDIO_SAI (SAI4_Block_A) #define AUDIO_SAI (SAI4_Block_A)
@ -371,13 +315,8 @@
#define AUDIO_SAI_FREQKHZ (2048U) // 2048KHz #define AUDIO_SAI_FREQKHZ (2048U) // 2048KHz
#define AUDIO_MAX_CHANNELS (2) // Maximum number of channels. #define AUDIO_MAX_CHANNELS (2) // Maximum number of channels.
#define AUDIO_SAI_CK_PORT (GPIOE) #define AUDIO_SAI_CK_PIN (&omv_pin_E2_SAI4)
#define AUDIO_SAI_CK_PIN (GPIO_PIN_2) #define AUDIO_SAI_D1_PIN (&omv_pin_B2_SAI4)
#define AUDIO_SAI_CK_AF (GPIO_AF10_SAI4)
#define AUDIO_SAI_D1_PORT (GPIOB)
#define AUDIO_SAI_D1_PIN (GPIO_PIN_2)
#define AUDIO_SAI_D1_AF (GPIO_AF10_SAI4)
#define AUDIO_SAI_DMA_STREAM BDMA_Channel1 #define AUDIO_SAI_DMA_STREAM BDMA_Channel1
#define AUDIO_SAI_DMA_REQUEST BDMA_REQUEST_SAI4_A #define AUDIO_SAI_DMA_REQUEST BDMA_REQUEST_SAI4_A
@ -395,13 +334,8 @@
// #define AUDIO_SAI_FREQKHZ (2048U) // 2048KHz // #define AUDIO_SAI_FREQKHZ (2048U) // 2048KHz
// #define AUDIO_MAX_CHANNELS (2) // Maximum number of channels. // #define AUDIO_MAX_CHANNELS (2) // Maximum number of channels.
// //
// #define AUDIO_SAI_CK_PORT (GPIOE) // #define AUDIO_SAI_CK_PIN (&omv_pin_E2_SAI1)
// #define AUDIO_SAI_CK_PIN (GPIO_PIN_2) // #define AUDIO_SAI_D1_PIN (&omv_pin_B2_SAI1)
// #define AUDIO_SAI_CK_AF (GPIO_AF2_SAI1)
//
// #define AUDIO_SAI_D1_PORT (GPIOB)
// #define AUDIO_SAI_D1_PIN (GPIO_PIN_2)
// #define AUDIO_SAI_D1_AF (GPIO_AF2_SAI1)
// //
// #define AUDIO_SAI_DMA_STREAM DMA2_Stream6 // #define AUDIO_SAI_DMA_STREAM DMA2_Stream6
// #define AUDIO_SAI_DMA_REQUEST DMA_REQUEST_SAI1_A // #define AUDIO_SAI_DMA_REQUEST DMA_REQUEST_SAI1_A
@ -430,37 +364,14 @@
#define OMV_SPI_LCD_CONTROLLER (&spi_obj[1]) #define OMV_SPI_LCD_CONTROLLER (&spi_obj[1])
#define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2) #define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2)
#define OMV_SPI_LCD_MOSI_PIN (GPIO_PIN_3) #define OMV_SPI_LCD_MOSI_PIN (&omv_pin_C3_SPI2)
#define OMV_SPI_LCD_MOSI_PORT (GPIOC) #define OMV_SPI_LCD_MISO_PIN (&omv_pin_C2_SPI2)
#define OMV_SPI_LCD_MOSI_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_SCLK_PIN (&omv_pin_I1_SPI2)
#define OMV_SPI_LCD_SSEL_PIN (&omv_pin_I0_GPIO)
#define OMV_SPI_LCD_MISO_PIN (GPIO_PIN_2) #define OMV_SPI_LCD_RS_PIN (&omv_pin_K1_GPIO)
#define OMV_SPI_LCD_MISO_PORT (GPIOC) #define OMV_SPI_LCD_BL_PIN (&omv_pin_A4_GPIO)
#define OMV_SPI_LCD_MISO_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_RST_PIN (&omv_pin_H15_GPIO)
#define OMV_SPI_LCD_SCLK_PIN (GPIO_PIN_1)
#define OMV_SPI_LCD_SCLK_PORT (GPIOI)
#define OMV_SPI_LCD_SCLK_ALT (GPIO_AF5_SPI2)
#define OMV_SPI_LCD_RST_PIN (GPIO_PIN_15)
#define OMV_SPI_LCD_RST_PORT (GPIOH)
#define OMV_SPI_LCD_RST_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RST_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_RS_PIN (GPIO_PIN_1)
#define OMV_SPI_LCD_RS_PORT (GPIOK)
#define OMV_SPI_LCD_RS_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RS_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_CS_PIN (GPIO_PIN_0)
#define OMV_SPI_LCD_CS_PORT (GPIOI)
#define OMV_SPI_LCD_CS_HIGH() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_CS_LOW() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_BL_PIN (GPIO_PIN_4)
#define OMV_SPI_LCD_BL_PORT (GPIOA)
#define OMV_SPI_LCD_BL_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_BL_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_BL_DAC (DAC1) #define OMV_SPI_LCD_BL_DAC (DAC1)
#define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_1) #define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_1)
@ -469,42 +380,15 @@
#define OMV_SPI_LCD_BL_DAC_FORCE_RESET() __HAL_RCC_DAC12_FORCE_RESET() #define OMV_SPI_LCD_BL_DAC_FORCE_RESET() __HAL_RCC_DAC12_FORCE_RESET()
#define OMV_SPI_LCD_BL_DAC_RELEASE_RESET() __HAL_RCC_DAC12_RELEASE_RESET() #define OMV_SPI_LCD_BL_DAC_RELEASE_RESET() __HAL_RCC_DAC12_RELEASE_RESET()
// FIR Module
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// FIR Lepton // FIR Lepton
#define OMV_FIR_LEPTON_I2C_BUS (FIR_I2C_ID) #define OMV_FIR_LEPTON_I2C_BUS (FIR_I2C_ID)
#define OMV_FIR_LEPTON_I2C_BUS_SPEED (FIR_I2C_SPEED) #define OMV_FIR_LEPTON_I2C_BUS_SPEED (FIR_I2C_SPEED)
#define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[1]) #define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[1])
#define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI2) #define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI2)
#define OMV_FIR_LEPTON_MOSI_PIN (GPIO_PIN_3) #define OMV_FIR_LEPTON_MOSI_PIN (&omv_pin_C3_SPI2)
#define OMV_FIR_LEPTON_MOSI_PORT (GPIOC) #define OMV_FIR_LEPTON_MISO_PIN (&omv_pin_C2_SPI2)
#define OMV_FIR_LEPTON_MOSI_ALT (GPIO_AF5_SPI2) #define OMV_FIR_LEPTON_SCLK_PIN (&omv_pin_I1_SPI2)
#define OMV_FIR_LEPTON_SSEL_PIN (&omv_pin_I0_GPIO)
#define OMV_FIR_LEPTON_MISO_PIN (GPIO_PIN_2)
#define OMV_FIR_LEPTON_MISO_PORT (GPIOC)
#define OMV_FIR_LEPTON_MISO_ALT (GPIO_AF5_SPI2)
#define OMV_FIR_LEPTON_SCLK_PIN (GPIO_PIN_1)
#define OMV_FIR_LEPTON_SCLK_PORT (GPIOI)
#define OMV_FIR_LEPTON_SCLK_ALT (GPIO_AF5_SPI2)
#define OMV_FIR_LEPTON_CS_PIN (GPIO_PIN_0)
#define OMV_FIR_LEPTON_CS_PORT (GPIOI)
#define OMV_FIR_LEPTON_CS_HIGH() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_SET)
#define OMV_FIR_LEPTON_CS_LOW() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_RESET)
// Enable additional GPIO banks for DRAM...
#define OMV_ENABLE_GPIO_BANK_F
#define OMV_ENABLE_GPIO_BANK_G
#define OMV_ENABLE_GPIO_BANK_H
#define OMV_ENABLE_GPIO_BANK_I
#define OMV_ENABLE_GPIO_BANK_J
#define OMV_ENABLE_GPIO_BANK_K
#endif //__OMV_BOARDCONFIG_H__ #endif //__OMV_BOARDCONFIG_H__

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@ -0,0 +1,33 @@
OMV_GPIO_DEFINE(A, 4, NONE, GPIO)
OMV_GPIO_DEFINE(A, 4, AF13, DCMI)
OMV_GPIO_DEFINE(A, 6, AF13, DCMI)
OMV_GPIO_DEFINE(A, 8, AF1, TIM1)
OMV_GPIO_DEFINE(B, 2, AF2, SAI1)
OMV_GPIO_DEFINE(B, 2, AF10, SAI4)
OMV_GPIO_DEFINE(C, 0, AF10, OTG_HS)
OMV_GPIO_DEFINE(C, 2, AF5, SPI2)
OMV_GPIO_DEFINE(C, 3, AF5, SPI2)
OMV_GPIO_DEFINE(C, 13, NONE, GPIO)
OMV_GPIO_DEFINE(C, 15, NONE, GPIO)
OMV_GPIO_DEFINE(D, 5, NONE, GPIO)
OMV_GPIO_DEFINE(E, 2, AF2, SAI1)
OMV_GPIO_DEFINE(E, 2, AF10, SAI4)
OMV_GPIO_DEFINE(H, 7, AF4, I2C3)
OMV_GPIO_DEFINE(H, 8, AF4, I2C3)
OMV_GPIO_DEFINE(H, 9, AF13, DCMI)
OMV_GPIO_DEFINE(H, 10, AF13, DCMI)
OMV_GPIO_DEFINE(H, 11, AF4, I2C4)
OMV_GPIO_DEFINE(H, 11, AF13, DCMI)
OMV_GPIO_DEFINE(H, 12, AF4, I2C4)
OMV_GPIO_DEFINE(H, 12, AF13, DCMI)
OMV_GPIO_DEFINE(H, 14, AF13, DCMI)
OMV_GPIO_DEFINE(H, 15, NONE, GPIO)
OMV_GPIO_DEFINE(I, 0, NONE, GPIO)
OMV_GPIO_DEFINE(I, 1, AF5, SPI2)
OMV_GPIO_DEFINE(I, 4, AF13, DCMI)
OMV_GPIO_DEFINE(I, 5, AF13, DCMI)
OMV_GPIO_DEFINE(I, 6, AF13, DCMI)
OMV_GPIO_DEFINE(I, 7, AF13, DCMI)
OMV_GPIO_DEFINE(I, 11, AF10, OTG_HS)
OMV_GPIO_DEFINE(K, 1, NONE, GPIO)
OMV_GPIO_DEFINE(K, 1, AF1, TIM1)

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@ -48,6 +48,11 @@
#define OMV_ENABLE_HM01B0 (0) #define OMV_ENABLE_HM01B0 (0)
#define OMV_ENABLE_PAJ6100 (0) #define OMV_ENABLE_PAJ6100 (0)
#define OMV_ENABLE_FROGEYE2020 (0) #define OMV_ENABLE_FROGEYE2020 (0)
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// Enable sensor features // Enable sensor features
#define OMV_ENABLE_OV5640_AF (0) #define OMV_ENABLE_OV5640_AF (0)
@ -127,160 +132,80 @@
// Image sensor I2C // Image sensor I2C
#define ISC_I2C (I2C1) #define ISC_I2C (I2C1)
#define ISC_I2C_ID (1) #define ISC_I2C_ID (1)
#define ISC_I2C_AF (GPIO_AF4_I2C1) #define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_SCL_PIN (&omv_pin_B8_I2C1)
#define ISC_I2C_SDA_PIN (&omv_pin_B9_I2C1)
#define ISC_I2C_CLK_ENABLE() __I2C1_CLK_ENABLE() #define ISC_I2C_CLK_ENABLE() __I2C1_CLK_ENABLE()
#define ISC_I2C_CLK_DISABLE() __I2C1_CLK_DISABLE() #define ISC_I2C_CLK_DISABLE() __I2C1_CLK_DISABLE()
#define ISC_I2C_SCL_PORT (GPIOB)
#define ISC_I2C_SCL_PIN (GPIO_PIN_8)
#define ISC_I2C_SDA_PORT (GPIOB)
#define ISC_I2C_SDA_PIN (GPIO_PIN_9)
#define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET() #define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET()
#define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET() #define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET()
// FIR I2C // FIR I2C configuration.
#define FIR_I2C (I2C2) #define FIR_I2C (I2C2)
#define FIR_I2C_ID (2) #define FIR_I2C_ID (2)
#define FIR_I2C_AF (GPIO_AF4_I2C2) #define FIR_I2C_SPEED (CAMBUS_SPEED_FULL)
#define FIR_I2C_SCL_PIN (&omv_pin_B10_I2C2)
#define FIR_I2C_SDA_PIN (&omv_pin_B11_I2C2)
#define FIR_I2C_CLK_ENABLE() __I2C2_CLK_ENABLE() #define FIR_I2C_CLK_ENABLE() __I2C2_CLK_ENABLE()
#define FIR_I2C_CLK_DISABLE() __I2C2_CLK_DISABLE() #define FIR_I2C_CLK_DISABLE() __I2C2_CLK_DISABLE()
#define FIR_I2C_SCL_PORT (GPIOB)
#define FIR_I2C_SCL_PIN (GPIO_PIN_10)
#define FIR_I2C_SDA_PORT (GPIOB)
#define FIR_I2C_SDA_PIN (GPIO_PIN_11)
#define FIR_I2C_SPEED (CAMBUS_SPEED_FULL)
#define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET() #define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET()
#define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET() #define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET()
/* DCMI */ // Soft I2C bus.
#define SOFT_I2C_SIOC_PIN (&omv_pin_B10_GPIO)
#define SOFT_I2C_SIOD_PIN (&omv_pin_B11_GPIO)
#define SOFT_I2C_SPIN_DELAY 16
// DCMI pins.
#define DCMI_TIM (TIM1) #define DCMI_TIM (TIM1)
#define DCMI_TIM_PIN (GPIO_PIN_8) #define DCMI_TIM_PIN (&omv_pin_A8_TIM1)
#define DCMI_TIM_PORT (GPIOA)
#define DCMI_TIM_AF (GPIO_AF1_TIM1)
#define DCMI_TIM_CHANNEL (TIM_CHANNEL_1) #define DCMI_TIM_CHANNEL (TIM_CHANNEL_1)
#define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE() #define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE()
#define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE() #define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE()
#define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq() #define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq()
#define DCMI_RESET_PIN (GPIO_PIN_10) // DCMI pins.
#define DCMI_RESET_PORT (GPIOA) #define DCMI_RESET_PIN (&omv_pin_A10_GPIO)
#define DCMI_POWER_PIN (&omv_pin_B5_GPIO)
#define DCMI_PWDN_PIN (GPIO_PIN_5) #define DCMI_D0_PIN (&omv_pin_C6_DCMI)
#define DCMI_PWDN_PORT (GPIOB) #define DCMI_D1_PIN (&omv_pin_C7_DCMI)
#define DCMI_D2_PIN (&omv_pin_E0_DCMI)
#define DCMI_D3_PIN (&omv_pin_E1_DCMI)
#define DCMI_D4_PIN (&omv_pin_E4_DCMI)
#define DCMI_D5_PIN (&omv_pin_B6_DCMI)
#define DCMI_D6_PIN (&omv_pin_E5_DCMI)
#define DCMI_D7_PIN (&omv_pin_E6_DCMI)
#define DCMI_D0_PIN (GPIO_PIN_6) #define DCMI_HSYNC_PIN (&omv_pin_A4_DCMI)
#define DCMI_D1_PIN (GPIO_PIN_7) #define DCMI_VSYNC_PIN (&omv_pin_B7_DCMI)
#define DCMI_D2_PIN (GPIO_PIN_0) #define DCMI_PXCLK_PIN (&omv_pin_A6_DCMI)
#define DCMI_D3_PIN (GPIO_PIN_1)
#define DCMI_D4_PIN (GPIO_PIN_4)
#define DCMI_D5_PIN (GPIO_PIN_6)
#define DCMI_D6_PIN (GPIO_PIN_5)
#define DCMI_D7_PIN (GPIO_PIN_6)
#define DCMI_D0_PORT (GPIOC)
#define DCMI_D1_PORT (GPIOC)
#define DCMI_D2_PORT (GPIOE)
#define DCMI_D3_PORT (GPIOE)
#define DCMI_D4_PORT (GPIOE)
#define DCMI_D5_PORT (GPIOB)
#define DCMI_D6_PORT (GPIOE)
#define DCMI_D7_PORT (GPIOE)
#define DCMI_HSYNC_PIN (GPIO_PIN_4)
#define DCMI_VSYNC_PIN (GPIO_PIN_7)
#define DCMI_PXCLK_PIN (GPIO_PIN_6)
#define DCMI_HSYNC_PORT (GPIOA)
#define DCMI_VSYNC_PORT (GPIOB)
#define DCMI_PXCLK_PORT (GPIOA)
#define DCMI_RESET_LOW() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_RESET)
#define DCMI_RESET_HIGH() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_SET)
#define DCMI_PWDN_LOW() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_RESET)
#define DCMI_PWDN_HIGH() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_SET)
#define DCMI_VSYNC_EXTI_IRQN (EXTI9_5_IRQn)
#define DCMI_VSYNC_EXTI_LINE (7)
#define DCMI_VSYNC_EXTI_GPIO (EXTI_GPIOB)
#define DCMI_VSYNC_EXTI_SHARED (0)
#define WINC_SPI (SPI2) #define WINC_SPI (SPI2)
#define WINC_SPI_AF (GPIO_AF5_SPI2)
#define WINC_SPI_TIMEOUT (1000) #define WINC_SPI_TIMEOUT (1000)
#define WINC_SPI_PRESCALER (SPI_BAUDRATEPRESCALER_2) #define WINC_SPI_PRESCALER (SPI_BAUDRATEPRESCALER_2)
#define WINC_SPI_CLK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE() #define WINC_SPI_CLK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE()
#define WINC_SPI_SCLK_PIN (&omv_pin_B13_SPI2)
#define WINC_SPI_MISO_PIN (&omv_pin_B14_SPI2)
#define WINC_SPI_MOSI_PIN (&omv_pin_B15_SPI2)
#define WINC_SPI_SSEL_PIN (&omv_pin_B12_GPIO)
#define WINC_SPI_SCLK_PIN (GPIO_PIN_13) #define WINC_EN_PIN (&omv_pin_A5_GPIO)
#define WINC_SPI_MISO_PIN (GPIO_PIN_14) #define WINC_RST_PIN (&omv_pin_D12_GPIO)
#define WINC_SPI_MOSI_PIN (GPIO_PIN_15) #define WINC_IRQ_PIN (&omv_pin_D13_GPIO)
#define WINC_SPI_SCLK_PORT (GPIOB)
#define WINC_SPI_MISO_PORT (GPIOB)
#define WINC_SPI_MOSI_PORT (GPIOB)
#define WINC_EN_PIN (GPIO_PIN_5)
#define WINC_CS_PIN (GPIO_PIN_12)
#define WINC_RST_PIN (GPIO_PIN_12)
#define WINC_IRQ_PIN (pin_D13)
#define WINC_EN_PORT (GPIOA)
#define WINC_CS_PORT (GPIOB)
#define WINC_RST_PORT (GPIOD)
#define WINC_CS_LOW() HAL_GPIO_WritePin(WINC_CS_PORT, WINC_CS_PIN, GPIO_PIN_RESET)
#define WINC_CS_HIGH() HAL_GPIO_WritePin(WINC_CS_PORT, WINC_CS_PIN, GPIO_PIN_SET)
#define SOFT_I2C_PORT GPIOB
#define SOFT_I2C_SIOC_PIN GPIO_PIN_10
#define SOFT_I2C_SIOD_PIN GPIO_PIN_11
#define SOFT_I2C_SIOC_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOC_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOD_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_READ() HAL_GPIO_ReadPin (SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN)
#define SOFT_I2C_SIOD_WRITE(bit) HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, bit);
#define SOFT_I2C_SPIN_DELAY 16
// SPI LCD Interface // SPI LCD Interface
#define OMV_SPI_LCD_CONTROLLER (&spi_obj[1]) #define OMV_SPI_LCD_CONTROLLER (&spi_obj[1])
#define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2) #define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2)
#define OMV_SPI_LCD_MOSI_PIN (GPIO_PIN_15) #define OMV_SPI_LCD_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_SPI_LCD_MOSI_PORT (GPIOB) #define OMV_SPI_LCD_MISO_PIN (&omv_pin_B14_SPI2)
#define OMV_SPI_LCD_MOSI_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_SCLK_PIN (&omv_pin_B13_SPI2)
#define OMV_SPI_LCD_SSEL_PIN (&omv_pin_B12_GPIO)
#define OMV_SPI_LCD_MISO_PIN (GPIO_PIN_14) #define OMV_SPI_LCD_RS_PIN (&omv_pin_D13_GPIO)
#define OMV_SPI_LCD_MISO_PORT (GPIOB) #define OMV_SPI_LCD_BL_PIN (&omv_pin_A5_GPIO)
#define OMV_SPI_LCD_MISO_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_RST_PIN (&omv_pin_D12_GPIO)
#define OMV_SPI_LCD_SCLK_PIN (GPIO_PIN_13)
#define OMV_SPI_LCD_SCLK_PORT (GPIOB)
#define OMV_SPI_LCD_SCLK_ALT (GPIO_AF5_SPI2)
#define OMV_SPI_LCD_RST_PIN (GPIO_PIN_12)
#define OMV_SPI_LCD_RST_PORT (GPIOD)
#define OMV_SPI_LCD_RST_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RST_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_RS_PIN (GPIO_PIN_13)
#define OMV_SPI_LCD_RS_PORT (GPIOD)
#define OMV_SPI_LCD_RS_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RS_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_CS_PIN (GPIO_PIN_12)
#define OMV_SPI_LCD_CS_PORT (GPIOB)
#define OMV_SPI_LCD_CS_HIGH() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_CS_LOW() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_BL_PIN (GPIO_PIN_5)
#define OMV_SPI_LCD_BL_PORT (GPIOA)
#define OMV_SPI_LCD_BL_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_BL_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_BL_DAC (DAC) #define OMV_SPI_LCD_BL_DAC (DAC)
#define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_2) #define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_2)
@ -289,34 +214,14 @@
#define OMV_SPI_LCD_BL_DAC_FORCE_RESET() __HAL_RCC_DAC_FORCE_RESET() #define OMV_SPI_LCD_BL_DAC_FORCE_RESET() __HAL_RCC_DAC_FORCE_RESET()
#define OMV_SPI_LCD_BL_DAC_RELEASE_RESET() __HAL_RCC_DAC_RELEASE_RESET() #define OMV_SPI_LCD_BL_DAC_RELEASE_RESET() __HAL_RCC_DAC_RELEASE_RESET()
// FIR Module
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// FIR Lepton // FIR Lepton
#define OMV_FIR_LEPTON_I2C_BUS (FIR_I2C_ID) #define OMV_FIR_LEPTON_I2C_BUS (FIR_I2C_ID)
#define OMV_FIR_LEPTON_I2C_BUS_SPEED (FIR_I2C_SPEED) #define OMV_FIR_LEPTON_I2C_BUS_SPEED (FIR_I2C_SPEED)
#define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[1]) #define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[1])
#define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI2) #define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI2)
#define OMV_FIR_LEPTON_MOSI_PIN (GPIO_PIN_15) #define OMV_FIR_LEPTON_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_FIR_LEPTON_MOSI_PORT (GPIOB) #define OMV_FIR_LEPTON_MISO_PIN (&omv_pin_B14_SPI2)
#define OMV_FIR_LEPTON_MOSI_ALT (GPIO_AF5_SPI2) #define OMV_FIR_LEPTON_SCLK_PIN (&omv_pin_B13_SPI2)
#define OMV_FIR_LEPTON_SSEL_PIN (&omv_pin_B12_GPIO)
#define OMV_FIR_LEPTON_MISO_PIN (GPIO_PIN_14)
#define OMV_FIR_LEPTON_MISO_PORT (GPIOB)
#define OMV_FIR_LEPTON_MISO_ALT (GPIO_AF5_SPI2)
#define OMV_FIR_LEPTON_SCLK_PIN (GPIO_PIN_13)
#define OMV_FIR_LEPTON_SCLK_PORT (GPIOB)
#define OMV_FIR_LEPTON_SCLK_ALT (GPIO_AF5_SPI2)
#define OMV_FIR_LEPTON_CS_PIN (GPIO_PIN_12)
#define OMV_FIR_LEPTON_CS_PORT (GPIOB)
#define OMV_FIR_LEPTON_CS_HIGH() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_SET)
#define OMV_FIR_LEPTON_CS_LOW() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_RESET)
#endif //__OMV_BOARDCONFIG_H__ #endif //__OMV_BOARDCONFIG_H__

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@ -0,0 +1,27 @@
OMV_GPIO_DEFINE(A, 4, AF13, DCMI)
OMV_GPIO_DEFINE(A, 5, NONE, GPIO)
OMV_GPIO_DEFINE(A, 6, AF13, DCMI)
OMV_GPIO_DEFINE(A, 8, AF1, TIM1)
OMV_GPIO_DEFINE(A, 10, NONE, GPIO)
OMV_GPIO_DEFINE(B, 5, NONE, GPIO)
OMV_GPIO_DEFINE(B, 6, AF13, DCMI)
OMV_GPIO_DEFINE(B, 7, AF13, DCMI)
OMV_GPIO_DEFINE(B, 8, AF4, I2C1)
OMV_GPIO_DEFINE(B, 9, AF4, I2C1)
OMV_GPIO_DEFINE(B, 10, NONE, GPIO)
OMV_GPIO_DEFINE(B, 10, AF4, I2C2)
OMV_GPIO_DEFINE(B, 11, NONE, GPIO)
OMV_GPIO_DEFINE(B, 11, AF4, I2C2)
OMV_GPIO_DEFINE(B, 12, NONE, GPIO)
OMV_GPIO_DEFINE(B, 13, AF5, SPI2)
OMV_GPIO_DEFINE(B, 14, AF5, SPI2)
OMV_GPIO_DEFINE(B, 15, AF5, SPI2)
OMV_GPIO_DEFINE(C, 6, AF13, DCMI)
OMV_GPIO_DEFINE(C, 7, AF13, DCMI)
OMV_GPIO_DEFINE(D, 12, NONE, GPIO)
OMV_GPIO_DEFINE(D, 13, NONE, GPIO)
OMV_GPIO_DEFINE(E, 0, AF13, DCMI)
OMV_GPIO_DEFINE(E, 1, AF13, DCMI)
OMV_GPIO_DEFINE(E, 4, AF13, DCMI)
OMV_GPIO_DEFINE(E, 5, AF13, DCMI)
OMV_GPIO_DEFINE(E, 6, AF13, DCMI)

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@ -48,6 +48,11 @@
#define OMV_ENABLE_HM01B0 (0) #define OMV_ENABLE_HM01B0 (0)
#define OMV_ENABLE_PAJ6100 (0) #define OMV_ENABLE_PAJ6100 (0)
#define OMV_ENABLE_FROGEYE2020 (0) #define OMV_ENABLE_FROGEYE2020 (0)
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// Enable sensor features // Enable sensor features
#define OMV_ENABLE_OV5640_AF (0) #define OMV_ENABLE_OV5640_AF (0)
@ -127,161 +132,81 @@
// Image sensor I2C // Image sensor I2C
#define ISC_I2C (I2C1) #define ISC_I2C (I2C1)
#define ISC_I2C_ID (1) #define ISC_I2C_ID (1)
#define ISC_I2C_AF (GPIO_AF4_I2C1) #define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_SCL_PIN (&omv_pin_B8_I2C1)
#define ISC_I2C_SDA_PIN (&omv_pin_B9_I2C1)
#define ISC_I2C_CLK_ENABLE() __I2C1_CLK_ENABLE() #define ISC_I2C_CLK_ENABLE() __I2C1_CLK_ENABLE()
#define ISC_I2C_CLK_DISABLE() __I2C1_CLK_DISABLE() #define ISC_I2C_CLK_DISABLE() __I2C1_CLK_DISABLE()
#define ISC_I2C_SCL_PORT (GPIOB)
#define ISC_I2C_SCL_PIN (GPIO_PIN_8)
#define ISC_I2C_SDA_PORT (GPIOB)
#define ISC_I2C_SDA_PIN (GPIO_PIN_9)
#define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET() #define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET()
#define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET() #define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET()
/* FIR I2C */ // FIR I2C configuration.
#define FIR_I2C (I2C2) #define FIR_I2C (I2C2)
#define FIR_I2C_ID (2) #define FIR_I2C_ID (2)
#define FIR_I2C_AF (GPIO_AF4_I2C2) #define FIR_I2C_SCL_PIN (&omv_pin_B10_I2C2)
#define FIR_I2C_SDA_PIN (&omv_pin_B11_I2C2)
#define FIR_I2C_CLK_ENABLE() __I2C2_CLK_ENABLE() #define FIR_I2C_CLK_ENABLE() __I2C2_CLK_ENABLE()
#define FIR_I2C_CLK_DISABLE() __I2C2_CLK_DISABLE() #define FIR_I2C_CLK_DISABLE() __I2C2_CLK_DISABLE()
#define FIR_I2C_SCL_PORT (GPIOB)
#define FIR_I2C_SCL_PIN (GPIO_PIN_10)
#define FIR_I2C_SDA_PORT (GPIOB)
#define FIR_I2C_SDA_PIN (GPIO_PIN_11)
#define FIR_I2C_SPEED (CAMBUS_SPEED_FULL) #define FIR_I2C_SPEED (CAMBUS_SPEED_FULL)
#define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET() #define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET()
#define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET() #define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET()
// Soft I2C bus.
#define SOFT_I2C_SIOC_PIN (&omv_pin_B10_GPIO)
#define SOFT_I2C_SIOD_PIN (&omv_pin_B11_GPIO)
#define SOFT_I2C_SPIN_DELAY 24
/* DCMI */ /* DCMI */
#define DCMI_TIM (TIM1) #define DCMI_TIM (TIM1)
#define DCMI_TIM_PIN (GPIO_PIN_8) #define DCMI_TIM_PIN (&omv_pin_A8_TIM1)
#define DCMI_TIM_PORT (GPIOA)
#define DCMI_TIM_AF (GPIO_AF1_TIM1)
#define DCMI_TIM_CHANNEL (TIM_CHANNEL_1) #define DCMI_TIM_CHANNEL (TIM_CHANNEL_1)
#define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE() #define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE()
#define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE() #define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE()
#define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq() #define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq()
#define DCMI_RESET_PIN (GPIO_PIN_10) #define DCMI_RESET_PIN (&omv_pin_A10_GPIO)
#define DCMI_RESET_PORT (GPIOA) #define DCMI_POWER_PIN (&omv_pin_B5_GPIO)
#define DCMI_PWDN_PIN (GPIO_PIN_5) #define DCMI_D0_PIN (&omv_pin_C6_DCMI)
#define DCMI_PWDN_PORT (GPIOB) #define DCMI_D1_PIN (&omv_pin_C7_DCMI)
#define DCMI_D2_PIN (&omv_pin_E0_DCMI)
#define DCMI_D3_PIN (&omv_pin_E1_DCMI)
#define DCMI_D4_PIN (&omv_pin_E4_DCMI)
#define DCMI_D5_PIN (&omv_pin_B6_DCMI)
#define DCMI_D6_PIN (&omv_pin_E5_DCMI)
#define DCMI_D7_PIN (&omv_pin_E6_DCMI)
#define DCMI_D0_PIN (GPIO_PIN_6) #define DCMI_HSYNC_PIN (&omv_pin_A4_DCMI)
#define DCMI_D1_PIN (GPIO_PIN_7) #define DCMI_VSYNC_PIN (&omv_pin_B7_DCMI)
#define DCMI_D2_PIN (GPIO_PIN_0) #define DCMI_PXCLK_PIN (&omv_pin_A6_DCMI)
#define DCMI_D3_PIN (GPIO_PIN_1)
#define DCMI_D4_PIN (GPIO_PIN_4)
#define DCMI_D5_PIN (GPIO_PIN_6)
#define DCMI_D6_PIN (GPIO_PIN_5)
#define DCMI_D7_PIN (GPIO_PIN_6)
#define DCMI_D0_PORT (GPIOC)
#define DCMI_D1_PORT (GPIOC)
#define DCMI_D2_PORT (GPIOE)
#define DCMI_D3_PORT (GPIOE)
#define DCMI_D4_PORT (GPIOE)
#define DCMI_D5_PORT (GPIOB)
#define DCMI_D6_PORT (GPIOE)
#define DCMI_D7_PORT (GPIOE)
#define DCMI_HSYNC_PIN (GPIO_PIN_4)
#define DCMI_VSYNC_PIN (GPIO_PIN_7)
#define DCMI_PXCLK_PIN (GPIO_PIN_6)
#define DCMI_HSYNC_PORT (GPIOA)
#define DCMI_VSYNC_PORT (GPIOB)
#define DCMI_PXCLK_PORT (GPIOA)
#define DCMI_RESET_LOW() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_RESET)
#define DCMI_RESET_HIGH() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_SET)
#define DCMI_PWDN_LOW() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_RESET)
#define DCMI_PWDN_HIGH() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_SET)
#define DCMI_VSYNC_EXTI_IRQN (EXTI9_5_IRQn)
#define DCMI_VSYNC_EXTI_LINE (7)
#define DCMI_VSYNC_EXTI_GPIO (EXTI_GPIOB)
#define DCMI_VSYNC_EXTI_SHARED (0)
#define WINC_SPI (SPI2) #define WINC_SPI (SPI2)
#define WINC_SPI_AF (GPIO_AF5_SPI2)
#define WINC_SPI_TIMEOUT (1000) #define WINC_SPI_TIMEOUT (1000)
// SPI1/2/3 clock source is PCLK1 (54MHz/2 == 27MHz). // SPI1/2/3 clock source is PCLK1 (54MHz/2 == 27MHz).
#define WINC_SPI_PRESCALER (SPI_BAUDRATEPRESCALER_2) #define WINC_SPI_PRESCALER (SPI_BAUDRATEPRESCALER_2)
#define WINC_SPI_CLK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE() #define WINC_SPI_CLK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE()
#define WINC_SPI_SCLK_PIN (GPIO_PIN_13) #define WINC_SPI_SCLK_PIN (&omv_pin_B13_SPI2)
#define WINC_SPI_MISO_PIN (GPIO_PIN_14) #define WINC_SPI_MISO_PIN (&omv_pin_B14_SPI2)
#define WINC_SPI_MOSI_PIN (GPIO_PIN_15) #define WINC_SPI_MOSI_PIN (&omv_pin_B15_SPI2)
#define WINC_SPI_SSEL_PIN (&omv_pin_B12_GPIO)
#define WINC_SPI_SCLK_PORT (GPIOB) #define WINC_EN_PIN (&omv_pin_A5_GPIO)
#define WINC_SPI_MISO_PORT (GPIOB) #define WINC_RST_PIN (&omv_pin_D12_GPIO)
#define WINC_SPI_MOSI_PORT (GPIOB) #define WINC_IRQ_PIN (&omv_pin_D13_GPIO)
#define WINC_EN_PIN (GPIO_PIN_5)
#define WINC_CS_PIN (GPIO_PIN_12)
#define WINC_RST_PIN (GPIO_PIN_12)
#define WINC_IRQ_PIN (pin_D13)
#define WINC_EN_PORT (GPIOA)
#define WINC_CS_PORT (GPIOB)
#define WINC_RST_PORT (GPIOD)
#define WINC_CS_LOW() HAL_GPIO_WritePin(WINC_CS_PORT, WINC_CS_PIN, GPIO_PIN_RESET)
#define WINC_CS_HIGH() HAL_GPIO_WritePin(WINC_CS_PORT, WINC_CS_PIN, GPIO_PIN_SET)
#define SOFT_I2C_PORT GPIOB
#define SOFT_I2C_SIOC_PIN GPIO_PIN_10
#define SOFT_I2C_SIOD_PIN GPIO_PIN_11
#define SOFT_I2C_SIOC_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOC_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOD_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_READ() HAL_GPIO_ReadPin (SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN)
#define SOFT_I2C_SIOD_WRITE(bit) HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, bit);
#define SOFT_I2C_SPIN_DELAY 24
// SPI LCD Interface // SPI LCD Interface
#define OMV_SPI_LCD_CONTROLLER (&spi_obj[1]) #define OMV_SPI_LCD_CONTROLLER (&spi_obj[1])
#define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2) #define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2)
#define OMV_SPI_LCD_MOSI_PIN (GPIO_PIN_15) #define OMV_SPI_LCD_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_SPI_LCD_MOSI_PORT (GPIOB) #define OMV_SPI_LCD_MISO_PIN (&omv_pin_B14_SPI2)
#define OMV_SPI_LCD_MOSI_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_SCLK_PIN (&omv_pin_B13_SPI2)
#define OMV_SPI_LCD_SSEL_PIN (&omv_pin_B12_GPIO)
#define OMV_SPI_LCD_MISO_PIN (GPIO_PIN_14) #define OMV_SPI_LCD_RS_PIN (&omv_pin_D13_GPIO)
#define OMV_SPI_LCD_MISO_PORT (GPIOB) #define OMV_SPI_LCD_BL_PIN (&omv_pin_A5_GPIO)
#define OMV_SPI_LCD_MISO_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_RST_PIN (&omv_pin_D12_GPIO)
#define OMV_SPI_LCD_SCLK_PIN (GPIO_PIN_13)
#define OMV_SPI_LCD_SCLK_PORT (GPIOB)
#define OMV_SPI_LCD_SCLK_ALT (GPIO_AF5_SPI2)
#define OMV_SPI_LCD_RST_PIN (GPIO_PIN_12)
#define OMV_SPI_LCD_RST_PORT (GPIOD)
#define OMV_SPI_LCD_RST_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RST_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_RS_PIN (GPIO_PIN_13)
#define OMV_SPI_LCD_RS_PORT (GPIOD)
#define OMV_SPI_LCD_RS_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RS_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_CS_PIN (GPIO_PIN_12)
#define OMV_SPI_LCD_CS_PORT (GPIOB)
#define OMV_SPI_LCD_CS_HIGH() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_CS_LOW() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_BL_PIN (GPIO_PIN_5)
#define OMV_SPI_LCD_BL_PORT (GPIOA)
#define OMV_SPI_LCD_BL_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_BL_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_BL_DAC (DAC) #define OMV_SPI_LCD_BL_DAC (DAC)
#define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_2) #define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_2)
@ -290,34 +215,14 @@
#define OMV_SPI_LCD_BL_DAC_FORCE_RESET() __HAL_RCC_DAC_FORCE_RESET() #define OMV_SPI_LCD_BL_DAC_FORCE_RESET() __HAL_RCC_DAC_FORCE_RESET()
#define OMV_SPI_LCD_BL_DAC_RELEASE_RESET() __HAL_RCC_DAC_RELEASE_RESET() #define OMV_SPI_LCD_BL_DAC_RELEASE_RESET() __HAL_RCC_DAC_RELEASE_RESET()
// FIR Module
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// FIR Lepton // FIR Lepton
#define OMV_FIR_LEPTON_I2C_BUS (FIR_I2C_ID) #define OMV_FIR_LEPTON_I2C_BUS (FIR_I2C_ID)
#define OMV_FIR_LEPTON_I2C_BUS_SPEED (FIR_I2C_SPEED) #define OMV_FIR_LEPTON_I2C_BUS_SPEED (FIR_I2C_SPEED)
#define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[1]) #define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[1])
#define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI2) #define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI2)
#define OMV_FIR_LEPTON_MOSI_PIN (GPIO_PIN_15) #define OMV_FIR_LEPTON_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_FIR_LEPTON_MOSI_PORT (GPIOB) #define OMV_FIR_LEPTON_MISO_PIN (&omv_pin_B14_SPI2)
#define OMV_FIR_LEPTON_MOSI_ALT (GPIO_AF5_SPI2) #define OMV_FIR_LEPTON_SCLK_PIN (&omv_pin_B13_SPI2)
#define OMV_FIR_LEPTON_SSEL_PIN (&omv_pin_B12_GPIO)
#define OMV_FIR_LEPTON_MISO_PIN (GPIO_PIN_14)
#define OMV_FIR_LEPTON_MISO_PORT (GPIOB)
#define OMV_FIR_LEPTON_MISO_ALT (GPIO_AF5_SPI2)
#define OMV_FIR_LEPTON_SCLK_PIN (GPIO_PIN_13)
#define OMV_FIR_LEPTON_SCLK_PORT (GPIOB)
#define OMV_FIR_LEPTON_SCLK_ALT (GPIO_AF5_SPI2)
#define OMV_FIR_LEPTON_CS_PIN (GPIO_PIN_12)
#define OMV_FIR_LEPTON_CS_PORT (GPIOB)
#define OMV_FIR_LEPTON_CS_HIGH() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_SET)
#define OMV_FIR_LEPTON_CS_LOW() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_RESET)
#endif //__OMV_BOARDCONFIG_H__ #endif //__OMV_BOARDCONFIG_H__

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@ -0,0 +1,27 @@
OMV_GPIO_DEFINE(A, 4, AF13, DCMI)
OMV_GPIO_DEFINE(A, 5, NONE, GPIO)
OMV_GPIO_DEFINE(A, 6, AF13, DCMI)
OMV_GPIO_DEFINE(A, 8, AF1, TIM1)
OMV_GPIO_DEFINE(A, 10, NONE, GPIO)
OMV_GPIO_DEFINE(B, 5, NONE, GPIO)
OMV_GPIO_DEFINE(B, 6, AF13, DCMI)
OMV_GPIO_DEFINE(B, 7, AF13, DCMI)
OMV_GPIO_DEFINE(B, 8, AF4, I2C1)
OMV_GPIO_DEFINE(B, 9, AF4, I2C1)
OMV_GPIO_DEFINE(B, 10, NONE, GPIO)
OMV_GPIO_DEFINE(B, 10, AF4, I2C2)
OMV_GPIO_DEFINE(B, 11, NONE, GPIO)
OMV_GPIO_DEFINE(B, 11, AF4, I2C2)
OMV_GPIO_DEFINE(B, 12, NONE, GPIO)
OMV_GPIO_DEFINE(B, 13, AF5, SPI2)
OMV_GPIO_DEFINE(B, 14, AF5, SPI2)
OMV_GPIO_DEFINE(B, 15, AF5, SPI2)
OMV_GPIO_DEFINE(C, 6, AF13, DCMI)
OMV_GPIO_DEFINE(C, 7, AF13, DCMI)
OMV_GPIO_DEFINE(D, 12, NONE, GPIO)
OMV_GPIO_DEFINE(D, 13, NONE, GPIO)
OMV_GPIO_DEFINE(E, 0, AF13, DCMI)
OMV_GPIO_DEFINE(E, 1, AF13, DCMI)
OMV_GPIO_DEFINE(E, 4, AF13, DCMI)
OMV_GPIO_DEFINE(E, 5, AF13, DCMI)
OMV_GPIO_DEFINE(E, 6, AF13, DCMI)

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@ -64,6 +64,11 @@
#define OMV_ENABLE_HM01B0 (0) #define OMV_ENABLE_HM01B0 (0)
#define OMV_ENABLE_PAJ6100 (1) #define OMV_ENABLE_PAJ6100 (1)
#define OMV_ENABLE_FROGEYE2020 (1) #define OMV_ENABLE_FROGEYE2020 (1)
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// Set which OV767x sensor is used // Set which OV767x sensor is used
#define OMV_OV7670_VERSION (70) #define OMV_OV7670_VERSION (70)
@ -214,131 +219,70 @@
// Image sensor I2C // Image sensor I2C
#define ISC_I2C (I2C1) #define ISC_I2C (I2C1)
#define ISC_I2C_ID (1) #define ISC_I2C_ID (1)
#define ISC_I2C_AF (GPIO_AF4_I2C1) #define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_SCL_PIN (&omv_pin_B8_I2C1)
#define ISC_I2C_SDA_PIN (&omv_pin_B9_I2C1)
#define ISC_I2C_CLK_ENABLE() __I2C1_CLK_ENABLE() #define ISC_I2C_CLK_ENABLE() __I2C1_CLK_ENABLE()
#define ISC_I2C_CLK_DISABLE() __I2C1_CLK_DISABLE() #define ISC_I2C_CLK_DISABLE() __I2C1_CLK_DISABLE()
#define ISC_I2C_SCL_PORT (GPIOB)
#define ISC_I2C_SCL_PIN (GPIO_PIN_8)
#define ISC_I2C_SDA_PORT (GPIOB)
#define ISC_I2C_SDA_PIN (GPIO_PIN_9)
#define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET() #define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET()
#define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET() #define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET()
/* FIR I2C */ // FIR I2C configuration.
#define FIR_I2C (I2C2) #define FIR_I2C (I2C2)
#define FIR_I2C_ID (2) #define FIR_I2C_ID (2)
#define FIR_I2C_AF (GPIO_AF4_I2C2) #define FIR_I2C_SPEED (CAMBUS_SPEED_FULL)
#define FIR_I2C_SCL_PIN (&omv_pin_B10_I2C2)
#define FIR_I2C_SDA_PIN (&omv_pin_B11_I2C2)
#define FIR_I2C_CLK_ENABLE() __I2C2_CLK_ENABLE() #define FIR_I2C_CLK_ENABLE() __I2C2_CLK_ENABLE()
#define FIR_I2C_CLK_DISABLE() __I2C2_CLK_DISABLE() #define FIR_I2C_CLK_DISABLE() __I2C2_CLK_DISABLE()
#define FIR_I2C_SCL_PORT (GPIOB)
#define FIR_I2C_SCL_PIN (GPIO_PIN_10)
#define FIR_I2C_SDA_PORT (GPIOB)
#define FIR_I2C_SDA_PIN (GPIO_PIN_11)
#define FIR_I2C_SPEED (CAMBUS_SPEED_FULL)
#define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET() #define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET()
#define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET() #define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET()
/* DCMI */ // Soft I2C bus.
#define SOFT_I2C_SIOC_PIN (&omv_pin_B10_GPIO)
#define SOFT_I2C_SIOD_PIN (&omv_pin_B11_GPIO)
#define SOFT_I2C_SPIN_DELAY 64
// DCMI timer.
#define DCMI_TIM (TIM1) #define DCMI_TIM (TIM1)
#define DCMI_TIM_PIN (GPIO_PIN_8) #define DCMI_TIM_PIN (&omv_pin_A8_TIM1)
#define DCMI_TIM_PORT (GPIOA)
#define DCMI_TIM_AF (GPIO_AF1_TIM1)
#define DCMI_TIM_CHANNEL (TIM_CHANNEL_1) #define DCMI_TIM_CHANNEL (TIM_CHANNEL_1)
#define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE() #define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE()
#define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE() #define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE()
#define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq() #define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq()
#define DCMI_RESET_PIN (GPIO_PIN_10) // DCMI pins.
#define DCMI_RESET_PORT (GPIOA) #define DCMI_RESET_PIN (&omv_pin_A10_GPIO)
#define DCMI_POWER_PIN (&omv_pin_D7_GPIO)
#define DCMI_FSYNC_PIN (&omv_pin_B4_GPIO)
#define DCMI_PWDN_PIN (GPIO_PIN_7) #define DCMI_D0_PIN (&omv_pin_C6_DCMI)
#define DCMI_PWDN_PORT (GPIOD) #define DCMI_D1_PIN (&omv_pin_C7_DCMI)
#define DCMI_D2_PIN (&omv_pin_E0_DCMI)
#define DCMI_D3_PIN (&omv_pin_E1_DCMI)
#define DCMI_D4_PIN (&omv_pin_E4_DCMI)
#define DCMI_D5_PIN (&omv_pin_B6_DCMI)
#define DCMI_D6_PIN (&omv_pin_E5_DCMI)
#define DCMI_D7_PIN (&omv_pin_E6_DCMI)
#define DCMI_FSYNC_PIN (GPIO_PIN_4) #define DCMI_HSYNC_PIN (&omv_pin_A4_DCMI)
#define DCMI_FSYNC_PORT (GPIOB) #define DCMI_VSYNC_PIN (&omv_pin_B7_DCMI)
#define DCMI_PXCLK_PIN (&omv_pin_A6_DCMI)
#define DCMI_D0_PIN (GPIO_PIN_6)
#define DCMI_D1_PIN (GPIO_PIN_7)
#define DCMI_D2_PIN (GPIO_PIN_0)
#define DCMI_D3_PIN (GPIO_PIN_1)
#define DCMI_D4_PIN (GPIO_PIN_4)
#define DCMI_D5_PIN (GPIO_PIN_6)
#define DCMI_D6_PIN (GPIO_PIN_5)
#define DCMI_D7_PIN (GPIO_PIN_6)
#define DCMI_D0_PORT (GPIOC)
#define DCMI_D1_PORT (GPIOC)
#define DCMI_D2_PORT (GPIOE)
#define DCMI_D3_PORT (GPIOE)
#define DCMI_D4_PORT (GPIOE)
#define DCMI_D5_PORT (GPIOB)
#define DCMI_D6_PORT (GPIOE)
#define DCMI_D7_PORT (GPIOE)
#define DCMI_HSYNC_PIN (GPIO_PIN_4)
#define DCMI_VSYNC_PIN (GPIO_PIN_7)
#define DCMI_PXCLK_PIN (GPIO_PIN_6)
#define DCMI_HSYNC_PORT (GPIOA)
#define DCMI_VSYNC_PORT (GPIOB)
#define DCMI_PXCLK_PORT (GPIOA)
#define DCMI_RESET_LOW() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_RESET)
#define DCMI_RESET_HIGH() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_SET)
#define DCMI_PWDN_LOW() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_RESET)
#define DCMI_PWDN_HIGH() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_SET)
#define DCMI_FSYNC_LOW() HAL_GPIO_WritePin(DCMI_FSYNC_PORT, DCMI_FSYNC_PIN, GPIO_PIN_RESET)
#define DCMI_FSYNC_HIGH() HAL_GPIO_WritePin(DCMI_FSYNC_PORT, DCMI_FSYNC_PIN, GPIO_PIN_SET)
#define DCMI_VSYNC_EXTI_IRQN (EXTI9_5_IRQn)
#define DCMI_VSYNC_EXTI_LINE (7)
#define DCMI_VSYNC_EXTI_GPIO (EXTI_GPIOB)
#define DCMI_VSYNC_EXTI_SHARED (0)
#define WINC_SPI (SPI2) #define WINC_SPI (SPI2)
#define WINC_SPI_AF (GPIO_AF5_SPI2)
#define WINC_SPI_TIMEOUT (1000) #define WINC_SPI_TIMEOUT (1000)
// SPI1/2/3 clock source is PLL2 (160MHz/4 == 40MHz). // SPI1/2/3 clock source is PLL2 (160MHz/4 == 40MHz).
#define WINC_SPI_PRESCALER (SPI_BAUDRATEPRESCALER_4) #define WINC_SPI_PRESCALER (SPI_BAUDRATEPRESCALER_4)
#define WINC_SPI_CLK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE() #define WINC_SPI_CLK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE()
#define WINC_SPI_SCLK_PIN (GPIO_PIN_13) #define WINC_SPI_SCLK_PIN (&omv_pin_B13_SPI2)
#define WINC_SPI_MISO_PIN (GPIO_PIN_14) #define WINC_SPI_MISO_PIN (&omv_pin_B14_SPI2)
#define WINC_SPI_MOSI_PIN (GPIO_PIN_15) #define WINC_SPI_MOSI_PIN (&omv_pin_B15_SPI2)
#define WINC_SPI_SSEL_PIN (&omv_pin_B12_GPIO)
#define WINC_SPI_SCLK_PORT (GPIOB) #define WINC_EN_PIN (&omv_pin_A5_GPIO)
#define WINC_SPI_MISO_PORT (GPIOB) #define WINC_RST_PIN (&omv_pin_D12_GPIO)
#define WINC_SPI_MOSI_PORT (GPIOB) #define WINC_IRQ_PIN (&omv_pin_D13_GPIO)
#define WINC_EN_PIN (GPIO_PIN_5)
#define WINC_CS_PIN (GPIO_PIN_12)
#define WINC_RST_PIN (GPIO_PIN_12)
#define WINC_IRQ_PIN (pin_D13)
#define WINC_EN_PORT (GPIOA)
#define WINC_CS_PORT (GPIOB)
#define WINC_RST_PORT (GPIOD)
#define WINC_CS_LOW() HAL_GPIO_WritePin(WINC_CS_PORT, WINC_CS_PIN, GPIO_PIN_RESET)
#define WINC_CS_HIGH() HAL_GPIO_WritePin(WINC_CS_PORT, WINC_CS_PIN, GPIO_PIN_SET)
#define SOFT_I2C_PORT GPIOB
#define SOFT_I2C_SIOC_PIN GPIO_PIN_10
#define SOFT_I2C_SIOD_PIN GPIO_PIN_11
#define SOFT_I2C_SIOC_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOC_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOD_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_READ() HAL_GPIO_ReadPin (SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN)
#define SOFT_I2C_SIOD_WRITE(bit) HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, bit);
#define SOFT_I2C_SPIN_DELAY 64
#define ISC_SPI (SPI3) #define ISC_SPI (SPI3)
// SPI1/2/3 clock source is PLL3 (160MHz/8 == 20MHz) - Minimum (164*240*8*27 = 8,501,760Hz) // SPI1/2/3 clock source is PLL3 (160MHz/8 == 20MHz) - Minimum (164*240*8*27 = 8,501,760Hz)
@ -359,81 +303,23 @@
#define ISC_SPI_CLK_ENABLE() __HAL_RCC_SPI3_CLK_ENABLE() #define ISC_SPI_CLK_ENABLE() __HAL_RCC_SPI3_CLK_ENABLE()
#define ISC_SPI_CLK_DISABLE() __HAL_RCC_SPI3_CLK_DISABLE() #define ISC_SPI_CLK_DISABLE() __HAL_RCC_SPI3_CLK_DISABLE()
#define ISC_SPI_SCLK_AF (GPIO_AF6_SPI3) #define ISC_SPI_SCLK_PIN (&omv_pin_B3_SPI3)
#define ISC_SPI_MISO_AF (GPIO_AF6_SPI3) #define ISC_SPI_MISO_PIN (&omv_pin_B4_SPI3)
#define ISC_SPI_MOSI_AF (GPIO_AF7_SPI3) #define ISC_SPI_MOSI_PIN (&omv_pin_B5_SPI3)
#define ISC_SPI_SSEL_AF (GPIO_AF6_SPI3) #define ISC_SPI_SSEL_PIN (&omv_pin_A15_SPI3)
#define ISC_SPI_SCLK_PIN (GPIO_PIN_3)
#define ISC_SPI_MISO_PIN (GPIO_PIN_4)
#define ISC_SPI_MOSI_PIN (GPIO_PIN_5)
#define ISC_SPI_SSEL_PIN (GPIO_PIN_15)
#define ISC_SPI_SCLK_PORT (GPIOB)
#define ISC_SPI_MISO_PORT (GPIOB)
#define ISC_SPI_MOSI_PORT (GPIOB)
#define ISC_SPI_SSEL_PORT (GPIOA)
// The IMU sensor is on the same SPI bus pins as the camera module interface
// SPI bus. While the buses overlap both devices will never be in-use at once.
#define IMU_CHIP_LSM6DS3 (1)
#define IMU_SPI (SPI1)
#define IMU_SPI_AF (GPIO_AF5_SPI1)
// SPI1/2/3 clock source is PLL2 (160MHz/16 == 10MHz).
#define IMU_SPI_PRESCALER (SPI_BAUDRATEPRESCALER_16)
#define IMU_SPI_RESET() __HAL_RCC_SPI1_FORCE_RESET()
#define IMU_SPI_RELEASE() __HAL_RCC_SPI1_RELEASE_RESET()
#define IMU_SPI_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE()
#define IMU_SPI_CLK_DISABLE() __HAL_RCC_SPI1_CLK_DISABLE()
#define IMU_SPI_SCLK_PIN (GPIO_PIN_3)
#define IMU_SPI_MISO_PIN (GPIO_PIN_4)
#define IMU_SPI_MOSI_PIN (GPIO_PIN_5)
#define IMU_SPI_SSEL_PIN (GPIO_PIN_15)
#define IMU_SPI_SCLK_PORT (GPIOB)
#define IMU_SPI_MISO_PORT (GPIOB)
#define IMU_SPI_MOSI_PORT (GPIOB)
#define IMU_SPI_SSEL_PORT (GPIOA)
// SPI LCD Interface // SPI LCD Interface
#define OMV_SPI_LCD_CONTROLLER (&spi_obj[1]) #define OMV_SPI_LCD_CONTROLLER (&spi_obj[1])
#define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2) #define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2)
#define OMV_SPI_LCD_MOSI_PIN (GPIO_PIN_15) #define OMV_SPI_LCD_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_SPI_LCD_MOSI_PORT (GPIOB) #define OMV_SPI_LCD_MISO_PIN (&omv_pin_B14_SPI2)
#define OMV_SPI_LCD_MOSI_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_SCLK_PIN (&omv_pin_B13_SPI2)
#define OMV_SPI_LCD_SSEL_PIN (&omv_pin_B12_GPIO)
#define OMV_SPI_LCD_MISO_PIN (GPIO_PIN_14) #define OMV_SPI_LCD_RS_PIN (&omv_pin_D13_GPIO)
#define OMV_SPI_LCD_MISO_PORT (GPIOB) #define OMV_SPI_LCD_BL_PIN (&omv_pin_A5_GPIO)
#define OMV_SPI_LCD_MISO_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_RST_PIN (&omv_pin_D12_GPIO)
#define OMV_SPI_LCD_SCLK_PIN (GPIO_PIN_13)
#define OMV_SPI_LCD_SCLK_PORT (GPIOB)
#define OMV_SPI_LCD_SCLK_ALT (GPIO_AF5_SPI2)
#define OMV_SPI_LCD_RST_PIN (GPIO_PIN_12)
#define OMV_SPI_LCD_RST_PORT (GPIOD)
#define OMV_SPI_LCD_RST_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RST_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_RS_PIN (GPIO_PIN_13)
#define OMV_SPI_LCD_RS_PORT (GPIOD)
#define OMV_SPI_LCD_RS_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RS_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_CS_PIN (GPIO_PIN_12)
#define OMV_SPI_LCD_CS_PORT (GPIOB)
#define OMV_SPI_LCD_CS_HIGH() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_CS_LOW() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_BL_PIN (GPIO_PIN_5)
#define OMV_SPI_LCD_BL_PORT (GPIOA)
#define OMV_SPI_LCD_BL_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_BL_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_BL_DAC (DAC1) #define OMV_SPI_LCD_BL_DAC (DAC1)
#define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_2) #define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_2)
@ -442,34 +328,14 @@
#define OMV_SPI_LCD_BL_DAC_FORCE_RESET() __HAL_RCC_DAC12_FORCE_RESET() #define OMV_SPI_LCD_BL_DAC_FORCE_RESET() __HAL_RCC_DAC12_FORCE_RESET()
#define OMV_SPI_LCD_BL_DAC_RELEASE_RESET() __HAL_RCC_DAC12_RELEASE_RESET() #define OMV_SPI_LCD_BL_DAC_RELEASE_RESET() __HAL_RCC_DAC12_RELEASE_RESET()
// FIR Module
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// FIR Lepton // FIR Lepton
#define OMV_FIR_LEPTON_I2C_BUS (FIR_I2C_ID) #define OMV_FIR_LEPTON_I2C_BUS (FIR_I2C_ID)
#define OMV_FIR_LEPTON_I2C_BUS_SPEED (FIR_I2C_SPEED) #define OMV_FIR_LEPTON_I2C_BUS_SPEED (FIR_I2C_SPEED)
#define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[1]) #define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[1])
#define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI2) #define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI2)
#define OMV_FIR_LEPTON_MOSI_PIN (GPIO_PIN_15) #define OMV_FIR_LEPTON_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_FIR_LEPTON_MOSI_PORT (GPIOB) #define OMV_FIR_LEPTON_MISO_PIN (&omv_pin_B14_SPI2)
#define OMV_FIR_LEPTON_MOSI_ALT (GPIO_AF5_SPI2) #define OMV_FIR_LEPTON_SCLK_PIN (&omv_pin_B13_SPI2)
#define OMV_FIR_LEPTON_SSEL_PIN (&omv_pin_B12_GPIO)
#define OMV_FIR_LEPTON_MISO_PIN (GPIO_PIN_14)
#define OMV_FIR_LEPTON_MISO_PORT (GPIOB)
#define OMV_FIR_LEPTON_MISO_ALT (GPIO_AF5_SPI2)
#define OMV_FIR_LEPTON_SCLK_PIN (GPIO_PIN_13)
#define OMV_FIR_LEPTON_SCLK_PORT (GPIOB)
#define OMV_FIR_LEPTON_SCLK_ALT (GPIO_AF5_SPI2)
#define OMV_FIR_LEPTON_CS_PIN (GPIO_PIN_12)
#define OMV_FIR_LEPTON_CS_PORT (GPIOB)
#define OMV_FIR_LEPTON_CS_HIGH() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_SET)
#define OMV_FIR_LEPTON_CS_LOW() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_RESET)
#endif //__OMV_BOARDCONFIG_H__ #endif //__OMV_BOARDCONFIG_H__

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@ -0,0 +1,32 @@
OMV_GPIO_DEFINE(A, 4, AF13, DCMI)
OMV_GPIO_DEFINE(A, 5, NONE, GPIO)
OMV_GPIO_DEFINE(A, 6, AF13, DCMI)
OMV_GPIO_DEFINE(A, 8, AF1, TIM1)
OMV_GPIO_DEFINE(A, 10, NONE, GPIO)
OMV_GPIO_DEFINE(A, 15, AF6, SPI3)
OMV_GPIO_DEFINE(B, 3, AF6, SPI3)
OMV_GPIO_DEFINE(B, 4, NONE, GPIO)
OMV_GPIO_DEFINE(B, 4, AF6, SPI3)
OMV_GPIO_DEFINE(B, 5, AF7, SPI3)
OMV_GPIO_DEFINE(B, 6, AF13, DCMI)
OMV_GPIO_DEFINE(B, 7, AF13, DCMI)
OMV_GPIO_DEFINE(B, 8, AF4, I2C1)
OMV_GPIO_DEFINE(B, 9, AF4, I2C1)
OMV_GPIO_DEFINE(B, 10, NONE, GPIO)
OMV_GPIO_DEFINE(B, 10, AF4, I2C2)
OMV_GPIO_DEFINE(B, 11, NONE, GPIO)
OMV_GPIO_DEFINE(B, 11, AF4, I2C2)
OMV_GPIO_DEFINE(B, 12, NONE, GPIO)
OMV_GPIO_DEFINE(B, 13, AF5, SPI2)
OMV_GPIO_DEFINE(B, 14, AF5, SPI2)
OMV_GPIO_DEFINE(B, 15, AF5, SPI2)
OMV_GPIO_DEFINE(C, 6, AF13, DCMI)
OMV_GPIO_DEFINE(C, 7, AF13, DCMI)
OMV_GPIO_DEFINE(D, 7, NONE, GPIO)
OMV_GPIO_DEFINE(D, 12, NONE, GPIO)
OMV_GPIO_DEFINE(D, 13, NONE, GPIO)
OMV_GPIO_DEFINE(E, 0, AF13, DCMI)
OMV_GPIO_DEFINE(E, 1, AF13, DCMI)
OMV_GPIO_DEFINE(E, 4, AF13, DCMI)
OMV_GPIO_DEFINE(E, 5, AF13, DCMI)
OMV_GPIO_DEFINE(E, 6, AF13, DCMI)

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@ -63,6 +63,17 @@
#define OMV_ENABLE_HM01B0 (0) #define OMV_ENABLE_HM01B0 (0)
#define OMV_ENABLE_PAJ6100 (1) #define OMV_ENABLE_PAJ6100 (1)
#define OMV_ENABLE_FROGEYE2020 (1) #define OMV_ENABLE_FROGEYE2020 (1)
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// Enable additional GPIO banks.
#define OMV_ENABLE_GPIO_BANK_F (1)
#define OMV_ENABLE_GPIO_BANK_G (1)
#define OMV_ENABLE_GPIO_BANK_H (1)
#define OMV_ENABLE_GPIO_BANK_I (1)
// Enable sensor features // Enable sensor features
#define OMV_ENABLE_OV5640_AF (0) #define OMV_ENABLE_OV5640_AF (0)
@ -208,134 +219,72 @@
#define OMV_AXI_QOS_MDMA_R_PRI 15 // Max pri to move data. #define OMV_AXI_QOS_MDMA_R_PRI 15 // Max pri to move data.
#define OMV_AXI_QOS_MDMA_W_PRI 15 // Max pri to move data. #define OMV_AXI_QOS_MDMA_W_PRI 15 // Max pri to move data.
// Image sensor I2C // Image sensor I2C.
#define ISC_I2C (I2C1) #define ISC_I2C (I2C1)
#define ISC_I2C_ID (1) #define ISC_I2C_ID (1)
#define ISC_I2C_AF (GPIO_AF4_I2C1) #define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_SCL_PIN (&omv_pin_B8_I2C1)
#define ISC_I2C_SDA_PIN (&omv_pin_B9_I2C1)
#define ISC_I2C_CLK_ENABLE() __I2C1_CLK_ENABLE() #define ISC_I2C_CLK_ENABLE() __I2C1_CLK_ENABLE()
#define ISC_I2C_CLK_DISABLE() __I2C1_CLK_DISABLE() #define ISC_I2C_CLK_DISABLE() __I2C1_CLK_DISABLE()
#define ISC_I2C_SCL_PORT (GPIOB)
#define ISC_I2C_SCL_PIN (GPIO_PIN_8)
#define ISC_I2C_SDA_PORT (GPIOB)
#define ISC_I2C_SDA_PIN (GPIO_PIN_9)
#define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET() #define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET()
#define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET() #define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET()
/* FIR I2C */ // FIR I2C configuration.
#define FIR_I2C (I2C2) #define FIR_I2C (I2C2)
#define FIR_I2C_ID (2) #define FIR_I2C_ID (2)
#define FIR_I2C_AF (GPIO_AF4_I2C2) #define FIR_I2C_SPEED (CAMBUS_SPEED_FULL)
#define FIR_I2C_SCL_PIN (&omv_pin_B10_I2C2)
#define FIR_I2C_SDA_PIN (&omv_pin_B11_I2C2)
#define FIR_I2C_CLK_ENABLE() __I2C2_CLK_ENABLE() #define FIR_I2C_CLK_ENABLE() __I2C2_CLK_ENABLE()
#define FIR_I2C_CLK_DISABLE() __I2C2_CLK_DISABLE() #define FIR_I2C_CLK_DISABLE() __I2C2_CLK_DISABLE()
#define FIR_I2C_SCL_PORT (GPIOB)
#define FIR_I2C_SCL_PIN (GPIO_PIN_10)
#define FIR_I2C_SDA_PORT (GPIOB)
#define FIR_I2C_SDA_PIN (GPIO_PIN_11)
#define FIR_I2C_SPEED (CAMBUS_SPEED_FULL)
#define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET() #define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET()
#define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET() #define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET()
/* DCMI */ // Soft I2C bus.
#define SOFT_I2C_SIOC_PIN (&omv_pin_B10_GPIO)
#define SOFT_I2C_SIOD_PIN (&omv_pin_B11_GPIO)
#define SOFT_I2C_SPIN_DELAY 64
// DCMI timer.
#define DCMI_TIM (TIM1) #define DCMI_TIM (TIM1)
#define DCMI_TIM_PIN (GPIO_PIN_8) #define DCMI_TIM_PIN (&omv_pin_A8_TIM1)
#define DCMI_TIM_PORT (GPIOA)
#define DCMI_TIM_AF (GPIO_AF1_TIM1)
#define DCMI_TIM_CHANNEL (TIM_CHANNEL_1) #define DCMI_TIM_CHANNEL (TIM_CHANNEL_1)
#define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE() #define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE()
#define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE() #define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE()
#define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq() #define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq()
#define DCMI_RESET_PIN (GPIO_PIN_10) // DCMI pins.
#define DCMI_RESET_PORT (GPIOA) #define DCMI_RESET_PIN (&omv_pin_A10_GPIO)
#define DCMI_POWER_PIN (&omv_pin_D7_GPIO)
#define DCMI_FSYNC_PIN (&omv_pin_B4_GPIO)
#define DCMI_PWDN_PIN (GPIO_PIN_7) #define DCMI_D0_PIN (&omv_pin_C6_DCMI)
#define DCMI_PWDN_PORT (GPIOD) #define DCMI_D1_PIN (&omv_pin_C7_DCMI)
#define DCMI_D2_PIN (&omv_pin_G10_DCMI)
#define DCMI_D3_PIN (&omv_pin_G11_DCMI)
#define DCMI_D4_PIN (&omv_pin_E4_DCMI)
#define DCMI_D5_PIN (&omv_pin_B6_DCMI)
#define DCMI_D6_PIN (&omv_pin_E5_DCMI)
#define DCMI_D7_PIN (&omv_pin_E6_DCMI)
#define DCMI_FSYNC_PIN (GPIO_PIN_4) #define DCMI_HSYNC_PIN (&omv_pin_A4_DCMI)
#define DCMI_FSYNC_PORT (GPIOB) #define DCMI_VSYNC_PIN (&omv_pin_B7_DCMI)
#define DCMI_PXCLK_PIN (&omv_pin_A6_DCMI)
#define DCMI_D0_PIN (GPIO_PIN_6)
#define DCMI_D1_PIN (GPIO_PIN_7)
#define DCMI_D2_PIN (GPIO_PIN_10)
#define DCMI_D3_PIN (GPIO_PIN_11)
#define DCMI_D4_PIN (GPIO_PIN_4)
#define DCMI_D5_PIN (GPIO_PIN_6)
#define DCMI_D6_PIN (GPIO_PIN_5)
#define DCMI_D7_PIN (GPIO_PIN_6)
#define DCMI_D0_PORT (GPIOC)
#define DCMI_D1_PORT (GPIOC)
#define DCMI_D2_PORT (GPIOG)
#define DCMI_D3_PORT (GPIOG)
#define DCMI_D4_PORT (GPIOE)
#define DCMI_D5_PORT (GPIOB)
#define DCMI_D6_PORT (GPIOE)
#define DCMI_D7_PORT (GPIOE)
#define DCMI_HSYNC_PIN (GPIO_PIN_4)
#define DCMI_VSYNC_PIN (GPIO_PIN_7)
#define DCMI_PXCLK_PIN (GPIO_PIN_6)
#define DCMI_HSYNC_PORT (GPIOA)
#define DCMI_VSYNC_PORT (GPIOB)
#define DCMI_PXCLK_PORT (GPIOA)
#define DCMI_RESET_LOW() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_RESET)
#define DCMI_RESET_HIGH() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_SET)
#define DCMI_PWDN_LOW() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_RESET)
#define DCMI_PWDN_HIGH() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_SET)
#define DCMI_FSYNC_LOW() HAL_GPIO_WritePin(DCMI_FSYNC_PORT, DCMI_FSYNC_PIN, GPIO_PIN_RESET)
#define DCMI_FSYNC_HIGH() HAL_GPIO_WritePin(DCMI_FSYNC_PORT, DCMI_FSYNC_PIN, GPIO_PIN_SET)
#define DCMI_VSYNC_EXTI_IRQN (EXTI9_5_IRQn)
#define DCMI_VSYNC_EXTI_LINE (7)
#define DCMI_VSYNC_EXTI_GPIO (EXTI_GPIOB)
#define DCMI_VSYNC_EXTI_SHARED (0)
#define WINC_SPI (SPI2) #define WINC_SPI (SPI2)
#define WINC_SPI_AF (GPIO_AF5_SPI2)
#define WINC_SPI_TIMEOUT (1000) #define WINC_SPI_TIMEOUT (1000)
// SPI1/2/3 clock source is PLL2 (160MHz/4 == 40MHz). // SPI1/2/3 clock source is PLL2 (160MHz/4 == 40MHz).
#define WINC_SPI_PRESCALER (SPI_BAUDRATEPRESCALER_4) #define WINC_SPI_PRESCALER (SPI_BAUDRATEPRESCALER_4)
#define WINC_SPI_CLK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE() #define WINC_SPI_CLK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE()
#define WINC_SPI_SCLK_PIN (&omv_pin_B13_SPI2)
#define WINC_SPI_MISO_PIN (&omv_pin_B14_SPI2)
#define WINC_SPI_MOSI_PIN (&omv_pin_B15_SPI2)
#define WINC_SPI_SSEL_PIN (&omv_pin_B12_GPIO)
#define WINC_SPI_SCLK_PIN (GPIO_PIN_13) #define WINC_EN_PIN (&omv_pin_A5_GPIO)
#define WINC_SPI_MISO_PIN (GPIO_PIN_14) #define WINC_RST_PIN (&omv_pin_D12_GPIO)
#define WINC_SPI_MOSI_PIN (GPIO_PIN_15) #define WINC_IRQ_PIN (&omv_pin_D13_GPIO)
#define WINC_SPI_SCLK_PORT (GPIOB)
#define WINC_SPI_MISO_PORT (GPIOB)
#define WINC_SPI_MOSI_PORT (GPIOB)
#define WINC_EN_PIN (GPIO_PIN_5)
#define WINC_CS_PIN (GPIO_PIN_12)
#define WINC_RST_PIN (GPIO_PIN_12)
#define WINC_IRQ_PIN (pin_D13)
#define WINC_EN_PORT (GPIOA)
#define WINC_CS_PORT (GPIOB)
#define WINC_RST_PORT (GPIOD)
#define WINC_CS_LOW() HAL_GPIO_WritePin(WINC_CS_PORT, WINC_CS_PIN, GPIO_PIN_RESET)
#define WINC_CS_HIGH() HAL_GPIO_WritePin(WINC_CS_PORT, WINC_CS_PIN, GPIO_PIN_SET)
#define SOFT_I2C_PORT GPIOB
#define SOFT_I2C_SIOC_PIN GPIO_PIN_10
#define SOFT_I2C_SIOD_PIN GPIO_PIN_11
#define SOFT_I2C_SIOC_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOC_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOD_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_READ() HAL_GPIO_ReadPin (SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN)
#define SOFT_I2C_SIOD_WRITE(bit) HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, bit);
#define SOFT_I2C_SPIN_DELAY 64
#define ISC_SPI (SPI3) #define ISC_SPI (SPI3)
// SPI1/2/3 clock source is PLL3 (160MHz/8 == 20MHz) - Minimum (164*240*8*27 = 8,501,760Hz) // SPI1/2/3 clock source is PLL3 (160MHz/8 == 20MHz) - Minimum (164*240*8*27 = 8,501,760Hz)
@ -356,56 +305,23 @@
#define ISC_SPI_CLK_ENABLE() __HAL_RCC_SPI3_CLK_ENABLE() #define ISC_SPI_CLK_ENABLE() __HAL_RCC_SPI3_CLK_ENABLE()
#define ISC_SPI_CLK_DISABLE() __HAL_RCC_SPI3_CLK_DISABLE() #define ISC_SPI_CLK_DISABLE() __HAL_RCC_SPI3_CLK_DISABLE()
#define ISC_SPI_SCLK_AF (GPIO_AF6_SPI3) #define ISC_SPI_SCLK_PIN (&omv_pin_B3_SPI3)
#define ISC_SPI_MISO_AF (GPIO_AF6_SPI3) #define ISC_SPI_MISO_PIN (&omv_pin_B4_SPI3)
#define ISC_SPI_MOSI_AF (GPIO_AF7_SPI3) #define ISC_SPI_MOSI_PIN (&omv_pin_B5_SPI3)
#define ISC_SPI_SSEL_AF (GPIO_AF6_SPI3) #define ISC_SPI_SSEL_PIN (&omv_pin_A15_SPI3)
#define ISC_SPI_SCLK_PIN (GPIO_PIN_3)
#define ISC_SPI_MISO_PIN (GPIO_PIN_4)
#define ISC_SPI_MOSI_PIN (GPIO_PIN_5)
#define ISC_SPI_SSEL_PIN (GPIO_PIN_15)
#define ISC_SPI_SCLK_PORT (GPIOB)
#define ISC_SPI_MISO_PORT (GPIOB)
#define ISC_SPI_MOSI_PORT (GPIOB)
#define ISC_SPI_SSEL_PORT (GPIOA)
// SPI LCD Interface // SPI LCD Interface
#define OMV_SPI_LCD_CONTROLLER (&spi_obj[1]) #define OMV_SPI_LCD_CONTROLLER (&spi_obj[1])
#define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2) #define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2)
#define OMV_SPI_LCD_MOSI_PIN (GPIO_PIN_15) #define OMV_SPI_LCD_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_SPI_LCD_MOSI_PORT (GPIOB) #define OMV_SPI_LCD_MISO_PIN (&omv_pin_B14_SPI2)
#define OMV_SPI_LCD_MOSI_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_SCLK_PIN (&omv_pin_B13_SPI2)
#define OMV_SPI_LCD_SSEL_PIN (&omv_pin_B12_GPIO)
#define OMV_SPI_LCD_MISO_PIN (GPIO_PIN_14) #define OMV_SPI_LCD_RS_PIN (&omv_pin_D13_GPIO)
#define OMV_SPI_LCD_MISO_PORT (GPIOB) #define OMV_SPI_LCD_BL_PIN (&omv_pin_A5_GPIO)
#define OMV_SPI_LCD_MISO_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_RST_PIN (&omv_pin_D12_GPIO)
#define OMV_SPI_LCD_SCLK_PIN (GPIO_PIN_13)
#define OMV_SPI_LCD_SCLK_PORT (GPIOB)
#define OMV_SPI_LCD_SCLK_ALT (GPIO_AF5_SPI2)
#define OMV_SPI_LCD_RST_PIN (GPIO_PIN_12)
#define OMV_SPI_LCD_RST_PORT (GPIOD)
#define OMV_SPI_LCD_RST_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RST_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_RS_PIN (GPIO_PIN_13)
#define OMV_SPI_LCD_RS_PORT (GPIOD)
#define OMV_SPI_LCD_RS_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RS_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_CS_PIN (GPIO_PIN_12)
#define OMV_SPI_LCD_CS_PORT (GPIOB)
#define OMV_SPI_LCD_CS_HIGH() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_CS_LOW() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_BL_PIN (GPIO_PIN_5)
#define OMV_SPI_LCD_BL_PORT (GPIOA)
#define OMV_SPI_LCD_BL_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_BL_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_BL_DAC (DAC1) #define OMV_SPI_LCD_BL_DAC (DAC1)
#define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_2) #define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_2)
@ -414,40 +330,15 @@
#define OMV_SPI_LCD_BL_DAC_FORCE_RESET() __HAL_RCC_DAC12_FORCE_RESET() #define OMV_SPI_LCD_BL_DAC_FORCE_RESET() __HAL_RCC_DAC12_FORCE_RESET()
#define OMV_SPI_LCD_BL_DAC_RELEASE_RESET() __HAL_RCC_DAC12_RELEASE_RESET() #define OMV_SPI_LCD_BL_DAC_RELEASE_RESET() __HAL_RCC_DAC12_RELEASE_RESET()
// FIR Module
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// FIR Lepton // FIR Lepton
#define OMV_FIR_LEPTON_I2C_BUS (FIR_I2C_ID) #define OMV_FIR_LEPTON_I2C_BUS (FIR_I2C_ID)
#define OMV_FIR_LEPTON_I2C_BUS_SPEED (FIR_I2C_SPEED) #define OMV_FIR_LEPTON_I2C_BUS_SPEED (FIR_I2C_SPEED)
#define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[1]) #define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[1])
#define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI2) #define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI2)
#define OMV_FIR_LEPTON_MOSI_PIN (GPIO_PIN_15) #define OMV_FIR_LEPTON_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_FIR_LEPTON_MOSI_PORT (GPIOB) #define OMV_FIR_LEPTON_MISO_PIN (&omv_pin_B14_SPI2)
#define OMV_FIR_LEPTON_MOSI_ALT (GPIO_AF5_SPI2) #define OMV_FIR_LEPTON_SCLK_PIN (&omv_pin_B13_SPI2)
#define OMV_FIR_LEPTON_SSEL_PIN (&omv_pin_B12_GPIO)
#define OMV_FIR_LEPTON_MISO_PIN (GPIO_PIN_14)
#define OMV_FIR_LEPTON_MISO_PORT (GPIOB)
#define OMV_FIR_LEPTON_MISO_ALT (GPIO_AF5_SPI2)
#define OMV_FIR_LEPTON_SCLK_PIN (GPIO_PIN_13)
#define OMV_FIR_LEPTON_SCLK_PORT (GPIOB)
#define OMV_FIR_LEPTON_SCLK_ALT (GPIO_AF5_SPI2)
#define OMV_FIR_LEPTON_CS_PIN (GPIO_PIN_12)
#define OMV_FIR_LEPTON_CS_PORT (GPIOB)
#define OMV_FIR_LEPTON_CS_HIGH() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_SET)
#define OMV_FIR_LEPTON_CS_LOW() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_RESET)
// Enable additional GPIO banks for DRAM...
#define OMV_ENABLE_GPIO_BANK_F
#define OMV_ENABLE_GPIO_BANK_G
#define OMV_ENABLE_GPIO_BANK_H
#define OMV_ENABLE_GPIO_BANK_I
#endif //__OMV_BOARDCONFIG_H__ #endif //__OMV_BOARDCONFIG_H__

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@ -0,0 +1,32 @@
OMV_GPIO_DEFINE(A, 4, AF13, DCMI)
OMV_GPIO_DEFINE(A, 5, NONE, GPIO)
OMV_GPIO_DEFINE(A, 6, AF13, DCMI)
OMV_GPIO_DEFINE(A, 8, AF1, TIM1)
OMV_GPIO_DEFINE(A, 10, NONE, GPIO)
OMV_GPIO_DEFINE(A, 15, AF6, SPI3)
OMV_GPIO_DEFINE(B, 3, AF6, SPI3)
OMV_GPIO_DEFINE(B, 4, NONE, GPIO)
OMV_GPIO_DEFINE(B, 4, AF6, SPI3)
OMV_GPIO_DEFINE(B, 5, AF7, SPI3)
OMV_GPIO_DEFINE(B, 6, AF13, DCMI)
OMV_GPIO_DEFINE(B, 7, AF13, DCMI)
OMV_GPIO_DEFINE(B, 8, AF4, I2C1)
OMV_GPIO_DEFINE(B, 9, AF4, I2C1)
OMV_GPIO_DEFINE(B, 10, NONE, GPIO)
OMV_GPIO_DEFINE(B, 10, AF4, I2C2)
OMV_GPIO_DEFINE(B, 11, NONE, GPIO)
OMV_GPIO_DEFINE(B, 11, AF4, I2C2)
OMV_GPIO_DEFINE(B, 12, NONE, GPIO)
OMV_GPIO_DEFINE(B, 13, AF5, SPI2)
OMV_GPIO_DEFINE(B, 14, AF5, SPI2)
OMV_GPIO_DEFINE(B, 15, AF5, SPI2)
OMV_GPIO_DEFINE(C, 6, AF13, DCMI)
OMV_GPIO_DEFINE(C, 7, AF13, DCMI)
OMV_GPIO_DEFINE(D, 7, NONE, GPIO)
OMV_GPIO_DEFINE(D, 12, NONE, GPIO)
OMV_GPIO_DEFINE(D, 13, NONE, GPIO)
OMV_GPIO_DEFINE(E, 4, AF13, DCMI)
OMV_GPIO_DEFINE(E, 5, AF13, DCMI)
OMV_GPIO_DEFINE(E, 6, AF13, DCMI)
OMV_GPIO_DEFINE(G, 10, AF13, DCMI)
OMV_GPIO_DEFINE(G, 11, AF13, DCMI)

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@ -30,28 +30,21 @@
// Sensor external clock timer frequency. // Sensor external clock timer frequency.
#define OMV_XCLK_FREQUENCY (24000000) #define OMV_XCLK_FREQUENCY (24000000)
// Sensor PLL register value.
#define OMV_OV7725_PLL_CONFIG (0x41) // x4
// Sensor Banding Filter Value
#define OMV_OV7725_BANDING (0x7F)
// OV5640 Sensor Settings
#define OMV_OV5640_XCLK_FREQ (24000000)
#define OMV_OV5640_PLL_CTRL2 (0x64)
#define OMV_OV5640_PLL_CTRL3 (0x13)
#define OMV_OV5640_REV_Y_CHECK (1)
#define OMV_OV5640_REV_Y_FREQ (25000000)
#define OMV_OV5640_REV_Y_CTRL2 (0x54)
#define OMV_OV5640_REV_Y_CTRL3 (0x13)
// Enable hardware JPEG // Enable hardware JPEG
#define OMV_HARDWARE_JPEG (1) #define OMV_HARDWARE_JPEG (1)
// Enable MDMA sensor offload. // Enable MDMA sensor offload.
#define OMV_ENABLE_SENSOR_MDMA (1) #define OMV_ENABLE_SENSOR_MDMA (1)
// Enable sensor drivers // Enable additional GPIO banks
#define OMV_ENABLE_GPIO_BANK_F (1)
#define OMV_ENABLE_GPIO_BANK_G (1)
#define OMV_ENABLE_GPIO_BANK_H (1)
#define OMV_ENABLE_GPIO_BANK_I (1)
#define OMV_ENABLE_GPIO_BANK_J (1)
#define OMV_ENABLE_GPIO_BANK_K (1)
// Configure image sensor drivers
#define OMV_ENABLE_OV2640 (1) #define OMV_ENABLE_OV2640 (1)
#define OMV_ENABLE_OV5640 (1) #define OMV_ENABLE_OV5640 (1)
#define OMV_ENABLE_OV7690 (0) #define OMV_ENABLE_OV7690 (0)
@ -64,7 +57,26 @@
#define OMV_ENABLE_PAJ6100 (1) #define OMV_ENABLE_PAJ6100 (1)
#define OMV_ENABLE_FROGEYE2020 (1) #define OMV_ENABLE_FROGEYE2020 (1)
// Enable sensor features // Configure FIR sensors drivers
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (0)
#define OMV_ENABLE_TOF_VL53L5CX (1)
// OV7725 sensor settings
#define OMV_OV7725_PLL_CONFIG (0x41) // x4
#define OMV_OV7725_BANDING (0x7F)
// OV5640 sensor settings
#define OMV_OV5640_XCLK_FREQ (24000000)
#define OMV_OV5640_PLL_CTRL2 (0x64)
#define OMV_OV5640_PLL_CTRL3 (0x13)
#define OMV_OV5640_REV_Y_CHECK (1)
#define OMV_OV5640_REV_Y_FREQ (25000000)
#define OMV_OV5640_REV_Y_CTRL2 (0x54)
#define OMV_OV5640_REV_Y_CTRL3 (0x13)
#define OMV_ENABLE_OV5640_AF (0) #define OMV_ENABLE_OV5640_AF (0)
// Enable WiFi debug // Enable WiFi debug
@ -90,8 +102,8 @@
// USB IRQn. // USB IRQn.
#define OMV_USB_IRQN (OTG_HS_IRQn) #define OMV_USB_IRQN (OTG_HS_IRQn)
#define OMV_USB_ULPI (1) #define OMV_USB_ULPI (1)
#define OMV_USB_ULPI_DIR_PORT (GPIOI) #define OMV_USB_ULPI_DIR_PIN (&omv_pin_I11_OTG_HS)
#define OMV_USB_ULPI_DIR_PIN (GPIO_PIN_11) #define OMV_USB_ULPI_STP_PIN (&omv_pin_C0_OTG_HS)
#define OMV_USB_ULPI_DIR_CLK_ENABLE() __HAL_RCC_GPIOI_CLK_ENABLE() #define OMV_USB_ULPI_DIR_CLK_ENABLE() __HAL_RCC_GPIOI_CLK_ENABLE()
//PLL1 48MHz for USB, SDMMC and FDCAN //PLL1 48MHz for USB, SDMMC and FDCAN
@ -164,7 +176,7 @@
#define OMV_FB_ALLOC_SIZE (11M) // minimum fb alloc size #define OMV_FB_ALLOC_SIZE (11M) // minimum fb alloc size
#define OMV_FB_OVERLAY_SIZE (496*1024) // Fast fb_alloc memory size. #define OMV_FB_OVERLAY_SIZE (496*1024) // Fast fb_alloc memory size.
#define OMV_STACK_SIZE (64K) #define OMV_STACK_SIZE (64K)
#define OMV_HEAP_SIZE (197K) #define OMV_HEAP_SIZE (196K)
#define OMV_SDRAM_SIZE (32 * 1024 * 1024) // This needs to be here for UVC firmware. #define OMV_SDRAM_SIZE (32 * 1024 * 1024) // This needs to be here for UVC firmware.
#define OMV_LINE_BUF_SIZE (11 * 1024) // Image line buffer round(2592 * 2BPP * 2 buffers). #define OMV_LINE_BUF_SIZE (11 * 1024) // Image line buffer round(2592 * 2BPP * 2 buffers).
@ -221,106 +233,78 @@
#define OMV_AXI_QOS_MDMA_R_PRI 15 // Max pri to move data. #define OMV_AXI_QOS_MDMA_R_PRI 15 // Max pri to move data.
#define OMV_AXI_QOS_MDMA_W_PRI 15 // Max pri to move data. #define OMV_AXI_QOS_MDMA_W_PRI 15 // Max pri to move data.
// Image sensor I2C // Image sensor I2C configuration
#define ISC_I2C (I2C2) #define ISC_I2C (I2C2)
#define ISC_I2C_ID (2) #define ISC_I2C_ID (2)
#define ISC_I2C_AF (GPIO_AF4_I2C2) #define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_SCL_PIN (&omv_pin_H4_I2C2)
#define ISC_I2C_SDA_PIN (&omv_pin_H5_I2C2)
#define ISC_I2C_CLK_ENABLE() __HAL_RCC_I2C2_CLK_ENABLE() #define ISC_I2C_CLK_ENABLE() __HAL_RCC_I2C2_CLK_ENABLE()
#define ISC_I2C_CLK_DISABLE() __HAL_RCC_I2C2_CLK_DISABLE() #define ISC_I2C_CLK_DISABLE() __HAL_RCC_I2C2_CLK_DISABLE()
#define ISC_I2C_SCL_PORT (GPIOH)
#define ISC_I2C_SCL_PIN (GPIO_PIN_4)
#define ISC_I2C_SDA_PORT (GPIOH)
#define ISC_I2C_SDA_PIN (GPIO_PIN_5)
#define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET() #define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET()
#define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET() #define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET()
// FIR I2C // FIR sensor I2C configuration
#define FIR_I2C (I2C1) #define FIR_I2C (I2C1)
#define FIR_I2C_ID (1) #define FIR_I2C_ID (1)
#define FIR_I2C_AF (GPIO_AF4_I2C1) #define FIR_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define FIR_I2C_SCL_PIN (&omv_pin_B8_I2C1)
#define FIR_I2C_SDA_PIN (&omv_pin_B9_I2C1)
#define FIR_I2C_CLK_ENABLE() __HAL_RCC_I2C1_CLK_ENABLE() #define FIR_I2C_CLK_ENABLE() __HAL_RCC_I2C1_CLK_ENABLE()
#define FIR_I2C_CLK_DISABLE() __HAL_RCC_I2C1_CLK_DISABLE() #define FIR_I2C_CLK_DISABLE() __HAL_RCC_I2C1_CLK_DISABLE()
#define FIR_I2C_SCL_PORT (GPIOB)
#define FIR_I2C_SCL_PIN (GPIO_PIN_8)
#define FIR_I2C_SDA_PORT (GPIOB)
#define FIR_I2C_SDA_PIN (GPIO_PIN_9)
#define FIR_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET() #define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET()
#define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET() #define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET()
// TOF I2C // TOF sensor I2C configuration
#define TOF_I2C (I2C4) #define TOF_I2C (I2C4)
#define TOF_I2C_ID (4) #define TOF_I2C_ID (4)
#define TOF_I2C_AF (GPIO_AF6_I2C4) #define TOF_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define TOF_I2C_SCL_PIN (&omv_pin_B6_I2C4)
#define TOF_I2C_SDA_PIN (&omv_pin_B7_I2C4)
#define TOF_I2C_CLK_ENABLE() __HAL_RCC_I2C4_CLK_ENABLE() #define TOF_I2C_CLK_ENABLE() __HAL_RCC_I2C4_CLK_ENABLE()
#define TOF_I2C_CLK_DISABLE() __HAL_RCC_I2C4_CLK_DISABLE() #define TOF_I2C_CLK_DISABLE() __HAL_RCC_I2C4_CLK_DISABLE()
#define TOF_I2C_SCL_PORT (GPIOB)
#define TOF_I2C_SCL_PIN (GPIO_PIN_6)
#define TOF_I2C_SDA_PORT (GPIOB)
#define TOF_I2C_SDA_PIN (GPIO_PIN_7)
#define TOF_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define TOF_I2C_FORCE_RESET() __HAL_RCC_I2C4_FORCE_RESET() #define TOF_I2C_FORCE_RESET() __HAL_RCC_I2C4_FORCE_RESET()
#define TOF_I2C_RELEASE_RESET() __HAL_RCC_I2C4_RELEASE_RESET() #define TOF_I2C_RELEASE_RESET() __HAL_RCC_I2C4_RELEASE_RESET()
/* DCMI */ // IMU I2C configuration
#define IMU_I2C (I2C4)
#define IMU_I2C_ID (4)
#define IMU_I2C_SPEED (0x4030040B)
#define IMU_I2C_SCL_PIN (&omv_pin_B6_I2C4)
#define IMU_I2C_SDA_PIN (&omv_pin_B7_I2C4)
#define IMU_I2C_CLK_ENABLE() __HAL_RCC_I2C4_CLK_ENABLE()
#define IMU_I2C_CLK_DISABLE() __HAL_RCC_I2C4_CLK_DISABLE()
#define IMU_I2C_FORCE_RESET() __HAL_RCC_I2C4_FORCE_RESET()
#define IMU_I2C_RELEASE_RESET() __HAL_RCC_I2C4_RELEASE_RESET()
#define IMU_CHIP_LSM6DS3 (1)
#define OMV_IMU_X_Y_ROTATION_DEGREES 0
#define OMV_IMU_MOUNTING_Z_DIRECTION -1
// DCMI timer configuration
#define DCMI_TIM (TIM1) #define DCMI_TIM (TIM1)
#define DCMI_TIM_PIN (GPIO_PIN_8) #define DCMI_TIM_PIN (&omv_pin_A8_TIM1)
#define DCMI_TIM_PORT (GPIOA)
#define DCMI_TIM_AF (GPIO_AF1_TIM1)
#define DCMI_TIM_CHANNEL (TIM_CHANNEL_1) #define DCMI_TIM_CHANNEL (TIM_CHANNEL_1)
#define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE() #define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE()
#define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE() #define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE()
#define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq() #define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq()
#define DCMI_RESET_PIN (GPIO_PIN_13) // DCMI pins configuration
#define DCMI_RESET_PORT (GPIOC) #define DCMI_RESET_PIN (&omv_pin_C13_GPIO)
#define DCMI_POWER_PIN (&omv_pin_I8_GPIO)
#define DCMI_FSYNC_PIN (&omv_pin_D5_GPIO)
#define DCMI_PWDN_PIN (GPIO_PIN_8) #define DCMI_D0_PIN (&omv_pin_A9_DCMI)
#define DCMI_PWDN_PORT (GPIOI) #define DCMI_D1_PIN (&omv_pin_A10_DCMI)
#define DCMI_D2_PIN (&omv_pin_G10_DCMI)
#define DCMI_D3_PIN (&omv_pin_G11_DCMI)
#define DCMI_D4_PIN (&omv_pin_E4_DCMI)
#define DCMI_D5_PIN (&omv_pin_D3_DCMI)
#define DCMI_D6_PIN (&omv_pin_E5_DCMI)
#define DCMI_D7_PIN (&omv_pin_E6_DCMI)
#define DCMI_FSYNC_PIN (GPIO_PIN_5) #define DCMI_VSYNC_PIN (&omv_pin_G9_DCMI)
#define DCMI_FSYNC_PORT (GPIOD) #define DCMI_HSYNC_PIN (&omv_pin_A4_DCMI)
#define DCMI_PXCLK_PIN (&omv_pin_A6_DCMI)
#define DCMI_VSYNC_PIN (GPIO_PIN_9)
#define DCMI_VSYNC_PORT (GPIOG)
#define DCMI_HSYNC_PIN (GPIO_PIN_4)
#define DCMI_HSYNC_PORT (GPIOA)
#define DCMI_PXCLK_PIN (GPIO_PIN_6)
#define DCMI_PXCLK_PORT (GPIOA)
#define DCMI_D0_PIN (GPIO_PIN_9)
#define DCMI_D0_PORT (GPIOA)
#define DCMI_D1_PIN (GPIO_PIN_10)
#define DCMI_D1_PORT (GPIOA)
#define DCMI_D2_PIN (GPIO_PIN_10)
#define DCMI_D2_PORT (GPIOG)
#define DCMI_D3_PIN (GPIO_PIN_11)
#define DCMI_D3_PORT (GPIOG)
#define DCMI_D4_PIN (GPIO_PIN_4)
#define DCMI_D4_PORT (GPIOE)
#define DCMI_D5_PIN (GPIO_PIN_3)
#define DCMI_D5_PORT (GPIOD)
#define DCMI_D6_PIN (GPIO_PIN_5)
#define DCMI_D6_PORT (GPIOE)
#define DCMI_D7_PIN (GPIO_PIN_6)
#define DCMI_D7_PORT (GPIOE)
#define DCMI_RESET_LOW() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_RESET)
#define DCMI_RESET_HIGH() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_SET)
#define DCMI_PWDN_LOW() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_RESET)
#define DCMI_PWDN_HIGH() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_SET)
#define DCMI_FSYNC_LOW() HAL_GPIO_WritePin(DCMI_FSYNC_PORT, DCMI_FSYNC_PIN, GPIO_PIN_RESET)
#define DCMI_FSYNC_HIGH() HAL_GPIO_WritePin(DCMI_FSYNC_PORT, DCMI_FSYNC_PIN, GPIO_PIN_SET)
#define DCMI_VSYNC_EXTI_IRQN (EXTI9_5_IRQn)
#define DCMI_VSYNC_EXTI_LINE (9)
#define DCMI_VSYNC_EXTI_GPIO (EXTI_GPIOG)
#define DCMI_VSYNC_EXTI_SHARED (0)
#define ISC_SPI (SPI6) #define ISC_SPI (SPI6)
// SPI6 clock source is PLL3Q (80MHz/4 == 20MHz) - Minimum (164*240*8*27 = 8,501,760Hz) // SPI6 clock source is PLL3Q (80MHz/4 == 20MHz) - Minimum (164*240*8*27 = 8,501,760Hz)
@ -342,82 +326,23 @@
#define ISC_SPI_CLK_DISABLE() __HAL_RCC_SPI6_CLK_DISABLE() #define ISC_SPI_CLK_DISABLE() __HAL_RCC_SPI6_CLK_DISABLE()
#define ISC_SPI_DMA_CLK_ENABLE() __HAL_RCC_BDMA_CLK_ENABLE() #define ISC_SPI_DMA_CLK_ENABLE() __HAL_RCC_BDMA_CLK_ENABLE()
#define ISC_SPI_SCLK_PIN (GPIO_PIN_13) #define ISC_SPI_SCLK_PIN (&omv_pin_G13_SPI6)
#define ISC_SPI_SCLK_PORT (GPIOG) #define ISC_SPI_MISO_PIN (&omv_pin_G12_SPI6)
#define ISC_SPI_SCLK_AF (GPIO_AF5_SPI6) #define ISC_SPI_MOSI_PIN (&omv_pin_G14_SPI6)
#define ISC_SPI_SSEL_PIN (&omv_pin_A15_SPI6)
#define ISC_SPI_MISO_PIN (GPIO_PIN_12)
#define ISC_SPI_MISO_PORT (GPIOG)
#define ISC_SPI_MISO_AF (GPIO_AF5_SPI6)
#define ISC_SPI_MOSI_PIN (GPIO_PIN_14)
#define ISC_SPI_MOSI_PORT (GPIOG)
#define ISC_SPI_MOSI_AF (GPIO_AF5_SPI6)
#define ISC_SPI_SSEL_PIN (GPIO_PIN_15)
#define ISC_SPI_SSEL_PORT (GPIOA)
#define ISC_SPI_SSEL_AF (GPIO_AF7_SPI6)
#define IMU_CHIP_LSM6DS3 (1)
#define OMV_IMU_X_Y_ROTATION_DEGREES 0
#define OMV_IMU_MOUNTING_Z_DIRECTION -1
#define IMU_I2C (I2C4)
#define IMU_I2C_ID (4)
#define IMU_I2C_AF (GPIO_AF6_I2C4)
#define IMU_I2C_CLK_ENABLE() __HAL_RCC_I2C4_CLK_ENABLE()
#define IMU_I2C_CLK_DISABLE() __HAL_RCC_I2C4_CLK_DISABLE()
#define IMU_I2C_SCL_PORT (GPIOB)
#define IMU_I2C_SCL_PIN (GPIO_PIN_6)
#define IMU_I2C_SDA_PORT (GPIOB)
#define IMU_I2C_SDA_PIN (GPIO_PIN_7)
#define IMU_I2C_SPEED (0x4030040B)
#define IMU_I2C_FORCE_RESET() __HAL_RCC_I2C4_FORCE_RESET()
#define IMU_I2C_RELEASE_RESET() __HAL_RCC_I2C4_RELEASE_RESET()
// SPI LCD Interface // SPI LCD Interface
#define OMV_SPI_LCD_CONTROLLER (&spi_obj[1]) #define OMV_SPI_LCD_CONTROLLER (&spi_obj[1])
#define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2) #define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2)
#define OMV_SPI_LCD_MOSI_PIN (GPIO_PIN_1) #define OMV_SPI_LCD_MOSI_PIN (&omv_pin_C1_SPI2)
#define OMV_SPI_LCD_MOSI_PORT (GPIOC) #define OMV_SPI_LCD_MISO_PIN (&omv_pin_C2_SPI2)
#define OMV_SPI_LCD_MOSI_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_SCLK_PIN (&omv_pin_A12_SPI2)
#define OMV_SPI_LCD_SSEL_PIN (&omv_pin_A11_GPIO)
#define OMV_SPI_LCD_MISO_PIN (GPIO_PIN_2) #define OMV_SPI_LCD_RST_PIN (&omv_pin_C6_GPIO)
#define OMV_SPI_LCD_MISO_PORT (GPIOC) #define OMV_SPI_LCD_RS_PIN (&omv_pin_C7_GPIO)
#define OMV_SPI_LCD_MISO_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_BL_PIN (&omv_pin_C5_GPIO)
#define OMV_SPI_LCD_SCLK_PIN (GPIO_PIN_12)
#define OMV_SPI_LCD_SCLK_PORT (GPIOA)
#define OMV_SPI_LCD_SCLK_ALT (GPIO_AF5_SPI2)
#define OMV_SPI_LCD_RST_PIN (GPIO_PIN_6)
#define OMV_SPI_LCD_RST_PORT (GPIOC)
#define OMV_SPI_LCD_RST_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RST_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_RS_PIN (GPIO_PIN_7)
#define OMV_SPI_LCD_RS_PORT (GPIOC)
#define OMV_SPI_LCD_RS_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RS_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_CS_PIN (GPIO_PIN_11)
#define OMV_SPI_LCD_CS_PORT (GPIOA)
#define OMV_SPI_LCD_CS_HIGH() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_CS_LOW() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_BL_PIN (GPIO_PIN_5)
#define OMV_SPI_LCD_BL_PORT (GPIOC)
#define OMV_SPI_LCD_BL_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_BL_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_RESET)
// FIR Module
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (0)
#define OMV_ENABLE_TOF_VL53L5CX (1)
#if 0 #if 0
// FIR Lepton // FIR Lepton
@ -426,30 +351,9 @@
#define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[1]) #define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[1])
#define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI2) #define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI2)
#define OMV_FIR_LEPTON_MOSI_PIN (GPIO_PIN_1) #define OMV_FIR_LEPTON_MOSI_PORT (&omv_pin_C1_SPI2)
#define OMV_FIR_LEPTON_MOSI_PORT (GPIOC) #define OMV_FIR_LEPTON_MISO_PORT (&omv_pin_C2_SPI2)
#define OMV_FIR_LEPTON_MOSI_ALT (GPIO_AF5_SPI2) #define OMV_FIR_LEPTON_SCLK_PORT (&omv_pin_A12_SPI2)
#define OMV_FIR_LEPTON_CS_PORT (&omv_pin_A11_GPIO)
#define OMV_FIR_LEPTON_MISO_PIN (GPIO_PIN_2)
#define OMV_FIR_LEPTON_MISO_PORT (GPIOC)
#define OMV_FIR_LEPTON_MISO_ALT (GPIO_AF5_SPI2)
#define OMV_FIR_LEPTON_SCLK_PIN (GPIO_PIN_12)
#define OMV_FIR_LEPTON_SCLK_PORT (GPIOA)
#define OMV_FIR_LEPTON_SCLK_ALT (GPIO_AF5_SPI2)
#define OMV_FIR_LEPTON_CS_PIN (GPIO_PIN_11)
#define OMV_FIR_LEPTON_CS_PORT (GPIOA)
#define OMV_FIR_LEPTON_CS_HIGH() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_SET)
#define OMV_FIR_LEPTON_CS_LOW() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_RESET)
#endif #endif
// Enable additional GPIO banks for DRAM...
#define OMV_ENABLE_GPIO_BANK_F
#define OMV_ENABLE_GPIO_BANK_G
#define OMV_ENABLE_GPIO_BANK_H
#define OMV_ENABLE_GPIO_BANK_I
#define OMV_ENABLE_GPIO_BANK_J
#define OMV_ENABLE_GPIO_BANK_K
#endif //__OMV_BOARDCONFIG_H__ #endif //__OMV_BOARDCONFIG_H__

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@ -0,0 +1,34 @@
OMV_GPIO_DEFINE(A, 4, AF13, DCMI)
OMV_GPIO_DEFINE(A, 6, AF13, DCMI)
OMV_GPIO_DEFINE(A, 8, AF1, TIM1)
OMV_GPIO_DEFINE(A, 9, AF13, DCMI)
OMV_GPIO_DEFINE(A, 10, AF13, DCMI)
OMV_GPIO_DEFINE(A, 11, NONE, GPIO)
OMV_GPIO_DEFINE(A, 12, AF5, SPI2)
OMV_GPIO_DEFINE(A, 15, AF7, SPI6)
OMV_GPIO_DEFINE(B, 6, AF6, I2C4)
OMV_GPIO_DEFINE(B, 7, AF6, I2C4)
OMV_GPIO_DEFINE(B, 8, AF4, I2C1)
OMV_GPIO_DEFINE(B, 9, AF4, I2C1)
OMV_GPIO_DEFINE(C, 0, AF10, OTG_HS)
OMV_GPIO_DEFINE(C, 1, AF5, SPI2)
OMV_GPIO_DEFINE(C, 2, AF5, SPI2)
OMV_GPIO_DEFINE(C, 5, NONE, GPIO)
OMV_GPIO_DEFINE(C, 6, NONE, GPIO)
OMV_GPIO_DEFINE(C, 7, NONE, GPIO)
OMV_GPIO_DEFINE(C, 13, NONE, GPIO)
OMV_GPIO_DEFINE(D, 3, AF13, DCMI)
OMV_GPIO_DEFINE(D, 5, NONE, GPIO)
OMV_GPIO_DEFINE(E, 4, AF13, DCMI)
OMV_GPIO_DEFINE(E, 5, AF13, DCMI)
OMV_GPIO_DEFINE(E, 6, AF13, DCMI)
OMV_GPIO_DEFINE(G, 9, AF13, DCMI)
OMV_GPIO_DEFINE(G, 10, AF13, DCMI)
OMV_GPIO_DEFINE(G, 11, AF13, DCMI)
OMV_GPIO_DEFINE(G, 12, AF5, SPI6)
OMV_GPIO_DEFINE(G, 13, AF5, SPI6)
OMV_GPIO_DEFINE(G, 14, AF5, SPI6)
OMV_GPIO_DEFINE(H, 4, AF4, I2C2)
OMV_GPIO_DEFINE(H, 5, AF4, I2C2)
OMV_GPIO_DEFINE(I, 8, NONE, GPIO)
OMV_GPIO_DEFINE(I, 11, AF10, OTG_HS)

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@ -60,6 +60,19 @@
#define OMV_ENABLE_HM01B0 (0) #define OMV_ENABLE_HM01B0 (0)
#define OMV_ENABLE_PAJ6100 (0) #define OMV_ENABLE_PAJ6100 (0)
#define OMV_ENABLE_FROGEYE2020 (0) #define OMV_ENABLE_FROGEYE2020 (0)
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// Enable additional GPIO banks.
#define OMV_ENABLE_GPIO_BANK_F (1)
#define OMV_ENABLE_GPIO_BANK_G (1)
#define OMV_ENABLE_GPIO_BANK_H (1)
#define OMV_ENABLE_GPIO_BANK_I (1)
#define OMV_ENABLE_GPIO_BANK_J (1)
#define OMV_ENABLE_GPIO_BANK_K (1)
// Enable sensor features // Enable sensor features
#define OMV_ENABLE_OV5640_AF (1) #define OMV_ENABLE_OV5640_AF (1)
@ -215,129 +228,71 @@
// Image sensor I2C // Image sensor I2C
#define ISC_I2C (I2C1) #define ISC_I2C (I2C1)
#define ISC_I2C_ID (1) #define ISC_I2C_ID (1)
#define ISC_I2C_AF (GPIO_AF4_I2C1) #define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_SCL_PIN (&omv_pin_B8_I2C1)
#define ISC_I2C_SDA_PIN (&omv_pin_B9_I2C1)
#define ISC_I2C_CLK_ENABLE() __I2C1_CLK_ENABLE() #define ISC_I2C_CLK_ENABLE() __I2C1_CLK_ENABLE()
#define ISC_I2C_CLK_DISABLE() __I2C1_CLK_DISABLE() #define ISC_I2C_CLK_DISABLE() __I2C1_CLK_DISABLE()
#define ISC_I2C_SCL_PORT (GPIOB)
#define ISC_I2C_SCL_PIN (GPIO_PIN_8)
#define ISC_I2C_SDA_PORT (GPIOB)
#define ISC_I2C_SDA_PIN (GPIO_PIN_9)
#define ISC_I2C_SPEED (CAMBUS_SPEED_STANDARD)
#define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET() #define ISC_I2C_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET()
#define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET() #define ISC_I2C_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET()
/* FIR I2C */ // FIR I2C configuration.
#define FIR_I2C (I2C2) #define FIR_I2C (I2C2)
#define FIR_I2C_ID (2) #define FIR_I2C_ID (2)
#define FIR_I2C_AF (GPIO_AF4_I2C2) #define FIR_I2C_SPEED (CAMBUS_SPEED_FULL)
#define FIR_I2C_SCL_PIN (&omv_pin_B10_I2C2)
#define FIR_I2C_SDA_PIN (&omv_pin_B11_I2C2)
#define FIR_I2C_CLK_ENABLE() __I2C2_CLK_ENABLE() #define FIR_I2C_CLK_ENABLE() __I2C2_CLK_ENABLE()
#define FIR_I2C_CLK_DISABLE() __I2C2_CLK_DISABLE() #define FIR_I2C_CLK_DISABLE() __I2C2_CLK_DISABLE()
#define FIR_I2C_SCL_PORT (GPIOB)
#define FIR_I2C_SCL_PIN (GPIO_PIN_10)
#define FIR_I2C_SDA_PORT (GPIOB)
#define FIR_I2C_SDA_PIN (GPIO_PIN_11)
#define FIR_I2C_SPEED (CAMBUS_SPEED_FULL)
#define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET() #define FIR_I2C_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET()
#define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET() #define FIR_I2C_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET()
// Soft I2C bus.
#define SOFT_I2C_SIOC_PIN (&omv_pin_B10_GPIO)
#define SOFT_I2C_SIOD_PIN (&omv_pin_B11_GPIO)
#define SOFT_I2C_SPIN_DELAY 64
/* DCMI */ /* DCMI */
#define DCMI_TIM (TIM1) #define DCMI_TIM (TIM1)
#define DCMI_TIM_PIN (GPIO_PIN_8) #define DCMI_TIM_PIN (&omv_pin_A8_TIM1)
#define DCMI_TIM_PORT (GPIOA)
#define DCMI_TIM_AF (GPIO_AF1_TIM1)
#define DCMI_TIM_CHANNEL (TIM_CHANNEL_1) #define DCMI_TIM_CHANNEL (TIM_CHANNEL_1)
#define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE() #define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE()
#define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE() #define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE()
#define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq() #define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq()
#define DCMI_RESET_PIN (GPIO_PIN_10) #define DCMI_RESET_PIN (&omv_pin_A10_GPIO)
#define DCMI_RESET_PORT (GPIOA) #define DCMI_POWER_PIN (&omv_pin_D7_GPIO)
#define DCMI_PWDN_PIN (GPIO_PIN_7) #define DCMI_D0_PIN (&omv_pin_C6_DCMI)
#define DCMI_PWDN_PORT (GPIOD) #define DCMI_D1_PIN (&omv_pin_C7_DCMI)
#define DCMI_D2_PIN (&omv_pin_G10_DCMI)
#define DCMI_D3_PIN (&omv_pin_G11_DCMI)
#define DCMI_D4_PIN (&omv_pin_E4_DCMI)
#define DCMI_D5_PIN (&omv_pin_B6_DCMI)
#define DCMI_D6_PIN (&omv_pin_E5_DCMI)
#define DCMI_D7_PIN (&omv_pin_E6_DCMI)
#define DCMI_D0_PIN (GPIO_PIN_6) #define DCMI_HSYNC_PIN (&omv_pin_A4_DCMI)
#define DCMI_D1_PIN (GPIO_PIN_7) #define DCMI_VSYNC_PIN (&omv_pin_B7_DCMI)
#define DCMI_D2_PIN (GPIO_PIN_10) #define DCMI_PXCLK_PIN (&omv_pin_A6_DCMI)
#define DCMI_D3_PIN (GPIO_PIN_11)
#define DCMI_D4_PIN (GPIO_PIN_4)
#define DCMI_D5_PIN (GPIO_PIN_6)
#define DCMI_D6_PIN (GPIO_PIN_5)
#define DCMI_D7_PIN (GPIO_PIN_6)
#define DCMI_D0_PORT (GPIOC)
#define DCMI_D1_PORT (GPIOC)
#define DCMI_D2_PORT (GPIOG)
#define DCMI_D3_PORT (GPIOG)
#define DCMI_D4_PORT (GPIOE)
#define DCMI_D5_PORT (GPIOB)
#define DCMI_D6_PORT (GPIOE)
#define DCMI_D7_PORT (GPIOE)
#define DCMI_HSYNC_PIN (GPIO_PIN_4)
#define DCMI_VSYNC_PIN (GPIO_PIN_7)
#define DCMI_PXCLK_PIN (GPIO_PIN_6)
#define DCMI_HSYNC_PORT (GPIOA)
#define DCMI_VSYNC_PORT (GPIOB)
#define DCMI_PXCLK_PORT (GPIOA)
#define DCMI_RESET_LOW() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_RESET)
#define DCMI_RESET_HIGH() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_SET)
#define DCMI_PWDN_LOW() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_RESET)
#define DCMI_PWDN_HIGH() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_SET)
#define DCMI_VSYNC_EXTI_IRQN (EXTI9_5_IRQn)
#define DCMI_VSYNC_EXTI_LINE (7)
#define DCMI_VSYNC_EXTI_GPIO (EXTI_GPIOB)
#define DCMI_VSYNC_EXTI_SHARED (0)
#define WINC_SPI (SPI5) #define WINC_SPI (SPI5)
#define WINC_SPI_AF (GPIO_AF5_SPI5)
#define WINC_SPI_TIMEOUT (1000) #define WINC_SPI_TIMEOUT (1000)
// SPI5 clock source is PLL2 (200MHz/4 == 50MHz) - Slightly over the maximum of 48 MHz. // SPI5 clock source is PLL2 (200MHz/4 == 50MHz) - Slightly over the maximum of 48 MHz.
#define WINC_SPI_PRESCALER (SPI_BAUDRATEPRESCALER_4) #define WINC_SPI_PRESCALER (SPI_BAUDRATEPRESCALER_4)
#define WINC_SPI_CLK_ENABLE() __HAL_RCC_SPI5_CLK_ENABLE() #define WINC_SPI_CLK_ENABLE() __HAL_RCC_SPI5_CLK_ENABLE()
#define WINC_SPI_SCLK_PIN (GPIO_PIN_6) #define WINC_SPI_SCLK_PIN (&omv_pin_H6_SPI5)
#define WINC_SPI_MISO_PIN (GPIO_PIN_7) #define WINC_SPI_MISO_PIN (&omv_pin_H7_SPI5)
#define WINC_SPI_MOSI_PIN (GPIO_PIN_10) #define WINC_SPI_MOSI_PIN (&omv_pin_J10_SPI5)
#define WINC_SPI_SSEL_PIN (&omv_pin_K1_GPIO)
#define WINC_SPI_SCLK_PORT (GPIOH) #define WINC_EN_PIN (&omv_pin_A0_GPIO)
#define WINC_SPI_MISO_PORT (GPIOH) #define WINC_RST_PIN (&omv_pin_C3_GPIO)
#define WINC_SPI_MOSI_PORT (GPIOJ) #define WINC_WAKE_PIN (&omv_pin_A1_GPIO)
#define WINC_CFG_PIN (&omv_pin_I15_GPIO)
#define WINC_EN_PIN (GPIO_PIN_0) #define WINC_IRQ_PIN (&omv_pin_H5_GPIO)
#define WINC_CS_PIN (GPIO_PIN_1)
#define WINC_RST_PIN (GPIO_PIN_3)
#define WINC_IRQ_PIN (pin_H5)
#define WINC_WAKE_PIN (GPIO_PIN_1)
#define WINC_CFG_PIN (GPIO_PIN_15)
#define WINC_EN_PORT (GPIOA)
#define WINC_CS_PORT (GPIOK)
#define WINC_RST_PORT (GPIOC)
#define WINC_WAKE_PORT (GPIOA)
#define WINC_CFG_PORT (GPIOI)
#define WINC_CS_LOW() HAL_GPIO_WritePin(WINC_CS_PORT, WINC_CS_PIN, GPIO_PIN_RESET)
#define WINC_CS_HIGH() HAL_GPIO_WritePin(WINC_CS_PORT, WINC_CS_PIN, GPIO_PIN_SET)
#define SOFT_I2C_PORT GPIOB
#define SOFT_I2C_SIOC_PIN GPIO_PIN_10
#define SOFT_I2C_SIOD_PIN GPIO_PIN_11
#define SOFT_I2C_SIOC_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOC_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_H() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_SET)
#define SOFT_I2C_SIOD_L() HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, GPIO_PIN_RESET)
#define SOFT_I2C_SIOD_READ() HAL_GPIO_ReadPin (SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN)
#define SOFT_I2C_SIOD_WRITE(bit) HAL_GPIO_WritePin(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN, bit)
#define SOFT_I2C_SPIN_DELAY 64
// LCD Interface // LCD Interface
#define OMV_LCD_CONTROLLER (LTDC) #define OMV_LCD_CONTROLLER (LTDC)
@ -346,116 +301,42 @@
#define OMV_LCD_FORCE_RESET() __HAL_RCC_LTDC_FORCE_RESET() #define OMV_LCD_FORCE_RESET() __HAL_RCC_LTDC_FORCE_RESET()
#define OMV_LCD_RELEASE_RESET() __HAL_RCC_LTDC_RELEASE_RESET() #define OMV_LCD_RELEASE_RESET() __HAL_RCC_LTDC_RELEASE_RESET()
#define OMV_LCD_R0_PIN (GPIO_PIN_13) #define OMV_LCD_R0_PIN (&omv_pin_G13_LTDC)
#define OMV_LCD_R1_PIN (GPIO_PIN_2) #define OMV_LCD_R1_PIN (&omv_pin_A2_LTDC)
#define OMV_LCD_R2_PIN (GPIO_PIN_1) #define OMV_LCD_R2_PIN (&omv_pin_J1_LTDC)
#define OMV_LCD_R3_PIN (GPIO_PIN_2) #define OMV_LCD_R3_PIN (&omv_pin_J2_LTDC)
#define OMV_LCD_R4_PIN (GPIO_PIN_3) #define OMV_LCD_R4_PIN (&omv_pin_J3_LTDC)
#define OMV_LCD_R5_PIN (GPIO_PIN_4) #define OMV_LCD_R5_PIN (&omv_pin_J4_LTDC)
#define OMV_LCD_R6_PIN (GPIO_PIN_5) #define OMV_LCD_R6_PIN (&omv_pin_J5_LTDC)
#define OMV_LCD_R7_PIN (GPIO_PIN_0) #define OMV_LCD_R7_PIN (&omv_pin_J0_LTDC)
#define OMV_LCD_R0_PORT (GPIOG) #define OMV_LCD_G0_PIN (&omv_pin_J7_LTDC)
#define OMV_LCD_R1_PORT (GPIOA) #define OMV_LCD_G1_PIN (&omv_pin_J8_LTDC)
#define OMV_LCD_R2_PORT (GPIOJ) #define OMV_LCD_G2_PIN (&omv_pin_J9_LTDC)
#define OMV_LCD_R3_PORT (GPIOJ) #define OMV_LCD_G3_PIN (&omv_pin_J12_LTDC)
#define OMV_LCD_R4_PORT (GPIOJ) #define OMV_LCD_G4_PIN (&omv_pin_J11_LTDC)
#define OMV_LCD_R5_PORT (GPIOJ) #define OMV_LCD_G5_PIN (&omv_pin_K0_LTDC)
#define OMV_LCD_R6_PORT (GPIOJ) #define OMV_LCD_G6_PIN (&omv_pin_I11_LTDC)
#define OMV_LCD_R7_PORT (GPIOJ) #define OMV_LCD_G7_PIN (&omv_pin_D3_LTDC)
#define OMV_LCD_R0_ALT (GPIO_AF14_LTDC) #define OMV_LCD_B0_PIN (&omv_pin_G14_LTDC)
#define OMV_LCD_R1_ALT (GPIO_AF14_LTDC) #define OMV_LCD_B1_PIN (&omv_pin_G12_LTDC)
#define OMV_LCD_R2_ALT (GPIO_AF14_LTDC) #define OMV_LCD_B2_PIN (&omv_pin_D6_LTDC)
#define OMV_LCD_R3_ALT (GPIO_AF14_LTDC) #define OMV_LCD_B3_PIN (&omv_pin_J15_LTDC)
#define OMV_LCD_R4_ALT (GPIO_AF14_LTDC) #define OMV_LCD_B4_PIN (&omv_pin_K3_LTDC)
#define OMV_LCD_R5_ALT (GPIO_AF14_LTDC) #define OMV_LCD_B5_PIN (&omv_pin_K4_LTDC)
#define OMV_LCD_R6_ALT (GPIO_AF14_LTDC) #define OMV_LCD_B6_PIN (&omv_pin_K5_LTDC)
#define OMV_LCD_R7_ALT (GPIO_AF9_LTDC) #define OMV_LCD_B7_PIN (&omv_pin_K6_LTDC)
#define OMV_LCD_G0_PIN (GPIO_PIN_7) #define OMV_LCD_CLK_PIN (&omv_pin_I14_LTDC)
#define OMV_LCD_G1_PIN (GPIO_PIN_8) #define OMV_LCD_DE_PIN (&omv_pin_K7_LTDC)
#define OMV_LCD_G2_PIN (GPIO_PIN_9) #define OMV_LCD_HSYNC_PIN (&omv_pin_I12_LTDC)
#define OMV_LCD_G3_PIN (GPIO_PIN_12) #define OMV_LCD_VSYNC_PIN (&omv_pin_I13_LTDC)
#define OMV_LCD_G4_PIN (GPIO_PIN_11) #define OMV_LCD_DISP_PIN (&omv_pin_G9_GPIO)
#define OMV_LCD_G5_PIN (GPIO_PIN_0) #define OMV_LCD_BL_PIN (&omv_pin_B0_TIM3)
#define OMV_LCD_G6_PIN (GPIO_PIN_11)
#define OMV_LCD_G7_PIN (GPIO_PIN_3)
#define OMV_LCD_G0_PORT (GPIOJ)
#define OMV_LCD_G1_PORT (GPIOJ)
#define OMV_LCD_G2_PORT (GPIOJ)
#define OMV_LCD_G3_PORT (GPIOJ)
#define OMV_LCD_G4_PORT (GPIOJ)
#define OMV_LCD_G5_PORT (GPIOK)
#define OMV_LCD_G6_PORT (GPIOI)
#define OMV_LCD_G7_PORT (GPIOD)
#define OMV_LCD_G0_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_G1_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_G2_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_G3_ALT (GPIO_AF9_LTDC)
#define OMV_LCD_G4_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_G5_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_G6_ALT (GPIO_AF9_LTDC)
#define OMV_LCD_G7_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_B0_PIN (GPIO_PIN_14)
#define OMV_LCD_B1_PIN (GPIO_PIN_12)
#define OMV_LCD_B2_PIN (GPIO_PIN_6)
#define OMV_LCD_B3_PIN (GPIO_PIN_15)
#define OMV_LCD_B4_PIN (GPIO_PIN_3)
#define OMV_LCD_B5_PIN (GPIO_PIN_4)
#define OMV_LCD_B6_PIN (GPIO_PIN_5)
#define OMV_LCD_B7_PIN (GPIO_PIN_6)
#define OMV_LCD_B0_PORT (GPIOG)
#define OMV_LCD_B1_PORT (GPIOG)
#define OMV_LCD_B2_PORT (GPIOD)
#define OMV_LCD_B3_PORT (GPIOJ)
#define OMV_LCD_B4_PORT (GPIOK)
#define OMV_LCD_B5_PORT (GPIOK)
#define OMV_LCD_B6_PORT (GPIOK)
#define OMV_LCD_B7_PORT (GPIOK)
#define OMV_LCD_B0_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_B1_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_B2_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_B3_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_B4_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_B5_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_B6_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_B7_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_CLK_PIN (GPIO_PIN_14)
#define OMV_LCD_CLK_PORT (GPIOI)
#define OMV_LCD_CLK_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_DE_PIN (GPIO_PIN_7)
#define OMV_LCD_DE_PORT (GPIOK)
#define OMV_LCD_DE_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_HSYNC_PIN (GPIO_PIN_12)
#define OMV_LCD_HSYNC_PORT (GPIOI)
#define OMV_LCD_HSYNC_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_VSYNC_PIN (GPIO_PIN_13)
#define OMV_LCD_VSYNC_PORT (GPIOI)
#define OMV_LCD_VSYNC_ALT (GPIO_AF14_LTDC)
#define OMV_LCD_DISP_PIN (GPIO_PIN_9)
#define OMV_LCD_DISP_PORT (GPIOG)
#define OMV_LCD_DISP_ON() HAL_GPIO_WritePin(OMV_LCD_DISP_PORT, OMV_LCD_DISP_PIN, GPIO_PIN_SET)
#define OMV_LCD_DISP_OFF() HAL_GPIO_WritePin(OMV_LCD_DISP_PORT, OMV_LCD_DISP_PIN, GPIO_PIN_RESET)
#define OMV_LCD_BL_PIN (GPIO_PIN_0)
#define OMV_LCD_BL_PORT (GPIOB)
#define OMV_LCD_BL_ALT (GPIO_AF2_TIM3)
#define OMV_LCD_BL_FREQ (100000)
#define OMV_LCD_BL_ON() HAL_GPIO_WritePin(OMV_LCD_BL_PORT, OMV_LCD_BL_PIN, GPIO_PIN_SET)
#define OMV_LCD_BL_OFF() HAL_GPIO_WritePin(OMV_LCD_BL_PORT, OMV_LCD_BL_PIN, GPIO_PIN_RESET)
#define OMV_LCD_BL_TIM (TIM3) #define OMV_LCD_BL_TIM (TIM3)
#define OMV_LCD_BL_FREQ (100000)
#define OMV_LCD_BL_TIM_CHANNEL (TIM_CHANNEL_3) #define OMV_LCD_BL_TIM_CHANNEL (TIM_CHANNEL_3)
#define OMV_LCD_BL_TIM_CLK_ENABLE() __HAL_RCC_TIM3_CLK_ENABLE() #define OMV_LCD_BL_TIM_CLK_ENABLE() __HAL_RCC_TIM3_CLK_ENABLE()
#define OMV_LCD_BL_TIM_CLK_DISABLE() __HAL_RCC_TIM3_CLK_DISABLE() #define OMV_LCD_BL_TIM_CLK_DISABLE() __HAL_RCC_TIM3_CLK_DISABLE()
@ -467,37 +348,14 @@
#define OMV_SPI_LCD_CONTROLLER (&spi_obj[1]) #define OMV_SPI_LCD_CONTROLLER (&spi_obj[1])
#define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2) #define OMV_SPI_LCD_CONTROLLER_INSTANCE (SPI2)
#define OMV_SPI_LCD_MOSI_PIN (GPIO_PIN_15) #define OMV_SPI_LCD_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_SPI_LCD_MOSI_PORT (GPIOB) #define OMV_SPI_LCD_MISO_PIN (&omv_pin_B14_SPI2)
#define OMV_SPI_LCD_MOSI_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_SCLK_PIN (&omv_pin_B13_SPI2)
#define OMV_SPI_LCD_MISO_PIN (GPIO_PIN_14) #define OMV_SPI_LCD_RST_PIN (&omv_pin_D12_GPIO)
#define OMV_SPI_LCD_MISO_PORT (GPIOB) #define OMV_SPI_LCD_RS_PIN (&omv_pin_D13_GPIO)
#define OMV_SPI_LCD_MISO_ALT (GPIO_AF5_SPI2) #define OMV_SPI_LCD_SSEL_PIN (&omv_pin_B12_GPIO)
#define OMV_SPI_LCD_BL_PIN (&omv_pin_A5_GPIO)
#define OMV_SPI_LCD_SCLK_PIN (GPIO_PIN_13)
#define OMV_SPI_LCD_SCLK_PORT (GPIOB)
#define OMV_SPI_LCD_SCLK_ALT (GPIO_AF5_SPI2)
#define OMV_SPI_LCD_RST_PIN (GPIO_PIN_12)
#define OMV_SPI_LCD_RST_PORT (GPIOD)
#define OMV_SPI_LCD_RST_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RST_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RST_PORT, OMV_SPI_LCD_RST_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_RS_PIN (GPIO_PIN_13)
#define OMV_SPI_LCD_RS_PORT (GPIOD)
#define OMV_SPI_LCD_RS_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_RS_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_RS_PORT, OMV_SPI_LCD_RS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_CS_PIN (GPIO_PIN_12)
#define OMV_SPI_LCD_CS_PORT (GPIOB)
#define OMV_SPI_LCD_CS_HIGH() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_CS_LOW() HAL_GPIO_WritePin(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_BL_PIN (GPIO_PIN_5)
#define OMV_SPI_LCD_BL_PORT (GPIOA)
#define OMV_SPI_LCD_BL_ON() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_SET)
#define OMV_SPI_LCD_BL_OFF() HAL_GPIO_WritePin(OMV_SPI_LCD_BL_PORT, OMV_SPI_LCD_BL_PIN, GPIO_PIN_RESET)
#define OMV_SPI_LCD_BL_DAC (DAC1) #define OMV_SPI_LCD_BL_DAC (DAC1)
#define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_2) #define OMV_SPI_LCD_BL_DAC_CHANNEL (DAC_CHANNEL_2)
@ -508,10 +366,10 @@
// DVI TFP410PAP I/O // DVI TFP410PAP I/O
#define OMV_DVI_PRESENT #define OMV_DVI_PRESENT
#define OMV_DVI_RESET_PIN (pin_D11) #define OMV_DVI_RESET_PIN (&omv_pin_D11_GPIO)
#define OMV_DVI_SCL_PIN (pin_B1) #define OMV_DVI_SCL_PIN (pin_B1)
#define OMV_DVI_SDA_PIN (pin_B2) #define OMV_DVI_SDA_PIN (pin_B2)
#define OMV_DVI_INT_PIN (pin_I8) #define OMV_DVI_INT_PIN (&omv_pin_I8_GPIO)
// DDC I/O // DDC I/O
#define OMV_DDC_PRESENT #define OMV_DDC_PRESENT
@ -520,63 +378,31 @@
// Touch Screen I/O // Touch Screen I/O
#define OMV_TOUCH_PRESENT #define OMV_TOUCH_PRESENT
#define OMV_TOUCH_RESET_PIN (pin_K2) #define OMV_TOUCH_RESET_PIN (&omv_pin_K2_GPIO)
#define OMV_TOUCH_SCL_PIN (pin_J13) #define OMV_TOUCH_SCL_PIN (pin_J13)
#define OMV_TOUCH_SDA_PIN (pin_J14) #define OMV_TOUCH_SDA_PIN (pin_J14)
#define OMV_TOUCH_INT_PIN (pin_J6) #define OMV_TOUCH_INT_PIN (&omv_pin_J6_GPIO)
// HDMI CEC I/O // HDMI CEC I/O
#define OMV_CEC_PRESENT #define OMV_CEC_PRESENT
#define OMV_CEC_PIN (pin_H2) #define OMV_CEC_PIN (pin_H2)
// FIR Module
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (1)
// FIR Lepton // FIR Lepton
#define OMV_FIR_LEPTON_I2C_BUS (ISC_I2C_ID) #define OMV_FIR_LEPTON_I2C_BUS (ISC_I2C_ID)
#define OMV_FIR_LEPTON_I2C_BUS_SPEED (ISC_I2C_SPEED) #define OMV_FIR_LEPTON_I2C_BUS_SPEED (ISC_I2C_SPEED)
#define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[2]) #define OMV_FIR_LEPTON_CONTROLLER (&spi_obj[2])
#define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI3) #define OMV_FIR_LEPTON_CONTROLLER_INSTANCE (SPI3)
#define OMV_FIR_LEPTON_MOSI_PIN (GPIO_PIN_5) #define OMV_FIR_LEPTON_MOSI_PIN (&omv_pin_B5_SPI3)
#define OMV_FIR_LEPTON_MOSI_PORT (GPIOB) #define OMV_FIR_LEPTON_MISO_PIN (&omv_pin_B4_SPI3)
#define OMV_FIR_LEPTON_MOSI_ALT (GPIO_AF7_SPI3) #define OMV_FIR_LEPTON_SCLK_PIN (&omv_pin_B3_SPI3)
#define OMV_FIR_LEPTON_SSEL_PIN (&omv_pin_A15_GPIO)
#define OMV_FIR_LEPTON_MISO_PIN (GPIO_PIN_4) #define OMV_FIR_LEPTON_RESET_PIN (&omv_pin_D5_GPIO)
#define OMV_FIR_LEPTON_MISO_PORT (GPIOB) #define OMV_FIR_LEPTON_POWER_PIN (&omv_pin_D4_GPIO)
#define OMV_FIR_LEPTON_MISO_ALT (GPIO_AF6_SPI3) #define OMV_FIR_LEPTON_VSYNC_PIN (&omv_pin_E3_GPIO)
#define OMV_FIR_LEPTON_SCLK_PIN (GPIO_PIN_3) #define OMV_FIR_LEPTON_MCLK_PIN (&omv_pin_A3_TIM15)
#define OMV_FIR_LEPTON_SCLK_PORT (GPIOB)
#define OMV_FIR_LEPTON_SCLK_ALT (GPIO_AF6_SPI3)
#define OMV_FIR_LEPTON_CS_PIN (GPIO_PIN_15)
#define OMV_FIR_LEPTON_CS_PORT (GPIOA)
#define OMV_FIR_LEPTON_CS_HIGH() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_SET)
#define OMV_FIR_LEPTON_CS_LOW() HAL_GPIO_WritePin(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN, GPIO_PIN_RESET)
#define OMV_FIR_LEPTON_RST_PIN_PRESENT
#define OMV_FIR_LEPTON_RST_PIN (GPIO_PIN_5)
#define OMV_FIR_LEPTON_RST_PORT (GPIOD)
#define OMV_FIR_LEPTON_RST_HIGH() HAL_GPIO_WritePin(OMV_FIR_LEPTON_RST_PORT, OMV_FIR_LEPTON_RST_PIN, GPIO_PIN_SET)
#define OMV_FIR_LEPTON_RST_LOW() HAL_GPIO_WritePin(OMV_FIR_LEPTON_RST_PORT, OMV_FIR_LEPTON_RST_PIN, GPIO_PIN_RESET)
#define OMV_FIR_LEPTON_PWDN_PIN_PRESENT
#define OMV_FIR_LEPTON_PWDN_PIN (GPIO_PIN_4)
#define OMV_FIR_LEPTON_PWDN_PORT (GPIOD)
#define OMV_FIR_LEPTON_PWDN_HIGH() HAL_GPIO_WritePin(OMV_FIR_LEPTON_PWDN_PORT, OMV_FIR_LEPTON_PWDN_PIN, GPIO_PIN_SET)
#define OMV_FIR_LEPTON_PWDN_LOW() HAL_GPIO_WritePin(OMV_FIR_LEPTON_PWDN_PORT, OMV_FIR_LEPTON_PWDN_PIN, GPIO_PIN_RESET)
#define OMV_FIR_LEPTON_VSYNC_PRESENT
#define OMV_FIR_LEPTON_VSYNC_PIN (pin_E3)
#define OMV_FIR_LEPTON_MCLK_PIN (GPIO_PIN_3)
#define OMV_FIR_LEPTON_MCLK_PORT (GPIOA)
#define OMV_FIR_LEPTON_MCLK_ALT (GPIO_AF4_TIM15)
#define OMV_FIR_LEPTON_MCLK_FREQ (24000000) #define OMV_FIR_LEPTON_MCLK_FREQ (24000000)
#define OMV_FIR_LEPTON_MCLK_TIM (TIM15) #define OMV_FIR_LEPTON_MCLK_TIM (TIM15)
@ -588,9 +414,7 @@
#define OMV_FIR_LEPTON_MCLK_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq() #define OMV_FIR_LEPTON_MCLK_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq()
// Buzzer // Buzzer
#define OMV_BUZZER_PIN (GPIO_PIN_1) #define OMV_BUZZER_PIN (&omv_pin_A1_TIM2)
#define OMV_BUZZER_PORT (GPIOA)
#define OMV_BUZZER_ALT (GPIO_AF1_TIM2)
#define OMV_BUZZER_FREQ (4000) #define OMV_BUZZER_FREQ (4000)
#define OMV_BUZZER_TIM (TIM2) #define OMV_BUZZER_TIM (TIM2)
@ -601,12 +425,4 @@
#define OMV_BUZZER_TIM_RELEASE_RESET() __HAL_RCC_TIM2_RELEASE_RESET() #define OMV_BUZZER_TIM_RELEASE_RESET() __HAL_RCC_TIM2_RELEASE_RESET()
#define OMV_BUZZER_TIM_PCLK_FREQ() HAL_RCC_GetPCLK1Freq() #define OMV_BUZZER_TIM_PCLK_FREQ() HAL_RCC_GetPCLK1Freq()
// Enable additional GPIO banks
#define OMV_ENABLE_GPIO_BANK_F
#define OMV_ENABLE_GPIO_BANK_G
#define OMV_ENABLE_GPIO_BANK_H
#define OMV_ENABLE_GPIO_BANK_I
#define OMV_ENABLE_GPIO_BANK_J
#define OMV_ENABLE_GPIO_BANK_K
#endif //__OMV_BOARDCONFIG_H__ #endif //__OMV_BOARDCONFIG_H__

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@ -0,0 +1,79 @@
OMV_GPIO_DEFINE(A, 0, NONE, GPIO)
OMV_GPIO_DEFINE(A, 1, NONE, GPIO)
OMV_GPIO_DEFINE(A, 1, AF1, TIM2)
OMV_GPIO_DEFINE(A, 2, AF14, LTDC)
OMV_GPIO_DEFINE(A, 3, AF4, TIM15)
OMV_GPIO_DEFINE(A, 4, AF13, DCMI)
OMV_GPIO_DEFINE(A, 5, NONE, GPIO)
OMV_GPIO_DEFINE(A, 6, AF13, DCMI)
OMV_GPIO_DEFINE(A, 8, AF1, TIM1)
OMV_GPIO_DEFINE(A, 10, NONE, GPIO)
OMV_GPIO_DEFINE(A, 15, NONE, GPIO)
OMV_GPIO_DEFINE(B, 0, AF2, TIM3)
OMV_GPIO_DEFINE(B, 3, AF6, SPI3)
OMV_GPIO_DEFINE(B, 4, AF6, SPI3)
OMV_GPIO_DEFINE(B, 5, AF7, SPI3)
OMV_GPIO_DEFINE(B, 6, AF13, DCMI)
OMV_GPIO_DEFINE(B, 7, AF13, DCMI)
OMV_GPIO_DEFINE(B, 8, AF4, I2C1)
OMV_GPIO_DEFINE(B, 9, AF4, I2C1)
OMV_GPIO_DEFINE(B, 10, NONE, GPIO)
OMV_GPIO_DEFINE(B, 10, AF4, I2C2)
OMV_GPIO_DEFINE(B, 11, NONE, GPIO)
OMV_GPIO_DEFINE(B, 11, AF4, I2C2)
OMV_GPIO_DEFINE(B, 12, NONE, GPIO)
OMV_GPIO_DEFINE(B, 13, AF5, SPI2)
OMV_GPIO_DEFINE(B, 14, AF5, SPI2)
OMV_GPIO_DEFINE(B, 15, AF5, SPI2)
OMV_GPIO_DEFINE(C, 3, NONE, GPIO)
OMV_GPIO_DEFINE(C, 6, AF13, DCMI)
OMV_GPIO_DEFINE(C, 7, AF13, DCMI)
OMV_GPIO_DEFINE(D, 3, AF14, LTDC)
OMV_GPIO_DEFINE(D, 4, NONE, GPIO)
OMV_GPIO_DEFINE(D, 5, NONE, GPIO)
OMV_GPIO_DEFINE(D, 6, AF14, LTDC)
OMV_GPIO_DEFINE(D, 7, NONE, GPIO)
OMV_GPIO_DEFINE(D, 11, NONE, GPIO)
OMV_GPIO_DEFINE(D, 12, NONE, GPIO)
OMV_GPIO_DEFINE(D, 13, NONE, GPIO)
OMV_GPIO_DEFINE(E, 3, NONE, GPIO)
OMV_GPIO_DEFINE(E, 4, AF13, DCMI)
OMV_GPIO_DEFINE(E, 5, AF13, DCMI)
OMV_GPIO_DEFINE(E, 6, AF13, DCMI)
OMV_GPIO_DEFINE(G, 9, NONE, GPIO)
OMV_GPIO_DEFINE(G, 10, AF13, DCMI)
OMV_GPIO_DEFINE(G, 11, AF13, DCMI)
OMV_GPIO_DEFINE(G, 12, AF14, LTDC)
OMV_GPIO_DEFINE(G, 13, AF14, LTDC)
OMV_GPIO_DEFINE(G, 14, AF14, LTDC)
OMV_GPIO_DEFINE(H, 5, NONE, GPIO)
OMV_GPIO_DEFINE(H, 6, AF5, SPI5)
OMV_GPIO_DEFINE(H, 7, AF5, SPI5)
OMV_GPIO_DEFINE(I, 8, NONE, GPIO)
OMV_GPIO_DEFINE(I, 11, AF9, LTDC)
OMV_GPIO_DEFINE(I, 12, AF14, LTDC)
OMV_GPIO_DEFINE(I, 13, AF14, LTDC)
OMV_GPIO_DEFINE(I, 14, AF14, LTDC)
OMV_GPIO_DEFINE(I, 15, NONE, GPIO)
OMV_GPIO_DEFINE(J, 0, AF9, LTDC)
OMV_GPIO_DEFINE(J, 1, AF14, LTDC)
OMV_GPIO_DEFINE(J, 2, AF14, LTDC)
OMV_GPIO_DEFINE(J, 3, AF14, LTDC)
OMV_GPIO_DEFINE(J, 4, AF14, LTDC)
OMV_GPIO_DEFINE(J, 5, AF14, LTDC)
OMV_GPIO_DEFINE(J, 6, NONE, GPIO)
OMV_GPIO_DEFINE(J, 7, AF14, LTDC)
OMV_GPIO_DEFINE(J, 8, AF14, LTDC)
OMV_GPIO_DEFINE(J, 9, AF14, LTDC)
OMV_GPIO_DEFINE(J, 10, AF5, SPI5)
OMV_GPIO_DEFINE(J, 11, AF14, LTDC)
OMV_GPIO_DEFINE(J, 12, AF9, LTDC)
OMV_GPIO_DEFINE(J, 15, AF14, LTDC)
OMV_GPIO_DEFINE(K, 0, AF14, LTDC)
OMV_GPIO_DEFINE(K, 1, NONE, GPIO)
OMV_GPIO_DEFINE(K, 2, NONE, GPIO)
OMV_GPIO_DEFINE(K, 3, AF14, LTDC)
OMV_GPIO_DEFINE(K, 4, AF14, LTDC)
OMV_GPIO_DEFINE(K, 5, AF14, LTDC)
OMV_GPIO_DEFINE(K, 6, AF14, LTDC)
OMV_GPIO_DEFINE(K, 7, AF14, LTDC)

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@ -130,26 +130,6 @@ extern unsigned char *OMV_UNIQUE_ID_ADDR; // Unique ID address.
#define LCD_RST_PIN (20) #define LCD_RST_PIN (20)
#define LCD_RS_PIN (21) #define LCD_RS_PIN (21)
// WiFi/NINA config.
//#define WIFI_SPI (spi1)
//#define WIFI_CS_PIN (15)
//#define WIFI_MOSI_PIN (16)
//#define WIFI_MISO_PIN (17)
//#define WIFI_SCLK_PIN (18)
//#define WIFI_RST_PIN (19)
//#define WIFI_GPIO0_PIN (20)
//#define WIFI_ACK_PIN (21)
// AUDIO config.
//#define PDM_PIO (pio1)
//#define PDM_SM (0)
//#define PDM_DMA (1)
//#define PDM_DMA_IRQ (DMA_IRQ_1)
//#define PDM_DMA_CHANNEL (0)
//
//#define PDM_CLK_PIN (23)
//#define PDM_DIN_PIN (22)
// DCMI config. // DCMI config.
#define DCMI_PIO (pio0) #define DCMI_PIO (pio0)
#define DCMI_SM (0) #define DCMI_SM (0)
@ -157,7 +137,7 @@ extern unsigned char *OMV_UNIQUE_ID_ADDR; // Unique ID address.
#define DCMI_DMA_IRQ (DMA_IRQ_0) #define DCMI_DMA_IRQ (DMA_IRQ_0)
#define DCMI_DMA_CHANNEL (0) #define DCMI_DMA_CHANNEL (0)
#define DCMI_PWDN_PIN (0) #define DCMI_POWER_PIN (0)
#define DCMI_RESET_PIN (1) #define DCMI_RESET_PIN (1)
#define DCMI_D0_PIN (2) #define DCMI_D0_PIN (2)
@ -169,27 +149,11 @@ extern unsigned char *OMV_UNIQUE_ID_ADDR; // Unique ID address.
#define DCMI_D6_PIN (8) #define DCMI_D6_PIN (8)
#define DCMI_D7_PIN (9) #define DCMI_D7_PIN (9)
// TODO: These are hard-coded in dcmi.pio need to fix. #define DCMI_XCLK_PIN (10)
// Must match the pins defined in dcmi.pio.
#define DCMI_PXCLK_PIN (11) #define DCMI_PXCLK_PIN (11)
#define DCMI_HSYNC_PIN (12) #define DCMI_HSYNC_PIN (12)
#define DCMI_VSYNC_PIN (13) #define DCMI_VSYNC_PIN (13)
#define DCMI_XCLK_PIN (10)
#if defined(DCMI_RESET_PIN)
#define DCMI_RESET_LOW() gpio_put(DCMI_RESET_PIN, 0)
#define DCMI_RESET_HIGH() gpio_put(DCMI_RESET_PIN, 1)
#else
#define DCMI_RESET_LOW()
#define DCMI_RESET_HIGH()
#endif
#if defined(DCMI_PWDN_PIN)
#define DCMI_PWDN_LOW() gpio_put(DCMI_PWDN_PIN, 0)
#define DCMI_PWDN_HIGH() gpio_put(DCMI_PWDN_PIN, 1)
#else
#define DCMI_PWDN_LOW()
#define DCMI_PWDN_HIGH()
#endif
#endif //__OMV_BOARDCONFIG_H__ #endif //__OMV_BOARDCONFIG_H__

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@ -44,6 +44,13 @@
#define OMV_ENABLE_PAJ6100 (0) #define OMV_ENABLE_PAJ6100 (0)
#define OMV_ENABLE_FROGEYE2020 (0) #define OMV_ENABLE_FROGEYE2020 (0)
// FIR Module
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (0)
// Set which OV767x sensor is used // Set which OV767x sensor is used
#define OMV_OV7670_VERSION (75) #define OMV_OV7670_VERSION (75)
@ -129,7 +136,7 @@
#define PDM_PWR_PIN (17) #define PDM_PWR_PIN (17)
// DCMI // DCMI
#define DCMI_PWDN_PIN (29) #define DCMI_POWER_PIN (29)
#define DCMI_RESET_PIN (30) #define DCMI_RESET_PIN (30)
#define DCMI_D0_PIN (32+2) #define DCMI_D0_PIN (32+2)
@ -146,27 +153,4 @@
#define DCMI_PXCLK_PIN (4) #define DCMI_PXCLK_PIN (4)
#define DCMI_XCLK_PIN (27) #define DCMI_XCLK_PIN (27)
#if defined(DCMI_RESET_PIN)
#define DCMI_RESET_LOW() nrf_gpio_pin_clear(DCMI_RESET_PIN)
#define DCMI_RESET_HIGH() nrf_gpio_pin_set(DCMI_RESET_PIN)
#else
#define DCMI_RESET_LOW()
#define DCMI_RESET_HIGH()
#endif
#if defined(DCMI_PWDN_PIN)
#define DCMI_PWDN_LOW() nrf_gpio_pin_clear(DCMI_PWDN_PIN)
#define DCMI_PWDN_HIGH() nrf_gpio_pin_set(DCMI_PWDN_PIN)
#else
#define DCMI_PWDN_LOW()
#define DCMI_PWDN_HIGH()
#endif
// FIR Module
#define OMV_ENABLE_FIR_MLX90621 (1)
#define OMV_ENABLE_FIR_MLX90640 (1)
#define OMV_ENABLE_FIR_MLX90641 (1)
#define OMV_ENABLE_FIR_AMG8833 (1)
#define OMV_ENABLE_FIR_LEPTON (0)
#endif //__OMV_BOARDCONFIG_H__ #endif //__OMV_BOARDCONFIG_H__

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@ -1,8 +1,8 @@
/* /*
* This file is part of the OpenMV project. * This file is part of the OpenMV project.
* *
* Copyright (c) 2013-2021 Ibrahim Abdelkader <iabdalkader@openmv.io> * Copyright (c) 2013-2023 Ibrahim Abdelkader <iabdalkader@openmv.io>
* Copyright (c) 2013-2021 Kwabena W. Agyeman <kwagyeman@openmv.io> * Copyright (c) 2013-2023 Kwabena W. Agyeman <kwagyeman@openmv.io>
* *
* This work is licensed under the MIT license, see the file LICENSE for details. * This work is licensed under the MIT license, see the file LICENSE for details.
* *
@ -14,8 +14,7 @@
#define OMV_ATTR_SECTION(x, s) x __attribute__((section(s))) #define OMV_ATTR_SECTION(x, s) x __attribute__((section(s)))
#define OMV_ATTR_ALWAYS_INLINE inline __attribute__((always_inline)) #define OMV_ATTR_ALWAYS_INLINE inline __attribute__((always_inline))
#define OMV_ATTR_OPTIMIZE(o) __attribute__((optimize(o))) #define OMV_ATTR_OPTIMIZE(o) __attribute__((optimize(o)))
#define OMV_BREAK() __asm__ volatile ("BKPT")
#define OMG_BREAK() __asm__ volatile ("BKPT")
#ifdef OMV_DEBUG_PRINTF #ifdef OMV_DEBUG_PRINTF
#define debug_printf(fmt, ...) \ #define debug_printf(fmt, ...) \
@ -24,17 +23,17 @@
#define debug_printf(...) #define debug_printf(...)
#endif #endif
#define OMV_MAX(a,b) \ #define OMV_MAX(a,b) ({ \
({ \
__typeof__ (a) _a = (a); \ __typeof__ (a) _a = (a); \
__typeof__ (b) _b = (b); \ __typeof__ (b) _b = (b); \
_a > _b ? _a : _b; \ _a > _b ? _a : _b; \
}) })
#define OMV_MIN(a,b) \ #define OMV_MIN(a,b) ({ \
({ \
__typeof__ (a) _a = (a); \ __typeof__ (a) _a = (a); \
__typeof__ (b) _b = (b); \ __typeof__ (b) _b = (b); \
_a < _b ? _a : _b; \ _a < _b ? _a : _b; \
}) })
#define OMV_ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
#endif //__OMV_COMMON_H__ #endif //__OMV_COMMON_H__

30
src/omv/common/omv_gpio.h Normal file
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@ -0,0 +1,30 @@
/*
* This file is part of the OpenMV project.
*
* Copyright (c) 2023 Ibrahim Abdelkader <iabdalkader@openmv.io>
* Copyright (c) 2023 Kwabena W. Agyeman <kwagyeman@openmv.io>
*
* This work is licensed under the MIT license, see the file LICENSE for details.
*
* GPIO abstraction layer.
*/
#ifndef __OMV_GPIO_H__
#define __OMV_GPIO_H__
#include <stdint.h>
#include <stdbool.h>
#include "omv_portconfig.h"
// Config options are defined in ports so they can be used
// directly to initialize peripherals without remapping them.
typedef void (*omv_gpio_callback_t)(omv_gpio_t pin, void *data);
void omv_gpio_init0(void);
void omv_gpio_config(omv_gpio_t pin, uint32_t mode, uint32_t pull, uint32_t speed, uint32_t af);
void omv_gpio_deinit(omv_gpio_t pin);
bool omv_gpio_read(omv_gpio_t pin);
void omv_gpio_write(omv_gpio_t pin, bool value);
void omv_gpio_irq_register(omv_gpio_t pin, omv_gpio_callback_t callback, void *data);
void omv_gpio_irq_enable(omv_gpio_t pin, bool enable);
void omv_gpio_clock_enable(omv_gpio_t pin, bool enable);
#endif // __OMV_GPIO_H__

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@ -32,6 +32,7 @@
#include "gc2145.h" #include "gc2145.h"
#include "framebuffer.h" #include "framebuffer.h"
#include "omv_boardconfig.h" #include "omv_boardconfig.h"
#include "omv_gpio.h"
#if (OMV_ENABLE_PAJ6100 == 1) #if (OMV_ENABLE_PAJ6100 == 1)
#define OMV_ENABLE_NONI2CIS #define OMV_ENABLE_NONI2CIS
@ -142,16 +143,18 @@ __weak int sensor_reset()
// Disable the bus before reset. // Disable the bus before reset.
cambus_enable(&sensor.bus, false); cambus_enable(&sensor.bus, false);
#if defined(DCMI_RESET_PIN)
// Hard-reset the sensor // Hard-reset the sensor
if (sensor.reset_pol == ACTIVE_HIGH) { if (sensor.reset_pol == ACTIVE_HIGH) {
DCMI_RESET_HIGH(); omv_gpio_write(DCMI_RESET_PIN, 1);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
DCMI_RESET_LOW(); omv_gpio_write(DCMI_RESET_PIN, 0);
} else { } else {
DCMI_RESET_LOW(); omv_gpio_write(DCMI_RESET_PIN, 0);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
DCMI_RESET_HIGH(); omv_gpio_write(DCMI_RESET_PIN, 1);
} }
#endif
mp_hal_delay_ms(20); mp_hal_delay_ms(20);
@ -176,12 +179,14 @@ int sensor_probe_init(uint32_t bus_id, uint32_t bus_speed)
int freq; int freq;
(void) freq; (void) freq;
#if defined(DCMI_POWER_PIN)
// Do a power cycle // Do a power cycle
DCMI_PWDN_HIGH(); omv_gpio_write(DCMI_POWER_PIN, 1);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
DCMI_PWDN_LOW(); omv_gpio_write(DCMI_POWER_PIN, 0);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
#endif
/* Some sensors have different reset polarities, and we can't know which sensor /* Some sensors have different reset polarities, and we can't know which sensor
is connected before initializing cambus and probing the sensor, which in turn is connected before initializing cambus and probing the sensor, which in turn
@ -190,12 +195,14 @@ int sensor_probe_init(uint32_t bus_id, uint32_t bus_speed)
sensor.pwdn_pol = ACTIVE_HIGH; sensor.pwdn_pol = ACTIVE_HIGH;
sensor.reset_pol = ACTIVE_HIGH; sensor.reset_pol = ACTIVE_HIGH;
#if defined(DCMI_RESET_PIN)
// Reset the sensor // Reset the sensor
DCMI_RESET_HIGH(); omv_gpio_write(DCMI_RESET_PIN, 1);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
DCMI_RESET_LOW(); omv_gpio_write(DCMI_RESET_PIN, 0);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
#endif
// Initialize the camera bus. // Initialize the camera bus.
cambus_init(&sensor.bus, bus_id, bus_speed); cambus_init(&sensor.bus, bus_id, bus_speed);
@ -208,24 +215,30 @@ int sensor_probe_init(uint32_t bus_id, uint32_t bus_speed)
so the reset line is active low */ so the reset line is active low */
sensor.reset_pol = ACTIVE_LOW; sensor.reset_pol = ACTIVE_LOW;
#if defined(DCMI_RESET_PIN)
// Pull the sensor out of the reset state. // Pull the sensor out of the reset state.
DCMI_RESET_HIGH(); omv_gpio_write(DCMI_RESET_PIN, 1);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
#endif
// Probe again to set the slave addr. // Probe again to set the slave addr.
sensor.slv_addr = cambus_scan(&sensor.bus, NULL, 0); sensor.slv_addr = cambus_scan(&sensor.bus, NULL, 0);
if (sensor.slv_addr == 0) { if (sensor.slv_addr == 0) {
sensor.pwdn_pol = ACTIVE_LOW; sensor.pwdn_pol = ACTIVE_LOW;
DCMI_PWDN_HIGH(); #if defined(DCMI_POWER_PIN)
omv_gpio_write(DCMI_POWER_PIN, 1);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
#endif
sensor.slv_addr = cambus_scan(&sensor.bus, NULL, 0); sensor.slv_addr = cambus_scan(&sensor.bus, NULL, 0);
if (sensor.slv_addr == 0) { if (sensor.slv_addr == 0) {
sensor.reset_pol = ACTIVE_HIGH; sensor.reset_pol = ACTIVE_HIGH;
DCMI_RESET_LOW(); #if defined(DCMI_RESET_PIN)
omv_gpio_write(DCMI_RESET_PIN, 0);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
#endif
sensor.slv_addr = cambus_scan(&sensor.bus, NULL, 0); sensor.slv_addr = cambus_scan(&sensor.bus, NULL, 0);
#ifndef OMV_ENABLE_NONI2CIS #ifndef OMV_ENABLE_NONI2CIS
@ -501,19 +514,21 @@ __weak int sensor_shutdown(int enable)
// Disable any ongoing frame capture. // Disable any ongoing frame capture.
sensor_abort(); sensor_abort();
#if defined(DCMI_POWER_PIN)
if (enable) { if (enable) {
if (sensor.pwdn_pol == ACTIVE_HIGH) { if (sensor.pwdn_pol == ACTIVE_HIGH) {
DCMI_PWDN_HIGH(); omv_gpio_write(DCMI_POWER_PIN, 1);
} else { } else {
DCMI_PWDN_LOW(); omv_gpio_write(DCMI_POWER_PIN, 0);
} }
} else { } else {
if (sensor.pwdn_pol == ACTIVE_HIGH) { if (sensor.pwdn_pol == ACTIVE_HIGH) {
DCMI_PWDN_LOW(); omv_gpio_write(DCMI_POWER_PIN, 0);
} else { } else {
DCMI_PWDN_HIGH(); omv_gpio_write(DCMI_POWER_PIN, 1);
} }
} }
#endif
mp_hal_delay_ms(10); mp_hal_delay_ms(10);

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@ -0,0 +1,41 @@
/*
* This file is part of the OpenMV project.
*
* Copyright (c) 2023 Ibrahim Abdelkader <iabdalkader@openmv.io>
* Copyright (c) 2023 Kwabena W. Agyeman <kwagyeman@openmv.io>
*
* This work is licensed under the MIT license, see the file LICENSE for details.
*
* GPIO port for nrf.
*/
#include <stdint.h>
#include <stdbool.h>
#include "py/mphal.h"
#include "hal/nrf_gpio.h"
#include "omv_boardconfig.h"
#include "omv_gpio.h"
void omv_gpio_config(omv_gpio_t pin, uint32_t mode, uint32_t pull, uint32_t speed, uint32_t af)
{
(void) af; // Unsupported.
uint32_t input = (mode == OMV_GPIO_MODE_INPUT) ?
NRF_GPIO_PIN_INPUT_CONNECT : NRF_GPIO_PIN_INPUT_DISCONNECT;
nrf_gpio_cfg(pin, mode, input, pull, NRF_GPIO_PIN_S0S1, NRF_GPIO_PIN_NOSENSE);
}
void omv_gpio_deinit(omv_gpio_t pin)
{
nrf_gpio_cfg_default(pin);
}
bool omv_gpio_read(omv_gpio_t pin)
{
return nrf_gpio_pin_read(pin);
}
void omv_gpio_write(omv_gpio_t pin, bool value)
{
nrf_gpio_pin_write(pin, value);
}

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@ -13,6 +13,19 @@
#include "nrfx_twi.h" #include "nrfx_twi.h"
// GPIO speeds.
#define OMV_GPIO_SPEED_LOW 0
#define OMV_GPIO_SPEED_HIGH 0
// GPIO pull.
#define OMV_GPIO_PULL_NONE NRF_GPIO_PIN_NOPULL
#define OMV_GPIO_PULL_UP NRF_GPIO_PIN_PULLUP
#define OMV_GPIO_PULL_DOWN NRF_GPIO_PIN_PULLDOWN
// GPIO modes.
#define OMV_GPIO_MODE_INPUT NRF_GPIO_PIN_DIR_INPUT
#define OMV_GPIO_MODE_OUTPUT NRF_GPIO_PIN_DIR_OUTPUT
// omv_gpio_t definition // omv_gpio_t definition
typedef uint32_t omv_gpio_t; typedef uint32_t omv_gpio_t;

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@ -49,14 +49,14 @@ int sensor_init()
{ {
int init_ret = 0; int init_ret = 0;
#if defined(DCMI_PWDN_PIN) #if defined(DCMI_POWER_PIN)
nrf_gpio_cfg_output(DCMI_PWDN_PIN); nrf_gpio_cfg_output(DCMI_POWER_PIN);
DCMI_PWDN_HIGH(); nrf_gpio_pin_write(DCMI_POWER_PIN, 1);
#endif #endif
#if defined(DCMI_RESET_PIN) #if defined(DCMI_RESET_PIN)
nrf_gpio_cfg_output(DCMI_RESET_PIN); nrf_gpio_cfg_output(DCMI_RESET_PIN);
DCMI_RESET_HIGH(); nrf_gpio_pin_write(DCMI_RESET_PIN, 1);
#endif #endif
// Reset the sesnor state // Reset the sesnor state

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@ -0,0 +1,51 @@
/*
* This file is part of the OpenMV project.
*
* Copyright (c) 2023 Ibrahim Abdelkader <iabdalkader@openmv.io>
* Copyright (c) 2023 Kwabena W. Agyeman <kwagyeman@openmv.io>
*
* This work is licensed under the MIT license, see the file LICENSE for details.
*
* GPIO port for rp2.
*/
#include <string.h>
#include <stdint.h>
#include <stdbool.h>
#include "py/mphal.h"
#include "pico/stdlib.h"
#include "hardware/gpio.h"
#include "omv_boardconfig.h"
#include "omv_gpio.h"
void omv_gpio_config(omv_gpio_t pin, uint32_t mode, uint32_t pull, uint32_t speed, uint32_t af)
{
if (mode == OMV_GPIO_MODE_ALT) {
gpio_set_function(pin, af);
} else {
gpio_init(pin);
gpio_set_dir(pin, mode);
}
if (pull == OMV_GPIO_PULL_UP) {
gpio_pull_up(pin);
} else if (pull == OMV_GPIO_PULL_DOWN) {
gpio_pull_down(pin);
}
gpio_set_slew_rate(pin, speed);
}
void omv_gpio_deinit(omv_gpio_t pin)
{
gpio_deinit(pin);
}
bool omv_gpio_read(omv_gpio_t pin)
{
return gpio_get(pin);
}
void omv_gpio_write(omv_gpio_t pin, bool value)
{
gpio_put(pin, value);
}

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@ -174,6 +174,7 @@ target_sources(${MICROPY_TARGET} PRIVATE
${TOP_DIR}/${OMV_DIR}/ports/${PORT}/main.c ${TOP_DIR}/${OMV_DIR}/ports/${PORT}/main.c
${TOP_DIR}/${OMV_DIR}/ports/${PORT}/cambus.c ${TOP_DIR}/${OMV_DIR}/ports/${PORT}/cambus.c
${TOP_DIR}/${OMV_DIR}/ports/${PORT}/sensor.c ${TOP_DIR}/${OMV_DIR}/ports/${PORT}/sensor.c
${TOP_DIR}/${OMV_DIR}/ports/${PORT}/omv_gpio.c
${OMV_USER_MODULES} ${OMV_USER_MODULES}
) )

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@ -14,6 +14,20 @@
#include "pico/stdlib.h" #include "pico/stdlib.h"
#include "hardware/i2c.h" #include "hardware/i2c.h"
// GPIO speeds.
#define OMV_GPIO_SPEED_LOW GPIO_SLEW_RATE_SLOW
#define OMV_GPIO_SPEED_HIGH GPIO_SLEW_RATE_FAST
// GPIO pull.
#define OMV_GPIO_PULL_NONE 0
#define OMV_GPIO_PULL_UP 1
#define OMV_GPIO_PULL_DOWN 2
// GPIO modes.
#define OMV_GPIO_MODE_INPUT GPIO_IN
#define OMV_GPIO_MODE_OUTPUT GPIO_OUT
#define OMV_GPIO_MODE_ALT 3
// omv_gpio_t definition // omv_gpio_t definition
typedef uint32_t omv_gpio_t; typedef uint32_t omv_gpio_t;

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@ -71,18 +71,18 @@ int sensor_init()
gpio_init(DCMI_VSYNC_PIN); gpio_init(DCMI_VSYNC_PIN);
gpio_set_dir(DCMI_VSYNC_PIN, GPIO_IN); gpio_set_dir(DCMI_VSYNC_PIN, GPIO_IN);
#if defined(DCMI_PWDN_PIN) #if defined(DCMI_POWER_PIN)
gpio_init(DCMI_PWDN_PIN); gpio_init(DCMI_POWER_PIN);
gpio_set_dir(DCMI_PWDN_PIN, GPIO_OUT); gpio_set_dir(DCMI_POWER_PIN, GPIO_OUT);
gpio_pull_down(DCMI_PWDN_PIN); gpio_pull_down(DCMI_POWER_PIN);
DCMI_PWDN_HIGH(); gpio_put(DCMI_POWER_PIN, 1);
#endif #endif
#if defined(DCMI_RESET_PIN) #if defined(DCMI_RESET_PIN)
gpio_init(DCMI_RESET_PIN); gpio_init(DCMI_RESET_PIN);
gpio_set_dir(DCMI_RESET_PIN, GPIO_OUT); gpio_set_dir(DCMI_RESET_PIN, GPIO_OUT);
gpio_pull_up(DCMI_RESET_PIN); gpio_pull_up(DCMI_RESET_PIN);
DCMI_RESET_HIGH(); gpio_put(DCMI_RESET_PIN, 1);
#endif #endif
// Reset the sesnor state // Reset the sesnor state

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@ -80,8 +80,8 @@ int cambus_init(cambus_t *bus, uint32_t bus_id, uint32_t speed)
bus->speed = speed; bus->speed = speed;
bus->i2c = NULL; bus->i2c = NULL;
bus->initialized = false; bus->initialized = false;
bus->scl_pin = (omv_gpio_t) {0, 0}; bus->scl_pin = NULL;
bus->sda_pin = (omv_gpio_t) {0, 0}; bus->sda_pin = NULL;
switch (bus_id) { switch (bus_id) {
#if defined(I2C1) #if defined(I2C1)
@ -121,22 +121,22 @@ int cambus_init(cambus_t *bus, uint32_t bus_id, uint32_t speed)
} }
if (bus->i2c->Instance == ISC_I2C) { if (bus->i2c->Instance == ISC_I2C) {
bus->scl_pin = (omv_gpio_t) {ISC_I2C_SCL_PIN, ISC_I2C_SCL_PORT}; bus->scl_pin = ISC_I2C_SCL_PIN;
bus->sda_pin = (omv_gpio_t) {ISC_I2C_SDA_PIN, ISC_I2C_SDA_PORT}; bus->sda_pin = ISC_I2C_SDA_PIN;
#if defined(TOF_I2C) #if defined(TOF_I2C)
} else if (bus->i2c->Instance == TOF_I2C) { } else if (bus->i2c->Instance == TOF_I2C) {
bus->scl_pin = (omv_gpio_t) {TOF_I2C_SCL_PIN, TOF_I2C_SCL_PORT}; bus->scl_pin = TOF_I2C_SCL_PIN;
bus->sda_pin = (omv_gpio_t) {TOF_I2C_SDA_PIN, TOF_I2C_SDA_PORT}; bus->sda_pin = TOF_I2C_SDA_PIN;
#endif #endif
#if defined(FIR_I2C) #if defined(FIR_I2C)
} else if (bus->i2c->Instance == FIR_I2C) { } else if (bus->i2c->Instance == FIR_I2C) {
bus->scl_pin = (omv_gpio_t) {FIR_I2C_SCL_PIN, FIR_I2C_SCL_PORT}; bus->scl_pin = FIR_I2C_SCL_PIN;
bus->sda_pin = (omv_gpio_t) {FIR_I2C_SDA_PIN, FIR_I2C_SDA_PORT}; bus->sda_pin = FIR_I2C_SDA_PIN;
#endif #endif
#if defined(ISC_I2C_ALT) #if defined(ISC_I2C_ALT)
} else if (bus->i2c->Instance == ISC_I2C_ALT) { } else if (bus->i2c->Instance == ISC_I2C_ALT) {
bus->scl_pin = (omv_gpio_t) {ISC_I2C_ALT_SCL_PIN, ISC_I2C_ALT_SCL_PORT}; bus->scl_pin = ISC_I2C_ALT_SCL_PIN;
bus->sda_pin = (omv_gpio_t) {ISC_I2C_ALT_SDA_PIN, ISC_I2C_ALT_SDA_PORT}; bus->sda_pin = ISC_I2C_ALT_SDA_PIN;
#endif #endif
} }
@ -160,8 +160,8 @@ int cambus_init(cambus_t *bus, uint32_t bus_id, uint32_t speed)
HAL_I2C_DeInit(bus->i2c); HAL_I2C_DeInit(bus->i2c);
if (HAL_I2C_Init(bus->i2c) != HAL_OK) { if (HAL_I2C_Init(bus->i2c) != HAL_OK) {
bus->i2c = NULL; bus->i2c = NULL;
bus->scl_pin = (omv_gpio_t) {0, 0}; bus->scl_pin = NULL;
bus->sda_pin = (omv_gpio_t) {0, 0}; bus->sda_pin = NULL;
return -1; return -1;
} }
@ -262,8 +262,8 @@ int cambus_deinit(cambus_t *bus)
bus->i2c->Instance = NULL; bus->i2c->Instance = NULL;
} }
bus->i2c = NULL; bus->i2c = NULL;
bus->scl_pin = (omv_gpio_t) {0, 0}; bus->scl_pin = NULL;
bus->sda_pin = (omv_gpio_t) {0, 0}; bus->sda_pin = NULL;
bus->initialized = false; bus->initialized = false;
return 0; return 0;
} }
@ -448,20 +448,20 @@ int cambus_write_bytes(cambus_t *bus, uint8_t slv_addr, uint8_t *buf, int len, u
int cambus_pulse_scl(cambus_t *bus) int cambus_pulse_scl(cambus_t *bus)
{ {
if (bus->initialized && bus->scl_pin.port) { if (bus->initialized && bus->scl_pin) {
// Configure SCL as GPIO // Configure SCL as GPIO
GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.Pull = GPIO_NOPULL; GPIO_InitStructure.Pull = GPIO_NOPULL;
GPIO_InitStructure.Speed = GPIO_SPEED_HIGH; GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStructure.Pin = bus->scl_pin.pin; GPIO_InitStructure.Pin = bus->scl_pin->pin;
HAL_GPIO_Init(bus->scl_pin.port, &GPIO_InitStructure); HAL_GPIO_Init(bus->scl_pin->port, &GPIO_InitStructure);
// Pulse SCL to recover stuck device. // Pulse SCL to recover stuck device.
for (int i=0; i<10000; i++) { for (int i=0; i<10000; i++) {
HAL_GPIO_WritePin(bus->scl_pin.port, bus->scl_pin.pin, GPIO_PIN_SET); HAL_GPIO_WritePin(bus->scl_pin->port, bus->scl_pin->pin, GPIO_PIN_SET);
mp_hal_delay_us(10); mp_hal_delay_us(10);
HAL_GPIO_WritePin(bus->scl_pin.port, bus->scl_pin.pin, GPIO_PIN_RESET); HAL_GPIO_WritePin(bus->scl_pin->port, bus->scl_pin->pin, GPIO_PIN_RESET);
mp_hal_delay_us(10); mp_hal_delay_us(10);
} }

View File

@ -79,6 +79,7 @@
#include "ini.h" #include "ini.h"
#include "omv_boardconfig.h" #include "omv_boardconfig.h"
#include "omv_gpio.h"
#if MICROPY_PY_LWIP #if MICROPY_PY_LWIP
#include "lwip/init.h" #include "lwip/init.h"
@ -385,6 +386,7 @@ soft_reset:
spi_init0(); spi_init0();
uart_init0(); uart_init0();
fb_alloc_init0(); fb_alloc_init0();
omv_gpio_init0();
framebuffer_init0(); framebuffer_init0();
sensor_init0(); sensor_init0();
dma_alloc_init0(); dma_alloc_init0();

View File

@ -11,9 +11,10 @@
#include "py/obj.h" #include "py/obj.h"
#include "omv_boardconfig.h" #include "omv_boardconfig.h"
#include STM32_HAL_H
#if MICROPY_PY_BUZZER #if MICROPY_PY_BUZZER
#include STM32_HAL_H
#include "omv_gpio.h"
static TIM_HandleTypeDef buzzer_tim_handle = {}; static TIM_HandleTypeDef buzzer_tim_handle = {};
@ -27,13 +28,7 @@ static void buzzer_setup(int freq, int duty)
int pulse = (period * duty) / 510; int pulse = (period * duty) / 510;
if (((buzzer_duty <= 0) || (255 < buzzer_duty)) && (0 < duty) && (duty <= 255)) { if (((buzzer_duty <= 0) || (255 < buzzer_duty)) && (0 < duty) && (duty <= 255)) {
GPIO_InitTypeDef GPIO_InitStructure; omv_gpio_config(OMV_BUZZER_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStructure.Pull = GPIO_NOPULL;
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStructure.Alternate = OMV_BUZZER_ALT;
GPIO_InitStructure.Pin = OMV_BUZZER_PIN;
HAL_GPIO_Init(OMV_BUZZER_PORT, &GPIO_InitStructure);
buzzer_tim_handle.Instance = OMV_BUZZER_TIM; buzzer_tim_handle.Instance = OMV_BUZZER_TIM;
buzzer_tim_handle.Init.Prescaler = 0; buzzer_tim_handle.Init.Prescaler = 0;
@ -58,7 +53,7 @@ static void buzzer_setup(int freq, int duty)
} else if ((0 < buzzer_duty) && (buzzer_duty <= 255) && ((duty <= 0) || (255 < duty))) { } else if ((0 < buzzer_duty) && (buzzer_duty <= 255) && ((duty <= 0) || (255 < duty))) {
HAL_TIM_PWM_Stop(&buzzer_tim_handle, OMV_BUZZER_TIM_CHANNEL); HAL_TIM_PWM_Stop(&buzzer_tim_handle, OMV_BUZZER_TIM_CHANNEL);
HAL_TIM_PWM_DeInit(&buzzer_tim_handle); HAL_TIM_PWM_DeInit(&buzzer_tim_handle);
HAL_GPIO_DeInit(OMV_BUZZER_PORT, OMV_BUZZER_PIN); omv_gpio_deinit(OMV_BUZZER_PIN);
} else if ((0 < buzzer_duty) && (buzzer_duty <= 255) && (0 < duty) && (duty <= 255)) { } else if ((0 < buzzer_duty) && (buzzer_duty <= 255) && (0 < duty) && (duty <= 255)) {
__HAL_TIM_SET_AUTORELOAD(&buzzer_tim_handle, period); __HAL_TIM_SET_AUTORELOAD(&buzzer_tim_handle, period);
__HAL_TIM_SET_COMPARE(&buzzer_tim_handle, OMV_BUZZER_TIM_CHANNEL, pulse); __HAL_TIM_SET_COMPARE(&buzzer_tim_handle, OMV_BUZZER_TIM_CHANNEL, pulse);

View File

@ -8,19 +8,16 @@
* *
* FIR Python module. * FIR Python module.
*/ */
#include "omv_boardconfig.h"
#if (OMV_ENABLE_FIR_LEPTON == 1)
#include STM32_HAL_H
#include "py/nlr.h" #include "py/nlr.h"
#include "py/runtime.h" #include "py/runtime.h"
#include "py/obj.h" #include "py/obj.h"
#include "py/mphal.h" #include "py/mphal.h"
#include "extint.h"
#include "spi.h" #include "spi.h"
#include "softtimer.h" #include "softtimer.h"
#include "py_helper.h"
#include "omv_boardconfig.h"
#include STM32_HAL_H
#include "crc16.h" #include "crc16.h"
#include "LEPTON_SDK.h" #include "LEPTON_SDK.h"
#include "LEPTON_AGC.h" #include "LEPTON_AGC.h"
@ -30,7 +27,8 @@
#include "LEPTON_RAD.h" #include "LEPTON_RAD.h"
#include "LEPTON_I2C_Reg.h" #include "LEPTON_I2C_Reg.h"
#if (OMV_ENABLE_FIR_LEPTON == 1) #include "py_helper.h"
#include "omv_gpio.h"
#define FRAMEBUFFER_COUNT 3 #define FRAMEBUFFER_COUNT 3
static volatile int framebuffer_tail = 0; static volatile int framebuffer_tail = 0;
@ -73,10 +71,8 @@ STATIC mp_obj_t fir_lepton_spi_resync_callback(mp_obj_t unused)
fir_lepton_spi_rx_cb_tail = (fir_lepton_spi_rx_cb_tail + 1) % FRAMEBUFFER_COUNT; fir_lepton_spi_rx_cb_tail = (fir_lepton_spi_rx_cb_tail + 1) % FRAMEBUFFER_COUNT;
} }
OMV_FIR_LEPTON_CS_LOW(); omv_gpio_write(OMV_FIR_LEPTON_SSEL_PIN, 0);
HAL_SPI_Receive_DMA(OMV_FIR_LEPTON_CONTROLLER->spi, HAL_SPI_Receive_DMA(OMV_FIR_LEPTON_CONTROLLER->spi, (uint8_t *) &_fir_lepton_buf, VOSPI_BUFFER_SIZE);
(uint8_t *) &_fir_lepton_buf,
VOSPI_BUFFER_SIZE);
return mp_const_none; return mp_const_none;
} }
@ -145,7 +141,7 @@ void fir_lepton_spi_callback(const uint16_t *base)
fir_lepton_spi_rx_cb_expected_pid = 0; fir_lepton_spi_rx_cb_expected_pid = 0;
fir_lepton_spi_rx_cb_expected_seg = 0; fir_lepton_spi_rx_cb_expected_seg = 0;
HAL_SPI_Abort_IT(OMV_FIR_LEPTON_CONTROLLER->spi); HAL_SPI_Abort_IT(OMV_FIR_LEPTON_CONTROLLER->spi);
OMV_FIR_LEPTON_CS_HIGH(); omv_gpio_write(OMV_FIR_LEPTON_SSEL_PIN, 1);
fir_lepton_spi_resync(); fir_lepton_spi_resync();
return; return;
} }
@ -202,18 +198,15 @@ static void fir_lepton_spi_callback_full(SPI_HandleTypeDef *hspi)
fir_lepton_spi_callback(((uint16_t *) &_fir_lepton_buf) + VOSPI_PACKET_SIZE); fir_lepton_spi_callback(((uint16_t *) &_fir_lepton_buf) + VOSPI_PACKET_SIZE);
} }
#if defined(OMV_FIR_LEPTON_VSYNC_PRESENT) #if defined(OMV_FIR_LEPTON_VSYNC_PIN)
static mp_obj_t fir_lepton_vsync_cb = NULL; static mp_obj_t fir_lepton_vsync_cb = NULL;
STATIC mp_obj_t fir_lepton_extint_callback(mp_obj_t line) static void fir_lepton_extint_callback(omv_gpio_t pin, void *data)
{ {
if (fir_lepton_vsync_cb) { if (fir_lepton_vsync_cb) {
mp_call_function_0(fir_lepton_vsync_cb); mp_call_function_0(fir_lepton_vsync_cb);
} }
return mp_const_none;
} }
STATIC MP_DEFINE_CONST_FUN_OBJ_1(fir_lepton_extint_callback_obj, fir_lepton_extint_callback);
#endif #endif
void fir_lepton_deinit() void fir_lepton_deinit()
@ -223,101 +216,68 @@ void fir_lepton_deinit()
fir_lepton_spi_rx_cb_expected_seg = 0; fir_lepton_spi_rx_cb_expected_seg = 0;
fb_alloc_free_till_mark_past_mark_permanent(); fb_alloc_free_till_mark_past_mark_permanent();
///////////////////////////////////////////////////////////////////////
#if defined(OMV_FIR_LEPTON_MCLK) #if defined(OMV_FIR_LEPTON_MCLK)
HAL_TIM_PWM_Stop(&fir_lepton_mclk_tim_handle, OMV_FIR_LEPTON_MCLK_TIM_CHANNEL); HAL_TIM_PWM_Stop(&fir_lepton_mclk_tim_handle, OMV_FIR_LEPTON_MCLK_TIM_CHANNEL);
HAL_TIM_PWM_DeInit(&fir_lepton_mclk_tim_handle); HAL_TIM_PWM_DeInit(&fir_lepton_mclk_tim_handle);
OMV_FIR_LEPTON_MCLK_TIM_FORCE_RESET(); OMV_FIR_LEPTON_MCLK_TIM_FORCE_RESET();
OMV_FIR_LEPTON_MCLK_TIM_RELEASE_RESET(); OMV_FIR_LEPTON_MCLK_TIM_RELEASE_RESET();
OMV_FIR_LEPTON_MCLK_TIM_CLK_DISABLE(); OMV_FIR_LEPTON_MCLK_TIM_CLK_DISABLE();
HAL_GPIO_DeInit(OMV_FIR_LEPTON_MCLK_PORT, OMV_FIR_LEPTON_MCLK_PIN); omv_gpio_deinit(OMV_FIR_LEPTON_MCLK_PIN);
#endif #endif
spi_deinit(OMV_FIR_LEPTON_CONTROLLER); spi_deinit(OMV_FIR_LEPTON_CONTROLLER);
// Do not put in HAL_SPI_MspDeinit as other modules may share the SPI bus. // Do not put in HAL_SPI_MspDeinit as other modules may share the SPI bus.
omv_gpio_deinit(OMV_FIR_LEPTON_MOSI_PIN);
HAL_GPIO_DeInit(OMV_FIR_LEPTON_MOSI_PORT, OMV_FIR_LEPTON_MOSI_PIN); omv_gpio_deinit(OMV_FIR_LEPTON_MISO_PIN);
HAL_GPIO_DeInit(OMV_FIR_LEPTON_MISO_PORT, OMV_FIR_LEPTON_MISO_PIN); omv_gpio_deinit(OMV_FIR_LEPTON_SCLK_PIN);
HAL_GPIO_DeInit(OMV_FIR_LEPTON_SCLK_PORT, OMV_FIR_LEPTON_SCLK_PIN); omv_gpio_deinit(OMV_FIR_LEPTON_SSEL_PIN);
#if defined(OMV_FIR_LEPTON_RESET_PIN)
HAL_GPIO_DeInit(OMV_FIR_LEPTON_CS_PORT, OMV_FIR_LEPTON_CS_PIN); omv_gpio_deinit(OMV_FIR_LEPTON_RESET_PIN);
#if defined(OMV_FIR_LEPTON_RST_PIN_PRESENT) #endif
HAL_GPIO_DeInit(OMV_FIR_LEPTON_RST_PORT, OMV_FIR_LEPTON_RST_PIN); #if defined(OMV_FIR_LEPTON_POWER_PIN)
#endif omv_gpio_deinit(OMV_FIR_LEPTON_POWER_PIN);
#if defined(OMV_FIR_LEPTON_PWDN_PIN_PRESENT) #endif
HAL_GPIO_DeInit(OMV_FIR_LEPTON_PWDN_PORT, OMV_FIR_LEPTON_PWDN_PIN);
#endif
} }
int fir_lepton_init(cambus_t *bus, int *w, int *h, int *refresh, int *resolution) int fir_lepton_init(cambus_t *bus, int *w, int *h, int *refresh, int *resolution)
{ {
OMV_FIR_LEPTON_CONTROLLER->spi->Init.Mode = SPI_MODE_MASTER; SPI_HandleTypeDef *hspi = OMV_FIR_LEPTON_CONTROLLER->spi;
OMV_FIR_LEPTON_CONTROLLER->spi->Init.Direction = SPI_DIRECTION_2LINES_RXONLY;
OMV_FIR_LEPTON_CONTROLLER->spi->Init.NSS = SPI_NSS_SOFT; hspi->Init.Mode = SPI_MODE_MASTER;
OMV_FIR_LEPTON_CONTROLLER->spi->Init.TIMode = SPI_TIMODE_DISABLE; hspi->Init.Direction = SPI_DIRECTION_2LINES_RXONLY;
OMV_FIR_LEPTON_CONTROLLER->spi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; hspi->Init.NSS = SPI_NSS_SOFT;
hspi->Init.TIMode = SPI_TIMODE_DISABLE;
hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
#if defined(MCU_SERIES_H7) #if defined(MCU_SERIES_H7)
OMV_FIR_LEPTON_CONTROLLER->spi->Init.FifoThreshold = SPI_FIFO_THRESHOLD_02DATA; hspi->Init.FifoThreshold = SPI_FIFO_THRESHOLD_02DATA;
OMV_FIR_LEPTON_CONTROLLER->spi->Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE; hspi->Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE;
#endif #endif
spi_set_params(OMV_FIR_LEPTON_CONTROLLER, 0xffffffff, VOSPI_CLOCK_SPEED, 1, 1, 16, 0); spi_set_params(OMV_FIR_LEPTON_CONTROLLER, 0xffffffff, VOSPI_CLOCK_SPEED, 1, 1, 16, 0);
spi_init(OMV_FIR_LEPTON_CONTROLLER, true); spi_init(OMV_FIR_LEPTON_CONTROLLER, true);
HAL_SPI_RegisterCallback(OMV_FIR_LEPTON_CONTROLLER->spi, HAL_SPI_RX_HALF_COMPLETE_CB_ID, HAL_SPI_RegisterCallback(hspi, HAL_SPI_RX_COMPLETE_CB_ID, fir_lepton_spi_callback_full);
fir_lepton_spi_callback_half); HAL_SPI_RegisterCallback(hspi, HAL_SPI_RX_HALF_COMPLETE_CB_ID, fir_lepton_spi_callback_half);
HAL_SPI_RegisterCallback(OMV_FIR_LEPTON_CONTROLLER->spi, HAL_SPI_RX_COMPLETE_CB_ID,
fir_lepton_spi_callback_full);
// Do not put in HAL_SPI_MspInit as other modules share the SPI2/3 bus. // Do not put in HAL_SPI_MspInit as other modules share the SPI2/3 bus.
omv_gpio_config(OMV_FIR_LEPTON_MOSI_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_MED, -1);
GPIO_InitTypeDef GPIO_InitStructure; omv_gpio_config(OMV_FIR_LEPTON_MISO_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_MED, -1);
GPIO_InitStructure.Pull = GPIO_PULLUP; omv_gpio_config(OMV_FIR_LEPTON_SCLK_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_MED, -1);
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP; omv_gpio_config(OMV_FIR_LEPTON_SSEL_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_MEDIUM; omv_gpio_write(OMV_FIR_LEPTON_SSEL_PIN, 1);
#if defined(OMV_FIR_LEPTON_RESET_PIN)
GPIO_InitStructure.Alternate = OMV_FIR_LEPTON_MOSI_ALT; omv_gpio_config(OMV_FIR_LEPTON_RESET_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStructure.Pin = OMV_FIR_LEPTON_MOSI_PIN; omv_gpio_write(OMV_FIR_LEPTON_RESET_PIN, 1);
HAL_GPIO_Init(OMV_FIR_LEPTON_MOSI_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Alternate = OMV_FIR_LEPTON_MISO_ALT;
GPIO_InitStructure.Pin = OMV_FIR_LEPTON_MISO_PIN;
HAL_GPIO_Init(OMV_FIR_LEPTON_MISO_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Alternate = OMV_FIR_LEPTON_SCLK_ALT;
GPIO_InitStructure.Pin = OMV_FIR_LEPTON_SCLK_PIN;
HAL_GPIO_Init(OMV_FIR_LEPTON_SCLK_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStructure.Pin = OMV_FIR_LEPTON_CS_PIN;
HAL_GPIO_Init(OMV_FIR_LEPTON_CS_PORT, &GPIO_InitStructure);
OMV_FIR_LEPTON_CS_HIGH();
#if defined(OMV_FIR_LEPTON_RST_PIN_PRESENT)
GPIO_InitStructure.Pin = OMV_FIR_LEPTON_RST_PIN;
HAL_GPIO_Init(OMV_FIR_LEPTON_RST_PORT, &GPIO_InitStructure);
OMV_FIR_LEPTON_RST_HIGH();
#endif #endif
#if defined(OMV_FIR_LEPTON_POWER_PIN)
#if defined(OMV_FIR_LEPTON_PWDN_PIN_PRESENT) omv_gpio_config(OMV_FIR_LEPTON_POWER_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStructure.Pin = OMV_FIR_LEPTON_PWDN_PIN; omv_gpio_write(OMV_FIR_LEPTON_POWER_PIN, 1);
HAL_GPIO_Init(OMV_FIR_LEPTON_PWDN_PORT, &GPIO_InitStructure);
OMV_FIR_LEPTON_PWDN_HIGH();
#endif #endif
#if defined(OMV_FIR_LEPTON_MCLK_TIM) #if defined(OMV_FIR_LEPTON_MCLK_TIM)
int tclk = OMV_FIR_LEPTON_MCLK_TIM_PCLK_FREQ() * 2; int tclk = OMV_FIR_LEPTON_MCLK_TIM_PCLK_FREQ() * 2;
int period = (tclk / OMV_FIR_LEPTON_MCLK_FREQ) - 1; int period = (tclk / OMV_FIR_LEPTON_MCLK_FREQ) - 1;
// GPIO_InitTypeDef GPIO_InitStructure; omv_gpio_config(OMV_FIR_LEPTON_MCLK_PIN, OMV_GPIO_MODE_ALT, GPIO_PULLUP, OMV_GPIO_SPEED_MED, -1);
GPIO_InitStructure.Pull = GPIO_PULLUP;
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_MEDIUM;
GPIO_InitStructure.Alternate = OMV_FIR_LEPTON_MCLK_ALT;
GPIO_InitStructure.Pin = OMV_FIR_LEPTON_MCLK_PIN;
HAL_GPIO_Init(OMV_FIR_LEPTON_MCLK_PORT, &GPIO_InitStructure);
fir_lepton_mclk_tim_handle.Instance = OMV_FIR_LEPTON_MCLK_TIM; fir_lepton_mclk_tim_handle.Instance = OMV_FIR_LEPTON_MCLK_TIM;
fir_lepton_mclk_tim_handle.Init.Prescaler = 0; fir_lepton_mclk_tim_handle.Init.Prescaler = 0;
@ -344,19 +304,19 @@ int fir_lepton_init(cambus_t *bus, int *w, int *h, int *refresh, int *resolution
HAL_TIM_PWM_Start(&fir_lepton_mclk_tim_handle, OMV_FIR_LEPTON_MCLK_TIM_CHANNEL); HAL_TIM_PWM_Start(&fir_lepton_mclk_tim_handle, OMV_FIR_LEPTON_MCLK_TIM_CHANNEL);
#endif #endif
#if defined(OMV_FIR_LEPTON_PWDN_PIN_PRESENT) #if defined(OMV_FIR_LEPTON_POWER_PIN)
OMV_FIR_LEPTON_PWDN_LOW(); omv_gpio_write(OMV_FIR_LEPTON_POWER_PIN, 0);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
OMV_FIR_LEPTON_PWDN_HIGH(); omv_gpio_write(OMV_FIR_LEPTON_POWER_PIN, 1);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
#endif #endif
#if defined(OMV_FIR_LEPTON_RST_PIN_PRESENT) #if defined(OMV_FIR_LEPTON_RESET_PIN)
OMV_FIR_LEPTON_RST_LOW(); omv_gpio_write(OMV_FIR_LEPTON_RESET_PIN, 0);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
OMV_FIR_LEPTON_RST_HIGH(); omv_gpio_write(OMV_FIR_LEPTON_RESET_PIN, 1);
mp_hal_delay_ms(1000); mp_hal_delay_ms(1000);
#endif #endif
@ -373,7 +333,7 @@ int fir_lepton_init(cambus_t *bus, int *w, int *h, int *refresh, int *resolution
} }
} }
#if (!defined(OMV_FIR_LEPTON_PWDN_PIN_PRESENT)) && (!defined(OMV_FIR_LEPTON_RST_PIN_PRESENT)) #if (!defined(OMV_FIR_LEPTON_POWER_PIN)) && (!defined(OMV_FIR_LEPTON_RESET_PIN))
if (LEP_RunOemReboot(&fir_lepton_handle) != LEP_OK) { if (LEP_RunOemReboot(&fir_lepton_handle) != LEP_OK) {
return -2; return -2;
} }
@ -430,13 +390,12 @@ int fir_lepton_init(cambus_t *bus, int *w, int *h, int *refresh, int *resolution
*refresh = fir_lepton_3 ? 27 : 9; *refresh = fir_lepton_3 ? 27 : 9;
*resolution = fir_lepton_rad_en ? 16 : 14; *resolution = fir_lepton_rad_en ? 16 : 14;
#if defined(OMV_FIR_LEPTON_VSYNC_PRESENT) #if defined(OMV_FIR_LEPTON_VSYNC_PIN)
if (LEP_SetOemGpioMode(&fir_lepton_handle, LEP_OEM_GPIO_MODE_VSYNC) != LEP_OK) { if (LEP_SetOemGpioMode(&fir_lepton_handle, LEP_OEM_GPIO_MODE_VSYNC) != LEP_OK) {
return -9; return -9;
} }
omv_gpio_config(OMV_FIR_LEPTON_VSYNC_PIN, OMV_GPIO_MODE_IT_FALL, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_LOW, -1);
extint_register((mp_obj_t) OMV_FIR_LEPTON_VSYNC_PIN, GPIO_MODE_IT_FALLING, GPIO_PULLUP, omv_gpio_irq_register(OMV_FIR_LEPTON_VSYNC_PIN, fir_lepton_extint_callback, NULL);
(mp_obj_t) &fir_lepton_extint_callback_obj, true);
#endif #endif
/////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////
@ -447,78 +406,55 @@ int fir_lepton_init(cambus_t *bus, int *w, int *h, int *refresh, int *resolution
framebuffer_head = 0; framebuffer_head = 0;
for (int i = 0; i < FRAMEBUFFER_COUNT; i++) { for (int i = 0; i < FRAMEBUFFER_COUNT; i++) {
framebuffers[i] = (uint16_t *) fb_alloc0(flir_w * flir_h * sizeof(uint16_t), framebuffers[i] = (uint16_t *) fb_alloc0(flir_w * flir_h * sizeof(uint16_t), FB_ALLOC_NO_HINT);
FB_ALLOC_NO_HINT);
} }
dma_init(&fir_lepton_spi_rx_dma, dma_init(&fir_lepton_spi_rx_dma, OMV_FIR_LEPTON_CONTROLLER->rx_dma_descr, DMA_PERIPH_TO_MEMORY, hspi);
OMV_FIR_LEPTON_CONTROLLER->rx_dma_descr,
DMA_PERIPH_TO_MEMORY,
OMV_FIR_LEPTON_CONTROLLER->spi);
OMV_FIR_LEPTON_CONTROLLER->spi->hdmatx = NULL; hspi->hdmatx = NULL;
OMV_FIR_LEPTON_CONTROLLER->spi->hdmarx = &fir_lepton_spi_rx_dma; hspi->hdmarx = &fir_lepton_spi_rx_dma;
#if defined(MCU_SERIES_H7) #if defined(MCU_SERIES_H7)
fir_lepton_spi_rx_dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; fir_lepton_spi_rx_dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
#else #else
fir_lepton_spi_rx_dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; fir_lepton_spi_rx_dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
#endif #endif
fir_lepton_spi_rx_dma.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; fir_lepton_spi_rx_dma.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
fir_lepton_spi_rx_dma.Init.Mode = DMA_CIRCULAR; fir_lepton_spi_rx_dma.Init.Mode = DMA_CIRCULAR;
fir_lepton_spi_rx_dma.Init.FIFOMode = DMA_FIFOMODE_ENABLE; fir_lepton_spi_rx_dma.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
fir_lepton_spi_rx_dma.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_1QUARTERFULL; fir_lepton_spi_rx_dma.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_1QUARTERFULL;
fir_lepton_spi_rx_dma.Init.MemBurst = DMA_MBURST_SINGLE; fir_lepton_spi_rx_dma.Init.MemBurst = DMA_MBURST_SINGLE;
fir_lepton_spi_rx_dma.Init.PeriphBurst = DMA_PBURST_SINGLE; fir_lepton_spi_rx_dma.Init.PeriphBurst = DMA_PBURST_SINGLE;
((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR = DMA_Stream_TypeDef *dma_chan = (DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance;
(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR & ~DMA_SxCR_PSIZE_Msk) | dma_chan->CR =
(dma_chan->CR & ~DMA_SxCR_PSIZE_Msk) |
#if defined(MCU_SERIES_H7) #if defined(MCU_SERIES_H7)
DMA_PDATAALIGN_WORD; DMA_PDATAALIGN_WORD;
#else #else
DMA_PDATAALIGN_HALFWORD; DMA_PDATAALIGN_HALFWORD;
#endif #endif
dma_chan->CR = (dma_chan->CR & ~DMA_SxCR_MSIZE_Msk) | DMA_MDATAALIGN_WORD;
((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR = dma_chan->CR = (dma_chan->CR & ~DMA_SxCR_CIRC_Msk) | DMA_CIRCULAR;
(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR & ~DMA_SxCR_MSIZE_Msk) | dma_chan->FCR = (dma_chan->FCR & ~DMA_SxFCR_DMDIS_Msk) | DMA_FIFOMODE_ENABLE;
DMA_MDATAALIGN_WORD; dma_chan->FCR = (dma_chan->FCR & ~DMA_SxFCR_FTH_Msk) | DMA_FIFO_THRESHOLD_1QUARTERFULL;
dma_chan->CR = (dma_chan->CR & ~DMA_SxCR_MBURST_Msk) | DMA_MBURST_SINGLE;
((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR = dma_chan->CR = (dma_chan->CR & ~DMA_SxCR_PBURST_Msk) | DMA_PBURST_SINGLE;
(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR & ~DMA_SxCR_CIRC_Msk) |
DMA_CIRCULAR;
((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->FCR =
(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->FCR & ~DMA_SxFCR_DMDIS_Msk) |
DMA_FIFOMODE_ENABLE;
((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->FCR =
(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->FCR & ~DMA_SxFCR_FTH_Msk) |
DMA_FIFO_THRESHOLD_1QUARTERFULL;
((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR =
(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR & ~DMA_SxCR_MBURST_Msk) |
DMA_MBURST_SINGLE;
((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR =
(((DMA_Stream_TypeDef *) fir_lepton_spi_rx_dma.Instance)->CR & ~DMA_SxCR_PBURST_Msk) |
DMA_PBURST_SINGLE;
fb_alloc_mark_permanent(); fb_alloc_mark_permanent();
fir_lepton_spi_resync(); fir_lepton_spi_resync();
return 0; return 0;
} }
#if defined(OMV_FIR_LEPTON_VSYNC_PRESENT) #if defined(OMV_FIR_LEPTON_VSYNC_PIN)
void fir_lepton_register_vsync_cb(mp_obj_t cb) void fir_lepton_register_vsync_cb(mp_obj_t cb)
{ {
extint_disable(OMV_FIR_LEPTON_VSYNC_PIN->pin); omv_gpio_irq_enable(OMV_FIR_LEPTON_VSYNC_PIN, false);
fir_lepton_vsync_cb = cb; fir_lepton_vsync_cb = cb;
if (cb != mp_const_none) { if (cb != mp_const_none) {
extint_enable(OMV_FIR_LEPTON_VSYNC_PIN->pin); omv_gpio_irq_enable(OMV_FIR_LEPTON_VSYNC_PIN, true);
} }
} }
#endif #endif
@ -732,4 +668,4 @@ void fir_lepton_trigger_ffc(uint n_args, const mp_obj_t *args, mp_map_t *kw_args
} }
} }
#endif // OMV_FIR_LEPTON_PRESENT #endif // OMV_ENABLE_FIR_LEPTON

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@ -9,15 +9,17 @@
* IMU Python module. * IMU Python module.
*/ */
#include "omv_boardconfig.h" #include "omv_boardconfig.h"
#if MICROPY_PY_IMU #if MICROPY_PY_IMU
#include STM32_HAL_H
#include "py/obj.h" #include "py/obj.h"
#include "py/mphal.h" #include "py/mphal.h"
#include "py/runtime.h" #include "py/runtime.h"
#include "py_helper.h" #include "py_helper.h"
#include "py_imu.h" #include "py_imu.h"
#include "omv_gpio.h"
#include STM32_HAL_H
#if defined(IMU_CHIP_LSM6DS3) #if defined(IMU_CHIP_LSM6DS3)
#include "lsm6ds3tr_c_reg.h" #include "lsm6ds3tr_c_reg.h"
@ -92,20 +94,20 @@ static void platform_deinit(void *imubus) {
static int32_t platform_write(void *imubus, uint8_t Reg, uint8_t *Bufp, uint16_t len) static int32_t platform_write(void *imubus, uint8_t Reg, uint8_t *Bufp, uint16_t len)
{ {
HAL_GPIO_WritePin(IMU_SPI_SSEL_PORT, IMU_SPI_SSEL_PIN, GPIO_PIN_RESET); omv_gpio_write(IMU_SPI_SSEL_PIN, 0);
HAL_SPI_Transmit(imubus, &Reg, 1, HAL_MAX_DELAY); HAL_SPI_Transmit(imubus, &Reg, 1, HAL_MAX_DELAY);
HAL_SPI_Transmit(imubus, Bufp, len, HAL_MAX_DELAY); HAL_SPI_Transmit(imubus, Bufp, len, HAL_MAX_DELAY);
HAL_GPIO_WritePin(IMU_SPI_SSEL_PORT, IMU_SPI_SSEL_PIN, GPIO_PIN_SET); omv_gpio_write(IMU_SPI_SSEL_PIN, 1);
return 0; return 0;
} }
static int32_t platform_read(void *imubus, uint8_t Reg, uint8_t *Bufp, uint16_t len) static int32_t platform_read(void *imubus, uint8_t Reg, uint8_t *Bufp, uint16_t len)
{ {
Reg |= 0x80; Reg |= 0x80;
HAL_GPIO_WritePin(IMU_SPI_SSEL_PORT, IMU_SPI_SSEL_PIN, GPIO_PIN_RESET); omv_gpio_write(IMU_SPI_SSEL_PIN, 0);
HAL_SPI_Transmit(imubus, &Reg, 1, HAL_MAX_DELAY); HAL_SPI_Transmit(imubus, &Reg, 1, HAL_MAX_DELAY);
HAL_SPI_Receive(imubus, Bufp, len, HAL_MAX_DELAY); HAL_SPI_Receive(imubus, Bufp, len, HAL_MAX_DELAY);
HAL_GPIO_WritePin(IMU_SPI_SSEL_PORT, IMU_SPI_SSEL_PIN, GPIO_PIN_SET); omv_gpio_write(IMU_SPI_SSEL_PIN, 1);
return 0; return 0;
} }
#elif defined(IMU_I2C) #elif defined(IMU_I2C)

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@ -8,18 +8,19 @@
* *
* LCD Python module. * LCD Python module.
*/ */
#include "omv_boardconfig.h"
#if MICROPY_PY_LCD
#include STM32_HAL_H
#include "py/obj.h" #include "py/obj.h"
#include "py/nlr.h" #include "py/nlr.h"
#include "py/runtime.h" #include "py/runtime.h"
#include "extint.h"
#include "extmod/machine_i2c.h" #include "extmod/machine_i2c.h"
#include "py_helper.h" #include "py_helper.h"
#include "py_lcd_touch.h" #include "py_lcd_touch.h"
#include "omv_boardconfig.h" #include "omv_gpio.h"
#include STM32_HAL_H
#if MICROPY_PY_LCD
#ifdef OMV_TOUCH_PRESENT #ifdef OMV_TOUCH_PRESENT
#define FT5X06_I2C_ADDR 0x38 #define FT5X06_I2C_ADDR 0x38
@ -131,16 +132,16 @@ mp_obj_t lcd_touch_update_touch_points()
mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("Failed to update the number of touch points!")); mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("Failed to update the number of touch points!"));
} }
STATIC mp_obj_t lcd_touch_extint_callback(mp_obj_t line) static void lcd_touch_extint_callback(omv_gpio_t pin, void *data)
{ {
if (lcd_touch_user_cb) mp_call_function_1(lcd_touch_user_cb, lcd_touch_update_touch_points()); if (lcd_touch_user_cb) {
return mp_const_none; mp_call_function_1(lcd_touch_user_cb, lcd_touch_update_touch_points());
}
} }
STATIC MP_DEFINE_CONST_FUN_OBJ_1(lcd_touch_extint_callback_obj, lcd_touch_extint_callback);
void lcd_touch_deinit() void lcd_touch_deinit()
{ {
extint_disable(OMV_TOUCH_INT_PIN->pin); omv_gpio_irq_enable(OMV_TOUCH_INT_PIN, false);
lcd_touch_user_cb = NULL; lcd_touch_user_cb = NULL;
lcd_touch_bus = NULL; lcd_touch_bus = NULL;
@ -151,32 +152,25 @@ void lcd_touch_deinit()
memset((void *) lcd_touch_x_position, 0, sizeof(lcd_touch_x_position)); memset((void *) lcd_touch_x_position, 0, sizeof(lcd_touch_x_position));
memset((void *) lcd_touch_y_position, 0, sizeof(lcd_touch_y_position)); memset((void *) lcd_touch_y_position, 0, sizeof(lcd_touch_y_position));
HAL_GPIO_WritePin(OMV_TOUCH_RESET_PIN->gpio, OMV_TOUCH_RESET_PIN->pin_mask, GPIO_PIN_RESET); omv_gpio_write(OMV_TOUCH_RESET_PIN, 0);
HAL_Delay(1); mp_hal_delay_ms(1);
HAL_GPIO_WritePin(OMV_TOUCH_RESET_PIN->gpio, OMV_TOUCH_RESET_PIN->pin_mask, GPIO_PIN_SET); omv_gpio_write(OMV_TOUCH_RESET_PIN, 1);
HAL_Delay(39); mp_hal_delay_ms(39);
HAL_GPIO_DeInit(OMV_TOUCH_INT_PIN->gpio, OMV_TOUCH_INT_PIN->pin_mask); omv_gpio_deinit(OMV_TOUCH_INT_PIN);
omv_gpio_deinit(OMV_TOUCH_RESET_PIN);
HAL_GPIO_DeInit(OMV_TOUCH_SDA_PIN->gpio, OMV_TOUCH_SDA_PIN->pin_mask); HAL_GPIO_DeInit(OMV_TOUCH_SDA_PIN->gpio, OMV_TOUCH_SDA_PIN->pin_mask);
HAL_GPIO_DeInit(OMV_TOUCH_SCL_PIN->gpio, OMV_TOUCH_SCL_PIN->pin_mask); HAL_GPIO_DeInit(OMV_TOUCH_SCL_PIN->gpio, OMV_TOUCH_SCL_PIN->pin_mask);
HAL_GPIO_DeInit(OMV_TOUCH_RESET_PIN->gpio, OMV_TOUCH_RESET_PIN->pin_mask);
} }
void lcd_touch_init() void lcd_touch_init()
{ {
GPIO_InitTypeDef GPIO_InitStructure; omv_gpio_config(OMV_TOUCH_RESET_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStructure.Pull = GPIO_NOPULL; omv_gpio_write(OMV_TOUCH_RESET_PIN, 0);
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP; mp_hal_delay_ms(1);
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW; omv_gpio_write(OMV_TOUCH_RESET_PIN, 1);
GPIO_InitStructure.Pin = OMV_TOUCH_RESET_PIN->pin_mask; mp_hal_delay_ms(39);
HAL_GPIO_Init(OMV_TOUCH_RESET_PIN->gpio, &GPIO_InitStructure);
HAL_GPIO_WritePin(OMV_TOUCH_RESET_PIN->gpio, OMV_TOUCH_RESET_PIN->pin_mask, GPIO_PIN_RESET);
HAL_Delay(1);
HAL_GPIO_WritePin(OMV_TOUCH_RESET_PIN->gpio, OMV_TOUCH_RESET_PIN->pin_mask, GPIO_PIN_SET);
HAL_Delay(39);
lcd_touch_bus = (mp_obj_base_t *) MP_OBJ_TYPE_GET_SLOT( lcd_touch_bus = (mp_obj_base_t *) MP_OBJ_TYPE_GET_SLOT(
&mp_machine_soft_i2c_type, make_new)(&mp_machine_soft_i2c_type, 2, 0, (const mp_obj_t []) { &mp_machine_soft_i2c_type, make_new)(&mp_machine_soft_i2c_type, 2, 0, (const mp_obj_t []) {
@ -186,7 +180,8 @@ void lcd_touch_init()
if (mp_machine_soft_i2c_transfer(lcd_touch_bus, FT5X06_I2C_ADDR, 1, &((mp_machine_i2c_buf_t) { if (mp_machine_soft_i2c_transfer(lcd_touch_bus, FT5X06_I2C_ADDR, 1, &((mp_machine_i2c_buf_t) {
.len = 2, .buf = (uint8_t []) {0x00, 0x00} // addr, DEVICE_MODE .len = 2, .buf = (uint8_t []) {0x00, 0x00} // addr, DEVICE_MODE
}), MP_MACHINE_I2C_FLAG_STOP) == 2) { }), MP_MACHINE_I2C_FLAG_STOP) == 2) {
extint_register((mp_obj_t) OMV_TOUCH_INT_PIN, GPIO_MODE_IT_FALLING, GPIO_PULLUP, (mp_obj_t) &lcd_touch_extint_callback_obj, true); omv_gpio_config(OMV_TOUCH_INT_PIN, OMV_GPIO_MODE_IT_FALL, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_LOW, -1);
omv_gpio_irq_register(OMV_TOUCH_INT_PIN, lcd_touch_extint_callback, NULL);
} else { } else {
mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("Touch init failed!")); mp_raise_msg(&mp_type_OSError, MP_ERROR_TEXT("Touch init failed!"));
} }
@ -194,9 +189,11 @@ void lcd_touch_init()
void lcd_touch_register_touch_cb(mp_obj_t cb) void lcd_touch_register_touch_cb(mp_obj_t cb)
{ {
extint_disable(OMV_TOUCH_INT_PIN->pin); omv_gpio_irq_enable(OMV_TOUCH_INT_PIN, false);
lcd_touch_user_cb = cb; lcd_touch_user_cb = cb;
if (cb != mp_const_none) extint_enable(OMV_TOUCH_INT_PIN->pin); if (cb != mp_const_none) {
omv_gpio_irq_enable(OMV_TOUCH_INT_PIN, true);
}
} }
#endif // OMV_TOUCH_PRESENT #endif // OMV_TOUCH_PRESENT

View File

@ -9,6 +9,11 @@
* *
* TV Python module. * TV Python module.
*/ */
#include "omv_boardconfig.h"
#if MICROPY_PY_TV
#include STM32_HAL_H
#include "py/obj.h" #include "py/obj.h"
#include "py/nlr.h" #include "py/nlr.h"
#include "py/runtime.h" #include "py/runtime.h"
@ -16,10 +21,7 @@
#include "py_helper.h" #include "py_helper.h"
#include "py_image.h" #include "py_image.h"
#include "omv_boardconfig.h" #include "omv_gpio.h"
#include STM32_HAL_H
#if MICROPY_PY_TV
#define TV_WIDTH 352 #define TV_WIDTH 352
#define TV_HEIGHT 240 #define TV_HEIGHT 240
@ -209,18 +211,18 @@ static void SpiRamWriteByteRegister(int opcode, int data)
{ {
uint8_t packet[2] = {opcode, data}; uint8_t packet[2] = {opcode, data};
OMV_SPI_LCD_CS_LOW(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 0);
HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY); HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY);
OMV_SPI_LCD_CS_HIGH(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 1);
} }
static int SpiRamReadByteRegister(int opcode) static int SpiRamReadByteRegister(int opcode)
{ {
uint8_t packet[2] = {opcode, 0}; uint8_t packet[2] = {opcode, 0};
OMV_SPI_LCD_CS_LOW(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 0);
HAL_SPI_TransmitReceive(OMV_SPI_LCD_CONTROLLER->spi, packet, packet, sizeof(packet), HAL_MAX_DELAY); HAL_SPI_TransmitReceive(OMV_SPI_LCD_CONTROLLER->spi, packet, packet, sizeof(packet), HAL_MAX_DELAY);
OMV_SPI_LCD_CS_HIGH(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 1);
return packet[1]; return packet[1];
} }
@ -229,16 +231,16 @@ static void SpiRamWriteWordRegister(int opcode, int data)
{ {
uint8_t packet[3] = {opcode, data >> 8, data}; uint8_t packet[3] = {opcode, data >> 8, data};
OMV_SPI_LCD_CS_LOW(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 0);
HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY); HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY);
OMV_SPI_LCD_CS_HIGH(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 1);
} }
static void SpiClearRam() static void SpiClearRam()
{ {
uint8_t packet[4] = {WRITE_SRAM, 0, 0, 0}; uint8_t packet[4] = {WRITE_SRAM, 0, 0, 0};
OMV_SPI_LCD_CS_LOW(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 0);
HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY); HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY);
packet[0] = 0; packet[0] = 0;
@ -247,25 +249,25 @@ static void SpiClearRam()
HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY); HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY);
} }
OMV_SPI_LCD_CS_HIGH(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 1);
} }
static void SpiRamWriteProgram(int data0, int data1, int data2, int data3) static void SpiRamWriteProgram(int data0, int data1, int data2, int data3)
{ {
uint8_t packet[5] = {PROGRAM, data3, data2, data1, data0}; uint8_t packet[5] = {PROGRAM, data3, data2, data1, data0};
OMV_SPI_LCD_CS_LOW(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 0);
HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY); HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY);
OMV_SPI_LCD_CS_HIGH(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 1);
} }
static void SpiRamWriteLowPassFilter(int data) static void SpiRamWriteLowPassFilter(int data)
{ {
uint8_t packet[6] = {WRITE_BLOCKMVC1, 0, 0, 0, 0, data}; uint8_t packet[6] = {WRITE_BLOCKMVC1, 0, 0, 0, 0, data};
OMV_SPI_LCD_CS_LOW(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 0);
HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY); HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY);
OMV_SPI_LCD_CS_HIGH(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 1);
} }
static void SpiRamWriteWord(int w_address, int data) static void SpiRamWriteWord(int w_address, int data)
@ -273,9 +275,9 @@ static void SpiRamWriteWord(int w_address, int data)
int address = w_address * sizeof(uint16_t); int address = w_address * sizeof(uint16_t);
uint8_t packet[6] = {WRITE_SRAM, address >> 16, address >> 8, address, data >> 8, data}; uint8_t packet[6] = {WRITE_SRAM, address >> 16, address >> 8, address, data >> 8, data};
OMV_SPI_LCD_CS_LOW(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 0);
HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY); HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY);
OMV_SPI_LCD_CS_HIGH(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 1);
} }
static void SpiRamWriteVSyncProtoLine(int line, int length_1, int length_2) static void SpiRamWriteVSyncProtoLine(int line, int length_1, int length_2)
@ -302,9 +304,9 @@ static void SpiRamWriteLine(int line, int index)
int data = index << 7; int data = index << 7;
uint8_t packet[7] = {WRITE_SRAM, address >> 16, address >> 8, address, data, data >> 8, data >> 16}; uint8_t packet[7] = {WRITE_SRAM, address >> 16, address >> 8, address, data, data >> 8, data >> 16};
OMV_SPI_LCD_CS_LOW(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 0);
HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY); HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, packet, sizeof(packet), HAL_MAX_DELAY);
OMV_SPI_LCD_CS_HIGH(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 1);
} }
static void SpiRamVideoInit() static void SpiRamVideoInit()
@ -388,10 +390,6 @@ static void SpiRamVideoInit()
// Enable the low-pass Y filter. // Enable the low-pass Y filter.
SpiRamWriteLowPassFilter(BLOCKMVC1_PYF); SpiRamWriteLowPassFilter(BLOCKMVC1_PYF);
} }
/////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////
#endif #endif
// TV lines are converted from 16-bit RGB565 to 12-bit YUV. // TV lines are converted from 16-bit RGB565 to 12-bit YUV.
@ -433,14 +431,10 @@ static void spi_config_deinit()
spi_deinit(OMV_SPI_LCD_CONTROLLER); spi_deinit(OMV_SPI_LCD_CONTROLLER);
// Do not put in HAL_SPI_MspDeinit as other modules share the SPI2 bus. // Do not put in HAL_SPI_MspDeinit as other modules share the SPI2 bus.
omv_gpio_deinit(OMV_SPI_LCD_MOSI_PIN);
HAL_GPIO_DeInit(OMV_SPI_LCD_MOSI_PORT, OMV_SPI_LCD_MOSI_PIN); omv_gpio_deinit(OMV_SPI_LCD_MISO_PIN);
HAL_GPIO_DeInit(OMV_SPI_LCD_MISO_PORT, OMV_SPI_LCD_MISO_PIN); omv_gpio_deinit(OMV_SPI_LCD_SCLK_PIN);
HAL_GPIO_DeInit(OMV_SPI_LCD_SCLK_PORT, OMV_SPI_LCD_SCLK_PIN); omv_gpio_deinit(OMV_SPI_LCD_SSEL_PIN);
HAL_GPIO_DeInit(OMV_SPI_LCD_CS_PORT, OMV_SPI_LCD_CS_PIN);
///////////////////////////////////////////////////////////////////////
} }
static void spi_tv_callback(SPI_HandleTypeDef *hspi); static void spi_tv_callback(SPI_HandleTypeDef *hspi);
@ -459,32 +453,11 @@ static void spi_config_init(bool triple_buffer)
HAL_SPI_RegisterCallback(OMV_SPI_LCD_CONTROLLER->spi, HAL_SPI_TX_COMPLETE_CB_ID, spi_tv_callback); HAL_SPI_RegisterCallback(OMV_SPI_LCD_CONTROLLER->spi, HAL_SPI_TX_COMPLETE_CB_ID, spi_tv_callback);
// Do not put in HAL_SPI_MspInit as other modules share the SPI2 bus. // Do not put in HAL_SPI_MspInit as other modules share the SPI2 bus.
omv_gpio_config(OMV_SPI_LCD_MOSI_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_MED, -1);
GPIO_InitTypeDef GPIO_InitStructure; omv_gpio_config(OMV_SPI_LCD_MISO_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_MED, -1);
GPIO_InitStructure.Pull = GPIO_NOPULL; omv_gpio_config(OMV_SPI_LCD_SCLK_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_MED, -1);
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP; omv_gpio_config(OMV_SPI_LCD_SSEL_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_MEDIUM; omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 1);
GPIO_InitStructure.Alternate = OMV_SPI_LCD_MOSI_ALT;
GPIO_InitStructure.Pin = OMV_SPI_LCD_MOSI_PIN;
HAL_GPIO_Init(OMV_SPI_LCD_MOSI_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Alternate = OMV_SPI_LCD_MISO_ALT;
GPIO_InitStructure.Pin = OMV_SPI_LCD_MISO_PIN;
HAL_GPIO_Init(OMV_SPI_LCD_MISO_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Alternate = OMV_SPI_LCD_SCLK_ALT;
GPIO_InitStructure.Pin = OMV_SPI_LCD_SCLK_PIN;
HAL_GPIO_Init(OMV_SPI_LCD_SCLK_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStructure.Pin = OMV_SPI_LCD_CS_PIN;
HAL_GPIO_Init(OMV_SPI_LCD_CS_PORT, &GPIO_InitStructure);
OMV_SPI_LCD_CS_HIGH();
/////////////////////////////////////////////////////////////////////
SpiRamVideoInit(); SpiRamVideoInit();
@ -504,42 +477,35 @@ static void spi_config_init(bool triple_buffer)
dma_init(&spi_tx_dma, OMV_SPI_LCD_CONTROLLER->tx_dma_descr, DMA_MEMORY_TO_PERIPH, OMV_SPI_LCD_CONTROLLER->spi); dma_init(&spi_tx_dma, OMV_SPI_LCD_CONTROLLER->tx_dma_descr, DMA_MEMORY_TO_PERIPH, OMV_SPI_LCD_CONTROLLER->spi);
OMV_SPI_LCD_CONTROLLER->spi->hdmatx = &spi_tx_dma; OMV_SPI_LCD_CONTROLLER->spi->hdmatx = &spi_tx_dma;
OMV_SPI_LCD_CONTROLLER->spi->hdmarx = NULL; OMV_SPI_LCD_CONTROLLER->spi->hdmarx = NULL;
#if defined(MCU_SERIES_H7) #if defined(MCU_SERIES_H7)
spi_tx_dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; spi_tx_dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
#else #else
spi_tx_dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; spi_tx_dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
#endif #endif
spi_tx_dma.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; spi_tx_dma.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
spi_tx_dma.Init.FIFOMode = DMA_FIFOMODE_ENABLE; spi_tx_dma.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
spi_tx_dma.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; spi_tx_dma.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
spi_tx_dma.Init.MemBurst = DMA_MBURST_INC4; spi_tx_dma.Init.MemBurst = DMA_MBURST_INC4;
#if defined(MCU_SERIES_H7) #if defined(MCU_SERIES_H7)
spi_tx_dma.Init.PeriphBurst = DMA_PBURST_INC4; spi_tx_dma.Init.PeriphBurst = DMA_PBURST_INC4;
#else #else
spi_tx_dma.Init.PeriphBurst = DMA_PBURST_SINGLE; spi_tx_dma.Init.PeriphBurst = DMA_PBURST_SINGLE;
#endif #endif
#if defined(MCU_SERIES_H7) DMA_Stream_TypeDef *dma_chan = spi_tx_dma.Instance;
((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->CR = #if defined(MCU_SERIES_H7)
(((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->CR & ~DMA_SxCR_PSIZE_Msk) | DMA_PDATAALIGN_WORD; dma_chan->CR = (dma_chan->CR & ~DMA_SxCR_PSIZE_Msk) | DMA_PDATAALIGN_WORD;
#else #else
((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->CR = dma_chan->CR = (dma_chan->CR & ~DMA_SxCR_PSIZE_Msk) | DMA_PDATAALIGN_BYTE;
(((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->CR & ~DMA_SxCR_PSIZE_Msk) | DMA_PDATAALIGN_BYTE; #endif
#endif dma_chan->CR = (dma_chan->CR & ~DMA_SxCR_MSIZE_Msk) | DMA_MDATAALIGN_WORD;
((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->CR = dma_chan->FCR = (dma_chan->FCR & ~DMA_SxFCR_DMDIS_Msk) | DMA_FIFOMODE_ENABLE;
(((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->CR & ~DMA_SxCR_MSIZE_Msk) | DMA_MDATAALIGN_WORD; dma_chan->FCR = (dma_chan->FCR & ~DMA_SxFCR_FTH_Msk) | DMA_FIFO_THRESHOLD_FULL;
((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->FCR = dma_chan->CR = (dma_chan->CR & ~DMA_SxCR_MBURST_Msk) | DMA_MBURST_INC4;
(((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->FCR & ~DMA_SxFCR_DMDIS_Msk) | DMA_FIFOMODE_ENABLE; #if defined(MCU_SERIES_H7)
((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->FCR = dma_chan->CR = (dma_chan->CR & ~DMA_SxCR_PBURST_Msk) | DMA_PBURST_INC4;
(((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->FCR & ~DMA_SxFCR_FTH_Msk) | DMA_FIFO_THRESHOLD_FULL; #else
((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->CR = dma_chan->CR = (dma_chan->CR & ~DMA_SxCR_PBURST_Msk) | DMA_PBURST_SINGLE;
(((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->CR & ~DMA_SxCR_MBURST_Msk) | DMA_MBURST_INC4; #endif
#if defined(MCU_SERIES_H7)
((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->CR =
(((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->CR & ~DMA_SxCR_PBURST_Msk) | DMA_PBURST_INC4;
#else
((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->CR =
(((DMA_Stream_TypeDef *) spi_tx_dma.Instance)->CR & ~DMA_SxCR_PBURST_Msk) | DMA_PBURST_SINGLE;
#endif
fb_alloc_mark_permanent(); fb_alloc_mark_permanent();
} }
} }
@ -559,16 +525,16 @@ static void spi_tv_callback(SPI_HandleTypeDef *hspi)
switch (spi_tx_cb_state) { switch (spi_tx_cb_state) {
case SPI_TX_CB_MEMORY_WRITE_CMD: { case SPI_TX_CB_MEMORY_WRITE_CMD: {
OMV_SPI_LCD_CS_HIGH(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 1);
spi_tx_cb_state = SPI_TX_CB_MEMORY_WRITE; spi_tx_cb_state = SPI_TX_CB_MEMORY_WRITE;
spi_tx_cb_state_memory_write_addr = (uint8_t *) framebuffers[framebuffer_head]; spi_tx_cb_state_memory_write_addr = (uint8_t *) framebuffers[framebuffer_head];
spi_tx_cb_state_memory_write_count = PICLINE_LENGTH_BYTES * TV_HEIGHT; spi_tx_cb_state_memory_write_count = PICLINE_LENGTH_BYTES * TV_HEIGHT;
framebuffer_tail = framebuffer_head; framebuffer_tail = framebuffer_head;
#if defined(MCU_SERIES_H7) #if defined(MCU_SERIES_H7)
OMV_SPI_LCD_CONTROLLER->spi->Instance->CFG1 = OMV_SPI_LCD_CONTROLLER->spi->Instance->CFG1 =
(OMV_SPI_LCD_CONTROLLER->spi->Instance->CFG1 & ~SPI_CFG1_FTHLV_Msk) | SPI_FIFO_THRESHOLD_01DATA; (OMV_SPI_LCD_CONTROLLER->spi->Instance->CFG1 & ~SPI_CFG1_FTHLV_Msk) | SPI_FIFO_THRESHOLD_01DATA;
#endif #endif
OMV_SPI_LCD_CS_LOW(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 0);
// When starting the interrupt chain the first HAL_SPI_Transmit_IT is not executed // When starting the interrupt chain the first HAL_SPI_Transmit_IT is not executed
// in interrupt context. So, disable interrupts for the first HAL_SPI_Transmit_IT so // in interrupt context. So, disable interrupts for the first HAL_SPI_Transmit_IT so
// that it completes first and unlocks the SPI bus before allowing the interrupt // that it completes first and unlocks the SPI bus before allowing the interrupt
@ -586,10 +552,10 @@ static void spi_tv_callback(SPI_HandleTypeDef *hspi)
: SPI_TX_CB_MEMORY_WRITE_CMD; : SPI_TX_CB_MEMORY_WRITE_CMD;
spi_tx_cb_state_memory_write_addr += count; spi_tx_cb_state_memory_write_addr += count;
spi_tx_cb_state_memory_write_count -= count; spi_tx_cb_state_memory_write_count -= count;
#if defined(MCU_SERIES_H7) #if defined(MCU_SERIES_H7)
OMV_SPI_LCD_CONTROLLER->spi->Instance->CFG1 = OMV_SPI_LCD_CONTROLLER->spi->Instance->CFG1 =
(OMV_SPI_LCD_CONTROLLER->spi->Instance->CFG1 & ~SPI_CFG1_FTHLV_Msk) | SPI_FIFO_THRESHOLD_16DATA; (OMV_SPI_LCD_CONTROLLER->spi->Instance->CFG1 & ~SPI_CFG1_FTHLV_Msk) | SPI_FIFO_THRESHOLD_16DATA;
#endif #endif
HAL_SPI_Transmit_DMA(OMV_SPI_LCD_CONTROLLER->spi, addr, count); HAL_SPI_Transmit_DMA(OMV_SPI_LCD_CONTROLLER->spi, addr, count);
break; break;
} }
@ -694,7 +660,7 @@ static void spi_tv_display(image_t *src_img, int dst_x_start, int dst_y_start, f
if (!tv_triple_buffer) { if (!tv_triple_buffer) {
dst_img.data = fb_alloc0(TV_WIDTH_RGB565, FB_ALLOC_NO_HINT); dst_img.data = fb_alloc0(TV_WIDTH_RGB565, FB_ALLOC_NO_HINT);
OMV_SPI_LCD_CS_LOW(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 0);
HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, (uint8_t *) write_sram, sizeof(write_sram), HAL_MAX_DELAY); HAL_SPI_Transmit(OMV_SPI_LCD_CONTROLLER->spi, (uint8_t *) write_sram, sizeof(write_sram), HAL_MAX_DELAY);
@ -723,7 +689,7 @@ static void spi_tv_display(image_t *src_img, int dst_x_start, int dst_y_start, f
} }
} }
OMV_SPI_LCD_CS_HIGH(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 1);
fb_free(); fb_free();
} else { } else {
// For triple buffering we are never drawing where head or tail (which may instantly update to // For triple buffering we are never drawing where head or tail (which may instantly update to
@ -935,7 +901,7 @@ STATIC mp_obj_t py_tv_channel(uint n_args, const mp_obj_t *args)
if (tv_triple_buffer) { if (tv_triple_buffer) {
HAL_SPI_Abort(OMV_SPI_LCD_CONTROLLER->spi); HAL_SPI_Abort(OMV_SPI_LCD_CONTROLLER->spi);
spi_tx_cb_state = SPI_TX_CB_IDLE; spi_tx_cb_state = SPI_TX_CB_IDLE;
OMV_SPI_LCD_CS_HIGH(); omv_gpio_write(OMV_SPI_LCD_SSEL_PIN, 1);
} }
if (n_args) { if (n_args) {
@ -1082,19 +1048,19 @@ STATIC mp_obj_t py_tv_clear()
STATIC MP_DEFINE_CONST_FUN_OBJ_0(py_tv_clear_obj, py_tv_clear); STATIC MP_DEFINE_CONST_FUN_OBJ_0(py_tv_clear_obj, py_tv_clear);
STATIC const mp_rom_map_elem_t globals_dict_table[] = { STATIC const mp_rom_map_elem_t globals_dict_table[] = {
{ MP_ROM_QSTR(MP_QSTR___name__), MP_OBJ_NEW_QSTR(MP_QSTR_tv) }, { MP_ROM_QSTR(MP_QSTR___name__), MP_OBJ_NEW_QSTR(MP_QSTR_tv) },
{ MP_ROM_QSTR(MP_QSTR_TV_NONE), MP_ROM_INT(TV_NONE) }, { MP_ROM_QSTR(MP_QSTR_TV_NONE), MP_ROM_INT(TV_NONE) },
{ MP_ROM_QSTR(MP_QSTR_TV_SHIELD), MP_ROM_INT(TV_SHIELD) }, { MP_ROM_QSTR(MP_QSTR_TV_SHIELD), MP_ROM_INT(TV_SHIELD) },
{ MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&py_tv_init_obj) }, { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&py_tv_init_obj) },
{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&py_tv_deinit_obj) }, { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&py_tv_deinit_obj) },
{ MP_ROM_QSTR(MP_QSTR_width), MP_ROM_PTR(&py_tv_width_obj) }, { MP_ROM_QSTR(MP_QSTR_width), MP_ROM_PTR(&py_tv_width_obj) },
{ MP_ROM_QSTR(MP_QSTR_height), MP_ROM_PTR(&py_tv_height_obj) }, { MP_ROM_QSTR(MP_QSTR_height), MP_ROM_PTR(&py_tv_height_obj) },
{ MP_ROM_QSTR(MP_QSTR_type), MP_ROM_PTR(&py_tv_type_obj) }, { MP_ROM_QSTR(MP_QSTR_type), MP_ROM_PTR(&py_tv_type_obj) },
{ MP_ROM_QSTR(MP_QSTR_triple_buffer), MP_ROM_PTR(&py_tv_triple_buffer_obj) }, { MP_ROM_QSTR(MP_QSTR_triple_buffer), MP_ROM_PTR(&py_tv_triple_buffer_obj) },
{ MP_ROM_QSTR(MP_QSTR_refresh), MP_ROM_PTR(&py_tv_refresh_obj) }, { MP_ROM_QSTR(MP_QSTR_refresh), MP_ROM_PTR(&py_tv_refresh_obj) },
{ MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&py_tv_channel_obj) }, { MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&py_tv_channel_obj) },
{ MP_ROM_QSTR(MP_QSTR_display), MP_ROM_PTR(&py_tv_display_obj) }, { MP_ROM_QSTR(MP_QSTR_display), MP_ROM_PTR(&py_tv_display_obj) },
{ MP_ROM_QSTR(MP_QSTR_clear), MP_ROM_PTR(&py_tv_clear_obj) }, { MP_ROM_QSTR(MP_QSTR_clear), MP_ROM_PTR(&py_tv_clear_obj) },
}; };
STATIC MP_DEFINE_CONST_DICT(globals_dict, globals_dict_table); STATIC MP_DEFINE_CONST_DICT(globals_dict, globals_dict_table);

View File

@ -22,7 +22,6 @@
#include "extmod/modnetwork.h" #include "extmod/modnetwork.h"
#include "pin.h" #include "pin.h"
#include "genhdr/pins.h" #include "genhdr/pins.h"
#include "spi.h"
#include "common.h" #include "common.h"
#include "py_helper.h" #include "py_helper.h"
#include "ff_wrapper.h" #include "ff_wrapper.h"

View File

@ -0,0 +1,243 @@
/*
* This file is part of the OpenMV project.
*
* Copyright (c) 2023 Ibrahim Abdelkader <iabdalkader@openmv.io>
* Copyright (c) 2023 Kwabena W. Agyeman <kwagyeman@openmv.io>
*
* This work is licensed under the MIT license, see the file LICENSE for details.
*
* GPIO port for stm32.
*/
#include STM32_HAL_H
#include <string.h>
#include <stdint.h>
#include <stdbool.h>
#include "py/mphal.h"
#include "irq.h"
#include "omv_boardconfig.h"
#include "omv_gpio.h"
typedef struct _omv_exti_descr {
bool enabled;
uint32_t gpio;
uint32_t irqn;
omv_gpio_t pin;
void *data;
omv_gpio_callback_t callback;
} omv_exti_descr_t;
static omv_exti_descr_t exti_descr_table[16] = {{0}};
// Returns the port number configured in EXTI_CR for this line.
static uint32_t omv_exti_get_gpio(uint32_t line)
{
return (SYSCFG->EXTICR[line >> 2] >> (4 * (line & 3))) & 0x0F;
}
// Returns pin number.
static uint32_t omv_exti_get_line(omv_gpio_t pin)
{
return 31 - __CLZ(pin->pin);
}
// Returns the IRQ number of a an EXTI line.
static uint32_t omv_exti_get_irqn(omv_gpio_t pin)
{
uint32_t exti_irqn = 0;
uint32_t exti_line = omv_exti_get_line(pin);
switch (exti_line) {
case 0:
exti_irqn = EXTI0_IRQn;
break;
case 1:
exti_irqn = EXTI1_IRQn;
break;
case 2:
exti_irqn = EXTI2_IRQn;
break;
case 3:
exti_irqn = EXTI3_IRQn;
break;
case 4:
exti_irqn = EXTI4_IRQn;
break;
case 5 ... 9:
exti_irqn = EXTI9_5_IRQn;
break;
case 10 ... 15:
exti_irqn = EXTI15_10_IRQn;
break;
default:
break;
}
return exti_irqn;
}
static inline bool omv_exti_enabled(omv_exti_descr_t *exti_descr, uint32_t line)
{
return (exti_descr->enabled &&
exti_descr->callback &&
exti_descr->gpio == omv_exti_get_gpio(line));
}
void omv_exti_handler(uint32_t line)
{
if (line < 5) {
// EXTI lines 0 to 4 have single IRQs.
omv_exti_descr_t *exti_descr = &exti_descr_table[line];
if (omv_exti_enabled(exti_descr, line)) {
__HAL_GPIO_EXTI_CLEAR_FLAG(1 << line);
exti_descr->callback(exti_descr->pin, exti_descr->data);
}
} else {
size_t line_max = (line == 5) ? 10 : 16;
// EXTI lines 5 to 9 and 10 to 15 are multiplexed.
for (size_t i = line; i < line_max; i++) {
omv_exti_descr_t *exti_descr = &exti_descr_table[i];
if (__HAL_GPIO_EXTI_GET_FLAG(1 << i)
&& omv_exti_enabled(exti_descr, i)) {
__HAL_GPIO_EXTI_CLEAR_FLAG(1 << i);
exti_descr->callback(exti_descr->pin, exti_descr->data);
}
}
}
}
void omv_gpio_init0(void)
{
memset(exti_descr_table, 0, sizeof(exti_descr_table));
}
void omv_gpio_config(omv_gpio_t pin, uint32_t mode, uint32_t pull, uint32_t speed, uint32_t af)
{
GPIO_InitTypeDef gpio_config = {
.Pin = pin->pin,
.Mode = mode,
.Pull = pull,
.Speed = speed,
.Alternate = ((af == -1) ? pin->af : af),
};
HAL_GPIO_Init(pin->port, &gpio_config);
}
void omv_gpio_deinit(omv_gpio_t pin)
{
HAL_GPIO_DeInit(pin->port, pin->pin);
}
bool omv_gpio_read(omv_gpio_t pin)
{
return HAL_GPIO_ReadPin(pin->port, pin->pin);
}
void omv_gpio_write(omv_gpio_t pin, bool value)
{
HAL_GPIO_WritePin(pin->port, pin->pin, value);
}
void omv_gpio_irq_register(omv_gpio_t pin, omv_gpio_callback_t callback, void *data)
{
omv_exti_descr_t *exti_descr = NULL;
uint32_t exti_line = omv_exti_get_line(pin);
if (exti_line != 0) {
exti_descr = &exti_descr_table[exti_line];
exti_descr->enabled = true;
exti_descr->data = data;
exti_descr->gpio = omv_exti_get_gpio(exti_line);
exti_descr->pin = pin;
exti_descr->callback = callback;
}
}
void omv_gpio_irq_enable(omv_gpio_t pin, bool enable)
{
uint32_t exti_line = omv_exti_get_line(pin);
uint32_t exti_irqn = omv_exti_get_irqn(pin);
exti_descr_table[exti_line].enabled = enable;
if (!enable) {
HAL_NVIC_DisableIRQ(exti_irqn);
} else {
NVIC_SetPriority(exti_irqn, IRQ_PRI_EXTINT);
HAL_NVIC_EnableIRQ(exti_irqn);
}
}
void omv_gpio_clock_enable(omv_gpio_t pin, bool enable)
{
if (pin->port == GPIOA) {
if (enable) {
__HAL_RCC_GPIOA_CLK_ENABLE();
} else {
__HAL_RCC_GPIOA_CLK_DISABLE();
}
} else if (pin->port == GPIOB) {
if (enable) {
__HAL_RCC_GPIOB_CLK_ENABLE();
} else {
__HAL_RCC_GPIOB_CLK_DISABLE();
}
} else if (pin->port == GPIOC) {
if (enable) {
__HAL_RCC_GPIOC_CLK_ENABLE();
} else {
__HAL_RCC_GPIOC_CLK_DISABLE();
}
} else if (pin->port == GPIOD) {
if (enable) {
__HAL_RCC_GPIOD_CLK_ENABLE();
} else {
__HAL_RCC_GPIOD_CLK_DISABLE();
}
} else if (pin->port == GPIOE) {
if (enable) {
__HAL_RCC_GPIOE_CLK_ENABLE();
} else {
__HAL_RCC_GPIOE_CLK_DISABLE();
}
} else if (pin->port == GPIOF) {
if (enable) {
__HAL_RCC_GPIOF_CLK_ENABLE();
} else {
__HAL_RCC_GPIOF_CLK_DISABLE();
}
} else if (pin->port == GPIOG) {
if (enable) {
__HAL_RCC_GPIOG_CLK_ENABLE();
} else {
__HAL_RCC_GPIOG_CLK_DISABLE();
}
#if defined(__HAL_RCC_GPIOH_CLK_ENABLE)
} else if (pin->port == GPIOH) {
if (enable) {
__HAL_RCC_GPIOH_CLK_ENABLE();
} else {
__HAL_RCC_GPIOH_CLK_DISABLE();
}
#elif defined(__HAL_RCC_GPIOI_CLK_ENABLE)
} else if (pin->port == GPIOI) {
if (enable) {
__HAL_RCC_GPIOI_CLK_ENABLE();
} else {
__HAL_RCC_GPIOI_CLK_DISABLE();
}
#elif defined(__HAL_RCC_GPIOJ_CLK_ENABLE)
} else if (pin->port == GPIOJ) {
if (enable) {
__HAL_RCC_GPIOJ_CLK_ENABLE();
} else {
__HAL_RCC_GPIOJ_CLK_DISABLE();
}
#elif defined(__HAL_RCC_GPIOK_CLK_ENABLE)
} else if (pin->port == GPIOK) {
if (enable) {
__HAL_RCC_GPIOK_CLK_ENABLE();
} else {
__HAL_RCC_GPIOK_CLK_DISABLE();
}
#endif
}
}

View File

@ -12,14 +12,57 @@
#define __OMV_PORTCONFIG_H__ #define __OMV_PORTCONFIG_H__
#include STM32_HAL_H #include STM32_HAL_H
// GPIO speeds.
#define OMV_GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
#define OMV_GPIO_SPEED_MED GPIO_SPEED_FREQ_MEDIUM
#define OMV_GPIO_SPEED_HIGH GPIO_SPEED_FREQ_HIGH
#define OMV_GPIO_SPEED_MAX GPIO_SPEED_FREQ_VERY_HIGH
// GPIO pull.
#define OMV_GPIO_PULL_NONE GPIO_NOPULL
#define OMV_GPIO_PULL_UP GPIO_PULLUP
#define OMV_GPIO_PULL_DOWN GPIO_PULLDOWN
// GPIO modes.
#define OMV_GPIO_MODE_INPUT GPIO_MODE_INPUT
#define OMV_GPIO_MODE_OUTPUT GPIO_MODE_OUTPUT_PP
#define OMV_GPIO_MODE_OUTPUT_OD GPIO_MODE_OUTPUT_OD
#define OMV_GPIO_MODE_ALT GPIO_MODE_AF_PP
#define OMV_GPIO_MODE_ALT_OD GPIO_MODE_AF_OD
#define OMV_GPIO_MODE_ANALOG GPIO_MODE_ANALOG
// GPIO IT modes.
#define OMV_GPIO_MODE_IT_FALL GPIO_MODE_IT_FALLING
#define OMV_GPIO_MODE_IT_RISE GPIO_MODE_IT_RISING
#define OMV_GPIO_MODE_IT_BOTH GPIO_MODE_IT_RISING_FALLING
// omv_gpio_t definition // omv_gpio_t definition
typedef struct _omv_gpio { typedef struct {
uint32_t pin;
GPIO_TypeDef *port; GPIO_TypeDef *port;
} omv_gpio_t; uint16_t pin;
uint16_t af;
} stm32_gpio_t;
typedef const stm32_gpio_t *omv_gpio_t;
// cambus/i2c definition // cambus/i2c definition
// This pointer will be set to its respective I2C handle which is defined in MicroPython along with // This pointer will be set to its respective I2C handle which is defined in MicroPython along with
// IRQ handlers, if this I2C is enabled in Micropython, or defined and handled in stm32fxxx_hal_msp.c. // IRQ handlers, if this I2C is enabled in Micropython, or defined and handled in stm32fxxx_hal_msp.c.
typedef I2C_HandleTypeDef *omv_cambus_t; typedef I2C_HandleTypeDef *omv_cambus_t;
// For board config files.
// Dummy AF for pins defined as I/O
#define GPIO_NONE_GPIO (0)
#if OMV_GPIO_DEFINE_PINS
#define OMV_GPIO_DEFINE(port, pin, af, inst) \
const stm32_gpio_t omv_pin_##port##pin##_##inst = {GPIO##port, GPIO_PIN_##pin, GPIO_##af##_##inst};
#else
#define OMV_GPIO_DEFINE(port, pin, af, inst) \
extern stm32_gpio_t omv_pin_##port##pin##_##inst;
#endif
#include "omv_pins.h"
#endif // __OMV_PORTCONFIG_H__ #endif // __OMV_PORTCONFIG_H__

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@ -567,6 +567,7 @@ UVC_OBJ += $(addprefix $(BUILD)/$(OMV_DIR)/ports/stm32/,\
soft_i2c.o \ soft_i2c.o \
cambus.o \ cambus.o \
ulpi.o \ ulpi.o \
omv_gpio.o \
) )
UVC_OBJ += $(wildcard $(BUILD)/$(LEPTON_DIR)/src/*.o) UVC_OBJ += $(wildcard $(BUILD)/$(LEPTON_DIR)/src/*.o)

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@ -18,6 +18,7 @@
#include "framebuffer.h" #include "framebuffer.h"
#include "omv_boardconfig.h" #include "omv_boardconfig.h"
#include "unaligned_memcpy.h" #include "unaligned_memcpy.h"
#include "omv_gpio.h"
#define MDMA_BUFFER_SIZE (64) #define MDMA_BUFFER_SIZE (64)
#define DMA_MAX_XFER_SIZE (0xFFFF*4) #define DMA_MAX_XFER_SIZE (0xFFFF*4)
@ -319,19 +320,23 @@ int sensor_shutdown(int enable)
sensor_abort(); sensor_abort();
if (enable) { if (enable) {
#if defined(DCMI_POWER_PIN)
if (sensor.pwdn_pol == ACTIVE_HIGH) { if (sensor.pwdn_pol == ACTIVE_HIGH) {
DCMI_PWDN_HIGH(); omv_gpio_write(DCMI_POWER_PIN, 1);
} else { } else {
DCMI_PWDN_LOW(); omv_gpio_write(DCMI_POWER_PIN, 0);
} }
#endif
HAL_NVIC_DisableIRQ(DCMI_IRQn); HAL_NVIC_DisableIRQ(DCMI_IRQn);
HAL_DCMI_DeInit(&DCMIHandle); HAL_DCMI_DeInit(&DCMIHandle);
} else { } else {
#if defined(DCMI_POWER_PIN)
if (sensor.pwdn_pol == ACTIVE_HIGH) { if (sensor.pwdn_pol == ACTIVE_HIGH) {
DCMI_PWDN_LOW(); omv_gpio_write(DCMI_POWER_PIN, 0);
} else { } else {
DCMI_PWDN_HIGH(); omv_gpio_write(DCMI_POWER_PIN, 1);
} }
#endif
ret = sensor_dcmi_config(sensor.pixformat); ret = sensor_dcmi_config(sensor.pixformat);
} }
@ -339,34 +344,29 @@ int sensor_shutdown(int enable)
return ret; return ret;
} }
static void sensor_vsync_callback(omv_gpio_t pin, void *data)
{
if (sensor.vsync_callback != NULL) {
sensor.vsync_callback(omv_gpio_read(DCMI_VSYNC_PIN));
}
}
int sensor_set_vsync_callback(vsync_cb_t vsync_cb) int sensor_set_vsync_callback(vsync_cb_t vsync_cb)
{ {
sensor.vsync_callback = vsync_cb; sensor.vsync_callback = vsync_cb;
if (sensor.vsync_callback == NULL) { if (sensor.vsync_callback == NULL) {
#if (DCMI_VSYNC_EXTI_SHARED == 0) #if (DCMI_VSYNC_EXTI_SHARED == 0)
// Disable VSYNC EXTI IRQ // Disable VSYNC EXTI IRQ
HAL_NVIC_DisableIRQ(DCMI_VSYNC_EXTI_IRQN); omv_gpio_irq_enable(DCMI_VSYNC_PIN, false);
#endif #endif
} else { } else {
// Enable VSYNC EXTI IRQ // Enable VSYNC EXTI IRQ
NVIC_SetPriority(DCMI_VSYNC_EXTI_IRQN, IRQ_PRI_EXTINT); omv_gpio_irq_register(DCMI_VSYNC_PIN, sensor_vsync_callback, NULL);
HAL_NVIC_EnableIRQ(DCMI_VSYNC_EXTI_IRQN); omv_gpio_irq_enable(DCMI_VSYNC_PIN, true);
} }
return 0; return 0;
} }
void DCMI_VsyncExtiCallback()
{
if (__HAL_GPIO_EXTI_GET_FLAG(1 << DCMI_VSYNC_EXTI_LINE)) {
if (hal_get_exti_gpio(DCMI_VSYNC_EXTI_LINE) == DCMI_VSYNC_EXTI_GPIO) {
__HAL_GPIO_EXTI_CLEAR_FLAG(1 << DCMI_VSYNC_EXTI_LINE);
if (sensor.vsync_callback != NULL) {
sensor.vsync_callback(HAL_GPIO_ReadPin(DCMI_VSYNC_PORT, DCMI_VSYNC_PIN));
}
}
}
}
// If we are cropping the image by more than 1 word in width we can align the line start to // If we are cropping the image by more than 1 word in width we can align the line start to
// a word address to improve copy performance. Do not crop by more than 1 word as this will // a word address to improve copy performance. Do not crop by more than 1 word as this will
// result in less time between DMA transfers complete interrupts on 16-byte boundaries. // result in less time between DMA transfers complete interrupts on 16-byte boundaries.
@ -900,7 +900,7 @@ int sensor_snapshot(sensor_t *sensor, image_t *image, uint32_t flags)
// Let the camera know we want to trigger it now. // Let the camera know we want to trigger it now.
#if defined(DCMI_FSYNC_PIN) #if defined(DCMI_FSYNC_PIN)
if (sensor->hw_flags.fsync) { if (sensor->hw_flags.fsync) {
DCMI_FSYNC_HIGH(); omv_gpio_write(DCMI_FSYNC_PIN, 1);
} }
#endif #endif
@ -926,7 +926,7 @@ int sensor_snapshot(sensor_t *sensor, image_t *image, uint32_t flags)
#if defined(DCMI_FSYNC_PIN) #if defined(DCMI_FSYNC_PIN)
if (sensor->hw_flags.fsync) { if (sensor->hw_flags.fsync) {
DCMI_FSYNC_LOW(); omv_gpio_write(DCMI_FSYNC_PIN, 0);
} }
#endif #endif
@ -944,7 +944,7 @@ int sensor_snapshot(sensor_t *sensor, image_t *image, uint32_t flags)
// We're done receiving data. // We're done receiving data.
#if defined(DCMI_FSYNC_PIN) #if defined(DCMI_FSYNC_PIN)
if (sensor->hw_flags.fsync) { if (sensor->hw_flags.fsync) {
DCMI_FSYNC_LOW(); omv_gpio_write(DCMI_FSYNC_PIN, 0);
} }
#endif #endif

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@ -15,8 +15,9 @@
#include "soft_i2c.h" #include "soft_i2c.h"
#include "omv_boardconfig.h" #include "omv_boardconfig.h"
#include "omv_gpio.h"
#if defined(SOFT_I2C_PORT) #if defined(SOFT_I2C_SIOC_PIN)
#define ACK 0 #define ACK 0
#define NACK 1 #define NACK 1
@ -29,9 +30,9 @@ static void i2c_start(void)
{ {
/* The start of data transmission occurs when /* The start of data transmission occurs when
SIO_D is driven low while SIO_C is high */ SIO_D is driven low while SIO_C is high */
SOFT_I2C_SIOD_L(); omv_gpio_write(SOFT_I2C_SIOD_PIN, 0);
delay(); delay();
SOFT_I2C_SIOC_L(); omv_gpio_write(SOFT_I2C_SIOC_PIN, 0);
delay(); delay();
} }
@ -39,9 +40,9 @@ static void i2c_stop(void)
{ {
/* The stop of data transmission occurs when /* The stop of data transmission occurs when
SIO_D is driven high while SIO_C is high */ SIO_D is driven high while SIO_C is high */
SOFT_I2C_SIOC_H(); omv_gpio_write(SOFT_I2C_SIOC_PIN, 1);
delay(); delay();
SOFT_I2C_SIOD_H(); omv_gpio_write(SOFT_I2C_SIOD_PIN, 1);
delay(); delay();
} }
@ -49,29 +50,29 @@ static uint8_t i2c_read_byte(char ack)
{ {
uint8_t data = 0; uint8_t data = 0;
SOFT_I2C_SIOD_H(); omv_gpio_write(SOFT_I2C_SIOD_PIN, 1);
delay(); delay();
for(char i=0; i<8; i++) { for(char i=0; i<8; i++) {
SOFT_I2C_SIOC_H(); omv_gpio_write(SOFT_I2C_SIOC_PIN, 1);
delay(); delay();
data += data + SOFT_I2C_SIOD_READ(); data += data + omv_gpio_read(SOFT_I2C_SIOD_PIN);
delay(); delay();
SOFT_I2C_SIOC_L(); omv_gpio_write(SOFT_I2C_SIOC_PIN, 0);
delay(); delay();
} }
/* Write ACK */ /* Write ACK */
SOFT_I2C_SIOD_WRITE(ack); omv_gpio_write(SOFT_I2C_SIOD_PIN, ack);
delay(); delay();
SOFT_I2C_SIOC_H(); omv_gpio_write(SOFT_I2C_SIOC_PIN, 1);
delay(); delay();
SOFT_I2C_SIOC_L(); omv_gpio_write(SOFT_I2C_SIOC_PIN, 0);
delay(); delay();
SOFT_I2C_SIOD_L(); omv_gpio_write(SOFT_I2C_SIOD_PIN, 0);
delay(); delay();
return data; return data;
} }
@ -81,28 +82,28 @@ static char i2c_write_byte(uint8_t data)
char i; char i;
for(i=0; i<8; i++) { for(i=0; i<8; i++) {
SOFT_I2C_SIOD_WRITE((data >> (7 - i)) & 1); omv_gpio_write(SOFT_I2C_SIOD_PIN, (data >> (7 - i)) & 1);
delay(); delay();
SOFT_I2C_SIOC_H(); omv_gpio_write(SOFT_I2C_SIOC_PIN, 1);
delay(); delay();
SOFT_I2C_SIOC_L(); omv_gpio_write(SOFT_I2C_SIOC_PIN, 0);
delay(); delay();
} }
SOFT_I2C_SIOD_H(); omv_gpio_write(SOFT_I2C_SIOD_PIN, 1);
delay(); delay();
SOFT_I2C_SIOC_H(); omv_gpio_write(SOFT_I2C_SIOC_PIN, 1);
delay(); delay();
/* Read ACK */ /* Read ACK */
i = SOFT_I2C_SIOD_READ(); i = omv_gpio_read(SOFT_I2C_SIOD_PIN);
delay(); delay();
SOFT_I2C_SIOC_L(); omv_gpio_write(SOFT_I2C_SIOC_PIN, 0);
delay(); delay();
SOFT_I2C_SIOD_L(); omv_gpio_write(SOFT_I2C_SIOD_PIN, 0);
delay(); delay();
return i; return i;
} }
@ -119,9 +120,9 @@ int soft_i2c_read_bytes(uint8_t slv_addr, uint8_t *buf, int len, bool stop)
if (stop) { if (stop) {
i2c_stop(); i2c_stop();
} else { } else {
SOFT_I2C_SIOD_H(); omv_gpio_write(SOFT_I2C_SIOD_PIN, 1);
delay(); delay();
SOFT_I2C_SIOC_H(); omv_gpio_write(SOFT_I2C_SIOC_PIN, 1);
delay(); delay();
} }
MICROPY_END_ATOMIC_SECTION(atomic_state); MICROPY_END_ATOMIC_SECTION(atomic_state);
@ -140,9 +141,9 @@ int soft_i2c_write_bytes(uint8_t slv_addr, uint8_t *buf, int len, bool stop)
if (stop) { if (stop) {
i2c_stop(); i2c_stop();
} else { } else {
SOFT_I2C_SIOD_H(); omv_gpio_write(SOFT_I2C_SIOD_PIN, 1);
delay(); delay();
SOFT_I2C_SIOC_H(); omv_gpio_write(SOFT_I2C_SIOC_PIN, 1);
delay(); delay();
} }
MICROPY_END_ATOMIC_SECTION(atomic_state); MICROPY_END_ATOMIC_SECTION(atomic_state);
@ -151,18 +152,11 @@ int soft_i2c_write_bytes(uint8_t slv_addr, uint8_t *buf, int len, bool stop)
void soft_i2c_init() void soft_i2c_init()
{ {
GPIO_InitTypeDef GPIO_InitStructure; omv_gpio_write(SOFT_I2C_SIOC_PIN, 1); // Set first to prevent glitches.
GPIO_InitStructure.Pull = GPIO_NOPULL; omv_gpio_config(SOFT_I2C_SIOC_PIN, OMV_GPIO_MODE_OUTPUT_OD, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStructure.Speed = GPIO_SPEED_LOW;
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_OD;
GPIO_InitStructure.Pin = SOFT_I2C_SIOC_PIN; omv_gpio_write(SOFT_I2C_SIOD_PIN, 1); // Set first to prevent glitches.
SOFT_I2C_SIOC_H(); // Set first to prevent glitches. omv_gpio_config(SOFT_I2C_SIOD_PIN, OMV_GPIO_MODE_OUTPUT_OD, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
HAL_GPIO_Init(SOFT_I2C_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Pin = SOFT_I2C_SIOD_PIN;
SOFT_I2C_SIOD_H(); // Set first to prevent glitches.
HAL_GPIO_Init(SOFT_I2C_PORT, &GPIO_InitStructure);
for(volatile int i=0; i<1000; i++); for(volatile int i=0; i<1000; i++);
@ -174,7 +168,7 @@ void soft_i2c_init()
void soft_i2c_deinit() void soft_i2c_deinit()
{ {
for(volatile int i=0; i<1000; i++); for(volatile int i=0; i<1000; i++);
HAL_GPIO_DeInit(SOFT_I2C_PORT, SOFT_I2C_SIOC_PIN); omv_gpio_deinit(SOFT_I2C_SIOC_PIN);
HAL_GPIO_DeInit(SOFT_I2C_PORT, SOFT_I2C_SIOD_PIN); omv_gpio_deinit(SOFT_I2C_SIOD_PIN);
} }
#endif // defined(SOFT_I2C_PORT) #endif // defined(SOFT_I2C_SIOC_PIN)

View File

@ -10,38 +10,16 @@
*/ */
#include STM32_HAL_H #include STM32_HAL_H
#include "axiqos.h" #include "axiqos.h"
#include "omv_boardconfig.h"
#include "imlib.h" #include "imlib.h"
#include "irq.h" #include "irq.h"
#include "omv_boardconfig.h"
/* GPIO struct */ #include "common.h"
typedef struct { // Define pin objects in this file.
GPIO_TypeDef *port; #define OMV_GPIO_DEFINE_PINS (1)
uint16_t pin; #include "omv_gpio.h"
} gpio_t;
/* DCMI GPIOs */
static const gpio_t dcmi_pins[] = {
{DCMI_D0_PORT, DCMI_D0_PIN},
{DCMI_D1_PORT, DCMI_D1_PIN},
{DCMI_D2_PORT, DCMI_D2_PIN},
{DCMI_D3_PORT, DCMI_D3_PIN},
{DCMI_D4_PORT, DCMI_D4_PIN},
{DCMI_D5_PORT, DCMI_D5_PIN},
{DCMI_D6_PORT, DCMI_D6_PIN},
{DCMI_D7_PORT, DCMI_D7_PIN},
{DCMI_HSYNC_PORT, DCMI_HSYNC_PIN},
{DCMI_VSYNC_PORT, DCMI_VSYNC_PIN},
{DCMI_PXCLK_PORT, DCMI_PXCLK_PIN},
};
#define NUM_DCMI_PINS (sizeof(dcmi_pins)/sizeof(dcmi_pins[0]))
extern void SystemClock_Config(void); extern void SystemClock_Config(void);
extern uint32_t omv_exti_get_gpio(uint32_t line);
uint32_t hal_get_exti_gpio(uint32_t line) {
return (SYSCFG->EXTICR[line >> 2] >> (4 * (line & 3))) & 0x0F;
}
void HAL_MspInit(void) void HAL_MspInit(void)
{ {
@ -54,7 +32,7 @@ void HAL_MspInit(void)
__DSB(); __ISB(); __DSB(); __ISB();
HAL_MPU_Disable(); HAL_MPU_Disable();
/* Configure the MPU attributes to disable caching DMA buffers */ // Configure the MPU attributes to disable caching DMA buffers.
MPU_Region_InitTypeDef MPU_InitStruct; MPU_Region_InitTypeDef MPU_InitStruct;
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
@ -93,12 +71,12 @@ void HAL_MspInit(void)
HAL_MPU_ConfigRegion(&MPU_InitStruct); HAL_MPU_ConfigRegion(&MPU_InitStruct);
#endif // defined(OMV_DMA_REGION_D3_BASE) #endif // defined(OMV_DMA_REGION_D3_BASE)
/* Enable the MPU */ // Enable the MPU.
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT); HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
__DSB(); __ISB(); __DSB(); __ISB();
#endif // defined(OMV_DMA_REGION_D1_BASE || OMV_DMA_REGION_D2_BASE || OMV_DMA_REGION_D3_BASE) #endif // defined(OMV_DMA_REGION_D1_BASE || OMV_DMA_REGION_D2_BASE || OMV_DMA_REGION_D3_BASE)
/* Enable I/D cache */ // Enable I/D cache.
#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_H7) #if defined(MCU_SERIES_F7) || defined(MCU_SERIES_H7)
#ifdef OMV_DISABLE_CACHE #ifdef OMV_DISABLE_CACHE
// Disable caches for testing. // Disable caches for testing.
@ -122,46 +100,46 @@ void HAL_MspInit(void)
#endif #endif
#endif #endif
/* Config Systick */ // Config Systick.
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
/* Enable GPIO clocks */ // Enable GPIO clocks.
__GPIOA_CLK_ENABLE(); __GPIOA_CLK_ENABLE();
__GPIOB_CLK_ENABLE(); __GPIOB_CLK_ENABLE();
__GPIOC_CLK_ENABLE(); __GPIOC_CLK_ENABLE();
__GPIOD_CLK_ENABLE(); __GPIOD_CLK_ENABLE();
__GPIOE_CLK_ENABLE(); __GPIOE_CLK_ENABLE();
#ifdef OMV_ENABLE_GPIO_BANK_F #if OMV_ENABLE_GPIO_BANK_F
__GPIOF_CLK_ENABLE(); __GPIOF_CLK_ENABLE();
#endif #endif
#ifdef OMV_ENABLE_GPIO_BANK_G #if OMV_ENABLE_GPIO_BANK_G
__GPIOG_CLK_ENABLE(); __GPIOG_CLK_ENABLE();
#endif #endif
#ifdef OMV_ENABLE_GPIO_BANK_H #if OMV_ENABLE_GPIO_BANK_H
__GPIOH_CLK_ENABLE(); __GPIOH_CLK_ENABLE();
#endif #endif
#ifdef OMV_ENABLE_GPIO_BANK_I #if OMV_ENABLE_GPIO_BANK_I
__GPIOI_CLK_ENABLE(); __GPIOI_CLK_ENABLE();
#endif #endif
#ifdef OMV_ENABLE_GPIO_BANK_J #if OMV_ENABLE_GPIO_BANK_J
__GPIOJ_CLK_ENABLE(); __GPIOJ_CLK_ENABLE();
#endif #endif
#ifdef OMV_ENABLE_GPIO_BANK_K #if OMV_ENABLE_GPIO_BANK_K
__GPIOK_CLK_ENABLE(); __GPIOK_CLK_ENABLE();
#endif #endif
/* Enable DMA clocks */ // Enable DMA clocks.
__DMA1_CLK_ENABLE(); __DMA1_CLK_ENABLE();
__DMA2_CLK_ENABLE(); __DMA2_CLK_ENABLE();
#if defined(MCU_SERIES_H7) #if defined(MCU_SERIES_H7)
// MDMA clock // MDMA clock.
__HAL_RCC_MDMA_CLK_ENABLE(); __HAL_RCC_MDMA_CLK_ENABLE();
NVIC_SetPriority(MDMA_IRQn, IRQ_PRI_MDMA); NVIC_SetPriority(MDMA_IRQn, IRQ_PRI_MDMA);
HAL_NVIC_EnableIRQ(MDMA_IRQn); HAL_NVIC_EnableIRQ(MDMA_IRQn);
#endif #endif
/* Setup AXI QoS */ // Setup AXI QoS
#if defined(OMV_AXI_QOS_D2_AHB_R_PRI) #if defined(OMV_AXI_QOS_D2_AHB_R_PRI)
OMV_AXI_QOS_D2_AHB_R_SET(OMV_AXI_QOS_D2_AHB_R_PRI); OMV_AXI_QOS_D2_AHB_R_SET(OMV_AXI_QOS_D2_AHB_R_PRI);
#endif #endif
@ -199,50 +177,24 @@ void HAL_MspInit(void)
OMV_AXI_QOS_LTDC_W_SET(OMV_AXI_QOS_LTDC_W_PRI); OMV_AXI_QOS_LTDC_W_SET(OMV_AXI_QOS_LTDC_W_PRI);
#endif #endif
#if defined(DCMI_RESET_PIN) || defined(DCMI_PWDN_PIN) || defined(DCMI_FSYNC_PIN)
/* Configure DCMI GPIO */
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.Speed = GPIO_SPEED_LOW;
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
#if defined(DCMI_RESET_PIN) #if defined(DCMI_RESET_PIN)
GPIO_InitStructure.Pin = DCMI_RESET_PIN; omv_gpio_config(DCMI_RESET_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_DOWN, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStructure.Pull = GPIO_PULLDOWN;
HAL_GPIO_Init(DCMI_RESET_PORT, &GPIO_InitStructure);
#endif #endif
#if defined(DCMI_FSYNC_PIN) #if defined(DCMI_FSYNC_PIN)
GPIO_InitStructure.Pin = DCMI_FSYNC_PIN; omv_gpio_config(DCMI_FSYNC_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_DOWN, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStructure.Pull = GPIO_PULLDOWN; #endif
HAL_GPIO_Init(DCMI_FSYNC_PORT, &GPIO_InitStructure); #if defined(DCMI_POWER_PIN)
omv_gpio_config(DCMI_POWER_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_LOW, -1);
#endif #endif
#if defined(DCMI_PWDN_PIN) #if defined(OMV_FIR_LEPTON_RESET_PIN)
GPIO_InitStructure.Pin = DCMI_PWDN_PIN; omv_gpio_config(OMV_FIR_LEPTON_RESET_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStructure.Pull = GPIO_PULLUP; omv_gpio_write(OMV_FIR_LEPTON_RESET_PIN, 0);
HAL_GPIO_Init(DCMI_PWDN_PORT, &GPIO_InitStructure);
#endif #endif
#endif // DCMI_RESET_PIN || DCMI_PWDN_PIN || DCMI_FSYNC_PIN #if defined(OMV_FIR_LEPTON_POWER_PIN)
omv_gpio_config(OMV_FIR_LEPTON_POWER_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
#if defined(OMV_FIR_LEPTON_RST_PIN_PRESENT) omv_gpio_write(OMV_FIR_LEPTON_POWER_PIN, 0);
GPIO_InitTypeDef fir_lepton_rst_pin;
fir_lepton_rst_pin.Speed = GPIO_SPEED_LOW;
fir_lepton_rst_pin.Mode = GPIO_MODE_OUTPUT_PP;
fir_lepton_rst_pin.Pin = OMV_FIR_LEPTON_RST_PIN;
fir_lepton_rst_pin.Pull = GPIO_NOPULL;
HAL_GPIO_Init(OMV_FIR_LEPTON_RST_PORT, &fir_lepton_rst_pin);
OMV_FIR_LEPTON_RST_LOW();
#endif
#if defined(OMV_FIR_LEPTON_PWDN_PIN_PRESENT)
GPIO_InitTypeDef fir_lepton_pwdn_pin;
fir_lepton_pwdn_pin.Speed = GPIO_SPEED_LOW;
fir_lepton_pwdn_pin.Mode = GPIO_MODE_OUTPUT_PP;
fir_lepton_pwdn_pin.Pin = OMV_FIR_LEPTON_PWDN_PIN;
fir_lepton_pwdn_pin.Pull = GPIO_NOPULL;
HAL_GPIO_Init(OMV_FIR_LEPTON_PWDN_PORT, &fir_lepton_pwdn_pin);
OMV_FIR_LEPTON_PWDN_LOW();
#endif #endif
#if defined(MCU_SERIES_H7) #if defined(MCU_SERIES_H7)
@ -261,79 +213,47 @@ void HAL_MspInit(void)
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
{ {
GPIO_InitTypeDef GPIO_InitStructure; omv_gpio_t scl_pin = NULL;
GPIO_InitStructure.Pull = GPIO_NOPULL; omv_gpio_t sda_pin = NULL;
GPIO_InitStructure.Mode = GPIO_MODE_AF_OD;
if (hi2c->Instance == ISC_I2C) { if (hi2c->Instance == ISC_I2C) {
/* Enable I2C clock */ // Enable I2C clock.
ISC_I2C_CLK_ENABLE(); ISC_I2C_CLK_ENABLE();
scl_pin = ISC_I2C_SCL_PIN;
GPIO_InitStructure.Speed = GPIO_SPEED_LOW; sda_pin = ISC_I2C_SDA_PIN;
GPIO_InitStructure.Alternate = ISC_I2C_AF;
GPIO_InitStructure.Pin = ISC_I2C_SCL_PIN;
HAL_GPIO_Init(ISC_I2C_SCL_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Pin = ISC_I2C_SDA_PIN;
HAL_GPIO_Init(ISC_I2C_SDA_PORT, &GPIO_InitStructure);
#if defined(FIR_I2C) #if defined(FIR_I2C)
} else if (hi2c->Instance == FIR_I2C) { } else if (hi2c->Instance == FIR_I2C) {
/* Enable I2C clock */ // Enable I2C clock.
FIR_I2C_CLK_ENABLE(); FIR_I2C_CLK_ENABLE();
scl_pin = FIR_I2C_SCL_PIN;
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH; sda_pin = FIR_I2C_SDA_PIN;
GPIO_InitStructure.Alternate = FIR_I2C_AF;
GPIO_InitStructure.Pin = FIR_I2C_SCL_PIN;
HAL_GPIO_Init(FIR_I2C_SCL_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Pin = FIR_I2C_SDA_PIN;
HAL_GPIO_Init(FIR_I2C_SDA_PORT, &GPIO_InitStructure);
#endif #endif
#if defined(TOF_I2C) #if defined(TOF_I2C)
} else if (hi2c->Instance == TOF_I2C) { } else if (hi2c->Instance == TOF_I2C) {
/* Enable I2C clock */ // Enable I2C clock.
TOF_I2C_CLK_ENABLE(); TOF_I2C_CLK_ENABLE();
scl_pin = TOF_I2C_SCL_PIN;
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH; sda_pin = TOF_I2C_SDA_PIN;
GPIO_InitStructure.Alternate = TOF_I2C_AF;
GPIO_InitStructure.Pin = TOF_I2C_SCL_PIN;
HAL_GPIO_Init(TOF_I2C_SCL_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Pin = TOF_I2C_SDA_PIN;
HAL_GPIO_Init(TOF_I2C_SDA_PORT, &GPIO_InitStructure);
#endif #endif
#if defined(IMU_I2C) #if defined(IMU_I2C)
} else if (hi2c->Instance == IMU_I2C) { } else if (hi2c->Instance == IMU_I2C) {
/* Enable I2C clock */ // Enable I2C clock.
IMU_I2C_CLK_ENABLE(); IMU_I2C_CLK_ENABLE();
scl_pin = IMU_I2C_SCL_PIN;
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH; sda_pin = IMU_I2C_SDA_PIN;
GPIO_InitStructure.Alternate = IMU_I2C_AF;
GPIO_InitStructure.Pin = IMU_I2C_SCL_PIN;
HAL_GPIO_Init(IMU_I2C_SCL_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Pin = IMU_I2C_SDA_PIN;
HAL_GPIO_Init(IMU_I2C_SDA_PORT, &GPIO_InitStructure);
#endif #endif
#if defined(ISC_I2C_ALT) #if defined(ISC_I2C_ALT)
} else if (hi2c->Instance == ISC_I2C_ALT) { } else if (hi2c->Instance == ISC_I2C_ALT) {
/* Enable I2C clock */ // Enable I2C clock.
ISC_I2C_ALT_CLK_ENABLE(); ISC_I2C_ALT_CLK_ENABLE();
scl_pin = ISC_I2C_ALT_SCL_PIN;
GPIO_InitStructure.Speed = GPIO_SPEED_LOW; sda_pin = ISC_I2C_ALT_SDA_PIN;
GPIO_InitStructure.Alternate = ISC_I2C_ALT_AF;
GPIO_InitStructure.Pin = ISC_I2C_ALT_SCL_PIN;
HAL_GPIO_Init(ISC_I2C_ALT_SCL_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Pin = ISC_I2C_ALT_SDA_PIN;
HAL_GPIO_Init(ISC_I2C_ALT_SDA_PORT, &GPIO_InitStructure);
#endif #endif
} }
if (scl_pin && sda_pin) {
omv_gpio_config(scl_pin, OMV_GPIO_MODE_ALT_OD, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
omv_gpio_config(sda_pin, OMV_GPIO_MODE_ALT_OD, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
}
} }
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
@ -373,22 +293,12 @@ void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{ {
#if (OMV_XCLK_SOURCE == OMV_XCLK_TIM) #if (OMV_XCLK_SOURCE == OMV_XCLK_TIM)
if (htim->Instance == DCMI_TIM) { if (htim->Instance == DCMI_TIM) {
/* Enable DCMI timer clock */ // Enable DCMI timer clock.
DCMI_TIM_CLK_ENABLE(); DCMI_TIM_CLK_ENABLE();
// Timer GPIO configuration.
/* Timer GPIO configuration */ omv_gpio_config(DCMI_TIM_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_HIGH, -1);
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.Pull = GPIO_PULLUP;
GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
GPIO_InitStructure.Alternate = DCMI_TIM_AF;
GPIO_InitStructure.Pin = DCMI_TIM_PIN;
HAL_GPIO_Init(DCMI_TIM_PORT, &GPIO_InitStructure);
#if defined(DCMI_TIM_EXT_PIN) #if defined(DCMI_TIM_EXT_PIN)
GPIO_InitStructure.Pin = DCMI_TIM_EXT_PIN; omv_gpio_config(DCMI_TIM_EXT_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_HIGH, -1);
HAL_GPIO_Init(DCMI_TIM_EXT_PORT, &GPIO_InitStructure);
#endif #endif
} }
#endif // (OMV_XCLK_SOURCE == OMV_XCLK_TIM) #endif // (OMV_XCLK_SOURCE == OMV_XCLK_TIM)
@ -427,96 +337,82 @@ void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim)
void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi) void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi)
{ {
/* DCMI clock enable */ const omv_gpio_t dcmi_pins[] = {
DCMI_D0_PIN,
DCMI_D1_PIN,
DCMI_D2_PIN,
DCMI_D3_PIN,
DCMI_D4_PIN,
DCMI_D5_PIN,
DCMI_D6_PIN,
DCMI_D7_PIN,
DCMI_HSYNC_PIN,
DCMI_VSYNC_PIN,
DCMI_PXCLK_PIN,
};
// DCMI clock enable
__DCMI_CLK_ENABLE(); __DCMI_CLK_ENABLE();
/* DCMI GPIOs configuration */ // Configure VSYNC EXTI.
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.Pull = GPIO_PULLUP;
GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
GPIO_InitStructure.Alternate = GPIO_AF13_DCMI;
#if (DCMI_VSYNC_EXTI_SHARED == 1) #if (DCMI_VSYNC_EXTI_SHARED == 1)
uint32_t exti_gpio = hal_get_exti_gpio(DCMI_VSYNC_EXTI_LINE); if (exti_gpio == 0)
if (exti_gpio == 0 || exti_gpio == DCMI_VSYNC_EXTI_GPIO)
#endif #endif
{ {
/* Enable VSYNC EXTI */ omv_gpio_config(DCMI_VSYNC_PIN, OMV_GPIO_MODE_IT_BOTH, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_MAX, -1);
GPIO_InitStructure.Mode = GPIO_MODE_IT_RISING_FALLING;
GPIO_InitStructure.Pin = DCMI_VSYNC_PIN;
HAL_GPIO_Init(DCMI_VSYNC_PORT, &GPIO_InitStructure);
} }
/* Configure DCMI pins */ // Configure DCMI pins.
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP; for (int i=0; i<OMV_ARRAY_SIZE(dcmi_pins); i++) {
for (int i=0; i<NUM_DCMI_PINS; i++) { omv_gpio_config(dcmi_pins[i], OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_MAX, -1);
GPIO_InitStructure.Pin = dcmi_pins[i].pin;
HAL_GPIO_Init(dcmi_pins[i].port, &GPIO_InitStructure);
} }
} }
void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi) void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi)
{ {
/* DCMI clock disable */ const omv_gpio_t dcmi_pins[] = {
DCMI_D0_PIN,
DCMI_D1_PIN,
DCMI_D2_PIN,
DCMI_D3_PIN,
DCMI_D4_PIN,
DCMI_D5_PIN,
DCMI_D6_PIN,
DCMI_D7_PIN,
DCMI_HSYNC_PIN,
DCMI_VSYNC_PIN,
DCMI_PXCLK_PIN,
};
// Disable DCMI clock.
__DCMI_CLK_DISABLE(); __DCMI_CLK_DISABLE();
for (int i=0; i<NUM_DCMI_PINS; i++) {
HAL_GPIO_DeInit(dcmi_pins[i].port, dcmi_pins[i].pin); // Deinit pins.
for (int i=0; i<OMV_ARRAY_SIZE(dcmi_pins); i++) {
omv_gpio_deinit(dcmi_pins[i]);
} }
} }
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi) void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
{ {
#if defined(IMU_SPI) #if defined(IMU_SPI)
if (hspi->Instance == IMU_SPI) { if (hspi->Instance == IMU_SPI) {
IMU_SPI_CLK_ENABLE(); IMU_SPI_CLK_ENABLE();
omv_gpio_config(IMU_SPI_SCLK_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_HIGH, -1);
GPIO_InitTypeDef GPIO_InitStructure; omv_gpio_config(IMU_SPI_MISO_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_HIGH, -1);
GPIO_InitStructure.Pull = GPIO_PULLUP; omv_gpio_config(IMU_SPI_MOSI_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_HIGH, -1);
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP; omv_gpio_config(IMU_SPI_SSEL_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_HIGH, -1);
GPIO_InitStructure.Alternate = IMU_SPI_AF; omv_gpio_write(IMU_SPI_SSEL_PIN, 1);
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStructure.Pin = IMU_SPI_SCLK_PIN;
HAL_GPIO_Init(IMU_SPI_SCLK_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Pin = IMU_SPI_MISO_PIN;
HAL_GPIO_Init(IMU_SPI_MISO_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Pin = IMU_SPI_MOSI_PIN;
HAL_GPIO_Init(IMU_SPI_MOSI_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStructure.Pin = IMU_SPI_SSEL_PIN;
HAL_GPIO_Init(IMU_SPI_SSEL_PORT, &GPIO_InitStructure);
} }
#endif #endif
#if defined(ISC_SPI) #if defined(ISC_SPI)
if (hspi->Instance == ISC_SPI) { if (hspi->Instance == ISC_SPI) {
ISC_SPI_CLK_ENABLE(); ISC_SPI_CLK_ENABLE();
omv_gpio_config(ISC_SPI_SCLK_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_HIGH, -1);
GPIO_InitTypeDef GPIO_InitStructure; omv_gpio_config(ISC_SPI_MISO_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_HIGH, -1);
GPIO_InitStructure.Pull = GPIO_PULLUP; omv_gpio_config(ISC_SPI_MOSI_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_HIGH, -1);
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP; omv_gpio_config(ISC_SPI_SSEL_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_UP, OMV_GPIO_SPEED_HIGH, -1);
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStructure.Alternate = ISC_SPI_SCLK_AF;
GPIO_InitStructure.Pin = ISC_SPI_SCLK_PIN;
HAL_GPIO_Init(ISC_SPI_SCLK_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Alternate = ISC_SPI_MISO_AF;
GPIO_InitStructure.Pin = ISC_SPI_MISO_PIN;
HAL_GPIO_Init(ISC_SPI_MISO_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Alternate = ISC_SPI_MOSI_AF;
GPIO_InitStructure.Pin = ISC_SPI_MOSI_PIN;
HAL_GPIO_Init(ISC_SPI_MOSI_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Alternate = ISC_SPI_SSEL_AF;
GPIO_InitStructure.Pin = ISC_SPI_SSEL_PIN;
HAL_GPIO_Init(ISC_SPI_SSEL_PORT, &GPIO_InitStructure);
} }
#endif #endif
} }
@ -529,23 +425,10 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
#if defined(AUDIO_SAI) #if defined(AUDIO_SAI)
void HAL_SAI_MspInit(SAI_HandleTypeDef* hsai) void HAL_SAI_MspInit(SAI_HandleTypeDef* hsai)
{ {
GPIO_InitTypeDef GPIO_InitStruct;
if (hsai->Instance == AUDIO_SAI) { if (hsai->Instance == AUDIO_SAI) {
AUDIO_SAI_CLK_ENABLE(); AUDIO_SAI_CLK_ENABLE();
omv_gpio_config(AUDIO_SAI_CK_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStruct.Pin = AUDIO_SAI_CK_PIN; omv_gpio_config(AUDIO_SAI_D1_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = AUDIO_SAI_CK_AF;
HAL_GPIO_Init(AUDIO_SAI_CK_PORT, &GPIO_InitStruct);
GPIO_InitStruct.Pin = AUDIO_SAI_D1_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = AUDIO_SAI_D1_AF;
HAL_GPIO_Init(AUDIO_SAI_D1_PORT, &GPIO_InitStruct);
} }
} }
@ -553,30 +436,17 @@ void HAL_SAI_MspDeInit(SAI_HandleTypeDef* hsai)
{ {
if (hsai->Instance == SAI4_Block_A) { if (hsai->Instance == SAI4_Block_A) {
AUDIO_SAI_CLK_DISABLE(); AUDIO_SAI_CLK_DISABLE();
HAL_GPIO_DeInit(AUDIO_SAI_CK_PORT, AUDIO_SAI_CK_PIN); omv_gpio_deinit(AUDIO_SAI_CK_PIN);
HAL_GPIO_DeInit(AUDIO_SAI_D1_PORT, AUDIO_SAI_D1_PIN); omv_gpio_deinit(AUDIO_SAI_D1_PIN);
} }
} }
#elif defined(AUDIO_DFSDM) #elif defined(AUDIO_DFSDM)
void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm) void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm)
{ {
GPIO_InitTypeDef GPIO_InitStruct;
if (hdfsdm->Instance == AUDIO_DFSDM) { if (hdfsdm->Instance == AUDIO_DFSDM) {
AUDIO_DFSDM_CLK_ENABLE(); AUDIO_DFSDM_CLK_ENABLE();
omv_gpio_config(AUDIO_DFSDM_CK_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStruct.Pin = AUDIO_DFSDM_CK_PIN; omv_gpio_config(AUDIO_DFSDM_D1_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = AUDIO_DFSDM_CK_AF;
HAL_GPIO_Init(AUDIO_DFSDM_CK_PORT, &GPIO_InitStruct);
GPIO_InitStruct.Pin = AUDIO_DFSDM_D1_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = AUDIO_DFSDM_D1_AF;
HAL_GPIO_Init(AUDIO_DFSDM_D1_PORT, &GPIO_InitStruct);
} }
} }
@ -584,9 +454,8 @@ void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm)
{ {
if (hdfsdm->Instance == AUDIO_DFSDM) { if (hdfsdm->Instance == AUDIO_DFSDM) {
AUDIO_DFSDM_CLK_DISABLE(); AUDIO_DFSDM_CLK_DISABLE();
omv_gpio_deinit(AUDIO_DFSDM_CK_PIN);
HAL_GPIO_DeInit(AUDIO_DFSDM_CK_PORT, AUDIO_DFSDM_CK_PIN); omv_gpio_deinit(AUDIO_DFSDM_D1_PIN);
HAL_GPIO_DeInit(AUDIO_DFSDM_D1_PORT, AUDIO_DFSDM_D1_PIN);
} }
} }
#endif #endif
@ -628,40 +497,35 @@ void HAL_JPEG_MspDeInit(JPEG_HandleTypeDef *hjpeg)
#endif #endif
#if defined(OMV_LCD_CONTROLLER) && (!defined(OMV_DSI_CONTROLLER)) #if defined(OMV_LCD_CONTROLLER) && (!defined(OMV_DSI_CONTROLLER))
typedef struct { static const omv_gpio_t ltdc_pins[] = {
GPIO_TypeDef *port; OMV_LCD_R0_PIN,
uint16_t af, pin; OMV_LCD_R1_PIN,
} ltdc_gpio_t; OMV_LCD_R2_PIN,
OMV_LCD_R3_PIN,
static const ltdc_gpio_t ltdc_pins[] = { OMV_LCD_R4_PIN,
{OMV_LCD_R0_PORT, OMV_LCD_R0_ALT, OMV_LCD_R0_PIN}, OMV_LCD_R5_PIN,
{OMV_LCD_R1_PORT, OMV_LCD_R1_ALT, OMV_LCD_R1_PIN}, OMV_LCD_R6_PIN,
{OMV_LCD_R2_PORT, OMV_LCD_R2_ALT, OMV_LCD_R2_PIN}, OMV_LCD_R7_PIN,
{OMV_LCD_R3_PORT, OMV_LCD_R3_ALT, OMV_LCD_R3_PIN}, OMV_LCD_G0_PIN,
{OMV_LCD_R4_PORT, OMV_LCD_R4_ALT, OMV_LCD_R4_PIN}, OMV_LCD_G1_PIN,
{OMV_LCD_R5_PORT, OMV_LCD_R5_ALT, OMV_LCD_R5_PIN}, OMV_LCD_G2_PIN,
{OMV_LCD_R6_PORT, OMV_LCD_R6_ALT, OMV_LCD_R6_PIN}, OMV_LCD_G3_PIN,
{OMV_LCD_R7_PORT, OMV_LCD_R7_ALT, OMV_LCD_R7_PIN}, OMV_LCD_G4_PIN,
{OMV_LCD_G0_PORT, OMV_LCD_G0_ALT, OMV_LCD_G0_PIN}, OMV_LCD_G5_PIN,
{OMV_LCD_G1_PORT, OMV_LCD_G1_ALT, OMV_LCD_G1_PIN}, OMV_LCD_G6_PIN,
{OMV_LCD_G2_PORT, OMV_LCD_G2_ALT, OMV_LCD_G2_PIN}, OMV_LCD_G7_PIN,
{OMV_LCD_G3_PORT, OMV_LCD_G3_ALT, OMV_LCD_G3_PIN}, OMV_LCD_B0_PIN,
{OMV_LCD_G4_PORT, OMV_LCD_G4_ALT, OMV_LCD_G4_PIN}, OMV_LCD_B1_PIN,
{OMV_LCD_G5_PORT, OMV_LCD_G5_ALT, OMV_LCD_G5_PIN}, OMV_LCD_B2_PIN,
{OMV_LCD_G6_PORT, OMV_LCD_G6_ALT, OMV_LCD_G6_PIN}, OMV_LCD_B3_PIN,
{OMV_LCD_G7_PORT, OMV_LCD_G7_ALT, OMV_LCD_G7_PIN}, OMV_LCD_B4_PIN,
{OMV_LCD_B0_PORT, OMV_LCD_B0_ALT, OMV_LCD_B0_PIN}, OMV_LCD_B5_PIN,
{OMV_LCD_B1_PORT, OMV_LCD_B1_ALT, OMV_LCD_B1_PIN}, OMV_LCD_B6_PIN,
{OMV_LCD_B2_PORT, OMV_LCD_B2_ALT, OMV_LCD_B2_PIN}, OMV_LCD_B7_PIN,
{OMV_LCD_B3_PORT, OMV_LCD_B3_ALT, OMV_LCD_B3_PIN}, OMV_LCD_CLK_PIN,
{OMV_LCD_B4_PORT, OMV_LCD_B4_ALT, OMV_LCD_B4_PIN}, OMV_LCD_DE_PIN,
{OMV_LCD_B5_PORT, OMV_LCD_B5_ALT, OMV_LCD_B5_PIN}, OMV_LCD_HSYNC_PIN,
{OMV_LCD_B6_PORT, OMV_LCD_B6_ALT, OMV_LCD_B6_PIN}, OMV_LCD_VSYNC_PIN,
{OMV_LCD_B7_PORT, OMV_LCD_B7_ALT, OMV_LCD_B7_PIN},
{OMV_LCD_CLK_PORT, OMV_LCD_CLK_ALT, OMV_LCD_CLK_PIN},
{OMV_LCD_DE_PORT, OMV_LCD_DE_ALT, OMV_LCD_DE_PIN},
{OMV_LCD_HSYNC_PORT, OMV_LCD_HSYNC_ALT, OMV_LCD_HSYNC_PIN},
{OMV_LCD_VSYNC_PORT, OMV_LCD_VSYNC_ALT, OMV_LCD_VSYNC_PIN},
}; };
#endif #endif
@ -676,30 +540,18 @@ void HAL_LTDC_MspInit(LTDC_HandleTypeDef *hltdc)
if (hltdc->Instance == OMV_LCD_CONTROLLER) { if (hltdc->Instance == OMV_LCD_CONTROLLER) {
OMV_LCD_CLK_ENABLE(); OMV_LCD_CLK_ENABLE();
GPIO_InitTypeDef GPIO_InitStructure; for (int i=0; i<OMV_ARRAY_SIZE(ltdc_pins); i++) {
GPIO_InitStructure.Pull = GPIO_NOPULL; omv_gpio_config(ltdc_pins[i], OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_MAX, -1);
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
for (int i = 0, ii = sizeof(ltdc_pins) / sizeof(ltdc_gpio_t); i < ii; i++) {
GPIO_InitStructure.Alternate = ltdc_pins[i].af;
GPIO_InitStructure.Pin = ltdc_pins[i].pin;
HAL_GPIO_Init(ltdc_pins[i].port, &GPIO_InitStructure);
} }
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
#if defined(OMV_LCD_DISP_PIN) #if defined(OMV_LCD_DISP_PIN)
GPIO_InitStructure.Pin = OMV_LCD_DISP_PIN; omv_gpio_config(OMV_LCD_DISP_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
HAL_GPIO_Init(OMV_LCD_DISP_PORT, &GPIO_InitStructure); omv_gpio_write(OMV_LCD_DISP_PIN, 0);
OMV_LCD_DISP_OFF();
#endif #endif
#if defined(OMV_LCD_BL_PIN) #if defined(OMV_LCD_BL_PIN)
GPIO_InitStructure.Pin = OMV_LCD_BL_PIN; omv_gpio_config(OMV_LCD_BL_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
HAL_GPIO_Init(OMV_LCD_BL_PORT, &GPIO_InitStructure); omv_gpio_write(OMV_LCD_BL_PIN, 0);
OMV_LCD_BL_OFF();
#endif #endif
} }
#endif #endif
@ -719,16 +571,16 @@ void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef *hltdc)
OMV_LCD_RELEASE_RESET(); OMV_LCD_RELEASE_RESET();
OMV_LCD_CLK_DISABLE(); OMV_LCD_CLK_DISABLE();
for (int i = 0, ii = sizeof(ltdc_pins) / sizeof(ltdc_gpio_t); i < ii; i++) { for (int i=0; i<OMV_ARRAY_SIZE(ltdc_pins); i++) {
HAL_GPIO_DeInit(ltdc_pins[i].port, ltdc_pins[i].pin); omv_gpio_deinit(ltdc_pins[i]);
} }
#if defined(OMV_LCD_DISP_PIN) #if defined(OMV_LCD_DISP_PIN)
HAL_GPIO_DeInit(OMV_LCD_DISP_PORT, OMV_LCD_DISP_PIN); omv_gpio_deinit(OMV_LCD_DISP_PIN);
#endif #endif
#if defined(OMV_LCD_BL_PIN) #if defined(OMV_LCD_BL_PIN)
HAL_GPIO_DeInit(OMV_LCD_BL_PORT, OMV_LCD_BL_PIN); omv_gpio_deinit(OMV_LCD_BL_PIN);
#endif #endif
} }
#endif #endif

View File

@ -8,12 +8,13 @@
* *
* USB3320 ULPI functions ported from stm32f7xx_lp_modes.c * USB3320 ULPI functions ported from stm32f7xx_lp_modes.c
*/ */
#include <stdint.h>
#include "ulpi.h"
#include "omv_boardconfig.h" #include "omv_boardconfig.h"
#if (OMV_USB_ULPI == 1) #if (OMV_USB_ULPI == 1)
#include STM32_HAL_H #include STM32_HAL_H
#include <stdint.h>
#include "ulpi.h"
#include "omv_gpio.h"
#define USBULPI_PHYCR ((uint32_t)(0x40040000 + 0x034)) #define USBULPI_PHYCR ((uint32_t)(0x40040000 + 0x034))
#define USBULPI_D07 ((uint32_t)0x000000FF) #define USBULPI_D07 ((uint32_t)0x000000FF)
@ -158,44 +159,26 @@ void ulpi_enter_low_power(void)
*/ */
void ulpi_leave_low_power(void) void ulpi_leave_low_power(void)
{ {
GPIO_InitTypeDef GPIO_InitStruct;
/* Enable GPIO clock for OTG USB STP pin */ /* Enable GPIO clock for OTG USB STP pin */
__HAL_RCC_GPIOC_CLK_ENABLE(); omv_gpio_clock_enable(OMV_USB_ULPI_STP_PIN, true);
OMV_USB_ULPI_DIR_CLK_ENABLE(); omv_gpio_clock_enable(OMV_USB_ULPI_DIR_PIN, true);
/* Set OTG STP pin as GP Output */ /* Configure OTG STP and DIR pin as GP Output */
GPIO_InitStruct.Pin = GPIO_PIN_0; omv_gpio_config(OMV_USB_ULPI_STP_PIN, OMV_GPIO_MODE_OUTPUT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; omv_gpio_config(OMV_USB_ULPI_DIR_PIN, OMV_GPIO_MODE_INPUT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_LOW, -1);
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = OMV_USB_ULPI_DIR_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
HAL_GPIO_Init(OMV_USB_ULPI_DIR_PORT, &GPIO_InitStruct);
/* Set OTG STP pin to High */ /* Set OTG STP pin to High */
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_0, GPIO_PIN_SET); omv_gpio_write(OMV_USB_ULPI_STP_PIN, 1);
/* Wait for DIR to go low */ /* Wait for DIR to go low */
for (uint32_t ticks = HAL_GetTick(); for (uint32_t ticks = HAL_GetTick();
((HAL_GetTick() - ticks) < 500) ((HAL_GetTick() - ticks) < 500)
&& HAL_GPIO_ReadPin(OMV_USB_ULPI_DIR_PORT, OMV_USB_ULPI_DIR_PIN);) { && omv_gpio_read(OMV_USB_ULPI_DIR_PIN);) {
__WFI(); __WFI();
} }
GPIO_InitStruct.Pin = GPIO_PIN_0; /* Configure OTG STP and DIR pin as USB AF */
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; omv_gpio_config(OMV_USB_ULPI_STP_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_MAX, -1);
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS; omv_gpio_config(OMV_USB_ULPI_DIR_PIN, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_MAX, -1);
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = OMV_USB_ULPI_DIR_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
HAL_GPIO_Init(OMV_USB_ULPI_DIR_PORT, &GPIO_InitStruct);
} }
#endif // (OMV_USB_ULPI == 1) #endif // (OMV_USB_ULPI == 1)

View File

@ -10,16 +10,18 @@
*/ */
#include "omv_boardconfig.h" #include "omv_boardconfig.h"
#if (OMV_ENABLE_LEPTON == 1) #if (OMV_ENABLE_LEPTON == 1)
#include <stdio.h>
#include STM32_HAL_H #include STM32_HAL_H
#include <stdio.h>
#include "py/mphal.h"
#include "irq.h" #include "irq.h"
#include "cambus.h" #include "cambus.h"
#include "sensor.h" #include "sensor.h"
#include "py/mphal.h"
#include "framebuffer.h" #include "framebuffer.h"
#include "common.h" #include "common.h"
#include "dma_alloc.h" #include "dma_alloc.h"
#include "omv_gpio.h"
#include "crc16.h" #include "crc16.h"
#include "LEPTON_SDK.h" #include "LEPTON_SDK.h"
@ -103,10 +105,10 @@ static uint16_t lepton_calc_crc(uint8_t *buf)
static int sleep(sensor_t *sensor, int enable) static int sleep(sensor_t *sensor, int enable)
{ {
if (enable) { if (enable) {
DCMI_PWDN_LOW(); omv_gpio_write(DCMI_POWER_PIN, 0);
mp_hal_delay_ms(100); mp_hal_delay_ms(100);
} else { } else {
DCMI_PWDN_HIGH(); omv_gpio_write(DCMI_POWER_PIN, 1);
mp_hal_delay_ms(100); mp_hal_delay_ms(100);
} }
@ -330,16 +332,16 @@ static int ioctl(sensor_t *sensor, int request, va_list ap)
static int lepton_reset(sensor_t *sensor, bool measurement_mode, bool high_temp_mode) static int lepton_reset(sensor_t *sensor, bool measurement_mode, bool high_temp_mode)
{ {
DCMI_PWDN_LOW(); omv_gpio_write(DCMI_POWER_PIN, 0);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
DCMI_PWDN_HIGH(); omv_gpio_write(DCMI_POWER_PIN, 1);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
DCMI_RESET_LOW(); omv_gpio_write(DCMI_RESET_PIN, 0);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
DCMI_RESET_HIGH(); omv_gpio_write(DCMI_RESET_PIN, 1);
mp_hal_delay_ms(1000); mp_hal_delay_ms(1000);
LEP_RAD_ENABLE_E rad; LEP_RAD_ENABLE_E rad;

View File

@ -36,14 +36,15 @@
#if (OMV_ENABLE_PAJ6100 == 1) #if (OMV_ENABLE_PAJ6100 == 1)
#include <stdio.h> #include <stdio.h>
#include <stdbool.h> #include <stdbool.h>
#include "py/mphal.h"
#include "sensor.h" #include "sensor.h"
#include "framebuffer.h" #include "framebuffer.h"
#include "omv_gpio.h"
#include "paj6100.h" #include "paj6100.h"
#include "paj6100_reg.h" #include "paj6100_reg.h"
#include "pixspi.h" #include "pixspi.h"
#include "py/mphal.h"
#define CACHE_BANK #define CACHE_BANK
@ -90,13 +91,13 @@ static int get_gain_db(sensor_t *sensor, float *gain_db);
static int bank_switch(uint8_t bank) static int bank_switch(uint8_t bank)
{ {
#ifdef CACHE_BANK #ifdef CACHE_BANK
if (bank_cache == bank) if (bank_cache == bank) {
return 0; return 0;
#endif }
#endif
if (pixspi_regs_write(REG_BANK_SWITCH, &bank, 1)) if (pixspi_regs_write(REG_BANK_SWITCH, &bank, 1)) {
{
printf("Bank switch failed.\n"); printf("Bank switch failed.\n");
return -1; return -1;
} }
@ -121,14 +122,12 @@ static int init_sensor(sensor_t * sensor)
#define ta_seq low_active_R_ABC_Avg_UBx50_T_BLACINV_EnHx1_T_SIG_REFx1 #define ta_seq low_active_R_ABC_Avg_UBx50_T_BLACINV_EnHx1_T_SIG_REFx1
int arr_size = sizeof(ta_seq)/sizeof(ta_seq[0]); int arr_size = sizeof(ta_seq)/sizeof(ta_seq[0]);
for (int i=0; i<arr_size; i+=2) for (int i=0; i<arr_size; i+=2) {
{
#ifndef DEBUG #ifndef DEBUG
int int
#endif #endif
init_res = pixspi_regs_write(ta_seq[i], &ta_seq[i+1], 1); init_res = pixspi_regs_write(ta_seq[i], &ta_seq[i+1], 1);
if (init_res) if (init_res) {
{
return init_res; return init_res;
} }
} }
@ -146,43 +145,40 @@ static int set_exposure(sensor_t *sensor, int exp_us, bool protected)
uint32_t cmd_expo /* 24-bit available */; uint32_t cmd_expo /* 24-bit available */;
uint16_t exp_offset; uint16_t exp_offset;
#ifdef DEBUG_AE #ifdef DEBUG_AE
printf("set_exposure() = %d\n", exp_us); printf("set_exposure() = %d\n", exp_us);
#endif #endif
if (exp_us == 0) if (exp_us == 0) {
return 0; return 0;
}
if (exp_us >= EXPOSURE_BASE) if (exp_us >= EXPOSURE_BASE) {
{
int param; int param;
if (sensor->framesize == FRAMESIZE_QVGA) if (sensor->framesize == FRAMESIZE_QVGA) {
param = 88803; param = 88803;
else if (sensor->framesize == FRAMESIZE_QQVGA) } else if (sensor->framesize == FRAMESIZE_QQVGA) {
param = 29139; // QQVGA param = 29139; // QQVGA
else } else {
param = 88803; param = 88803;
}
int max_cmd_expo = R_FrameTime - param; int max_cmd_expo = R_FrameTime - param;
cmd_expo = (exp_us - EXPOSURE_BASE) * ((float)PAJ6100_XCLK_FREQ/1000000) + 0.5f; cmd_expo = (exp_us - EXPOSURE_BASE) * ((float)PAJ6100_XCLK_FREQ/1000000) + 0.5f;
if (protected) if (protected) {
{ if (cmd_expo > max_cmd_expo) {
if (cmd_expo > max_cmd_expo)
{
cmd_expo = max_cmd_expo; cmd_expo = max_cmd_expo;
exp_us = (cmd_expo + 3642) / ((float)PAJ6100_XCLK_FREQ/1000000) + 0.5f; exp_us = (cmd_expo + 3642) / ((float)PAJ6100_XCLK_FREQ/1000000) + 0.5f;
printf("Exposure time overflow, reset to %dus.\n", exp_us); printf("Exposure time overflow, reset to %dus.\n", exp_us);
} }
} }
exp_offset = 0; exp_offset = 0;
} } else {
else
{
cmd_expo = 0; cmd_expo = 0;
exp_offset = (EXPOSURE_BASE - exp_us) * ((float)PAJ6100_XCLK_FREQ/1000000) + 0.5; exp_offset = (EXPOSURE_BASE - exp_us) * ((float)PAJ6100_XCLK_FREQ/1000000) + 0.5;
} }
#ifdef DEBUG_AE #ifdef DEBUG_AE
printf("target - cmd_exp: %ld, exp_offset: %d\n", cmd_expo, exp_offset); printf("target - cmd_exp: %ld, exp_offset: %d\n", cmd_expo, exp_offset);
#endif #endif
uint8_t buff[3] = { uint8_t buff[3] = {
(uint8_t)(cmd_expo & 0xff), (uint8_t)(cmd_expo & 0xff),
(uint8_t)((cmd_expo >> 8) & 0xff), (uint8_t)((cmd_expo >> 8) & 0xff),
@ -196,8 +192,7 @@ static int set_exposure(sensor_t *sensor, int exp_us, bool protected)
buff[0] = 1; buff[0] = 1;
ret |= write_regs_w_bank(BANK_1, REG_ISP_UPDATE, buff, 1); ret |= write_regs_w_bank(BANK_1, REG_ISP_UPDATE, buff, 1);
if (ret) if (ret) {
{
printf("Failed to write cmd_expo or exp_offset.\n"); printf("Failed to write cmd_expo or exp_offset.\n");
return -1; return -1;
} }
@ -212,35 +207,31 @@ static int get_exposure(sensor_t *sensor)
uint32_t cmd_expo /* 24-bit available */; uint32_t cmd_expo /* 24-bit available */;
uint16_t exp_offset; uint16_t exp_offset;
if (exp_us_cache >= 0) if (exp_us_cache >= 0) {
return exp_us_cache; return exp_us_cache;
}
ret = read_regs_w_bank(BANK_0, REG_CMD_EXPO_L, buff, 3); ret = read_regs_w_bank(BANK_0, REG_CMD_EXPO_L, buff, 3);
if (ret) if (ret) {
{
printf("Read cmd_expo failed.\n"); printf("Read cmd_expo failed.\n");
return -1; return -1;
} }
cmd_expo = buff[0] + (((uint32_t)buff[1]) << 8) + (((uint32_t)buff[2]) << 16); cmd_expo = buff[0] + (((uint32_t)buff[1]) << 8) + (((uint32_t)buff[2]) << 16);
ret = read_regs_w_bank(BANK_0, REG_EXP_OFFSET_L, buff, 2); ret = read_regs_w_bank(BANK_0, REG_EXP_OFFSET_L, buff, 2);
if (ret) if (ret) {
{
printf("Read exp_offset failed.\n"); printf("Read exp_offset failed.\n");
return -1; return -1;
} }
exp_offset = buff[0] + (((uint16_t)buff[1]) << 8); exp_offset = buff[0] + (((uint16_t)buff[1]) << 8);
#ifdef DEBUG_AE #ifdef DEBUG_AE
printf("cmd_exp: %ld, exp_offset: %d\n", cmd_expo, exp_offset); printf("cmd_exp: %ld, exp_offset: %d\n", cmd_expo, exp_offset);
#endif #endif
if (exp_offset == 0) if (exp_offset == 0) {
{
exp_us_cache = (cmd_expo + 3642) / (PAJ6100_XCLK_FREQ/1000000); exp_us_cache = (cmd_expo + 3642) / (PAJ6100_XCLK_FREQ/1000000);
} } else {
else
{
exp_us_cache = (3642 - exp_offset) / (PAJ6100_XCLK_FREQ/1000000); exp_us_cache = (3642 - exp_offset) / (PAJ6100_XCLK_FREQ/1000000);
} }
@ -258,30 +249,25 @@ static void blc_freeze(bool enable)
static void auto_exposure(sensor_t *sensor) static void auto_exposure(sensor_t *sensor)
{ {
if (!is_ae_enabled) if (!is_ae_enabled) {
return; return;
}
if (skip_frame) if (skip_frame) {
{
--skip_frame; --skip_frame;
return; return;
} }
if ((lt_lockrange_in_lbound <= l_total) && (l_total <= lt_lockrange_in_ubound)) if ((lt_lockrange_in_lbound <= l_total) && (l_total <= lt_lockrange_in_ubound)) {
{
ae_converged_flag = true; ae_converged_flag = true;
} } else if ((l_total > lt_lockrange_out_ubound) || (l_total < lt_lockrange_out_lbound)) {
else if ((l_total > lt_lockrange_out_ubound) || (l_total < lt_lockrange_out_lbound))
{
ae_converged_flag = false; ae_converged_flag = false;
} }
blc_freeze(ae_converged_flag); blc_freeze(ae_converged_flag);
if (ae_converged_flag == false) if (ae_converged_flag == false) {
{
float gain_db = 0; float gain_db = 0;
if (get_gain_db(sensor, &gain_db)) if (get_gain_db(sensor, &gain_db)) {
{
printf("Get Gain DB failed.\n"); printf("Get Gain DB failed.\n");
return; return;
} }
@ -301,26 +287,25 @@ static void auto_exposure(sensor_t *sensor)
} }
int expo = get_exposure(sensor); int expo = get_exposure(sensor);
if (expo < 0) if (expo < 0) {
{
printf("Get exposure failed.\n"); printf("Get exposure failed.\n");
return; return;
} }
#ifdef DEBUG_AE #ifdef DEBUG_AE
printf("Current Gain: %ldx, Expo: %d\n", gain, expo); printf("Current Gain: %ldx, Expo: %d\n", gain, expo);
#endif #endif
uint32_t GEP = gain * expo; uint32_t GEP = gain * expo;
float l_ratio = ((float)l_target_total) / l_total; float l_ratio = ((float)l_target_total) / l_total;
float GEP_target = GEP * l_ratio; float GEP_target = GEP * l_ratio;
uint32_t expo_target = IM_MIN(IM_MAX(fast_roundf(GEP_target / R_AE_MinGain), R_AE_MinExpoTime), R_AE_MaxExpoTime); uint32_t expo_target = IM_MIN(IM_MAX(fast_roundf(GEP_target / R_AE_MinGain), R_AE_MinExpoTime), R_AE_MaxExpoTime);
#ifdef DEBUG_AE #ifdef DEBUG_AE
printf("GEP: %ld ", GEP); printf("GEP: %ld ", GEP);
printf("GEP_target: %d (x1000), L_Ratio: %d (x1000)\n", printf("GEP_target: %d (x1000), L_Ratio: %d (x1000)\n",
(int)(GEP_target*1000), (int)(l_ratio*1000)); (int)(GEP_target*1000), (int)(l_ratio*1000));
printf("1st Expo Target: %ld (max: %ld) ", expo_target, R_AE_MaxExpoTime); printf("1st Expo Target: %ld (max: %ld) ", expo_target, R_AE_MaxExpoTime);
#endif #endif
uint32_t gain_target; uint32_t gain_target;
float tmp_gain = GEP_target/expo_target; float tmp_gain = GEP_target/expo_target;
if (tmp_gain <= 1) gain_target = 1; if (tmp_gain <= 1) gain_target = 1;
@ -330,10 +315,10 @@ static void auto_exposure(sensor_t *sensor)
//gain_target = IM_MIN(IM_MAX(fast_ceilf(GEP_target/expo_target), R_AE_MinGain), R_AE_MaxGain); //gain_target = IM_MIN(IM_MAX(fast_ceilf(GEP_target/expo_target), R_AE_MinGain), R_AE_MaxGain);
gain_db = 20 * (fast_log((float)gain_target)/fast_log(10.0)); gain_db = 20 * (fast_log((float)gain_target)/fast_log(10.0));
expo_target = IM_MIN(IM_MAX(fast_roundf(GEP_target / gain_target), R_AE_MinExpoTime), R_AE_MaxExpoTime); expo_target = IM_MIN(IM_MAX(fast_roundf(GEP_target / gain_target), R_AE_MinExpoTime), R_AE_MaxExpoTime);
#ifdef DEBUG_AE #ifdef DEBUG_AE
printf("Gain Target: %ld (%d DB (x1000))\n", gain_target, (int)(gain_db*1000)); printf("Gain Target: %ld (%d DB (x1000))\n", gain_target, (int)(gain_db*1000));
printf("Final Expo Target: %ld (max: %ld) \n", expo_target, R_AE_MaxExpoTime); printf("Final Expo Target: %ld (max: %ld) \n", expo_target, R_AE_MaxExpoTime);
#endif #endif
set_exposure(sensor, expo_target, false); set_exposure(sensor, expo_target, false);
set_auto_gain(sensor, false, gain_db, 0); set_auto_gain(sensor, false, gain_db, 0);
skip_frame = 0; skip_frame = 0;
@ -395,8 +380,9 @@ static int read_reg(sensor_t *sensor, uint16_t reg_addr)
{ {
uint8_t data; uint8_t data;
if (pixspi_regs_read((uint8_t)reg_addr, &data, 1)) if (pixspi_regs_read((uint8_t)reg_addr, &data, 1)) {
return -1; return -1;
}
return data; return data;
} }
@ -412,8 +398,9 @@ static int write_reg(sensor_t *sensor, uint16_t reg_addr, uint16_t reg_data)
static int set_pixformat(sensor_t *sensor, pixformat_t pixformat) static int set_pixformat(sensor_t *sensor, pixformat_t pixformat)
{ {
if (pixformat != PIXFORMAT_GRAYSCALE) if (pixformat != PIXFORMAT_GRAYSCALE) {
return -1; return -1;
}
return 0; return 0;
} }
@ -429,14 +416,12 @@ static int set_framesize(sensor_t *sensor, framesize_t framesize)
ret |= read_regs_w_bank(BANK_0, REG_ABC_START_LINE, &abc_start_line, 1); ret |= read_regs_w_bank(BANK_0, REG_ABC_START_LINE, &abc_start_line, 1);
ret |= read_regs_w_bank(BANK_1, REG_ABC_SAMPLE_SIZE, &abc_sample_size, 1); ret |= read_regs_w_bank(BANK_1, REG_ABC_SAMPLE_SIZE, &abc_sample_size, 1);
if (ret) if (ret) {
{
printf("Failed to read Average mode registers.\n"); printf("Failed to read Average mode registers.\n");
return -1; return -1;
} }
switch (framesize) switch (framesize) {
{
case FRAMESIZE_QVGA: case FRAMESIZE_QVGA:
aavg_VnH &= ~((1 << 3) | (1 << 2)); aavg_VnH &= ~((1 << 3) | (1 << 2));
abc_start_line = (abc_start_line & ~(0x07 << 1)) | (2 << 1); abc_start_line = (abc_start_line & ~(0x07 << 1)) | (2 << 1);
@ -463,8 +448,7 @@ static int set_framesize(sensor_t *sensor, framesize_t framesize)
ret |= write_regs_w_bank(BANK_1, REG_CP_WOI_VOFFSET, &voffset, 1); ret |= write_regs_w_bank(BANK_1, REG_CP_WOI_VOFFSET, &voffset, 1);
ret |= write_regs_w_bank(BANK_1, REG_ABC_SAMPLE_SIZE, &abc_sample_size, 1); ret |= write_regs_w_bank(BANK_1, REG_ABC_SAMPLE_SIZE, &abc_sample_size, 1);
if (ret) if (ret) {
{
printf("Failed to write Average mode registers.\n"); printf("Failed to write Average mode registers.\n");
return -1; return -1;
} }
@ -506,8 +490,9 @@ static int set_special_effect(sensor_t *sensor, sde_t sde)
static int set_auto_gain(sensor_t *sensor, int enable, static int set_auto_gain(sensor_t *sensor, int enable,
float gain_db, float gain_db_ceiling) float gain_db, float gain_db_ceiling)
{ {
if (enable) if (enable) {
return 0; return 0;
}
int ret = 0; int ret = 0;
uint8_t val, fgh, ggh; uint8_t val, fgh, ggh;
@ -564,8 +549,7 @@ static int get_gain_db(sensor_t *sensor, float *gain_db)
if (ggh == 0 && fgh == 0) { if (ggh == 0 && fgh == 0) {
*gain_db = 0; *gain_db = 0;
} else if (ggh == 1) { } else if (ggh == 1) {
switch (fgh) switch (fgh) {
{
case 0: case 0:
*gain_db = 6; *gain_db = 6;
break; break;
@ -575,8 +559,7 @@ static int get_gain_db(sensor_t *sensor, float *gain_db)
case 3: case 3:
*gain_db = 18; *gain_db = 18;
break; break;
default: default: {
{
printf("Read a undefined FGH value (%d).\n", fgh); printf("Read a undefined FGH value (%d).\n", fgh);
return -1; return -1;
} }
@ -599,8 +582,7 @@ static int set_auto_exposure(sensor_t *sensor, int enable, int exposure_us)
static int get_exposure_us(sensor_t *sensor, int *exposure_us) { static int get_exposure_us(sensor_t *sensor, int *exposure_us) {
int ret = get_exposure(sensor); int ret = get_exposure(sensor);
if (ret >= 0) if (ret >= 0) {
{
*exposure_us = ret; *exposure_us = ret;
return 0; return 0;
} }
@ -665,13 +647,13 @@ static int reset(sensor_t *sensor)
bank_cache = -1; bank_cache = -1;
exp_us_cache = -1; exp_us_cache = -1;
#ifdef DEBUG #ifdef DEBUG
uint8_t part_id_l = 0, part_id_h = 0; uint8_t part_id_l = 0, part_id_h = 0;
read_regs_w_bank(0, 0x00, &part_id_l, 1); read_regs_w_bank(0, 0x00, &part_id_l, 1);
read_regs_w_bank(0, 0x01, &part_id_h, 1); read_regs_w_bank(0, 0x01, &part_id_h, 1);
printf("Part ID 0x%x 0x%x\n", part_id_l, part_id_h); printf("Part ID 0x%x 0x%x\n", part_id_l, part_id_h);
printf("init_res: %d\n", init_res); printf("init_res: %d\n", init_res);
#endif #endif
// Re-init sensor every time. // Re-init sensor every time.
init_sensor(sensor); init_sensor(sensor);
@ -705,12 +687,12 @@ static int reset(sensor_t *sensor)
static int paj6100_snapshot(sensor_t *sensor, image_t *image, uint32_t flags) static int paj6100_snapshot(sensor_t *sensor, image_t *image, uint32_t flags)
{ {
int res = sensor_snapshot(sensor, image, flags); int res = sensor_snapshot(sensor, image, flags);
if (res == 0) if (res == 0) {
{
l_total = 0; l_total = 0;
int iml = image->h * image->w; int iml = image->h * image->w;
for (int i=0; i<iml; ++i) for (int i=0; i<iml; ++i) {
l_total += image->data[i]; l_total += image->data[i];
}
// PAJ6100 doesn't support HW auto-exposure, // PAJ6100 doesn't support HW auto-exposure,
// we provide a software implementation. // we provide a software implementation.
auto_exposure(sensor); auto_exposure(sensor);
@ -764,23 +746,22 @@ bool paj6100_detect(sensor_t *sensor)
int ret = 0; int ret = 0;
uint8_t part_id_l, part_id_h; uint8_t part_id_l, part_id_h;
DCMI_RESET_HIGH(); omv_gpio_write(DCMI_RESET_PIN, 1);
mp_hal_delay_ms(10); mp_hal_delay_ms(10);
if (!pixspi_init()) if (!pixspi_init()) {
{
printf("Initial pixspi failed.\n"); printf("Initial pixspi failed.\n");
return false; return false;
} }
ret |= pixspi_regs_read(0x00, &part_id_l, 1); ret |= pixspi_regs_read(0x00, &part_id_l, 1);
ret |= pixspi_regs_read(0x01, &part_id_h, 1); ret |= pixspi_regs_read(0x01, &part_id_h, 1);
#ifdef DEBUG #ifdef DEBUG
printf("Part ID 0x%x 0x%x\n", part_id_l, part_id_h); printf("Part ID 0x%x 0x%x\n", part_id_l, part_id_h);
#endif #endif
if (ret == 0 && if (ret == 0 && (part_id_l == 0x00 && part_id_h == 0x61)) {
(part_id_l == 0x00 && part_id_h == 0x61))
return true; // Got you. return true; // Got you.
}
pixspi_release(); pixspi_release();
return false; return false;