Add support for OpenMV2

This commit is contained in:
iabdalkader 2015-05-01 04:44:31 +03:00
parent 26425fa66e
commit 57cccca3f3
10 changed files with 74 additions and 108 deletions

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@ -25,7 +25,7 @@ MICROPY_DIR=micropython
OMV_DIR=omv
# Target
TARGET ?= OPENMV1
TARGET ?= OPENMV2
# Debugging/Optimization
ifeq ($(DEBUG), 1)
@ -48,7 +48,7 @@ CFLAGS += -DARM_MATH_CM4 -D__FPU_PRESENT=1 -D__FPU_USED=1 -DUSE_USB_FS -DUSE_DEV
ifeq ($(TARGET), OPENMV1)
CFLAGS += -DSTM32F407xx
else
CFLAGS += -DSTM32F429xx
CFLAGS += -DSTM32F427xx
endif
CFLAGS += -I. -Iinclude
@ -111,7 +111,6 @@ OBJ += $(addprefix $(BUILD)/$(OMV_DIR)/, \
)
else
OBJ += $(addprefix $(BUILD)/$(OMV_DIR)/, \
sdram.o \
sdcard_sdio.o \
)
endif
@ -154,7 +153,7 @@ OBJ += $(addprefix $(BUILD)/$(CMSIS_DIR)/src/st/,\
else
OBJ += $(addprefix $(BUILD)/$(CMSIS_DIR)/src/st/,\
system_stm32f4xx.o \
startup_stm32f429xx.o \
startup_stm32f427xx.o \
)
endif
@ -189,6 +188,7 @@ OBJ += $(addprefix $(BUILD)/$(MICROPY_DIR)/,\
rtc.o \
irq.o \
adc.o \
dac.o \
uart.o \
systick.o \
i2c.o \

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@ -2,7 +2,7 @@
ifeq ($(TARGET), OPENMV1)
SRC_S = src/st/startup_stm32f407xx.s
else
SRC_S = src/st/startup_stm32f429xx.s
SRC_S = src/st/startup_stm32f427xx.s
endif
SRC_C = src/st/system_stm32f4xx.c

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@ -76,7 +76,34 @@ defined in linker script */
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r0,=0x20002000 /* load magic number location */
ldr r2,[r0, #0]
str r0,[r0, #0] /* invalidate */
ldr r1,=0xDEADBEEF /* if magic number found */
cmp r2,r1
bne EnableCCM /* run the bootloader, else... */
Reboot_Loader:
ldr r0, =0x40023844 /* RCC_APB2ENR */
ldr r1, =0x00004000 /* enable SYSCFG clock */
str r1, [r0, #0]
ldr r0, =0x40013800 /* SYSCFG_MEMRMP */
ldr r1, =0x00000001 /* remap ROM at zero */
str r1, [r0, #0]
ldr r0,=0x1FFF0000
ldr sp,[r0, #0] /* 0x20002d40 */
ldr r0,[r0, #4]
bx r0
EnableCCM:
/* enable ccm clock */
ldr r0,=0x40023830
ldr r3,[r0]
orr r3, r3, #1048576 /* 0x100000 */
str r3,[r0]
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
@ -110,7 +137,7 @@ LoopFillZerobss:
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* bl __libc_init_array */
/* Call the application's entry point.*/
bl main
bx lr

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@ -556,7 +556,7 @@ void SystemClock_Config(void)
Error_Handler();
}
#ifdef STM32F429xx
#if defined(STM32F427xx) || defined(STM32F429xx)
if(HAL_PWREx_ActivateOverDrive() != HAL_OK) {
/* Initialization Error */
Error_Handler();

@ -1 +1 @@
Subproject commit a80252b42837ddda74333a7683a6ab79440b5199
Subproject commit ce13e9a9b19259ec9c76201785ea5b0fc6daab0c

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@ -19,7 +19,6 @@ SRCS += $(addprefix , \
)
else
SRCS += $(addprefix , \
sdram.c \
sdcard_sdio.c \
)
endif

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@ -140,35 +140,6 @@ typedef enum {
#define SD_SELECT() HAL_GPIO_WritePin(SD_CS_PORT, SD_CS_PIN, GPIO_PIN_RESET)
#define SD_DESELECT() HAL_GPIO_WritePin(SD_CS_PORT, SD_CS_PIN, GPIO_PIN_SET)
/* Wlan */
#define WLAN_SPI SPI3
#define WLAN_SPI_AF (GPIO_AF6_SPI3)
#define WLAN_IRQn (EXTI15_10_IRQn)
#define WLAN_IRQHandler (EXTI15_10_IRQHandler)
#define WLAN_EXTI_LINE (1<<11)
#define WLAN_CS_PIN (GPIO_PIN_15)
#define WLAN_EN_PIN (GPIO_PIN_10)
#define WLAN_IRQ_PIN (GPIO_PIN_11)
#define WLAN_SCLK_PIN (GPIO_PIN_10)
#define WLAN_MISO_PIN (GPIO_PIN_11)
#define WLAN_MOSI_PIN (GPIO_PIN_12)
#define WLAN_CS_PORT (GPIOA)
#define WLAN_EN_PORT (GPIOB)
#define WLAN_IRQ_PORT (GPIOB)
#define WLAN_SCLK_PORT (GPIOC)
#define WLAN_MISO_PORT (GPIOC)
#define WLAN_MOSI_PORT (GPIOC)
#define WLAN_SPI_CLK_ENABLE() __SPI3_CLK_ENABLE()
#define WLAN_SPI_CLK_DISABLE() __SPI3_CLK_DISABLE()
#define WLAN_SELECT() HAL_GPIO_WritePin(WLAN_CS_PORT, WLAN_CS_PIN, GPIO_PIN_RESET)
#define WLAN_DESELECT() HAL_GPIO_WritePin(WLAN_CS_PORT, WLAN_CS_PIN, GPIO_PIN_SET)
#define __WLAN_DISABLE() HAL_GPIO_WritePin(WLAN_EN_PORT, WLAN_EN_PIN, GPIO_PIN_RESET)
#else //OPENMV2
/* GPIOs */
@ -203,13 +174,13 @@ typedef enum {
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB4), MP_OBJ_NEW_SMALL_INT(GPIO_PD13)}
/* SCCB/I2C */
#define SCCB_I2C (I2C2)
#define SCCB_AF (GPIO_AF4_I2C2)
#define SCCB_CLK_ENABLE() __I2C2_CLK_ENABLE()
#define SCCB_CLK_DISABLE() __I2C2_CLK_DISABLE()
#define SCCB_I2C (I2C1)
#define SCCB_AF (GPIO_AF4_I2C1)
#define SCCB_CLK_ENABLE() __I2C1_CLK_ENABLE()
#define SCCB_CLK_DISABLE() __I2C1_CLK_DISABLE()
#define SCCB_PORT (GPIOB)
#define SCCB_SCL_PIN (GPIO_PIN_10)
#define SCCB_SDA_PIN (GPIO_PIN_11)
#define SCCB_SCL_PIN (GPIO_PIN_8)
#define SCCB_SDA_PIN (GPIO_PIN_9)
/* SPI */
#define USR_SPI (SPI4)
@ -246,29 +217,35 @@ typedef enum {
#define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE()
#define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE()
#define DCMI_RESET_PIN (GPIO_PIN_15)
#define DCMI_RESET_PIN (GPIO_PIN_10)
#define DCMI_RESET_PORT (GPIOA)
#define DCMI_PWDN_PIN (GPIO_PIN_10)
#define DCMI_PWDN_PORT (GPIOA)
#define DCMI_PWDN_PIN (GPIO_PIN_5)
#define DCMI_PWDN_PORT (GPIOB)
#define DCMI_FREX_PIN (GPIO_PIN_9)
#define DCMI_FREX_PORT (GPIOD)
#define DCMI_EXPST_PIN (GPIO_PIN_8)
#define DCMI_EXPST_PORT (GPIOD)
#define DCMI_D0_PIN (GPIO_PIN_6)
#define DCMI_D1_PIN (GPIO_PIN_7)
#define DCMI_D2_PIN (GPIO_PIN_10)
#define DCMI_D3_PIN (GPIO_PIN_11)
#define DCMI_D2_PIN (GPIO_PIN_0)
#define DCMI_D3_PIN (GPIO_PIN_1)
#define DCMI_D4_PIN (GPIO_PIN_4)
#define DCMI_D5_PIN (GPIO_PIN_3)
#define DCMI_D6_PIN (GPIO_PIN_8)
#define DCMI_D7_PIN (GPIO_PIN_9)
#define DCMI_D5_PIN (GPIO_PIN_6)
#define DCMI_D6_PIN (GPIO_PIN_5)
#define DCMI_D7_PIN (GPIO_PIN_6)
#define DCMI_D0_PORT (GPIOC)
#define DCMI_D1_PORT (GPIOC)
#define DCMI_D2_PORT (GPIOG)
#define DCMI_D3_PORT (GPIOG)
#define DCMI_D2_PORT (GPIOE)
#define DCMI_D3_PORT (GPIOE)
#define DCMI_D4_PORT (GPIOE)
#define DCMI_D5_PORT (GPIOD)
#define DCMI_D6_PORT (GPIOB)
#define DCMI_D7_PORT (GPIOB)
#define DCMI_D5_PORT (GPIOB)
#define DCMI_D6_PORT (GPIOE)
#define DCMI_D7_PORT (GPIOE)
#define DCMI_HSYNC_PIN (GPIO_PIN_4)
#define DCMI_VSYNC_PIN (GPIO_PIN_7)
@ -284,37 +261,14 @@ typedef enum {
#define DCMI_PWDN_LOW() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_RESET)
#define DCMI_PWDN_HIGH() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_SET)
/* Wlan */
#define WLAN_SPI SPI3
#define WLAN_SPI_AF (GPIO_AF6_SPI3)
#define WLAN_IRQn (EXTI15_10_IRQn)
#define WLAN_IRQHandler (EXTI15_10_IRQHandler)
#define WLAN_EXTI_LINE (1<<11)
#define DCMI_FREX_LOW() HAL_GPIO_WritePin(DCMI_FREX_PORT, DCMI_FREX_PIN, GPIO_PIN_RESET)
#define DCMI_FREX_HIGH() HAL_GPIO_WritePin(DCMI_FREX_PORT, DCMI_FREX_PIN, GPIO_PIN_SET)
#define WLAN_CS_PIN (GPIO_PIN_15)
#define WLAN_EN_PIN (GPIO_PIN_10)
#define WLAN_IRQ_PIN (GPIO_PIN_11)
#define WLAN_SCLK_PIN (GPIO_PIN_10)
#define WLAN_MISO_PIN (GPIO_PIN_11)
#define WLAN_MOSI_PIN (GPIO_PIN_12)
#define DCMI_EXPST_LOW() HAL_GPIO_WritePin(DCMI_EXPST_PORT, DCMI_EXPST_PIN, GPIO_PIN_RESET)
#define DCMI_EXPST_HIGH() HAL_GPIO_WritePin(DCMI_EXPST_PORT, DCMI_EXPST_PIN, GPIO_PIN_SET)
#define WLAN_CS_PORT (GPIOA)
#define WLAN_EN_PORT (GPIOB)
#define WLAN_IRQ_PORT (GPIOB)
#define WLAN_SCLK_PORT (GPIOC)
#define WLAN_MISO_PORT (GPIOC)
#define WLAN_MOSI_PORT (GPIOC)
#define WLAN_SPI_CLK_ENABLE() __SPI3_CLK_ENABLE()
#define WLAN_SPI_CLK_DISABLE() __SPI3_CLK_DISABLE()
#define WLAN_SELECT() HAL_GPIO_WritePin(WLAN_CS_PORT, WLAN_CS_PIN, GPIO_PIN_RESET)
#define WLAN_DESELECT() HAL_GPIO_WritePin(WLAN_CS_PORT, WLAN_CS_PIN, GPIO_PIN_SET)
#define __WLAN_DISABLE() HAL_GPIO_WritePin(WLAN_EN_PORT, WLAN_EN_PIN, GPIO_PIN_RESET)
#define SD_CD_PIN (GPIO_PIN_4)
#define SD_CD_PORT (GPIOD)
#define SD_CD_PIN (GPIO_PIN_15)
#define SD_CD_PORT (GPIOA)
#endif //OPENMV1
#endif //__PINCFG_H__

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@ -28,9 +28,9 @@ ENTRY(Reset_Handler)
#define CCM_LENGTH 64K
#else
#define HEAP_MEMORY SDRAM
#define HEAP_MEMORY CCM
#define FLASH_ORIGIN 0x08000000
#define FLASH_LENGTH 2048K
#define FLASH_LENGTH 1024K
#define ISR_ORIGIN 0x08000000
#define ISR_LENGTH 16K
@ -43,9 +43,6 @@ ENTRY(Reset_Handler)
#define CCM_ORIGIN 0x10000000
#define CCM_LENGTH 64K
#define SDRAM_ORIGIN 0xC0000000
#define SDRAM_LENGTH 15M
#endif //OPENMV1
/* Specify the memory areas */
@ -56,27 +53,14 @@ MEMORY
FLASH_TEXT (rx) : ORIGIN = TEXT_ORIGIN, LENGTH = TEXT_LENGTH
RAM (xrw) : ORIGIN = RAM_ORIGIN, LENGTH = RAM_LENGTH
CCM (xrw) : ORIGIN = CCM_ORIGIN, LENGTH = CCM_LENGTH
#ifdef OPENMV2
SDRAM (xrw) : ORIGIN = SDRAM_ORIGIN, LENGTH = SDRAM_LENGTH
#endif
}
_estack = 0x10010000; /* Stack is allocated on CCM block */
_ram_end = 0x10010000; /* 64KB CCM */
#ifdef OPENMV1
_fb_base = 0x20000000;
_stack_size = 0x1000; /* required amount of stack */
_heap_size = 0XB400; /* required amount of heap */
#else
_fb_base = 0xC0F04000; /* sdram_start + head_end + cache */
_stack_size = 0x4000; /* required amount of stack */
_heap_size = 0x00F00000; /* required amount of heap */
_cache_size = 0x4000; /* required amount of cache */
_heap_end = ORIGIN(SDRAM) + _heap_size;
#endif
/* Define output sections */
SECTIONS
@ -145,11 +129,9 @@ SECTIONS
{
. = ALIGN(4);
_heap_start = .;
#ifdef OPENMV1
. = . + _heap_size;
. = ALIGN(4);
_heap_end = .;
#endif
} >HEAP_MEMORY
/* Make sure there is enough RAM the stack and FS cache */

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@ -209,9 +209,11 @@ void HAL_SD_MspInit(SD_HandleTypeDef *hsd)
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
GPIO_InitStructure.Alternate = GPIO_AF12_SDIO;
/* SDIO_D0..D3, SDIO_CLK */
GPIO_InitStructure.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12;
HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
/* SDIO_CMD */
GPIO_InitStructure.Pin = GPIO_PIN_2;
HAL_GPIO_Init(GPIOD, &GPIO_InitStructure);
}

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@ -3,6 +3,8 @@
SRCS = $(addprefix src/,\
stm32f4xx_hal_adc.c\
stm32f4xx_hal_adc_ex.c\
stm32f4xx_hal_dac.c\
stm32f4xx_hal_dac_ex.c\
stm32f4xx_hal.c\
stm32f4xx_hal_cortex.c\
stm32f4xx_hal_dcmi.c\