Revert "Update docs."

This reverts commit 3eca75774f.
This commit is contained in:
iabdalkader 2017-12-06 15:29:23 +02:00
parent 3eca75774f
commit 64c2d1a535
43 changed files with 1348 additions and 3934 deletions

@ -1 +1 @@
Subproject commit eeccd0f5af65d31c55c57ac0a9b5a7af0ba2893c
Subproject commit 5f79f0f9311d09a2d4f8ab31ce34681586f81761

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@ -969,7 +969,7 @@ static mp_obj_t winc_scan(mp_obj_t self_in)
static mp_obj_t winc_rssi(mp_obj_t self_in)
{
int rssi=0;
int rssi;
async_request_done = false;
async_request_data = &rssi;
@ -1018,7 +1018,7 @@ static mp_obj_t winc_fw_update(mp_obj_t self_in)
{
// Erase the WINC1500 flash.
printf("Erasing flash...\n");
if (programmer_eraseall() != M2M_SUCCESS) {
if (programmer_erase_all() != M2M_SUCCESS) {
nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "Failed to erase entire flash!"));
}

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@ -4,7 +4,7 @@
*
* \brief This module contains NMC1000 bus wrapper APIs declarations.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -169,7 +169,6 @@ sint8 nm_bus_reinit(void *);
*/
#ifdef CONF_WINC_USE_UART
uint8 nm_bus_get_chip_type(void);
sint8 nm_bus_break(void);
#endif
#ifdef __cplusplus
}

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@ -4,7 +4,7 @@
*
* \brief WINC Driver Common API Declarations.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -69,8 +69,10 @@
#define M2M_ERR_FAIL ((sint8)-12)
#define M2M_ERR_FW_VER_MISMATCH ((sint8)-13)
#define M2M_ERR_SCAN_IN_PROGRESS ((sint8)-14)
/*
Invalid argument
*/
#define M2M_ERR_INVALID_ARG ((sint8)-15)
#define M2M_ERR_INVALID ((sint8)-16)
/*i2c MAASTER ERR*/
#define I2C_ERR_LARGE_ADDRESS 0xE1UL /*the address exceed the max addressing mode in i2c flash*/

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@ -4,7 +4,7 @@
*
* \brief This module contains debug APIs declarations.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -58,7 +58,7 @@
#define M2M_LOG_DBG 4
#if (defined __APS3_CORTUS__)
#define M2M_LOG_LEVEL M2M_LOG_INFO
#define M2M_LOG_LEVEL M2M_LOG_ERROR
#else
#define M2M_LOG_LEVEL M2M_LOG_REQ
#endif
@ -72,7 +72,7 @@
#if (CONF_WINC_DEBUG == 1)
#undef M2M_LOG_LEVEL
#define M2M_LOG_LEVEL M2M_LOG_DBG
#define M2M_LOG_LEVEL M2M_LOG_DBG
#undef M2M_PRINT
#define M2M_PRINT(...) do{CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
#if (M2M_LOG_LEVEL >= M2M_LOG_ERROR)

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@ -1,245 +0,0 @@
/**
*
* \file
*
* \brief WINC Application Interface Internal Types.
*
* Copyright (c) 2017 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
#ifndef __ECC_TYPES_H__
#define __ECC_TYPES_H__
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
INCLUDES
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
#include "driver/include/m2m_types.h"
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
MACROS
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
#define ECC_LARGEST_CURVE_SIZE (32)
/*!<
The size of the the largest supported EC. For now, assuming
the 256-bit EC is the largest supported curve type.
*/
#define ECC_POINT_MAX_SIZE ECC_LARGEST_CURVE_SIZE
/*!<
Maximum size of one coordinate of an EC point.
*/
#define ECC_POINT_MAX_SIZE_WORDS (ECC_POINT_MAX_SIZE / 4)
/*!<
SIZE in 32-bit words.
*/
#if 0
#define ECC_NUM_SUPP_CURVES ((sizeof(gastrECCSuppList)) / (sizeof(tstrEllipticCurve)))
#endif
/*!<
*/
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
DATA TYPES
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
/*!
@enum \
tenuEcNamedCurve
@brief EC Named Curves
Defines a list of supported ECC named curves.
*/
typedef enum EcNamedCurve{
EC_SECP192R1 = 19,
/*!<
It is defined by NIST as P192 and by the SEC Group as secp192r1.
*/
EC_SECP256R1 = 23,
/*!<
It is defined by NIST as P256 and by the SEC Group as secp256r1.
*/
EC_SECP384R1 = 24,
/*!<
It is defined by NIST as P384 and by the SEC Group as secp384r1.
*/
EC_SECP521R1 = 25,
/*!<
It is defined by NIST as P521 and by the SEC Group as secp521r1.
*/
EC_UNKNOWN = 255
}tenuEcNamedCurve;
/*!
@struct \
tstrECPoint
@brief Elliptic Curve point representation
*/
typedef struct EcPoint{
uint8 X[ECC_POINT_MAX_SIZE];
/*!<
The X-coordinate of the ec point.
*/
uint8 Y[ECC_POINT_MAX_SIZE];
/*!<
The Y-coordinate of the ec point.
*/
uint16 u16Size;
/*!<
Point size in bytes (for each of the coordinates).
*/
uint16 u16PrivKeyID;
/*!<
ID for the corresponding private key.
*/
}tstrECPoint;
/*!
@struct \
tstrECDomainParam
@brief ECC Curve Domain Parameters
The structure defines the ECC domain parameters for curves defined over prime finite fields.
*/
typedef struct EcDomainParam{
uint32 p[ECC_POINT_MAX_SIZE_WORDS];
uint32 a[ECC_POINT_MAX_SIZE_WORDS];
uint32 b[ECC_POINT_MAX_SIZE_WORDS];
tstrECPoint G;
}tstrECDomainParam;
/*!
@struct \
tstrEllipticCurve
@brief
Definition of an elliptic curve
*/
typedef struct{
tenuEcNamedCurve enuType;
tstrECDomainParam strParam;
}tstrEllipticCurve;
typedef enum{
ECC_REQ_NONE,
ECC_REQ_CLIENT_ECDH,
ECC_REQ_SERVER_ECDH,
ECC_REQ_GEN_KEY,
ECC_REQ_SIGN_GEN,
ECC_REQ_SIGN_VERIFY
}tenuEccREQ;
typedef struct{
tstrECPoint strPubKey;
uint8 au8Key[ECC_POINT_MAX_SIZE];
}tstrEcdhReqInfo;
typedef struct{
uint32 u32nSig;
}tstrEcdsaVerifyReqInfo;
typedef struct{
uint16 u16CurveType;
uint16 u16HashSz;
}tstrEcdsaSignReqInfo;
typedef struct{
uint16 u16REQ;
uint16 u16Status;
uint32 u32UserData;
uint32 u32SeqNo;
union{
tstrEcdhReqInfo strEcdhREQ;
tstrEcdsaSignReqInfo strEcdsaSignREQ;
tstrEcdsaVerifyReqInfo strEcdsaVerifyREQ;
};
}tstrEccReqInfo;
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
GLOBALS
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
#if 0
static tstrEllipticCurve gastrECCSuppList[] = {
{
EC_SECP256R1,
{
{0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0xFFFFFFFF},
{0xFFFFFFFC, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0xFFFFFFFF},
{0x27D2604B, 0x3BCE3C3E, 0xCC53B0F6, 0x651D06B0, 0x769886BC, 0xB3EBBD55, 0xAA3A93E7, 0x5AC635D8},
{
{
0x6B, 0x17, 0xD1, 0xF2, 0xE1, 0x2C, 0x42, 0x47, 0xF8, 0xBC, 0xE6, 0xE5, 0x63, 0xA4, 0x40, 0xF2,
0x77, 0x03, 0x7D, 0x81, 0x2D, 0xEB, 0x33, 0xA0, 0xF4, 0xA1, 0x39, 0x45, 0xD8, 0x98, 0xC2, 0x96
},
{
0x4F, 0xE3, 0x42, 0xE2, 0xFE, 0x1A, 0x7F, 0x9B, 0x8E, 0xE7, 0xEB, 0x4A, 0x7C, 0x0F, 0x9E, 0x16,
0x2B, 0xCE, 0x33, 0x57, 0x6B, 0x31, 0x5E, 0xCE, 0xCB, 0xB6, 0x40, 0x68, 0x37, 0xBF, 0x51, 0xF5
},
32
}
}
}
};
#endif
/*!<
List of supported Elliptic Curves ordered by security level (most secure curve is at index ZERO).
*/
#endif /* __ECC_TYPES_H__ */

View File

@ -4,7 +4,7 @@
*
* \brief WINC ATE Test Driver Interface.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -50,18 +50,11 @@ INCLUDES
#include "common/include/nm_common.h"
#include "driver/include/m2m_types.h"
/** \defgroup m2m_ate ATE
*/
/**@defgroup ATEDefine Defines
* @ingroup m2m_ate
* @{
*/
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
MACROS
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
#define M2M_ATE_MAX_NUM_OF_RATES (20)
/*!<
Maximum number of all rates (b,g and n)
/*!< Maximum number of all rates (b,g and n)
*/
#define M2M_ATE_MAX_FRAME_LENGTH (1024)
/*!< Maximum number of length for each frame
@ -69,6 +62,8 @@ Maximum number of all rates (b,g and n)
#define M2M_ATE_MIN_FRAME_LENGTH (1)
/*!< Minimum number of length for each frame
*/
#define M2M_ATE_SUCCESS (M2M_SUCCESS)
/*!< No Error and operation has been completed successfully.
*/
@ -76,50 +71,28 @@ Maximum number of all rates (b,g and n)
/*!< Error in parameters passed to functions.
*/
#define M2M_ATE_ERR_TX_ALREADY_RUNNING (-1)
/*!< Error in starting a transmission test. Another test is already running and its not allowed to start another ATE test.
/*!< This means that TX case is already running and RX or even TX can't start without stopping it first.
*/
#define M2M_ATE_ERR_RX_ALREADY_RUNNING (-2)
/*!< Error in starting a reception test. Another test is already running and its not allowed to start another ATE test.
/*!< This means that RX case is already running and TX or even RX can't start without stopping it first.
*/
#define M2M_ATE_ERR_UNHANDLED_CASE (-3)
/*!< Invalid case.
*/
#define M2M_ATE_RX_DISABLE_DA 0x0
/*!< Filter selection for received frames: Disable filtering received frames by the destination address.
*/
#define M2M_ATE_RX_ENABLE_DA 0x1
/*!< Filter selection for received frames: Enable filtering received frames by the destination address.
*/
#define M2M_ATE_RX_DISABLE_SA 0x0
/*!< Filter selection for received frames: Disable filtering received frames by the source address.
*/
#define M2M_ATE_RX_ENABLE_SA 0x1
/*!< Filter selection for received frames: Enable filtering received frames by the source address.
*/
#define M2M_ATE_DISABLE_SELF_MACADDR 0x0
/*!<Disable setting a new mac address through the ATE test application and use the pre-set mac address in the firmware.
*/
#define M2M_ATE_SET_SELF_MACADDR 0x1
/*!<Enable setting a new mac address through the ATE test application and use the pre-set mac address.
*/
#define M2M_ATE_TX_DUTY_MAX_VALUE M2M_ATE_TX_DUTY_1
/*!< The maximum value of duty cycle
*/
#define M2M_ATE_TX_DUTY_MIN_VALUE M2M_ATE_TX_DUTY_10
/*!< The minimum value of duty cycle
*/
//@}
/**@defgroup ATEDataTypes DataTypes
* @ingroup m2m_ate
* @{
*/
#define M2M_ATE_RX_DISABLE_SA 0x0
#define M2M_ATE_RX_ENABLE_SA 0x1
#define M2M_ATE_DISABLE_SELF_MACADDR 0x0
#define M2M_ATE_SET_SELF_MACADDR 0x1
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
DATA TYPES
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
/*!
*@enum tenuM2mAteFwState
*@brief Enumeration used to change ATE firmware states
*@brief Enumeration used for change ATE firmware state
*/
typedef enum {
M2M_ATE_FW_STATE_STOP = 0x00,
@ -132,7 +105,7 @@ typedef enum {
/*!
*@enum tenuM2mAteTxRates
*@brief Enumeration used to index the TX rates that can be used during the transmission test.
*@brief Used to get value of rate referenced by this index
*/
typedef enum {
M2M_ATE_TX_RATE_1_Mbps_INDEX = 0x00,
@ -165,7 +138,7 @@ typedef enum {
/*!
*@enum tenuM2mAteTxDutyCycle
*@brief Enumeration used to index the TX duty cycle that can be used during the transmission test.
*@brief Values of duty cycle
*/
typedef enum {
M2M_ATE_TX_DUTY_1 = 0x01,
@ -180,39 +153,33 @@ typedef enum {
M2M_ATE_TX_DUTY_10 = 0xA0,
}tenuM2mAteTxDutyCycle;
#define M2M_ATE_TX_DUTY_MAX_VALUE M2M_ATE_TX_DUTY_1
/*!< The maximum value of duty cycle
*/
#define M2M_ATE_TX_DUTY_MIN_VALUE M2M_ATE_TX_DUTY_10
/*!< The minimum value of duty cycle
*/
/*!
*@enum tenuM2mAteTxDpdControl
*@brief Enumeration for the allowed Digital-pre distortion(DPD) control values.
*@brief Allowed values for DPD control
*/
typedef enum {
M2M_ATE_TX_DPD_DYNAMIC = 0x00,
/*!< Dynamic mode indicates that DPD values will be set dynamically from a lookup table pre-set with the DPD coefficents.
*/
M2M_ATE_TX_DPD_BYPASS = 0x01,
/*!< Bypass mode indicates that the DPD control will be bypassed.
*/
M2M_ATE_TX_DPD_ENABLED = 0x02,
/*!< Enabled mode allows the tester to manually set the DPD coefficients.
*/
}tenuM2mAteTxDpdControl;
/*!
*@enum tenuM2mAteTxGainSetting
*@brief Enumeration for the allowed TX gain selection modes.
*@brief Options for TX gain selection mode
*/
typedef enum {
M2M_ATE_TX_GAIN_DYNAMIC = 0x00,
/*!< Dynamic mode indicates that Tx gain values for the digital gain,pa and ppa, will be set dynamically from a lookup table based on the Tx_rate configured.
*/
M2M_ATE_TX_GAIN_BYPASS = 0x01,
/*!< Bypass mode indicates that Tx gain configurations will be bypassed.
*/
M2M_ATE_TX_GAIN_FCC = 0x02,
/*!< Using the FCC tx gain configuration indicates that the tx gain values will be used from the FCC flashed table(pre-configured values from a customer).
*/
M2M_ATE_TX_GAIN_TELEC = 0x03,
/*!< Using the TELEC tx gain configuration indicates that the tx gain values will be used from the TELEC flashed table(pre-configured values from a customer).
*/
}tenuM2mAteTxGainSetting;
/*!
@ -221,37 +188,25 @@ typedef enum {
*/
typedef enum {
M2M_ATE_PMU_DISBLE = 0x00,
/*!< Disable using PMU mode
*/
M2M_ATE_PMU_ENABLE = 0x01,
/*!< Enable using PMU mode
*/
}tenuM2mAtePMUSetting;
/*!
*@enum tenuM2mAteTxSource
*@brief Used to define the Tx source, either PHY mode or MAC mode.
*@enum tenuM2mAteTxSource
*@brief Used to define if enable PHY continues mode or MAC
*/
typedef enum {
M2M_ATE_TX_SRC_MAC = 0x00,
/*!< When the TX Source is set to MAC, it indicates that the TX frames are manually framed and sent from the MAC layer
*/
M2M_ATE_TX_SRC_PHY = 0x01,
/*!< When the TX source is set to PHY, it indicates that transmission sequence occurs from PHY layer in the form of pulses
*/
}tenuM2mAteTxSource;
/*!
*@enum tenuM2mAteTxMode
*@brief Used to define the mode of PHY TX transmission source: Continuous Wave(CW) or Normal(i.e CW is disabled) TX sequence
*@enum tenuM2mAteTxMode
*@brief Used to define type of TX mode either normal or CW(Continuous Wave) TX sequence
*/
typedef enum {
M2M_ATE_TX_MODE_NORM = 0x00,
/*!< When the TX source is set to PHY,normal mode indicates that continous transmission is disabled.
*/
M2M_ATE_TX_MODE_CW = 0x01,
/*!< When the TX source is set to PHY, continous mode indicates that transmission sequences occur back to back in a continous wave from the PHY layer.
*/
}tenuM2mAteTxMode;
/*!
@ -260,69 +215,37 @@ typedef enum {
*/
typedef enum {
M2M_ATE_RX_PWR_HIGH = 0x00,
/*!< Indicates that receive mode is operating at high power
*/
M2M_ATE_RX_PWR_LOW = 0x01,
/*!< Indicates that receive mode is operating at low power
*/
}tenuM2mAteRxPwrMode;
/*!
*@enum tenuM2mAteChannels
*@brief Available channels for TX and RX in the 2.4GHz spectrum starting at 2412MHz with a 5MHz bandwidth.
*@brief Available channels for TX and RX
*/
typedef enum {
M2M_ATE_CHANNEL_1 = 0x01,
/*!< Channel 1: 2412MHz
*/
M2M_ATE_CHANNEL_2 = 0x02,
/*!< Channel 2: 2417MHz
*/
M2M_ATE_CHANNEL_3 = 0x03,
/*!< Channel 3: 2422MHz
*/
M2M_ATE_CHANNEL_4 = 0x04,
/*!< Channel 4: 2427MHz
*/
M2M_ATE_CHANNEL_5 = 0x05,
/*!< Channel 5: 2432MHz
*/
M2M_ATE_CHANNEL_6 = 0x06,
/*!< Channel 6: 2437MHz
*/
M2M_ATE_CHANNEL_7 = 0x07,
/*!< Channel 7: 2442MHz
*/
M2M_ATE_CHANNEL_8 = 0x08,
/*!< Channel 8: 2447MHz
*/
M2M_ATE_CHANNEL_9 = 0x09,
/*!< Channel 9: 2452MHz
*/
M2M_ATE_CHANNEL_10 = 0x0A,
/*!< Channel 10: 2462MHz
*/
M2M_ATE_CHANNEL_11 = 0x0B,
/*!< Channel 11: 2467MHz
*/
M2M_ATE_CHANNEL_12 = 0x0C,
/*!< Channel 12: 2472MHz
*/
M2M_ATE_CHANNEL_13 = 0x0D,
/*!< Channel 13: 2472MHz
*/
M2M_ATE_CHANNEL_14 = 0x0E,
/*!< Channel 14: 2484MHz
*/
}tenuM2mAteChannels;
/*!
*@struct tstrM2mAteRxStatus
*@brief Used to save statistics for receive(RX) test case
*@brief Used to save statistics of RX case
*/
typedef struct {
uint32 num_rx_pkts;
/*!< Number of total RX packets
/*!< Number of total RX packet
*/
uint32 num_err_pkts;
/*!< Number of RX failed packets
@ -334,34 +257,33 @@ typedef struct {
/*!
*@struct tstrM2mAteRxStatus
*@brief Used to save recieve test case configuration
*@see tenuM2mAteRxPwrMode
*@brief Used to save statistics of RX case
*/
typedef struct {
uint8 u8RxPwrMode;
/*!< RX power mode review \ref tenuM2mAteRxPwrMode
/*!< RX power mode review tenuM2mAteRxPwrMode
*/
} tstrM2mAteInit;
/*!
*@struct tstrM2mAteTx
*@brief Used for the transmission(Tx) test configuration.
*@brief Used as data source in case of enabling TX test case
*/
typedef struct {
uint32 num_frames;
/*!< Number of frames to be sent where maximum number allowed is 4294967295 ul, and ZERO means infinite number of frames
*/
uint32 data_rate;
/*!< Rate to send packets, to select a rate use values from the enumeration \ref tenuM2mAteTxIndexOfRates and pass it to \ref m2m_ate_get_tx_rate
/*!< Rate to sent packets over to select rate use value of \ref tenuM2mAteTxIndexOfRates and pass it to \ref m2m_ate_get_tx_rate
*/
uint8 channel_num;
/*!< Channel number as enumerated at \ref tenuM2mAteChannels
uint8 channel_num;
/*!< Channel number \ref tenuM2mAteChannels
*/
uint8 duty_cycle;
/*!< Duty cycle value between from 1 to 10, where maximum = 1, minimum = 10. As enumerated \ref tenuM2mAteTxDutyCycle
/*!< Duty cycle value between from 1 to 10, where maximum = 1, minimum = 10 \ref tenuM2mAteTxDutyCycle
*/
uint16 frame_len;
/*!< Use @ref M2M_ATE_MAX_FRAME_LENGTH (1024) as the maximum value while @ref M2M_ATE_MIN_FRAME_LENGTH (1) is the minimum value
/*!< Use \ref M2M_ATE_MAX_FRAME_LENGTH (1024) as the maximum value while \ref M2M_ATE_MIN_FRAME_LENGTH (1) is the minimum value
*/
uint8 tx_gain_sel;
/*!< TX gain mode selection value \ref tenuM2mAteTxGainSetting
@ -373,13 +295,13 @@ typedef struct {
/*!< This is 0 if PMU is not used otherwise it must be be 1 \ref tenuM2mAtePMUSetting
*/
uint8 phy_burst_tx;
/*!< Source of Burst TX either PHY or MAC \ref tenuM2mAteTxSource
/*!< Source of Burst TX either PHY or MAC\ref tenuM2mAteTxSource
*/
uint8 cw_tx;
/*!< Mode of Phy TX transmission either normal TX sequence or CW(Continuous Wave) TX sequence \ref tenuM2mAteTxMode
/*!< Mode of Burst TX either normal TX sequence or CW(Continuous Wave) TX sequence \ref tenuM2mAteTxMode
*/
uint32 xo_offset_x1000;
/*!< Signed XO offset value in Part Per Million(PPM) multiplied by 1000.
/*!< Signed XO offset value in PPM (Part Per Million) multiplied by 1000.
*/
uint8 use_efuse_xo_offset;
/*!< Set to 0 to use the XO offset provided in xo_offset_x1000. Set to 1 to use XO offset programmed on WINC efuse.
@ -391,7 +313,7 @@ typedef struct {
/*!
*@struct tstrM2mAteRx
*@brief Used for the reception(Rx) test configuration.
*@brief Used as data source in case of enabling RX test case
*/
typedef struct {
uint8 channel_num;
@ -413,40 +335,32 @@ typedef struct {
/*!< Set to the source mac address expected to filter frames from.
*/
uint8 mac_filter_en_da;
/*!< Flag set to enable or disable reception with destination address as a filter. Using the following flags \ref M2M_ATE_RX_ENABLE_DA
\ref M2M_ATE_RX_DISABLE_DA
/*!< Flag set to enable or disable reception with destination address as a filter.
*/
uint8 mac_filter_en_sa;
/*!< Flag set to enable or disable reception with source address as a filter.Using the following flags \ref M2M_ATE_RX_ENABLE_SA
\ref M2M_ATE_RX_DISABLE_SA
/*!< Flag set to enable or disable reception with source address as a filter.
*/
uint8 override_self_mac_addr;
/*!< Flag set to enable or disable self mac address feature. Using the following flags \ref M2M_ATE_DISABLE_SELF_MACADDR
\ref M2M_ATE_SET_SELF_MACADDR
/*!< Flag set to enable or disable self mac address feature.
*/
} tstrM2mAteRx;
//@}
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
FUNCTION PROTOTYPES
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
#ifdef __cplusplus
extern "C" {
#endif
/**@defgroup ATEFunction Function
* @ingroup m2m_ate
* @{
*/
/*!
@fn \
sint8 m2m_ate_init(void);
@brief
This function used to download the ATE firmware from flash and start it.
This function used to download ATE firmware from flash and start it
@return
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
@see
m2m_ate_init_param
The function SHALL return 0 for success and a negative value otherwise.
*/
sint8 m2m_ate_init(void);
@ -456,14 +370,10 @@ sint8 m2m_ate_init(void);
sint8 m2m_ate_init(tstrM2mAteInit *pstrInit);
@brief
This function is used to download and start the ATE firmware with an initialization value
stating the rx mode power \ref tstrM2mAteInit.
@param [in] tstrM2mAteInit *
Pointer to a structure \ref tstrM2mAteInit, defining the initial RX mode value.
This function used to download ATE firmware from flash and start it
@return
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
@see
m2m_ate_init
The function SHALL return 0 for success and a negative value otherwise.
*/
sint8 m2m_ate_init_param(tstrM2mAteInit *pstrInit);
@ -475,7 +385,7 @@ sint8 m2m_ate_init_param(tstrM2mAteInit *pstrInit);
De-Initialization of ATE firmware mode
@return
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
The function SHALL return 0 for success and a negative value otherwise.
*/
sint8 m2m_ate_deinit(void);
@ -484,13 +394,13 @@ sint8 m2m_ate_deinit(void);
sint8 m2m_ate_set_fw_state(uint8);
@brief
This function is used to change the ATE firmware status from running to stopped or vice versa.
This function used to change ATE firmware status from running to stopped or vice versa.
@param [in] u8State
Required state of the ATE firmware, one of \ref tenuM2mAteFwState enumeration values.
Required state of ATE firmware, one of \ref tenuM2mAteFwState enumeration values.
@return
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
@see
The function SHALL return 0 for success and a negative value otherwise.
\sa
m2m_ate_init
*/
sint8 m2m_ate_set_fw_state(uint8);
@ -500,11 +410,11 @@ sint8 m2m_ate_set_fw_state(uint8);
sint8 m2m_ate_get_fw_state(uint8);
@brief
This function is used to return the status of ATE firmware.
This function used to return status of ATE firmware.
@return
The function SHALL return the status of ATE firmware, one of \ref tenuM2mAteFwState enumeration values.
@see
The function SHALL return status of ATE firmware, one of \ref tenuM2mAteFwState enumeration values.
\sa
m2m_ate_init, m2m_ate_set_fw_state
*/
sint8 m2m_ate_get_fw_state(void);
@ -514,13 +424,13 @@ sint8 m2m_ate_get_fw_state(void);
uint32 m2m_ate_get_tx_rate(uint8);
@brief
This function is used to return value of TX rate required by application developer.
This function used to return value of TX rate required by application developer.
@param [in] u8Index
Index of the required rate , one of \ref tenuM2mAteTxIndexOfRates enumeration values.
Index of required rate , one of \ref tenuM2mAteTxIndexOfRates enumeration values.
@return
The function SHALL return 0 in case of receiving invalid index, otherwise the selected rate value is returned.
@see
The function SHALL return 0 for in case of failure otherwise selected rate value.
\sa
tenuM2mAteTxIndexOfRates
*/
uint32 m2m_ate_get_tx_rate(uint8);
@ -530,11 +440,11 @@ uint32 m2m_ate_get_tx_rate(uint8);
sint8 m2m_ate_get_tx_status(void);
@brief
This function is used to return the status of TX test case either running or stopped.
This function used to return status of TX test case either running or stopped.
@return
The function SHALL return the status of ATE firmware, 1 if TX test case is running or 0 if TX test case has been stopped.
@see
The function SHALL return status of ATE firmware, 1 if TX is running otherwise 0.
\sa
m2m_ate_start_tx, m2m_ate_stop_tx
*/
sint8 m2m_ate_get_tx_status(void);
@ -544,13 +454,13 @@ sint8 m2m_ate_get_tx_status(void);
sint8 m2m_ate_start_tx(tstrM2mAteTx *)
@brief
This function is used to start the TX test case.
This function used to start TX test case.
@param [in] strM2mAteTx
Type of \ref tstrM2mAteTx, with the values required to enable TX test case. Application must use \ref m2m_ate_init first.
Type of \ref tstrM2mAteTx, with the values required to enable TX test case. You must use \ref m2m_ate_init first.
@return
The function SHALL return 0 for success and a negative value otherwise.
@see
\sa
m2m_ate_init, m2m_ate_stop_tx, m2m_ate_get_tx_status
*/
sint8 m2m_ate_start_tx(tstrM2mAteTx *);
@ -560,11 +470,11 @@ sint8 m2m_ate_start_tx(tstrM2mAteTx *);
sint8 m2m_ate_stop_tx(void)
@brief
This function is used to stop the TX test case.
This function used to stop TX test case.
@return
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
@see
The function SHALL return 0 for success and a negative value otherwise.
\sa
m2m_ate_init, m2m_ate_start_tx, m2m_ate_get_tx_status
*/
sint8 m2m_ate_stop_tx(void);
@ -574,11 +484,11 @@ sint8 m2m_ate_stop_tx(void);
sint8 m2m_ate_get_rx_status(uint8);
@brief
This function is used to return the status of RX test case either running or stopped.
This function used to return status of RX test case either running or stopped.
@return
The function SHALL return status of ATE firmware, 1 if RX test case is running or 0 when the test case has been stopped.
@see
The function SHALL return status of ATE firmware, 1 if RX is running otherwise 0.
\sa
m2m_ate_start_rx, m2m_ate_stop_rx
*/
sint8 m2m_ate_get_rx_status(void);
@ -588,13 +498,13 @@ sint8 m2m_ate_get_rx_status(void);
sint8 m2m_ate_start_rx(tstrM2mAteRx *)
@brief
This function is used to start RX test case.
This function used to start RX test case.
@param [in] strM2mAteRx
Type of \ref tstrM2mAteRx, with the values required to enable RX test case. Application must use \ref m2m_ate_init first.
Type of \ref tstrM2mAteRx, with the values required to enable RX test case. You must use \ref m2m_ate_init first.
@return
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
@see
The function SHALL return 0 for success and a negative value otherwise.
\sa
m2m_ate_init, m2m_ate_stop_rx, m2m_ate_get_rx_status
*/
sint8 m2m_ate_start_rx(tstrM2mAteRx *);
@ -604,11 +514,11 @@ sint8 m2m_ate_start_rx(tstrM2mAteRx *);
sint8 m2m_ate_stop_rx(void)
@brief
This function is used to stop RX test case.
This function used to stop RX test case.
@return
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
@see
The function SHALL return 0 for success and a negative value otherwise.
\sa
m2m_ate_init, m2m_ate_start_rx, m2m_ate_get_rx_status
*/
sint8 m2m_ate_stop_rx(void);
@ -618,13 +528,13 @@ sint8 m2m_ate_stop_rx(void);
sint8 m2m_ate_read_rx_status(tstrM2mAteRxStatus *)
@brief
This function is used to read RX statistics from the ATE firmware.
This function used to read RX statistics from ATE firmware.
@param [out] strM2mAteRxStatus
Type of \ref tstrM2mAteRxStatus used to save statistics of RX test case. Application must use \ref m2m_ate_start_rx first.
Type of \ref tstrM2mAteRxStatus used to save statistics of RX test case. You must use \ref m2m_ate_start_rx first.
@return
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
@see
The function SHALL return 0 for success and a negative value otherwise.
\sa
m2m_ate_init, m2m_ate_start_rx
*/
sint8 m2m_ate_read_rx_status(tstrM2mAteRxStatus *);
@ -634,14 +544,12 @@ sint8 m2m_ate_read_rx_status(tstrM2mAteRxStatus *);
sint8 m2m_ate_set_dig_gain(double dGaindB)
@brief
This function is used to set the digital gain value to the HW registers in dB.
This function is used to set the digital gain
@param [in] double dGaindB
The digital gain value required to be set.
@return
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
@see
m2m_ate_get_dig_gain, m2m_ate_get_pa_gain,m2m_ate_get_ppa_gain,m2m_ate_get_tot_gain
The function SHALL return 0 for success and a negative value otherwise.
*/
sint8 m2m_ate_set_dig_gain(double dGaindB);
@ -650,43 +558,26 @@ sint8 m2m_ate_set_dig_gain(double dGaindB);
sint8 m2m_ate_get_dig_gain(double * dGaindB)
@brief
This function is used to retrieve the digital gain value from the HW registers in dB.
Digital gain is one of the values that are set to calculate the total tx gain value.
This function is used to get the digital gain
@param [out] double * dGaindB
The retrieved digital gain value obtained from HW registers in dB.
@return
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
@see
m2m_ate_set_dig_gain, m2m_ate_get_pa_gain,m2m_ate_get_ppa_gain,m2m_ate_get_tot_gain
The function SHALL return 0 for success and a negative value otherwise.
*/
sint8 m2m_ate_get_dig_gain(double * dGaindB);
/*!
@fn \
void m2m_ate_set_pa_gain(uint8 gain_db)
@brief
This function is used to set the PA gain (18/15/12/9/6/3/0 only)
@param [in] uint8 gain_db
PA gain level allowed (18/15/12/9/6/3/0 only)
*/
void m2m_ate_set_pa_gain(uint8 gain_db);
/*!
@fn \
sint8 m2m_ate_get_pa_gain(double *paGaindB)
@brief
This function is used to get the Power Amplifier(PA) gain
This function is used to get the PA gain
@param [out] double *paGaindB
The retrieved PA gain value obtained from HW registers in dB.
The retrieved PA gain value obtained from HW registers in dB.
@return
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
@see
m2m_ate_set_dig_gain, m2m_ate_get_dig_gain,m2m_ate_get_ppa_gain,m2m_ate_get_tot_gain
The function SHALL return 0 for success and a negative value otherwise.
*/
sint8 m2m_ate_get_pa_gain(double *paGaindB);
@ -695,14 +586,12 @@ sint8 m2m_ate_get_pa_gain(double *paGaindB);
sint8 m2m_ate_get_ppa_gain(double * ppaGaindB)
@brief
This function is used to get the Pre-Power Amplifier(PPA) gain
This function is used to get the PPA gain
@param [out] uint32 * ppaGaindB
The retrieved PPA gain value obtained from HW registers in dB.
@return
The function SHALL return 0 for success and a negative value otherwise.
@see
m2m_ate_set_dig_gain, m2m_ate_get_dig_gain,m2m_ate_get_pa_gain,m2m_ate_get_tot_gain
*/
sint8 m2m_ate_get_ppa_gain(double * ppaGaindB);
@ -711,17 +600,15 @@ sint8 m2m_ate_get_ppa_gain(double * ppaGaindB);
sint8 m2m_ate_get_tot_gain(double * totGaindB)
@brief
This function is used to calculate the total tx gain value
This function is used to calculate the total gain
@param [out] double * totGaindB
The retrieved total gain value obtained from calculations made based on the digital gain, PA and PPA gain values.
@return
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
@see
m2m_ate_set_dig_gain, m2m_ate_get_dig_gain,m2m_ate_get_pa_gain,m2m_ate_get_ppa_gain
The function SHALL return 0 for success and a negative value otherwise.
*/
sint8 m2m_ate_get_tot_gain(double * totGaindB);
//@}
#ifdef __cplusplus
}

View File

@ -4,7 +4,7 @@
*
* \brief WINC Crypto Application Interface.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -81,9 +81,6 @@ typedef struct sha256ctxt{
@brief
RSA Signature status: pass or fail.
@see
m2m_crypto_rsa_sign_gen
*/
typedef enum{
M2M_RSA_SIGN_OK,
@ -94,17 +91,14 @@ typedef enum{
@typedef \
tpfAppCryproCb
@brief Crypto Calback function receiving the crypto related messages
@brief
@param [in] u8MsgType
Crypto command about which the notification is received.
@param [in] pvResp
A pointer to the result associated with the notification.
@param [in] pvMsg
A pointer to a buffer containing the notification parameters (if any). It should be
Casted to the correct data type corresponding to the notification type.
@see
m2m_crypto_init
tenuM2mCryptoCmd
*/
typedef void (*tpfAppCryproCb) (uint8 u8MsgType,void * pvResp, void * pvMsg);
@ -120,15 +114,10 @@ FUNCTION PROTOTYPES
@fn \
sint8 m2m_crypto_init();
@brief crypto initialization.
@brief crypto initialization
@param[in] pfAppCryproCb
Pointer to the Crypto Calback function receiving the crypto related messages.
@see
tpfAppCryproCb
@return
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
*/
sint8 m2m_crypto_init(tpfAppCryproCb pfAppCryproCb);
/*!
@ -138,9 +127,7 @@ sint8 m2m_crypto_init(tpfAppCryproCb pfAppCryproCb);
@brief SHA256 hash initialization
@param[in] psha256Ctxt
Pointer to a sha256 context allocated by the caller.
@return
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
Pointer to a sha256 context allocated by the caller.
*/
sint8 m2m_crypto_sha256_hash_init(tstrM2mSha256Ctxt *psha256Ctxt);
@ -159,13 +146,6 @@ sint8 m2m_crypto_sha256_hash_init(tstrM2mSha256Ctxt *psha256Ctxt);
@param [in] u16DataLength
Size of the data bufefr in bytes.
@pre SHA256 module should be initialized first through m2m_crypto_sha256_hash_init function.
@see m2m_crypto_sha256_hash_init
@return
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
*/
sint8 m2m_crypto_sha256_hash_update(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Data, uint16 u16DataLength);
@ -181,13 +161,12 @@ sint8 m2m_crypto_sha256_hash_update(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Da
@param [in] pu8Sha256Digest
Buffer allocated by the caller which will hold the resultant SHA256 Digest. It must be allocated no less than M2M_SHA256_DIGEST_LEN.
@return
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
*/
sint8 m2m_crypto_sha256_hash_finish(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Sha256Digest);
/*!
@fn \
sint8 m2m_rsa_sign_verify(uint8 *pu8N, uint16 u16NSize, uint8 *pu8E, uint16 u16ESize, uint8 *pu8SignedMsgHash, \
@ -219,9 +198,6 @@ sint8 m2m_crypto_sha256_hash_finish(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Sh
@param[out] pu8RsaSignature
Signature value to be verified.
@return
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
*/
sint8 m2m_crypto_rsa_sign_verify(uint8 *pu8N, uint16 u16NSize, uint8 *pu8E, uint16 u16ESize, uint8 *pu8SignedMsgHash,
uint16 u16HashLength, uint8 *pu8RsaSignature);
@ -258,9 +234,6 @@ sint8 m2m_crypto_rsa_sign_verify(uint8 *pu8N, uint16 u16NSize, uint8 *pu8E, uint
@param[out] pu8RsaSignature
Pointer to a user buffer allocated by teh caller shall hold the generated signature.
@return
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
*/
sint8 m2m_crypto_rsa_sign_gen(uint8 *pu8N, uint16 u16NSize, uint8 *pu8d, uint16 u16dSize, uint8 *pu8SignedMsgHash,
uint16 u16HashLength, uint8 *pu8RsaSignature);

View File

@ -4,7 +4,7 @@
*
* \brief This module contains M2M host interface APIs implementation.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -172,14 +172,6 @@ NMI_API sint8 hif_register_cb(uint8 u8Grp,tpfHifCallBack fn);
*/
NMI_API sint8 hif_chip_sleep(void);
/**
* @fn NMI_API sint8 hif_chip_sleep_sc(void);
* @brief
To clear the chip count only but keep the chip awake
* @return
The function shall return ZERO for successful operation and a negative value otherwise.
*/
NMI_API sint8 hif_chip_sleep_sc(void);
/**
* @fn NMI_API sint8 hif_chip_wake(void);
* @brief
To Wakeup the chip.

View File

@ -4,7 +4,7 @@
*
* \brief WINC OTA Upgrade API Interface.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -49,7 +49,7 @@ INCLUDES
#include "common/include/nm_common.h"
#include "driver/include/m2m_types.h"
#include "driver/include/nmdrv.h"
/**@addtogroup WlanEnums DataTypes
/**@addtogroup WlanEnums Enumerations and Typedefs
* @ingroup m2m_wifi
*/
/* @{ */
@ -58,14 +58,13 @@ INCLUDES
/*!
@typedef void (*tpfOtaNotifCb) (tstrOtaUpdateInfo *);
@brief
A callback to get notification about a potential OTA update.
@param[in] pstrOtaUpdateInfo
A structure to provide notification payload.
@sa
@brief A callback to get notification about an potential OTA update.
@param[in] pstrOtaUpdateInfo A structure to provide notification payload.
@sa
tstrOtaUpdateInfo
@warning
@warning
The notification is not supported (Not implemented yet)
*/
@ -75,13 +74,16 @@ typedef void (*tpfOtaNotifCb) (tstrOtaUpdateInfo * pstrOtaUpdateInfo);
/*!
@typedef void (*tpfOtaUpdateCb) (uint8 u8OtaUpdateStatusType ,uint8 u8OtaUpdateStatus);
@brief
A callback to get OTA status update, the callback provide the status type and its status.
The OTA callback provides the download status, the switch to the downloaded firmware status and roll-back status.
@param[in] u8OtaUpdateStatusType Possible values are listed in tenuOtaUpdateStatusType.
@brief
A callback to get OTA status update, the callback provide the status type and its status the OTA callback provides the download status,
the switch to the downloaded firmware status and roll-back status.
@param[in] u8OtaUpdateStatus Possible values are listed as enumerated by @ref tenuOtaUpdateStatus.
@param[in] u8OtaUpdateStatusType Possible values are listed in tenuOtaUpdateStatusType. Possible types are:
- [DL_STATUS](@ref DL_STATUS)
- [SW_STATUS](@ref SW_STATUS)
- [RB_STATUS](@ref RB_STATUS)
@param[in] u8OtaUpdateStatus Possible values are listed in tenuOtaUpdateStatus.
@see
tenuOtaUpdateStatusType
@ -111,16 +113,16 @@ FUNCTION PROTOTYPES
@param [in] pfOtaUpdateCb
OTA Update callback function
@param [in] pfOtaNotifCb
OTA notify callback function
@return
@param [in] pfOtaNotifCb
OTA notify callback function
@return
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_init(tpfOtaUpdateCb pfOtaUpdateCb,tpfOtaNotifCb pfOtaNotifCb);
/**@}*/
/** @defgroup OtaNotifStFn m2m_ota_notif_set_url
* @ingroup WLANAPI
* Set the OTA notification server URL, the functions need to be called before any check for update
@ -132,12 +134,12 @@ NMI_API sint8 m2m_ota_init(tpfOtaUpdateCb pfOtaUpdateCb,tpfOtaNotifCb pfOtaNo
@param [in] u8Url
Set the OTA notification server URL, the functions need to be called before any check for update.
@warning
@warning
Calling m2m_ota_init is required
Notification Server is not supported in the current version (function is not implemented)
@see
m2m_ota_init
@return
@see
m2m_ota_init
@return
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_notif_set_url(uint8 * u8Url);
@ -153,13 +155,13 @@ NMI_API sint8 m2m_ota_notif_set_url(uint8 * u8Url);
@fn \
NMI_API sint8 m2m_ota_notif_check_for_update(void);
@warning
@warning
Function is not implemented (not supported at the current version)
@sa
@sa
m2m_ota_init
m2m_ota_notif_set_url
@return
@return
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_notif_check_for_update(void);
@ -177,19 +179,19 @@ NMI_API sint8 m2m_ota_notif_check_for_update(void);
@param [in] u32Period
Period in days
@sa
@sa
m2m_ota_init
m2m_ota_notif_check_for_update
m2m_ota_notif_set_url
@return
@return
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_notif_sched(uint32 u32Period);
/**@}*/
/** @defgroup OtaStartUpdatefn m2m_ota_start_update
* @ingroup WLANAPI
* Request OTA start update using the downloaded URL, the OTA module will download the OTA image and ensure integrity of the image,
* and update the validity of the image in control structure. Switching to that image requires calling @ref m2m_ota_switch_firmware API.
* Request OTA start update using the downloaded URL, the OTA module will download the OTA image and ensure integrity of the image,
* and update the validity of the image in control structure. Switching to that image requires calling @ref m2m_ota_switch_firmware API.
* As a prerequisite @ref m2m_ota_init should be called before using @ref m2m_ota_start().
*/
/**@{*/
@ -202,14 +204,14 @@ NMI_API sint8 m2m_ota_notif_sched(uint32 u32Period);
@warning
Calling this API does not guarantee OTA WINC image update, It depends on the connection with the download server and the validity of the image.
If the API response is failure this may invalidate the roll-back image if it was previously valid, since the WINC does not have any internal memory
If the API response is failure this may invalidate the roll-back image if it was previously valid, since the WINC does not have any internal memory
except the flash roll-back image location to validate the downloaded image from
@see
@see
m2m_ota_init
tpfOtaUpdateCb
@return
@return
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
\section Example
The example shows an example of how the OTA image update is carried out.
@ -245,10 +247,10 @@ int main (void)
tstrWifiInitParam param;
tstr1xAuthCredentials gstrCred1x = AUTH_CREDENTIALS;
nm_bsp_init();
m2m_memset((uint8*)&param, 0, sizeof(param));
param.pfAppWifiCb = wifi_event_cb;
//Initialize the WINC Driver
ret = m2m_wifi_init(&param);
if (M2M_SUCCESS != ret)
@ -263,45 +265,18 @@ int main (void)
while(1)
{
//Handle the app state machine plus the WINC event handler
//Handle the app state machine plus the WINC event handler
while(m2m_wifi_handle_events(NULL) != M2M_SUCCESS) {
}
}
}
@endcode
@endcode
*/
NMI_API sint8 m2m_ota_start_update(uint8 * u8DownloadUrl);
/**@}*/
/** @defgroup OtaStartUpdatefn m2m_ota_start_update_crt
* @ingroup WLANAPI
* Request OTA start for cortus application image using the downloaded URL, the OTA module will download the OTA image and ensure integrity of the image,
* and update the validity of the image in control structure. Switching to that image requires calling @ref m2m_ota_switch_crt API.
* As a prerequisite @ref m2m_ota_init should be called before using @ref m2m_ota_start_update_crt().
*/
/**@{*/
/*!
@fn \
NMI_API sint8 m2m_ota_start_update_crt(uint8 * u8DownloadUrl);
@param [in] u8DownloadUrl
The cortus application image url.
@warning
Calling this API does not guarantee cortus application image update, It depends on the connection with the download server and the validity of the image.
If the API response is failure this may invalidate the roll-back image if it was previously valid, since the WINC does not have any internal memory
except the flash roll-back image location to validate the downloaded image from
@see
m2m_ota_init
tpfOtaUpdateCb
@return
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_start_update_crt(uint8 * u8DownloadUrl);
/**@}*/
/** @defgroup OtaRollbackfn m2m_ota_rollback
* @ingroup WLANAPI
@ -316,52 +291,14 @@ NMI_API sint8 m2m_ota_start_update_crt(uint8 * u8DownloadUrl);
@fn \
NMI_API sint8 m2m_ota_rollback(void);
@sa
@sa
m2m_ota_init
m2m_ota_start_update
m2m_ota_start_update
@return
@return
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_rollback(void);
/**@}*/
/** @defgroup OtaRollbackfn m2m_ota_rollback_crt
* @ingroup WLANAPI
Request Cortus application OTA Roll-back to the old (other) cortus application image, the WINC firmware will check the validation of the Roll-back image
and switch to it if it is valid.
If the API response is success, system restart is required (re-initialize the driver with hardware rest) update the host driver version may
be required.
*/
/**@{*/
/*!
@fn \
NMI_API sint8 m2m_ota_rollback_crt(void);
@sa
m2m_ota_init
m2m_ota_start_update_crt
@return
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_rollback_crt(void);
/**@}*/
/** @defgroup OtaAbortfn m2m_ota_abort
* @ingroup WLANAPI
Request abort of current OTA download.
The WINC firmware will terminate the OTA download if one is in progress.
If no download is in progress, the API will respond with failure.
*/
/**@{*/
/*!
@fn \
NMI_API sint8 m2m_ota_abort(void);
@return
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_abort(void);
/**@}*/
/**@}*/
/** @defgroup OtaSwitchFirmware m2m_ota_switch_firmware
@ -375,39 +312,16 @@ NMI_API sint8 m2m_ota_abort(void);
NMI_API sint8 m2m_ota_switch_firmware(void);
@warning
It is important to note that if the API succeeds, system restart is required (re-initializing the driver with hardware reset) updating the host driver version may be required
It is important to note that if the API succeeds, system restart is required (re-initializing the driver with hardware reset) updating the host driver version may be required
if it does not match the minimum driver version supported by the WINC's firmware.
@sa
@sa
m2m_ota_init
m2m_ota_start_update
@return
@return
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_switch_firmware(void);
/**@}*/
/**@}*/
/** @defgroup OtaSwitchFirmware m2m_ota_switch_crt
* @ingroup WLANAPI
* Switch to the upgraded cortus application, that API will update the control structure working image to the upgraded image
take effect will be on the next system restart
*/
/**@{*/
/*!
@fn \
NMI_API sint8 m2m_ota_switch_firmware(void);
@warning
It is important to note that if the API succeeds, system restart is required (re-initializing the driver with hardware reset) updating the host driver version may be required
if it does not match the minimum driver version supported by the WINC's firmware.
@sa
m2m_ota_init
m2m_ota_start_update_crt
@return
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_switch_crt(void);
/*!
@fn \
NMI_API sint8 m2m_ota_get_firmware_version(void);

View File

@ -4,7 +4,7 @@
*
* \brief WINC Peripherals Application Interface.
*
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*

View File

@ -1,182 +0,0 @@
/**
*
* \file
*
* \brief WINC Application Interface Internal Types.
*
* Copyright (c) 2017 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/**@defgroup SSLAPI SSL
*/
#ifndef __M2M_SSL_H__
#define __M2M_SSL_H__
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
INCLUDES
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
#include "common/include/nm_common.h"
#include "driver/include/m2m_types.h"
#include "driver/include/nmdrv.h"
#include "driver/include/ecc_types.h"
#include "socket/include/socket.h"
/**@defgroup SSLEnums Enumeration/Typedefs
* @ingroup SSLAPI
* @{*/
/*!
@typedef \
void (*tpfAppSslCb) (uint8 u8MsgType, void * pvMsg);
@brief A callback to get SSL notifications.
@param[in] u8MsgType
@param[in] pvMsg A structure to provide notification payload.
*/
typedef void (*tpfAppSSLCb) (uint8 u8MsgType, void * pvMsg);
/**@}
*/
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
FUNCTION PROTOTYPES
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
/** \defgroup SSLFUNCTIONS Functions
* @ingroup SSLAPI
*/
/**@{*/
/*!
@fn \ m2m_ssl_init(tpfAppSslCb pfAppSslCb);
@brief Initializes the SSL layer.
@param [in] pfAppSslCb
Application SSL callback function.
@return The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ssl_init(tpfAppSSLCb pfAppSSLCb);
/*!
@fn \ NMI_API sint8 m2m_ssl_handshake_rsp(tstrEccReqInfo* strECCResp, uint8* pu8RspDataBuff, uint16 u16RspDataSz)
@brief Sends ECC responses to the WINC
@param [in] strECCResp
ECC Response struct.
@param [in] pu8RspDataBuffe
Pointer of the response data to be sent.
@param [in] u16RspDataSz
Response data size.
@return The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ssl_handshake_rsp(tstrEccReqInfo* strECCResp, uint8* pu8RspDataBuff, uint16 u16RspDataSz);
/*!
@fn \ NMI_API sint8 m2m_ssl_send_certs_to_winc(uint8* pu8Buffer, uint32 u32BufferSz)
@brief Sends certificates to the WINC
@param [in] pu8Buffer
Pointer to the certificates.
@param [in] u32BufferSz
Size of the certificates.
@return The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ssl_send_certs_to_winc(uint8* pu8Buffer, uint32 u32BufferSz);
/*!
@fn \ NMI_API sint8 m2m_ssl_retrieve_cert(uint16* pu16CurveType, uint8* pu8Hash, uint8* pu8Sig, tstrECPoint* pu8Key)
@brief Retrieve the certificate to be verified from the WINC
@param [in] pu16CurveType
Pointer to the certificate curve type.
@param [in] pu8Hash
Pointer to the certificate hash.
@param [in] pu8Sig
Pointer to the certificate signature.
@param [in] pu8Key
Pointer to the certificate Key.
@return The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ssl_retrieve_cert(uint16* pu16CurveType, uint8* pu8Hash, uint8* pu8Sig, tstrECPoint* pu8Key);
/*!
@fn \ NMI_API sint8 m2m_ssl_retrieve_hash(uint8* pu8Hash, uint16 u16HashSz)
@brief Retrieve the certificate hash
@param [in] pu8Hash
Pointer to the certificate hash.
@param [in] u16HashSz
Hash size.
@return The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ssl_retrieve_hash(uint8* pu8Hash, uint16 u16HashSz);
/*!
@fn \ NMI_API void m2m_ssl_stop_processing_certs(void)
@brief Allow ssl driver to tidy up in case application does not read all available certificates.
@warning This API must only be called if some certificates are left unread.
@return None.
*/
NMI_API void m2m_ssl_stop_processing_certs(void);
/*!
@fn \ NMI_API void m2m_ssl_ecc_process_done(void)
@brief Allow ssl driver to tidy up after application has finished processing ecc message.
@warning This API must be called after receiving a SSL callback with type @ref M2M_SSL_REQ_ECC
@return None.
*/
NMI_API void m2m_ssl_ecc_process_done(void);
/*!
@fn \
NMI_API sint8 m2m_ssl_set_active_ciphersuites(uint32 u32SslCsBMP);
Override the default Active SSL ciphers in the SSL module with a certain combination selected by the caller in the form of
a bitmap containing the required ciphers to be on.
There is no need to call this function if the application will not change the default ciphersuites.
@param [in] u32SslCsBMP
Bitmap containing the desired ciphers to be enabled for the SSL module. The ciphersuites are defined in
@ref SSLCipherSuiteID.
The default ciphersuites are all ciphersuites supported by the firmware with the exception of ECC ciphersuites.
The caller can override the default with any desired combination, except for combinations involving both RSA
and ECC; if any RSA ciphersuite is enabled, then firmware will disable all ECC ciphersuites.
If u32SslCsBMP does not contain any ciphersuites supported by firmware, then the current active list will not
be changed.
@return
- [SOCK_ERR_NO_ERROR](@ref SOCK_ERR_NO_ERROR)
- [SOCK_ERR_INVALID_ARG](@ref SOCK_ERR_INVALID_ARG)
*/
sint8 m2m_ssl_set_active_ciphersuites(uint32 u32SslCsBMP);
/**@}*/
#endif /* __M2M_SSL_H__ */

View File

@ -4,7 +4,7 @@
*
* \brief WINC Application Interface Internal Types.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -95,14 +95,6 @@ MACROS
( ((uint32)M2M_MAKE_VERSION((fw_major), (fw_minor), (fw_patch))) << M2M_FW_VERSION_SHIFT) | \
( ((uint32)M2M_MAKE_VERSION((drv_major), (drv_minor), (drv_patch))) << M2M_DRV_VERSION_SHIFT))
#define REL_19_5_2_VER M2M_MAKE_VERSION_INFO(19,5,2,19,3,0)
#define REL_19_5_1_VER M2M_MAKE_VERSION_INFO(19,5,1,19,3,0)
#define REL_19_5_0_VER M2M_MAKE_VERSION_INFO(19,5,0,19,3,0)
#define REL_19_4_6_VER M2M_MAKE_VERSION_INFO(19,4,6,19,3,0)
#define REL_19_4_5_VER M2M_MAKE_VERSION_INFO(19,4,5,19,3,0)
#define REL_19_4_4_VER M2M_MAKE_VERSION_INFO(19,4,4,19,3,0)
#define REL_19_4_3_VER M2M_MAKE_VERSION_INFO(19,4,3,19,3,0)
#define REL_19_4_2_VER M2M_MAKE_VERSION_INFO(19,4,2,19,3,0)
#define REL_19_4_1_VER M2M_MAKE_VERSION_INFO(19,4,1,19,3,0)
#define REL_19_4_0_VER M2M_MAKE_VERSION_INFO(19,4,0,19,3,0)
#define REL_19_3_1_VER M2M_MAKE_VERSION_INFO(19,3,1,19,3,0)
@ -117,16 +109,16 @@ MACROS
FIRMWARE VERSION NO INFO
*======*======*======*======*/
#define M2M_RELEASE_VERSION_MAJOR_NO (19)
#define M2M_FIRMWARE_VERSION_MAJOR_NO (19)
/*!< Firmware Major release version number.
*/
#define M2M_RELEASE_VERSION_MINOR_NO (5)
#define M2M_FIRMWARE_VERSION_MINOR_NO (4)
/*!< Firmware Minor release version number.
*/
#define M2M_RELEASE_VERSION_PATCH_NO (2)
#define M2M_FIRMWARE_VERSION_PATCH_NO (4)
/*!< Firmware patch release version number.
*/
@ -134,26 +126,21 @@ MACROS
SUPPORTED DRIVER VERSION NO INFO
*======*======*======*======*/
#define M2M_MIN_REQ_DRV_VERSION_MAJOR_NO (19)
#define M2M_DRIVER_VERSION_MAJOR_NO (19)
/*!< Driver Major release version number.
*/
#define M2M_MIN_REQ_DRV_VERSION_MINOR_NO (3)
#define M2M_DRIVER_VERSION_MINOR_NO (3)
/*!< Driver Minor release version number.
*/
#define M2M_MIN_REQ_DRV_VERSION_PATCH_NO (0)
#define M2M_DRIVER_VERSION_PATCH_NO (0)
/*!< Driver patch release version number.
*/
#define M2M_MIN_REQ_DRV_SVN_VERSION (0)
/*!< Driver svn version.
*/
#if !defined(M2M_RELEASE_VERSION_MAJOR_NO) || !defined(M2M_RELEASE_VERSION_MINOR_NO)
#if !defined(M2M_FIRMWARE_VERSION_MAJOR_NO) || !defined(M2M_FIRMWARE_VERSION_MINOR_NO)
#error Undefined version number
#endif
@ -185,9 +172,6 @@ MACROS
/*!< Maximum size for the WPA PSK including the NULL termination.
*/
#define M2M_MIN_PSK_LEN 9
/*!< Maximum size for the WPA PSK including the NULL termination.
*/
#define M2M_DEVICE_NAME_MAX 48
/*!< Maximum Size for the device name including the NULL termination.
@ -200,11 +184,6 @@ MACROS
from the AP.
*/
#define MAX_HIDDEN_SITES 4
/*!<
max number of hidden SSID suuported by scan request
*/
#define M2M_1X_USR_NAME_MAX 21
/*!< The maximum size of the user name including the NULL termination.
@ -222,8 +201,6 @@ MACROS
#define M2M_CUST_IE_LEN_MAX 252
/*!< The maximum size of IE (Information Element).
*/
#define PWR_DEFAULT PWR_HIGH
/*********************
*
* WIFI GROUP requests
@ -264,14 +241,14 @@ MACROS
/*!< max number of request in one group equal to 127 as the last bit reserved for config or data pkt
*/
#define WEP_40_KEY_STRING_SIZE ((uint8)10)
#define WEP_40_KEY_STRING_SIZE ((uint8)10)
/*!< Indicate the wep key size in bytes for 40 bit string passphrase.
*/
#define WEP_104_KEY_STRING_SIZE ((uint8)26)
#define WEP_104_KEY_STRING_SIZE ((uint8)26)
/*!< Indicate the wep key size in bytes for 104 bit string passphrase.
*/
#define WEP_KEY_MAX_INDEX ((uint8)4)
#define WEP_KEY_MAX_INDEX ((uint8)4)
/*!< Indicate the max key index value for WEP authentication
*/
#define M2M_SHA256_CONTEXT_BUFF_LEN (128)
@ -315,18 +292,7 @@ typedef enum {
/*======*======*======*======*
TLS DEFINITIONS
*======*======*======*======*/
#define TLS_FILE_NAME_MAX 48
/*!< Maximum length for each TLS certificate file name including null terminator.
*/
#define TLS_SRV_SEC_MAX_FILES 8
/*!< Maximum number of certificates allowed in TLS_SRV section.
*/
#define TLS_SRV_SEC_START_PATTERN_LEN 8
/*!< Length of certificate struct start pattern.
*/
/*======*======*======*======*
OTA DEFINITIONS
*======*======*======*======*/
@ -343,10 +309,6 @@ typedef enum {
/*!<
Magic value set at the beginning of the OTA image header
*/
#define M2M_MAGIC_APP (0xef522f61UL)
/*!<
Magic value set at the beginning of the Cortus OTA image header
*/
#define OTA_FORMAT_VER_0 (0) /*Till 19.2.2 format*/
#define OTA_FORMAT_VER_1 (1) /*starting from 19.3.0 CRC is used and sequence number is used*/
@ -355,81 +317,52 @@ typedef enum {
*/
#define OTA_SHA256_DIGEST_SIZE (32)
/*!<
Sha256 digest size in the OTA image,
the sha256 digest is set at the beginning of image before the OTA header
*/
/*======*======*======*======*
SSL DEFINITIONS
*======*======*======*======*/
#define TLS_CRL_DATA_MAX_LEN 64
/*<!
Maximum data length in a CRL entry (= Hash length for SHA512)
*/
#define TLS_CRL_MAX_ENTRIES 10
/*<!
Maximum number of entries in a CRL
Sha256 digest size in the OTA image,
the sha256 digest is set at the beginning of image before the OTA header
*/
#define TLS_CRL_TYPE_NONE 0
/*<!
No CRL check
#define OTA_SUCCESS (0)
/*!<
OTA Success status
*/
#define TLS_CRL_TYPE_CERT_HASH 1
/*<!
CRL contains certificate hashes
#define OTA_ERR_WORKING_IMAGE_LOAD_FAIL ((sint8)-1)
/*!<
Failure to load the firmware image
*/
#define OTA_ERR_INVAILD_CONTROL_SEC ((sint8)-2)
/*!<
Control structure is being corrupted
*/
#define M2M_ERR_OTA_SWITCH_FAIL ((sint8)-3)
/*!<
switching to the updated image failed as may be the image is invalid
*/
#define M2M_ERR_OTA_START_UPDATE_FAIL ((sint8)-4)
/*!<
OTA update fail due to multiple reasons
- Connection failure
- Image integrity fail
*/
#define M2M_ERR_OTA_ROLLBACK_FAIL ((sint8)-5)
/*!<
Roll-back failed due to Roll-back image is not valid
*/
#define M2M_ERR_OTA_INVAILD_FLASH_SIZE ((sint8)-6)
/*!<
The OTA Support at least 4MB flash size, if the above error will appear if the current flash is less than 4M
*/
#define M2M_ERR_OTA_INVAILD_ARG ((sint8)-7)
/*!<
Invalid argument in any OTA Function
*/
/**@}*/
/**
* @addtogroup WlanEnums Enumerations and Typedefs
* @ingroup m2m_wifi
*/
/**@{*/
typedef enum {
OTA_SUCCESS = (0),
/*!<
OTA Success status
*/
OTA_ERR_WORKING_IMAGE_LOAD_FAIL = ((sint8) -1),
/*!<
Failure to load the firmware image
*/
OTA_ERR_INVAILD_CONTROL_SEC = ((sint8) -2),
/*!<
Control structure is being corrupted
*/
M2M_ERR_OTA_SWITCH_FAIL = ((sint8) -3),
/*!<
switching to the updated image failed as may be the image is invalid
*/
M2M_ERR_OTA_START_UPDATE_FAIL = ((sint8) -4),
/*!<
OTA update fail due to multiple reasons
- Connection failure
- Image integrity fail
*/
M2M_ERR_OTA_ROLLBACK_FAIL = ((sint8) -5),
/*!<
Roll-back failed due to Roll-back image is not valid
*/
M2M_ERR_OTA_INVAILD_FLASH_SIZE = ((sint8) -6),
/*!<
The OTA Support at least 4MB flash size, if the above error will appear if the current flash is less than 4M
*/
M2M_ERR_OTA_INVAILD_ARG = ((sint8) -7),
/*!<
* Ota still in progress
*/
M2M_ERR_OTA_INPROGRESS = ((sint8) -8)
/*!<
Invalid argument in any OTA Function
*/
} tenuOtaError;
/**@{*/
/*!
@enum \
@ -451,7 +384,7 @@ typedef enum {
M2M_ERR_ASSOC_FAIL,
/*!< Indicate that the WINC board has failed to associate with the AP.
*/
M2M_ERR_CONN_INPROGRESS
M2M_ERR_CONN_INPROGRESS,
/*!< Indicate that the WINC board has another connection request in progress.
*/
}tenuM2mConnChangedErrcode;
@ -466,7 +399,7 @@ typedef enum {
M2M_WIFI_WEP_KEY_INDEX_1 = ((uint8) 1),
M2M_WIFI_WEP_KEY_INDEX_2,
M2M_WIFI_WEP_KEY_INDEX_3,
M2M_WIFI_WEP_KEY_INDEX_4
M2M_WIFI_WEP_KEY_INDEX_4,
/*!< Index for WEP key Authentication
*/
}tenuM2mWepKeyIndex;
@ -485,7 +418,7 @@ typedef enum {
/*low power mode #1*/
PWR_LOW2,
/*low power mode #2*/
PWR_HIGH
PWR_HIGH,
/* high power mode*/
}tenuM2mPwrMode;
@ -516,7 +449,7 @@ typedef enum {
/*!< PPA Gain 6dbm PA Gain 18dbm */
TX_PWR_MED,
/*!< PPA Gain 6dbm PA Gain 12dbm */
TX_PWR_LOW
TX_PWR_LOW,
/*!< PPA Gain 6dbm PA Gain 6dbm */
}tenuM2mTxPwrLevel;
@ -583,7 +516,7 @@ typedef enum{
M2M_REQ_GROUP_OTA,
M2M_REQ_GROUP_SSL,
M2M_REQ_GROUP_CRYPTO,
M2M_REQ_GROUP_SIGMA
M2M_REQ_GROUP_SIGMA,
}tenuM2mReqGroup;
/*!
@ -718,16 +651,7 @@ typedef enum {
M2M_WIFI_RESP_GET_PRNG,
/*!< Response for PRNG.
*/
M2M_WIFI_REQ_SCAN_SSID_LIST,
/*!< Request scan with list of hidden SSID plus the broadcast scan.
*/
M2M_WIFI_REQ_SET_GAINS,
/*!< Request set the PPA gain
*/
M2M_WIFI_REQ_PASSIVE_SCAN,
/*!< Request a passivr scan command.
*/
M2M_WIFI_MAX_CONFIG_ALL
M2M_WIFI_MAX_CONFIG_ALL,
}tenuM2mConfigCmd;
/*!
@ -798,7 +722,7 @@ typedef enum {
M2M_WIFI_REQ_DOZE,
/*!< Used to force the WINC to sleep in manual PS mode.
*/
M2M_WIFI_MAX_STA_ALL
M2M_WIFI_MAX_STA_ALL,
} tenuM2mStaCmd;
/*!
@ -815,10 +739,7 @@ typedef enum {
M2M_WIFI_REQ_DISABLE_AP,
/*!< Disable AP mode command.
*/
M2M_WIFI_REQ_RESTART_AP,
/*!<
*/
M2M_WIFI_MAX_AP_ALL
M2M_WIFI_MAX_AP_ALL,
}tenuM2mApCmd;
/*!
@ -843,7 +764,7 @@ typedef enum {
/*!< This command is for internal use by the WINC and
should not be used by the host driver.
*/
M2M_WIFI_MAX_P2P_ALL
M2M_WIFI_MAX_P2P_ALL,
}tenuM2mP2pCmd;
@ -876,16 +797,12 @@ typedef enum {
M2M_OTA_REQ_NOTIF_SET_URL = M2M_OTA_CMD_BASE,
M2M_OTA_REQ_NOTIF_CHECK_FOR_UPDATE,
M2M_OTA_REQ_NOTIF_SCHED,
M2M_OTA_REQ_START_FW_UPDATE,
M2M_OTA_REQ_START_UPDATE,
M2M_OTA_REQ_SWITCH_FIRMWARE,
M2M_OTA_REQ_ROLLBACK_FW,
M2M_OTA_REQ_ROLLBACK,
M2M_OTA_RESP_NOTIF_UPDATE_INFO,
M2M_OTA_RESP_UPDATE_STATUS,
M2M_OTA_REQ_TEST,
M2M_OTA_REQ_START_CRT_UPDATE,
M2M_OTA_REQ_SWITCH_CRT_IMG,
M2M_OTA_REQ_ROLLBACK_CRT,
M2M_OTA_REQ_ABORT,
M2M_OTA_MAX_ALL,
}tenuM2mOtaCmd;
@ -907,7 +824,7 @@ typedef enum {
M2M_CRYPTO_RESP_RSA_SIGN_GEN,
M2M_CRYPTO_REQ_RSA_SIGN_VERIFY,
M2M_CRYPTO_RESP_RSA_SIGN_VERIFY,
M2M_CRYPTO_MAX_ALL
M2M_CRYPTO_MAX_ALL,
}tenuM2mCryptoCmd;
/*!
@ -947,16 +864,6 @@ typedef enum {
} tenuM2mSigmaCmd;
typedef enum{
M2M_SSL_REQ_CERT_VERIF,
M2M_SSL_REQ_ECC,
M2M_SSL_RESP_ECC,
M2M_SSL_IND_CRL,
M2M_SSL_IND_CERTS_ECC,
M2M_SSL_REQ_SET_CS_LIST,
M2M_SSL_RESP_SET_CS_LIST
}tenuM2mSslCmd;
/*!
@enum \
tenuM2mConnState
@ -1024,12 +931,9 @@ typedef enum {
@brief
Wi-Fi RF Channels.
@sa
tstrM2MScan
tstrM2MScanOption
*/
typedef enum {
M2M_WIFI_CH_1 = ((uint8) 1),
M2M_WIFI_CH_1 = ((uint8) 0),
M2M_WIFI_CH_2,
M2M_WIFI_CH_3,
M2M_WIFI_CH_4,
@ -1133,7 +1037,7 @@ typedef enum {
M2M_WIFI_MODE_ETHERNET,
/*!< etherent Mode
*/
M2M_WIFI_MODE_MAX
M2M_WIFI_MODE_MAX,
}tenuM2mWifiMode;
/*!
@ -1152,31 +1056,6 @@ typedef enum{
*/
}tenuWPSTrigger;
/*!
@struct \
tstrM2mWifiGainsParams
@brief
Gain Values
*/
typedef struct{
uint16 u8PPAGFor11B;
/*!< PPA gain for 11B (as the RF document represenation)
PPA_AGC<0:2> Every bit have 3dB gain control each.
for example:
1 ->3db
3 ->6db
7 ->9db
*/
uint16 u8PPAGFor11GN;
/*!< PPA gain for 11GN (as the RF document represented)
PPA_AGC<0:2> Every bit have 3dB gain control each.
for example:
1 ->3db
3 ->6db
7 ->9db
*/
}tstrM2mWifiGainsParams;
/*!
@struct \
@ -1359,14 +1238,13 @@ typedef struct{
/*!
@struct \
tstrM2MScanOption
tstrM2MScan
@brief
Scan options and configurations.
Wi-Fi Scan Request
@sa
tenuM2mScanCh
tstrM2MScan
*/
typedef struct {
uint8 u8NumOfSlot;
@ -1414,18 +1292,15 @@ typedef struct {
@sa
tenuM2mScanCh
tstrM2MScanOption
*/
typedef struct {
uint8 u8ChNum;
/*!< The Wi-Fi RF Channel number
*/
uint8 __RSVD8__[1];
/*!< Reserved for future use.
*/
uint16 u16PassiveScanTime;
/*!< Passive Scan Timeout in ms. The field is ignored for active scan.
uint8 __PAD24__[3];
/*!< Padding bytes for forcing 4-byte alignment
*/
}tstrM2MScan;
/*!
@ -1746,13 +1621,13 @@ typedef struct {
/*!< Wep key Index
*/
uint8 u8KeySz;
/*!< Wep/WPA key Size
/*!< Wep key Size
*/
uint8 au8WepKey[WEP_104_KEY_STRING_SIZE + 1];
/*!< Wep key
*/
uint8 u8SecType;
/*!< Security type: Open or WEP or WPA in the current implementation
/*!< Security type: Open or WEP only in the current implementation
*/
uint8 u8SsidHide;
/*!< SSID Status "Hidden(1)/Visible(0)"
@ -1760,10 +1635,7 @@ typedef struct {
uint8 au8DHCPServerIP[4];
/*!< Ap IP server address
*/
uint8 au8Key[M2M_MAX_PSK_LEN];
/*!< WPA key
*/
uint8 __PAD24__[2];
uint8 __PAD24__[3];
/*!< Padding bytes for forcing alignment
*/
}tstrM2MAPConfig;
@ -1880,9 +1752,6 @@ typedef struct {
uint32 u32SubnetMask;
/*!< Subnet mask for the local area network.
*/
uint32 u32DhcpLeaseTime;
/*!< Dhcp Lease Time in sec
*/
} tstrM2MIPConfig;
/*!
@ -1908,7 +1777,7 @@ typedef struct{
*/
typedef struct {
tstrM2MAPConfig strApConfig;
tstrM2MAPConfig strApConfig;
/*!<
Configuration parameters for the WiFi AP.
*/
@ -1916,7 +1785,7 @@ typedef struct {
/*!<
The device domain name for HTTP provisioning.
*/
uint8 u8EnableRedirect;
uint8 u8EnableRedirect;
/*!<
A flag to enable/disable HTTP redirect feature for the HTTP Provisioning server. If the Redirect is enabled,
all HTTP traffic (http://URL) from the device associated with WINC AP will be redirected to the HTTP Provisioning Web page.
@ -1996,7 +1865,6 @@ typedef struct{
*/
}tstrOtaInitHdr;
/*!
@struct \
@ -2104,8 +1972,6 @@ typedef enum {
/*!< OTA connection error */
OTA_STATUS_SERVER_ERROR = 9,
/*!< OTA server Error (file not found or else ...) */
OTA_STATUS_ABORTED = 10
/*!< OTA download has been aborted by the application. */
} tenuOtaUpdateStatus;
/*!
@enum \
@ -2125,9 +1991,6 @@ typedef enum {
RB_STATUS = 3,
/*!< Roll-back status
*/
AB_STATUS = 4
/*!< Abort status
*/
}tenuOtaUpdateStatusType;
@ -2208,7 +2071,6 @@ typedef struct{
uint8 u8Hour;
uint8 u8Minute;
uint8 u8Second;
uint8 __PAD8__;
}tstrSystemTime;
/*!
@ -2254,129 +2116,6 @@ typedef struct{
uint8 __PAD16__[2];
}tstrPrng;
/*
* TLS certificate revocation list
* Typedefs common between fw and host
*/
/*!
@struct \
tstrTlsCrlEntry
@brief
Certificate data for inclusion in a revocation list (CRL)
*/
typedef struct {
uint8 u8DataLen;
/*!<
Length of certificate data (maximum possible is @ref TLS_CRL_DATA_MAX_LEN)
*/
uint8 au8Data[TLS_CRL_DATA_MAX_LEN];
/*!<
Certificate data
*/
uint8 __PAD24__[3];
/*!<
Padding bytes for forcing 4-byte alignment
*/
}tstrTlsCrlEntry;
/*!
@struct \
tstrTlsCrlInfo
@brief
Certificate revocation list details
*/
typedef struct {
uint8 u8CrlType;
/*!<
Type of certificate data contained in list
*/
uint8 u8Rsv1;
/*!<
Reserved for future use
*/
uint8 u8Rsv2;
/*!<
Reserved for future use
*/
uint8 u8Rsv3;
/*!<
Reserved for future use
*/
tstrTlsCrlEntry astrTlsCrl[TLS_CRL_MAX_ENTRIES];
/*!<
List entries
*/
}tstrTlsCrlInfo;
/*!
@enum\
tenuSslCertExpSettings
@brief SSL Certificate Expiry Validation Options
*/
typedef enum{
SSL_CERT_EXP_CHECK_DISABLE,
/*!<
ALWAYS OFF.
Ignore certificate expiration date validation. If a certificate is
expired or there is no configured system time, the SSL connection SUCCEEDs.
*/
SSL_CERT_EXP_CHECK_ENABLE,
/*!<
ALWAYS ON.
Validate certificate expiration date. If a certificate is expired or
there is no configured system time, the SSL connection FAILs.
*/
SSL_CERT_EXP_CHECK_EN_IF_SYS_TIME
/*!<
CONDITIONAL VALIDATION (Default setting at startup).
Validate the certificate expiration date only if there is a configured system time.
If there is no configured system time, the certificate expiration is bypassed and the
SSL connection SUCCEEDs.
*/
}tenuSslCertExpSettings;
/*!
@struct \
tstrTlsSrvSecFileEntry
@brief
This struct contains a TLS certificate.
*/
typedef struct{
char acFileName[TLS_FILE_NAME_MAX];
/*!< Name of the certificate. */
uint32 u32FileSize;
/*!< Size of the certificate. */
uint32 u32FileAddr;
/*!< Error Code. */
}tstrTlsSrvSecFileEntry;
/*!
@struct \
tstrTlsSrvSecHdr
@brief
This struct contains a set of TLS certificates.
*/
typedef struct{
uint8 au8SecStartPattern[TLS_SRV_SEC_START_PATTERN_LEN];
/*!< Start pattern. */
uint32 u32nEntries;
/*!< Number of certificates stored in the struct. */
uint32 u32NextWriteAddr;
/*!< TLS Certificates. */
tstrTlsSrvSecFileEntry astrEntries[TLS_SRV_SEC_MAX_FILES];
}tstrTlsSrvSecHdr;
typedef struct{
uint32 u32CsBMP;
}tstrSslSetActiveCsList;
/**@}*/

File diff suppressed because it is too large Load Diff

View File

@ -4,7 +4,7 @@
*
* \brief This module contains NMC1500 ASIC specific internal APIs.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -67,10 +67,9 @@
#define REV_B0 (0x2B0)
#define REV_3A0 (0x3A0)
#define GET_CHIPID() nmi_get_chipid()
#define ISNMC1000(id) ((((id) & 0xfffff000) == 0x100000) ? 1 : 0)
#define ISNMC1500(id) ((((id) & 0xfffff000) == 0x150000) ? 1 : 0)
#define ISNMC3000(id) ((((id) & 0xfff00000) == 0x300000) ? 1 : 0)
#define REV(id) (((id) & 0x00000fff ))
#define ISNMC1000(id) (((id & 0xfffff000) == 0x100000) ? 1 : 0)
#define ISNMC1500(id) (((id & 0xfffff000) == 0x150000) ? 1 : 0)
#define REV(id) ( ((id) & 0x00000fff ) )
#define EFUSED_MAC(value) (value & 0xffff0000)
#define rHAVE_SDIO_IRQ_GPIO_BIT (NBIT0)
@ -81,7 +80,6 @@
#define rHAVE_LEGACY_RF_SETTINGS (NBIT5)
#define rHAVE_LOGS_DISABLED_BIT (NBIT6)
#define rHAVE_ETHERNET_MODE_BIT (NBIT7)
#define rHAVE_RESERVED1_BIT (NBIT8)
typedef struct{
uint32 u32Mac_efuse_mib;
@ -90,126 +88,61 @@ typedef struct{
#ifdef __cplusplus
extern "C" {
#endif
#endif
/**
* @fn nm_clkless_wake
* @brief Wakeup the chip using clockless registers
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
* @author Samer Sarhan
*/
sint8 nm_clkless_wake(void);
/*
* @fn cpu_halt
* @brief
*/
sint8 cpu_halt(void);
/*
* @fn chip_sleep
* @brief
*/
sint8 chip_sleep(void);
/*
* @fn chip_wake
* @brief
*/
sint8 chip_wake(void);
/*
* @fn chip_idle
* @brief
*/
void chip_idle(void);
/*
* @fn enable_interrupts
* @brief
*/
void enable_rf_blocks(void);
sint8 enable_interrupts(void);
/*
* @fn cpu_start
* @brief
*/
sint8 cpu_start(void);
/*
* @fn nmi_get_chipid
* @brief
*/
uint32 nmi_get_chipid(void);
/*
* @fn nmi_get_rfrevid
* @brief
*/
uint32 nmi_get_rfrevid(void);
/*
* @fn restore_pmu_settings_after_global_reset
* @brief
*/
void restore_pmu_settings_after_global_reset(void);
/*
* @fn nmi_update_pll
* @brief
*/
void nmi_update_pll(void);
/*
* @fn nmi_set_sys_clk_src_to_xo
* @brief
*/
void nmi_set_sys_clk_src_to_xo(void);
/*
* @fn chip_reset
* @brief
*/
sint8 chip_reset(void);
/*
* @fn wait_for_bootrom
* @brief
*/
sint8 wait_for_bootrom(uint8);
/*
* @fn wait_for_firmware_start
* @brief
*/
sint8 wait_for_firmware_start(uint8);
/*
* @fn chip_deinit
* @brief
*/
sint8 chip_deinit(void);
/*
* @fn chip_reset_and_cpu_halt
* @brief
*/
sint8 chip_reset_and_cpu_halt(void);
/*
* @fn set_gpio_dir
* @brief
*/
sint8 set_gpio_dir(uint8 gpio, uint8 dir);
/*
* @fn set_gpio_val
* @brief
*/
sint8 set_gpio_val(uint8 gpio, uint8 val);
/*
* @fn get_gpio_val
* @brief
*/
sint8 get_gpio_val(uint8 gpio, uint8* val);
/*
* @fn pullup_ctrl
* @brief
*/
sint8 pullup_ctrl(uint32 pinmask, uint8 enable);
/*
* @fn nmi_get_otp_mac_address
* @brief
*/
sint8 nmi_get_otp_mac_address(uint8 *pu8MacAddr, uint8 * pu8IsValid);
/*
* @fn nmi_get_mac_address
* @brief
*/
sint8 nmi_get_mac_address(uint8 *pu8MacAddr);
/*
* @fn chip_apply_conf
* @brief
*/
sint8 chip_apply_conf(uint32 u32conf);
#ifdef __cplusplus
}
#endif
#endif
#endif /*_NMASIC_H_*/

View File

@ -4,7 +4,7 @@
*
* \brief This module contains NMC1000 bus APIs implementation.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -65,14 +65,6 @@ sint8 nm_bus_iface_init(void *);
*/
sint8 nm_bus_iface_deinit(void);
/**
* @fn nm_bus_reset
* @brief reset bus interface
* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
* @version 1.0
*/
sint8 nm_bus_reset(void);
/**
* @fn nm_bus_iface_reconfigure
* @brief reconfigure bus interface
@ -121,7 +113,7 @@ sint8 nm_write_reg(uint32 u32Addr, uint32 u32Val);
* @param [in] u32Sz
* Number of bytes to read. The buffer size must be >= u32Sz
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
*/
*/
sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz);
/**
@ -134,7 +126,7 @@ sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz);
* @param [in] u32Sz
* Number of bytes to write. The buffer size must be >= u32Sz
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
*/
*/
sint8 nm_write_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz);

View File

@ -4,7 +4,7 @@
*
* \brief This module contains NMC1500 M2M driver APIs declarations.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -59,20 +59,8 @@ typedef struct {
uint8 BuildDate[sizeof(__DATE__)];
uint8 BuildTime[sizeof(__TIME__)];
uint8 _PAD8_;
uint16 u16FirmwareSvnNum;
uint16 _PAD16_[2];
} tstrM2mRev;
/**
* @struct tstrM2mBinaryHeader
* @brief Structure holding compatibility version info for firmware binaries
*/
typedef struct {
tstrM2mRev binVerInfo;
uint32 flashOffset;
uint32 payloadSize;
} tstrM2mBinaryHeader;
#ifdef __cplusplus
extern "C" {
#endif

View File

@ -4,7 +4,7 @@
*
* \brief This module contains NMC1000 I2C protocol bus APIs implementation.
*
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*

View File

@ -4,7 +4,7 @@
*
* \brief This module contains NMC1000 SPI protocol bus APIs implementation.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -54,18 +54,12 @@
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
*/
sint8 nm_spi_init(void);
/**
* @fn nm_spi_reset
* @brief reset the SPI
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
*/
sint8 nm_spi_reset(void);
/**
* @fn nm_spi_deinit
* @brief DeInitialize the SPI
* @brief DeInitialize the SPI
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
*/
*/
sint8 nm_spi_deinit(void);
/**

View File

@ -4,7 +4,7 @@
*
* \brief This module contains NMC1000 UART protocol bus APIs implementation.
*
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*

View File

@ -2,9 +2,9 @@
*
* \file
*
* \brief WINC Peripherals Application Interface.
* \brief Programmer APIs.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -38,32 +38,23 @@
* \asf_license_stop
*
*/
#ifndef __PROGRAMMER_H__
#define __PROGRAMMER_H__
/**
* Include
*/
#ifndef IMAGE_DOWNLOADER_H_INCLUDED
#define IMAGE_DOWNLOADER_H_INCLUDED
#include "spi_flash/include/spi_flash_map.h"
#include "spi_flash/include/spi_flash.h"
#include "programmer/programmer_apis.h"
#define ROOT_CERT_SIZE M2M_TLS_FLASH_ROOTCERT_CACHE_SIZE
#define ROOT_CERT_SIZE M2M_TLS_ROOTCER_FLASH_SIZE
#define programmer_get_flash_size() (((spi_flash_get_size() * 1024) / 8) * 1024)
#define programmer_write(pu8Buf, u32Offset, u32Sz) spi_flash_write(pu8Buf, u32Offset, u32Sz)
#define programmer_erase(u32Offset, u32Sz) spi_flash_erase(u32Offset, u32Sz)
#define programmer_eraseall() programmer_erase(0, programmer_get_flash_size())
#define programmer_read(pu8Buf, u32Offset, u32Sz) spi_flash_read(pu8Buf, u32Offset, u32Sz)
#define programmer_get_flash_size() (((spi_flash_get_size()*1024)/8)*1024)
#define programmer_write(pu8Buf, u32Offset, u32Sz) spi_flash_write(pu8Buf, u32Offset, u32Sz)
#define programmer_erase(u32Offset, u32Sz) spi_flash_erase(u32Offset, u32Sz)
#define programmer_eraseall() programmer_erase(0, programmer_get_flash_size())
#define programmer_read(pu8Buf, u32Offset, u32Sz) spi_flash_read(pu8Buf, u32Offset, u32Sz)
#define programmer_write_root_cert(buff) programmer_write((uint8*)buff, M2M_TLS_ROOTCER_FLASH_OFFSET, M2M_TLS_ROOTCER_FLASH_SIZE)
#define programmer_read_root_cert(buff) programmer_read((uint8*)buff, M2M_TLS_ROOTCER_FLASH_OFFSET, M2M_TLS_ROOTCER_FLASH_SIZE)
#define programmer_erase_root_cert() programmer_erase(M2M_TLS_ROOTCER_FLASH_OFFSET, M2M_TLS_ROOTCER_FLASH_SIZE)
#define programmer_write_tls_cert_store(buff) programmer_write((uint8*)buff, M2M_TLS_SERVER_FLASH_OFFSET, M2M_TLS_SERVER_FLASH_SIZE)
#define programmer_read_tls_cert_store(buff) programmer_read((uint8*)buff, M2M_TLS_SERVER_FLASH_OFFSET, M2M_TLS_SERVER_FLASH_SIZE)
#define programmer_erase_tls_cert_store() programmer_erase(M2M_TLS_SERVER_FLASH_OFFSET, M2M_TLS_SERVER_FLASH_SIZE)
#endif /* __PROGRAMMER_H__ */
int burn_firmware(void);
int verify_firmware(void);
int dump_firmware(void);
#endif /* IMAGE_DOWNLOADER_H_INCLUDED */

View File

@ -4,7 +4,7 @@
*
* \brief Programmer APIs.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -43,7 +43,6 @@
#define FIRMWARE_PROGRAMMER_APIS_H_INCLUDED
#include "common/include/nm_common.h"
#include "programmer/programmer.h"
#include "spi_flash/include/spi_flash_map.h"
#define programmer_write_cert_image(buff) programmer_write((uint8*)buff, M2M_TLS_FLASH_ROOTCERT_CACHE_OFFSET, M2M_TLS_FLASH_ROOTCERT_CACHE_SIZE)
@ -54,5 +53,4 @@
#define programmer_read_firmware_image(buff,offSet,sz) programmer_read((uint8*)buff, offSet, sz)
#define programmer_erase_all() programmer_erase(0, programmer_get_flash_size())
#endif /* FIRMWARE_PROGRAMMER_APIS_H_INCLUDED */

View File

@ -2,9 +2,9 @@
*
* \file
*
* \brief BSD compatible socket interface internal types.
* \brief BSD alike socket interface internal types.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -62,10 +62,6 @@ INCLUDES
MACROS
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
/*
* HOSTNAME_MAX_SIZE is defined here and also in host_drv/socket/include/socket.h
* The two definitions must match.
*/
#ifdef _FIRMWARE_
#define HOSTNAME_MAX_SIZE (64)
#endif
@ -176,31 +172,11 @@ MACROS
#define SOCKET_CMD_SSL_SET_SOCK_OPT 0x51
/*!<
*/
#define SOCKET_CMD_PING 0x52
/*!<
*/
#define SOCKET_CMD_SSL_SET_CS_LIST 0x53
/*!<
Recommend instead using @ref M2M_SSL_REQ_SET_CS_LIST and
associated response @ref M2M_SSL_RESP_SET_CS_LIST
*/
#define SOCKET_CMD_SSL_BIND 0x54
/*!<
*/
#define SOCKET_CMD_SSL_EXP_CHECK 0x55
/*!<
*/
#define PING_ERR_SUCCESS 0
@ -245,9 +221,9 @@ typedef struct{
*/
typedef struct{
tstrSockAddr strAddr;
SOCKET sock;
uint8 u8Void;
uint16 u16SessionID;
SOCKET sock;
uint8 u8Void;
uint16 u16SessionID;
}tstrBindCmd;
@ -284,7 +260,7 @@ typedef struct{
*/
typedef struct{
SOCKET sock;
sint8 s8Status;
sint8 s8Status;
uint16 u16SessionID;
}tstrListenReply;
@ -296,11 +272,7 @@ typedef struct{
tstrSockAddr strAddr;
SOCKET sListenSock;
SOCKET sConnectedSock;
uint16 u16AppDataOffset;
/*!<
In further packet send requests the host interface should put the user application
data at this offset in the allocated shared data packet.
*/
uint16 u16Void;
}tstrAcceptReply;
@ -378,7 +350,7 @@ typedef struct{
@brief
*/
typedef struct{
tstrSockAddr strRemoteAddr;
tstrSockAddr strRemoteAddr;
sint16 s16RecvStatus;
uint16 u16DataOffset;
SOCKET sock;
@ -438,21 +410,9 @@ typedef struct{
}tstrPingReply;
/*!
@struct\
tstrSslCertExpSettings
@brief SSL Certificate Expiry Validation Settings
@sa tenuSslCertExpSettings
*/
typedef struct{
uint32 u32CertExpValidationOpt;
/*!<
See @tenuSslCertExpSettings for possible values.
*/
}tstrSslCertExpSettings;
uint32 u32CsBMP;
}tstrSslSetActiveCsList;
#ifdef __cplusplus
}

View File

@ -2,9 +2,9 @@
*
* \file
*
* \brief WINC BSD compatible Socket Interface.
* \brief BSD alike socket interface.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -47,7 +47,7 @@ extern "C" {
#endif
/** \defgroup SocketHeader Socket
* BSD compatible socket interface beftween the host layer and the network
* BSD alike socket interface beftween the host layer and the network
* protocol stacks in the firmware.
* These functions are used by the host application to send or receive
* packets and to do other socket operations.
@ -58,7 +58,6 @@ INCLUDES
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
#include "common/include/nm_common.h"
#include "driver/include/m2m_types.h"
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
MACROS
@ -73,11 +72,6 @@ MACROS
* The following list of macros are used to define constants used throughout the socket layer.
* @{
*/
/*
* HOSTNAME_MAX_SIZE is defined here and also in host_drv/socket/include/m2m_socket_host_if.h
* The two definitions must match.
*/
#define HOSTNAME_MAX_SIZE 64
/*!<
Maximum allowed size for a host domain name passed to the function gethostbyname @ref gethostbyname.
@ -152,14 +146,14 @@ MACROS
#define IP_ADD_MEMBERSHIP 0x01
/*!<
Set Socket Option Add Membership command value (to join a multicast group).
Set Socket Option Add Membership command value.
Used with the @ref setsockopt function.
*/
#define IP_DROP_MEMBERSHIP 0x02
/*!<
Set Socket Option Drop Membership command value (to leave a multicast group).
Set Socket Option Drop Membership command value.
Used with the @ref setsockopt function.
*/
//@}
@ -196,7 +190,7 @@ MACROS
/*!<
Set the Server Name Indicator (SNI) for an SSL socket. The
SNI is a NULL terminated string containing the server name
associated with the connection. It must not exceed the size
assocated with the connection. It must not exceed the size
of HOSTNAME_MAX_SIZE.
*/
@ -208,195 +202,69 @@ MACROS
TLS Protocol session resume features.
*/
#define SO_SSL_ENABLE_SNI_VALIDATION 0x04
/*!<
Enable SNI validation against the server's certificate subject
common name. If there is no SNI provided (via the SO_SSL_SNI
option), setting this option does nothing.
*/
//@}
/** @defgroup LegacySSLCipherSuite Legacy names for TLS Cipher Suite IDs
/** @defgroup SSLCipherSuiteConfiguration TLS Cipher Suite Configurations
* @ingroup TLSDefines
* The following list of macros MUST NOT be used. Instead use the new names under SSLCipherSuiteID
* The following list of macros are used to define SSL Ciphersuite Configuration.
* @sa sslSetActiveCipherSuites
* @{
*/
#define SSL_ENABLE_ALL_SUITES 0xfffffffful
/*!<
Enable all possible supported cipher suites.
*/
#define SSL_ENABLE_RSA_SHA_SUITES 0x01
/*!<
Enable RSA Hmac_SHA based Cipher suites. For example,
Enable RSA Hmac_SHA based Ciphersuites. For example,
TLS_RSA_WITH_AES_128_CBC_SHA
*/
#define SSL_ENABLE_RSA_SHA256_SUITES 0x02
/*!<
Enable RSA Hmac_SHA256 based Cipher suites. For example,
Enable RSA Hmac_SHA256 based Ciphersuites. For example,
TLS_RSA_WITH_AES_128_CBC_SHA256
*/
#define SSL_ENABLE_DHE_SHA_SUITES 0x04
/*!<
Enable DHE Hmac_SHA based Cipher suites. For example,
Enable DHE Hmac_SHA based Ciphersuites. For example,
TLS_DHE_RSA_WITH_AES_128_CBC_SHA
*/
#define SSL_ENABLE_DHE_SHA256_SUITES 0x08
/*!<
Enable DHE Hmac_SHA256 based Cipher suites. For example,
Enable DHE Hmac_SHA256 based Ciphersuites. For example,
TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
*/
#define SSL_ENABLE_RSA_GCM_SUITES 0x10
/*!<
Enable RSA AEAD based Cipher suites. For example,
Enable RSA AEAD based Ciphersuites. For example,
TLS_RSA_WITH_AES_128_GCM_SHA256
*/
#define SSL_ENABLE_DHE_GCM_SUITES 0x20
/*!<
Enable DHE AEAD based Cipher suites. For example,
Enable DHE AEAD based Ciphersuites. For example,
TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
*/
#define SSL_ENABLE_ALL_SUITES 0x0000003F
/*!<
Enable all possible supported cipher suites.
*/
//@}
/** @defgroup SSLCipherSuiteID TLS Cipher Suite IDs
* @ingroup TLSDefines
* The following list of macros defined the list of supported TLS Cipher suites.
* Each MACRO defines a single Cipher suite.
* @sa m2m_ssl_set_active_ciphersuites
* @{
*/
#define SSL_CIPHER_RSA_WITH_AES_128_CBC_SHA NBIT0
#define SSL_CIPHER_RSA_WITH_AES_128_CBC_SHA256 NBIT1
#define SSL_CIPHER_DHE_RSA_WITH_AES_128_CBC_SHA NBIT2
#define SSL_CIPHER_DHE_RSA_WITH_AES_128_CBC_SHA256 NBIT3
#define SSL_CIPHER_RSA_WITH_AES_128_GCM_SHA256 NBIT4
#define SSL_CIPHER_DHE_RSA_WITH_AES_128_GCM_SHA256 NBIT5
#define SSL_CIPHER_RSA_WITH_AES_256_CBC_SHA NBIT6
#define SSL_CIPHER_RSA_WITH_AES_256_CBC_SHA256 NBIT7
#define SSL_CIPHER_DHE_RSA_WITH_AES_256_CBC_SHA NBIT8
#define SSL_CIPHER_DHE_RSA_WITH_AES_256_CBC_SHA256 NBIT9
#define SSL_CIPHER_ECDHE_RSA_WITH_AES_128_CBC_SHA NBIT10
#define SSL_CIPHER_ECDHE_RSA_WITH_AES_256_CBC_SHA NBIT11
#define SSL_CIPHER_ECDHE_RSA_WITH_AES_128_CBC_SHA256 NBIT12
#define SSL_CIPHER_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 NBIT13
#define SSL_CIPHER_ECDHE_RSA_WITH_AES_128_GCM_SHA256 NBIT14
#define SSL_CIPHER_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 NBIT15
#define SSL_ECC_ONLY_CIPHERS \
(\
SSL_CIPHER_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 | \
SSL_CIPHER_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 \
)
/*!<
All ciphers that use ECC crypto only. This execuldes ciphers that use RSA. They use ECDSA instead.
These ciphers are turned off by default at startup.
The application may enable them if it has an ECC math engine (like ATECC508).
*/
#define SSL_ECC_ALL_CIPHERS \
(\
SSL_CIPHER_ECDHE_RSA_WITH_AES_128_CBC_SHA | \
SSL_CIPHER_ECDHE_RSA_WITH_AES_128_CBC_SHA256 | \
SSL_CIPHER_ECDHE_RSA_WITH_AES_128_GCM_SHA256 | \
SSL_CIPHER_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 | \
SSL_CIPHER_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 \
)
/*!<
All supported ECC Ciphers including those ciphers that depend on RSA and ECC.
These ciphers are turned off by default at startup.
The application may enable them if it has an ECC math engine (like ATECC508).
*/
#define SSL_NON_ECC_CIPHERS_AES_128 \
(\
SSL_CIPHER_RSA_WITH_AES_128_CBC_SHA | \
SSL_CIPHER_RSA_WITH_AES_128_CBC_SHA256 | \
SSL_CIPHER_DHE_RSA_WITH_AES_128_CBC_SHA | \
SSL_CIPHER_DHE_RSA_WITH_AES_128_CBC_SHA256 | \
SSL_CIPHER_RSA_WITH_AES_128_GCM_SHA256 | \
SSL_CIPHER_DHE_RSA_WITH_AES_128_GCM_SHA256 \
)
/*!<
All supported AES-128 Ciphers (ECC ciphers are not counted). This is the default active group after startup.
*/
#define SSL_ECC_CIPHERS_AES_256 \
(\
SSL_CIPHER_ECDHE_RSA_WITH_AES_256_CBC_SHA \
)
/*!<
ECC AES-256 supported ciphers.
*/
#define SSL_NON_ECC_CIPHERS_AES_256 \
(\
SSL_CIPHER_RSA_WITH_AES_256_CBC_SHA | \
SSL_CIPHER_RSA_WITH_AES_256_CBC_SHA256 | \
SSL_CIPHER_DHE_RSA_WITH_AES_256_CBC_SHA | \
SSL_CIPHER_DHE_RSA_WITH_AES_256_CBC_SHA256 \
)
/*!<
AES-256 Ciphers.
This group is disabled by default at startup because the WINC1500 HW Accelerator
supports only AES-128. If the application needs to force AES-256 cipher support,
it could enable them (or any of them) explicitly by calling sslSetActiveCipherSuites.
*/
#define SSL_CIPHER_ALL \
(\
SSL_CIPHER_RSA_WITH_AES_128_CBC_SHA | \
SSL_CIPHER_RSA_WITH_AES_128_CBC_SHA256 | \
SSL_CIPHER_DHE_RSA_WITH_AES_128_CBC_SHA | \
SSL_CIPHER_DHE_RSA_WITH_AES_128_CBC_SHA256 | \
SSL_CIPHER_RSA_WITH_AES_128_GCM_SHA256 | \
SSL_CIPHER_DHE_RSA_WITH_AES_128_GCM_SHA256 | \
SSL_CIPHER_RSA_WITH_AES_256_CBC_SHA | \
SSL_CIPHER_RSA_WITH_AES_256_CBC_SHA256 | \
SSL_CIPHER_DHE_RSA_WITH_AES_256_CBC_SHA | \
SSL_CIPHER_DHE_RSA_WITH_AES_256_CBC_SHA256 | \
SSL_CIPHER_ECDHE_RSA_WITH_AES_128_CBC_SHA | \
SSL_CIPHER_ECDHE_RSA_WITH_AES_128_CBC_SHA256 | \
SSL_CIPHER_ECDHE_RSA_WITH_AES_128_GCM_SHA256 | \
SSL_CIPHER_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 | \
SSL_CIPHER_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 | \
SSL_CIPHER_ECDHE_RSA_WITH_AES_256_CBC_SHA \
)
/*!<
Turn On All TLS Ciphers.
*/
//@}
/**************
Socket Errors
**************/
@ -408,7 +276,7 @@ Socket Errors
*/
#define SOCK_ERR_NO_ERROR 0
/*!<
Successful socket operation
Successfull socket operation
*/
@ -443,7 +311,7 @@ Socket Errors
#define SOCK_ERR_INVALID_ARG -6
/*!<
An invalid argument is passed to a function.
An invalid arguement is passed to a function.
*/
@ -478,7 +346,7 @@ Socket Errors
#define SOCK_ERR_TIMEOUT -13
/*!<
The socket pending operation has Timedout.
The socket pending operation has timedout.
*/
@ -525,9 +393,9 @@ Socket Errors
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
DATA TYPES
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
/** @defgroup SocketEnums DataTypes
/** @defgroup SocketEnums Enumeration-Typedef
* @ingroup SocketHeader
* Specific Enumeration-typedefs used for socket operations
* Specific Enumuration-typdefs used for socket operations
* @{ */
/*!
@ -570,7 +438,7 @@ typedef struct{
@brief
Generic socket address structure.
@see
@see \
sockaddr_in
*/
struct sockaddr{
@ -590,13 +458,13 @@ Socket address family.
sockaddr_in
@brief
Socket address structure for IPV4 addresses. Used to specify socket address information to which to connect to.
Socket address structure for IPV4 addresses. Used to specify socket address infomation to which to connect to.
Can be cast to @ref sockaddr structure.
*/
struct sockaddr_in{
uint16 sin_family;
/*!<
Specifies the address family(AF).
Specifies the address familly(AF).
Members of AF_INET address family are IPv4 addresses.
Hence,the only supported value for this is AF_INET.
*/
@ -621,7 +489,7 @@ struct sockaddr_in{
//@}
/**@defgroup AsyncCalback Asynchronous Events
* @ingroup SocketEnums
* Specific Enumeration used for asynchronous operations
* Specific Enumuration used for asynchronous operations
* @{ */
/*!
@enum \
@ -631,7 +499,7 @@ struct sockaddr_in{
Asynchronous APIs, make use of callback functions, in-order to return back the results once the corresponding socket operation is completed.
Hence resuming the normal execution of the application code while the socket operation returns the results.
Callback functions expect event messages to be passed in, in-order to identify the operation they're returning the results for.
The following enum identifies the type of events that are received in the callback function.
The following enum identifes the type of events that are received in the callback function.
Application Use:
In order for application developers to handle the pending events from the network controller through the callback functions.
@ -715,7 +583,7 @@ typedef struct{
@brief Socket listen status.
Socket listen information is returned through this structure in response to the asynchronous call to the @ref listen function.
This structure together with the event @ref SOCKET_MSG_LISTEN are passed-in parameters to the callback function.
This structure together with the event @ref SOCKET_MSG_LISTEN are passed-in paramters to the callback function.
@see
listen
*/
@ -758,7 +626,7 @@ typedef struct{
@brief Socket connect status.
Socket connect information is returned through this structure in response to the asynchronous call to the @ref connect socket function.
This structure together with the event @ref SOCKET_MSG_CONNECT are passed-in parameters to the callback function.
This structure together with the event @ref SOCKET_MSG_CONNECT are passed-in paramters to the callback function.
*/
typedef struct{
SOCKET sock;
@ -788,7 +656,7 @@ typedef struct{
a negative or zero buffer size indicates an error with the following code:
@ref SOCK_ERR_NO_ERROR : Socket connection closed
@ref SOCK_ERR_CONN_ABORTED : Socket connection aborted
@SOCK_ERR_TIMEOUT : Socket receive timed out
@SOCK_ERR_TIMEOUT : Socket recieve timed out
*/
typedef struct{
uint8 *pu8Buffer;
@ -797,7 +665,7 @@ typedef struct{
*/
sint16 s16BufferSize;
/*!<
The received data chunk size.
The recevied data chunk size.
Holds a negative value if there is a receive error or ZERO on success upon reception of close socket message.
*/
uint16 u16RemainingSize;
@ -906,7 +774,7 @@ FUNCTION PROTOTYPES
/** @defgroup SocketInitalizationFn socketInit
* @ingroup SocketAPI
* The function performs the necessary initializations for the socket library through the following steps:
- A check made by the global variable gbSocketInit, ensuring that initialization for sockets is performed only once,
- A check made by the global variable gbSocketInit, ensuring that initialzation for sockets is performed only once,
in-order to prevent reseting the socket instances already created in the global socket array (gastrSockets).
- Zero initializations to the global socket array (gastrSockets), which holds the list of TCP sockets.
- Registers the socket (Host Interface)hif callback function through the call to the hif_register_cb function.
@ -925,7 +793,7 @@ FUNCTION PROTOTYPES
@remarks
This initialization function must be invoked before any socket operation is performed.
No error codes from this initialization function since the socket array is statically allocated based in the maximum number of
sockets @ref MAX_SOCKET based on the systems capability.
sockets @ref MAX_SOCKET based on the systems capibility.
\section Example
This example demonstrates the use of the socketinit for socket initialization for an mqtt chat application.
\code
@ -956,7 +824,6 @@ This example demonstrates the use of the socketinit for socket initialization fo
*/
NMI_API void socketInit(void);
/*!
@fn \
NMI_API void socketDeinit(void);
@ -967,8 +834,6 @@ NMI_API void socketInit(void);
It must be invoked as the last any socket operation is performed on any active sockets.
*/
NMI_API void socketDeinit(void);
/** @} */
/** @defgroup SocketCallbackFn registerSocketCallback
* @ingroup SocketAPI
@ -989,13 +854,13 @@ NMI_API void socketDeinit(void);
@param [in] tpfAppResolveCb
Assignment of callback function to the global callback @ref tpfAppResolveCb gpfAppResolveCb.
Used for DNS resolving functionalities. The DNS resolving technique is determined by the application
Used for DNS resolving functionalites. The DNS resolving technique is determined by the application
registering the callback.
NULL is assigned when, DNS resolution is not required.
@return void
@remarks
If any of the socket functionalities is not to be used, NULL is passed in as a parameter.
If any of the socket functionaities is not to be used, NULL is passed in as a parameter.
It must be invoked after socketinit and before other socket layer operations.
\section Example
@ -1041,8 +906,6 @@ NMI_API void socketDeinit(void);
\endcode
*/
NMI_API void registerSocketCallback(tpfAppSocketCb socket_cb, tpfAppResolveCb resolve_cb);
/** @} */
/** @defgroup SocketFn socket
@ -1067,8 +930,8 @@ NMI_API void registerSocketCallback(tpfAppSocketCb socket_cb, tpfAppResolveCb re
@param [in] u8Flags
Used to specify the socket creation flags. It shall be set to zero for normal TCP/UDP sockets.
It could be @ref SOCKET_FLAGS_SSL if the socket is used for SSL session. The use of the flag
@ref SOCKET_FLAGS_SSL has no meaning in case of UDP sockets.
If could be SOCKET_FLAGS_SSL if the socket is used for SSL session. The use of the flag
[SOCKET_FLAGS_SSL](@ref SOCKET_FLAGS_SSL) has no meaning in case of UDP sockets.
@pre
The @ref socketInit function must be called once at the beginning of the application to initialize the socket handler.
@ -1094,7 +957,7 @@ NMI_API void registerSocketCallback(tpfAppSocketCb socket_cb, tpfAppResolveCb re
@ref SOCK_ERR_MAX_TCP_SOCK if the number of TCP allocated sockets exceeds the number of available sockets.
@remarks
The socket function must be called a priori to any other related socket functions "e.g. send, recv, close ..etc"
The socket function must be called apriori any other related socket functions "e.g. send, recv, close ..etc"
\section Example
This example demonstrates the use of the socket function to allocate the socket, returning the socket handler to be used for other
socket operations. Socket creation is dependent on the socket type.
@ -1111,16 +974,8 @@ socket operations. Socket creation is dependent on the socket type.
tcp_client_socket = socket(AF_INET, SOCK_STREAM, 0));
@endcode
\subsection sub3 SSL example
@code
static SOCKET ssl_socket = -1;
ssl_socket = socket(AF_INET, SOCK_STREAM, SOCK_FLAGS_SSL));
@endcode
*/
NMI_API SOCKET WINC1500_EXPORT(socket)(uint16 u16Domain, uint8 u8Type, uint8 u8Flags);
/** @} */
/** @defgroup BindFn bind
* @ingroup SocketAPI
@ -1179,19 +1034,20 @@ NMI_API SOCKET WINC1500_EXPORT(socket)(uint16 u16Domain, uint8 u8Type, uint8 u8F
if(udpServerSocket == -1)
{
udpServerSocket = socket(AF_INET, SOCK_DGRAM, 0);
udpServerSocket = socket(AF_INET,SOCK_DGRAM,0);
if(udpServerSocket >= 0)
{
addr.sin_family = AF_INET;
addr.sin_port = _htons(1234);
addr.sin_family = AF_INET;
addr.sin_port = _htons(UDP_SERVER_PORT);
addr.sin_addr.s_addr = 0;
ret = bind(udpServerSocket,(struct sockaddr*)&addr,sizeof(addr));
if(ret != 0)
if(ret == 0)
printf("Bind success!\n");
else
{
printf("Bind Failed. Error code = %d\n",ret);
close(udpServerSocket);
}
}
else
{
@ -1202,21 +1058,19 @@ NMI_API SOCKET WINC1500_EXPORT(socket)(uint16 u16Domain, uint8 u8Type, uint8 u8F
@endcode
*/
NMI_API sint8 WINC1500_EXPORT(bind)(SOCKET sock, struct sockaddr *pstrAddr, uint8 u8AddrLen);
/** @} */
/** @defgroup ListenFn listen
* @ingroup SocketAPI
* After successful socket binding to an IP address and port on the system, start listening on a passive socket for incoming connections.
The socket must be bound on a local port or the listen operation fails.
The socket must be bound on a local port or the listen operationfails.
Upon the call to the asynchronous listen function, response is received through the event [SOCKET_MSG_BIND](@ref SOCKET_MSG_BIND)
in the socket callback.
A successful listen means the TCP server operation is active. If a connection is accepted, then the application socket callback function is
notified with the new connected socket through the event @ref SOCKET_MSG_ACCEPT. Hence there is no need to call the @ref accept function
after calling @ref listen.
After a connection is accepted, the user is then required to call the @ref recv to receive any packets transmitted by the remote host or to receive notification of socket connection
After a connection is accepted, the user is then required to call the @ref recv to recieve any packets transmitted by the remote host or to recieve notification of socket connection
termination.
*/
/**@{*/
@ -1330,7 +1184,7 @@ NMI_API sint8 WINC1500_EXPORT(listen)(SOCKET sock, uint8 backlog);
/** @defgroup AcceptFn accept
* @ingroup SocketAPI
* The function has no current implementation. An empty deceleration is used to prevent errors when legacy application code is used.
* For recent application use, the accept function can be safer as it has no effect and could be safely removed from any application using it.
* For recent application use, the accept function can be saferIt has no effect and could be safely removed from any application using it.
*/
/**@{*/
/*!
@ -1363,7 +1217,7 @@ NMI_API sint8 WINC1500_EXPORT(accept)(SOCKET sock, struct sockaddr *addr, uint8
The asynchronous connect function must be called after receiving a valid socket ID from the @ref socket function.
The application socket callback function is notified of a successful new socket connection through the event @ref SOCKET_MSG_CONNECT.
A successful connect means the TCP session is active. The application is then required to make a call to the @ref recv
to receive any packets transmitted by the remote server, unless the application is interrupted by a notification of socket connection
to recieve any packets transmitted by the remote server, unless the application is interrupted by a notification of socket connection
termination.
*/
/**@{*/
@ -1463,17 +1317,17 @@ NMI_API sint8 WINC1500_EXPORT(connect)(SOCKET sock, struct sockaddr *pstrAddr, u
/** @} */
/** @defgroup ReceiveFn recv
* @ingroup SocketAPI
* An asynchronous receive function, used to retrieve data from a TCP stream.
* An asynchrnonous receive function, used to retrieve data from a TCP stream.
Before calling the recv function, a successful socket connection status must have been received through any of the two socket events
[SOCKET_MSG_CONNECT] or [SOCKET_MSG_ACCEPT], from the socket callback. Hence, indicating that the socket is already connected to a remote
host.
The application receives the required data in response to this asynchronous call through the reception of the event @ref SOCKET_MSG_RECV in the
socket callback.
Receiving the SOCKET_MSG_RECV message in the callback with zero or negative buffer length indicates the following:
Recieving the SOCKET_MSG_RECV message in the callback with zero or negative buffer length indicates the following:
- SOCK_ERR_NO_ERROR : Socket connection closed
- SOCK_ERR_CONN_ABORTED : Socket connection aborted
- SOCK_ERR_TIMEOUT : Socket receive timed out
- SOCK_ERR_TIMEOUT : Socket recieve timed out
The application code is expected to close the socket through the call to the @ref close function upon the appearance of the above mentioned errors.
*/
/**@{*/
@ -1521,7 +1375,7 @@ NMI_API sint8 WINC1500_EXPORT(connect)(SOCKET sock, struct sockaddr *pstrAddr, u
Indicating passing invalid arguments such as negative socket ID or NULL Recieve buffer.
- [SOCK_ERR_BUFFER_FULL](@ref SOCK_ERR_BUFFER_FULL)
Indicate socket receive failure.
Indicate socket recieve failure.
\section Example
The example demonstrates a code snippet for the calling of the recv function in the socket callback upon notification of the accept or connect events, and the parsing of the
received data when the SOCKET_MSG_RECV event is received.
@ -1573,14 +1427,14 @@ NMI_API sint16 WINC1500_EXPORT(recv)(SOCKET sock, void *pvRecvBuf, uint16 u16Buf
/** @} */
/** @defgroup ReceiveFromSocketFn recvfrom
* @ingroup SocketAPI
* Receives data from a UDP Socket.
* Recieves data from a UDP Scoket.
*
* The asynchronous recvfrom function is used to retrieve data from a UDP socket. The socket must already be bound to
* a local port before a call to the recvfrom function is made (i.e message @ref SOCKET_MSG_BIND is received
* a local port before a call to the recvfrom function is made (i.e message @ref SOCKET_MSG_BIND is recieved
* with successful status in the socket callback).
*
* Upon calling the recvfrom function with a successful return code, the application is expected to receive a notification
* in the socket callback whenever a message is received through the @ref SOCKET_MSG_RECVFROM event.
* in the socket callback whenever a message is recieved through the @ref SOCKET_MSG_RECVFROM event.
*
* Receiving the SOCKET_MSG_RECVFROM message in the callback with zero, indicates that the socket is closed.
* Whereby a negative buffer length indicates one of the socket error codes such as socket timeout error @SOCK_ERR_TIMEOUT:
@ -1610,7 +1464,7 @@ NMI_API sint16 WINC1500_EXPORT(recv)(SOCKET sock, void *pvRecvBuf, uint16 u16Buf
will be set to infinite (the recv function waits forever).
@pre
- The socket function must be called to allocate a UDP socket before passing the socket ID to the recvfrom function.
- The socket function must be called to allocate a TCP socket before passing the socket ID to the recv function.
- The socket corresponding to the socket ID must be successfully bound to a local port through the call to a @ref bind function.
@see
@ -1625,10 +1479,10 @@ NMI_API sint16 WINC1500_EXPORT(recv)(SOCKET sock, void *pvRecvBuf, uint16 u16Buf
Indicating that the operation was successful.
- [SOCK_ERR_INVALID_ARG](@ref SOCK_ERR_INVALID_ARG)
Indicating passing invalid arguments such as negative socket ID or NULL Receive buffer.
Indicating passing invalid arguments such as negative socket ID or NULL Recieve buffer.
- [SOCK_ERR_BUFFER_FULL](@ref SOCK_ERR_BUFFER_FULL)
Indicate socket receive failure.
Indicate socket recieve failure.
\section Example
The example demonstrates a code snippet for the calling of the recvfrom function in the socket callback upon notification of a successful bind event, and the parsing of the
received data when the SOCKET_MSG_RECVFROM event is received.
@ -1723,7 +1577,7 @@ NMI_API sint16 WINC1500_EXPORT(recvfrom)(SOCKET sock, void *pvRecvBuf, uint16 u1
For UDP Socket:\n
UDP sockets most commonly use @ref sendto function, where the destination address is defined. However, in-order to send outgoing data
using the @ref send function, at least one successful call must be made to the @ref sendto function a priori the consecutive calls to the @ref send function,
using the @ref send function, atleast one successful call must be made to the @ref sendto function apriori the consecutive calls to the @ref send function,
to ensure that the destination address is saved in the firmware.
@see
@ -1737,7 +1591,7 @@ NMI_API sint16 WINC1500_EXPORT(recvfrom)(SOCKET sock, void *pvRecvBuf, uint16 u1
@warning
u16SendLength must not exceed @ref SOCKET_BUFFER_MAX_LENGTH. \n
Use a valid socket identifier through the a prior call to the @ref socket function.
Use a valid socket identifer through the aprior call to the @ref socket function.
Must use a valid buffer pointer.
Successful completion of a call to send() does not guarantee delivery of the message,
A negative return value indicates only locally-detected errors
@ -1822,7 +1676,7 @@ NMI_API sint16 WINC1500_EXPORT(sendto)(SOCKET sock, void *pvSendBuffer, uint16 u
@pre
Sockets must be initialized through the call of the socketInit function.
@ref close is called only for valid socket identifiers created through the @ref socket function.
@ref close is called only for valid socket identifers created through the @ref socket function.
@warning
If @ref close is called while there are still pending messages (sent or received ) they will be discarded.
@ -1835,13 +1689,11 @@ NMI_API sint16 WINC1500_EXPORT(sendto)(SOCKET sock, void *pvSendBuffer, uint16 u
The function returned @ref SOCK_ERR_NO_ERROR for successful operation and a negative value (indicating the error) otherwise.
*/
NMI_API sint8 WINC1500_EXPORT(close)(SOCKET sock);
/** @} */
/** @defgroup InetAddressFn nmi_inet_addr
* @ingroup SocketAPI
* Synchronous function which returns a BSD socket compliant Internet Protocol (IPv4) socket address.
* This IPv4 address in the input string parameter could either be specified as a host name, or as a numeric string representation like n.n.n.n known as the IPv4 dotted-decimal format
* This IPv4 address in the input string parameter could either be specified as a hostname, or as a numeric string representation like n.n.n.n known as the IPv4 dotted-decimal format
* (i.e. "192.168.10.1").
* This function is used whenever an ip address needs to be set in the proper format
* (i.e. for the @ref tstrM2MIPConfig structure).
@ -1860,8 +1712,6 @@ NMI_API sint8 WINC1500_EXPORT(close)(SOCKET sock);
*/
NMI_API uint32 nmi_inet_addr(char *pcIpAddr);
/** @} */
/** @defgroup gethostbynameFn gethostbyname
* @ingroup SocketAPI
@ -1891,25 +1741,43 @@ NMI_API uint32 nmi_inet_addr(char *pcIpAddr);
NMI_API sint8 WINC1500_EXPORT(gethostbyname)(uint8 * pcHostName);
/** @} */
/** @defgroup sslEnableCertExpirationCheckFn sslEnableCertExpirationCheck
/** @defgroup sslSetActiveCipherSuitesFn sslSetActiveCipherSuites
* @ingroup SocketAPI
* Configure the behavior of the SSL Library for Certificate Expiry Validation.
* Overrides the default active SSL ciphers in the SSL module with a certain combination of ciphers selected by the caller using
* a bitmap containing the required ciphers list.
* There API is required only if the will not change the default ciphersuites, otherwise, it is not recommended to use.
*/
/**@{*/
/*!
@fn \
NMI_API sint8 sslEnableCertExpirationCheck(tenuSslCertExpSettings enuValidationSetting);
@param [in] enuValidationSetting
See @ref tenuSslCertExpSettings for details.
NMI_API sint8 sslSetActiveCipherSuites(uint32 u32SslCsBMP);
@param [in] u32SslCsBMP
<p>A non-zero 32-bit integer bitmap containing the bitwise OR of the desired ciphers to be enabled
for the SSL module. The ciphersuites are defined in groups as follows:</p>
<ul>
<li>@ref SSL_ENABLE_ALL_SUITES</li>
<li>@ref SSL_ENABLE_RSA_SHA_SUITES</li>
<li>@ref SSL_ENABLE_RSA_SHA256_SUITES</li>
<li>@ref SSL_ENABLE_DHE_SHA_SUITES</li>
<li>@ref SSL_ENABLE_DHE_SHA256_SUITES</li>
<li>@ref SSL_ENABLE_RSA_GCM_SUITES</li>
<li>@ref SSL_ENABLE_DHE_GCM_SUITES</li>
</ul>
@return
- [SOCK_ERR_NO_ERROR](@ref SOCK_ERR_NO_ERROR) for successful operation and negative error code otherwise.
@sa tenuSslCertExpSettings
Possible return values are [SOCK_ERR_NO_ERROR](@ref SOCK_ERR_NO_ERROR) if case of success
or [SOCK_ERR_INVALID_ARG](@ref SOCK_ERR_INVALID_ARG) if the map is zero.
@remarks
The default supported ciphersuites are the combination of all the above groups. The caller can override the default with any desired combination.
For example, to disable SHA based ciphers the function should be called with this syntax:
\code
sslSetActiveCipherSuites(SSL_ENABLE_ALL_SUITES & ~(SSL_ENABLE_RSA_SHA_SUITES|SSL_ENABLE_DHE_SHA_SUITES));
\endcode
@note Passing the u32SslCsBMP as zero <strong>will not</strong> change the current active list.
*/
NMI_API sint8 sslEnableCertExpirationCheck(tenuSslCertExpSettings enuValidationSetting);
NMI_API sint8 sslSetActiveCipherSuites(uint32 u32SslCsBMP);
/** @} */
@ -1918,9 +1786,9 @@ NMI_API sint8 sslEnableCertExpirationCheck(tenuSslCertExpSettings enuValidationS
* @ingroup SocketAPI
*The setsockopt() function shall set the option specified by the option_name
* argument, at the protocol level specified by the level argument, to the value
* pointed to by the option_value argument for the socket specified by the socket argument.
* pointed to by the option_value argument for the socke specified by the socket argument.
*
* <p>Possible protocol level values supported are @ref SOL_SOCKET and @ref SOL_SSL_SOCKET.
* <p>Possible protcol level values supported are @ref SOL_SOCKET and @ref SOL_SSL_SOCKET.
* Possible options when the protocol level is @ref SOL_SOCKET :</p>
* <table style="width: 100%">
* <tr>
@ -1957,7 +1825,7 @@ NMI_API sint8 sslEnableCertExpirationCheck(tenuSslCertExpSettings enuValidationS
* <tr>
* <td><strong>@ref SO_SSL_SNI</strong></td>
* <td>Set the Server Name Indicator (SNI) for an SSL socket. The SNI is a
* null terminated string containing the server name associated with the
* null terminated string containing the server name assocated with the
* connection. It must not exceed the size of @ref HOSTNAME_MAX_SIZE.</td>
* </tr>
* <tr>
@ -1991,7 +1859,7 @@ NMI_API sint8 sslEnableCertExpirationCheck(tenuSslCertExpSettings enuValidationS
@return
The function shall return \ref SOCK_ERR_NO_ERROR for successful operation
and a negative value (indicating the error) otherwise.
@sa SOL_SOCKET, SOL_SSL_SOCKET, IP_ADD_MEMBERSHIP, IP_DROP_MEMBERSHIP
@sa SOL_SOCKET, SOL_SSL_SOCKET,
*/
NMI_API sint8 WINC1500_EXPORT(setsockopt)(SOCKET socket, uint8 u8Level, uint8 option_name,
const void *option_value, uint16 u16OptionLen);
@ -2009,6 +1877,7 @@ NMI_API sint8 WINC1500_EXPORT(setsockopt)(SOCKET socket, uint8 u8Level, uint8 op
sint8 getsockopt(SOCKET sock, uint8 u8Level, uint8 u8OptName, const void *pvOptValue, uint8 * pu8OptLen);
@brief
@param [in] sock
Socket Identifie.
@ -2029,27 +1898,26 @@ NMI_API sint8 WINC1500_EXPORT(getsockopt)(SOCKET sock, uint8 u8Level, uint8 u8Op
/**@}*/
/** @defgroup PingFn m2m_ping_req
* @ingroup SocketAPI
* The function sends ping request to the given IP Address.
* The function request to send ping request to the given IP Address.
*/
/**@{*/
/*!
@fn \
NMI_API sint8 m2m_ping_req(uint32 u32DstIP, uint8 u8TTL, tpfPingCb fpPingCb);
@param [in] u32DstIP
Target Destination IP Address for the ping request. It must be represented in Network byte order.
The function nmi_inet_addr could be used to translate the dotted decimal notation IP
to its Network bytes order integer represntative.
@param [in] u8TTL
IP TTL value for the ping request. If set to ZERO, the dfault value SHALL be used.
@param [in] fpPingCb
Callback will be called to deliver the ping statistics.
@see nmi_inet_addr
@return The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
*/
* @fn NMI_API sint8 m2m_ping_req(uint32 u32DstIP, uint8 u8TTL);
* @param [in] u32DstIP
* Target Destination IP Address for the ping request. It must be represented in Network
* byte order.
* The function nmi_inet_addr could be used to translate the dotted decimal notation IP
* to its Network bytes order integer represntative.
*
* @param [in] u8TTL
* IP TTL value for the ping request. If set to ZERO, the dfault value SHALL be used.
*
* @param [in] fpPingCb
* Callback will be called to deliver the ping statistics.
*
* @see nmi_inet_addr
* @return The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
*/
NMI_API sint8 m2m_ping_req(uint32 u32DstIP, uint8 u8TTL, tpfPingCb fpPingCb);
/**@}*/
@ -2059,3 +1927,4 @@ NMI_API sint8 m2m_ping_req(uint32 u32DstIP, uint8 u8TTL, tpfPingCb fpPingCb);
#endif /* __cplusplus */
#endif /* __SOCKET_H__ */

View File

@ -2,9 +2,9 @@
*
* \file
*
* \brief BSD compatible socket interface internal types.
* \brief BSD alike socket interface internal types.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*

View File

@ -4,7 +4,7 @@
*
* \brief WINC1500 SPI Flash.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -112,6 +112,7 @@
#include "bus_wrapper/include/nm_bus_wrapper.h"
#include "driver/include/nmbus.h"
#include "driver/include/nmasic.h"
#include "spi_flash/include/spi_flash_map.h"
/**
* @fn spi_flash_enable

View File

@ -2,9 +2,9 @@
*
* \file
*
* \brief WINC1500 SPI Flash.
* \brief SPI Flash Memory Mapping.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -39,22 +39,13 @@
*
*/
/**
* @file spi_flash_map.h
* @brief This module contains spi flash CONTENT
* @author M.S.M
* @date 17 SEPT 2013
* @version 1.0
*/
#ifndef __SPI_FLASH_MAP_H__
#define __SPI_FLASH_MAP_H__
#ifndef SPI_FLASH_MAP_H_INCLUDED
#define SPI_FLASH_MAP_H_INCLUDED
#define FLASH_MAP_VER_0 (0)
#define FLASH_MAP_VER_1 (1)
#define FLASH_MAP_VER_2 (2)
#define FLASH_MAP_VER_3 (3)
#define FLAAH_MAP_VER_1 (1)
#define FLASH_MAP_VERSION FLASH_MAP_VER_3
#define FLASH_MAP_VERSION FLAAH_MAP_VER_1
//#define DOWNLOAD_ROLLBACK
//#define OTA_GEN
@ -90,7 +81,7 @@
/*
* Detailed Sizes and locations for Flash Memory:
* ____________________ ___________ ____________________________________________________________________________
* ____________________ ___________ ___________________________ _______________________________________________
* | Starting Address | Size | Location's Name | Description |
* |____________________|___________|___________________________|_______________________________________________|
* | 0 K | 4 K | Boot Firmware | Firmware to select which version to run |
@ -99,7 +90,8 @@
* | | | PLL Size = 1K | PLL |
* | | | GAIN Size = 3K | Gain configuration |
* | 16 K | 4 K | CERTIFICATE | X.509 Certificate storage |
* | 20 K | 8 K | TLS Server | TLS Server Private Key and certificates |
* | 20 K | 4 K | Scratch Section | Empty Section |
* | 24 K | 4 K | Reserved TLS Server | Reserved |
* | 28 K | 8 K | HTTP Files | Files used with Provisioning Mode |
* | 36 K | 4 K | Connection Parameters | Parameters for success connection to AP |
* | 40 K | 236 K | Main Firmware/program | Main Firmware to run WiFi Chip |
@ -117,49 +109,54 @@
* Boot Firmware: which used to select which firmware to run
*
*/
#define M2M_BOOT_FIRMWARE_STARTING_ADDR (FLASH_START_ADDR)
#define M2M_BOOT_FIRMWARE_FLASH_SZ (FLASH_SECTOR_SZ)
#define M2M_BOOT_FIRMWARE_STARTING_ADDR (FLASH_START_ADDR)
#define M2M_BOOT_FIRMWARE_FLASH_SZ (FLASH_SECTOR_SZ)
/*
* Control Section: which used by Boot firmware
*
*/
#define M2M_CONTROL_FLASH_OFFSET (M2M_BOOT_FIRMWARE_STARTING_ADDR + M2M_BOOT_FIRMWARE_FLASH_SZ)
#define M2M_CONTROL_FLASH_BKP_OFFSET (M2M_CONTROL_FLASH_OFFSET + FLASH_SECTOR_SZ)
#define M2M_CONTROL_FLASH_SEC_SZ (FLASH_SECTOR_SZ)
#define M2M_CONTROL_FLASH_TOTAL_SZ (FLASH_SECTOR_SZ * 2)
#define M2M_CONTROL_FLASH_OFFSET (M2M_BOOT_FIRMWARE_STARTING_ADDR + M2M_BOOT_FIRMWARE_FLASH_SZ)
#define M2M_CONTROL_FLASH_BKP_OFFSET (M2M_CONTROL_FLASH_OFFSET + FLASH_SECTOR_SZ)
#define M2M_CONTROL_FLASH_SEC_SZ (FLASH_SECTOR_SZ)
#define M2M_CONTROL_FLASH_TOTAL_SZ (FLASH_SECTOR_SZ * 2)
/*
* LUT for PLL and TX Gain settings:
*
*/
#define M2M_PLL_FLASH_OFFSET (M2M_CONTROL_FLASH_OFFSET + M2M_CONTROL_FLASH_TOTAL_SZ)
#define M2M_PLL_FLASH_SZ (1024 * 1)
#define M2M_GAIN_FLASH_OFFSET (M2M_PLL_FLASH_OFFSET + M2M_PLL_FLASH_SZ)
#define M2M_GAIN_FLASH_SZ (M2M_CONFIG_SECT_TOTAL_SZ - M2M_PLL_FLASH_SZ)
#define M2M_CONFIG_SECT_TOTAL_SZ (FLASH_SECTOR_SZ)
#define M2M_PLL_FLASH_OFFSET (M2M_CONTROL_FLASH_OFFSET + M2M_CONTROL_FLASH_TOTAL_SZ)
#define M2M_PLL_FLASH_SZ (1024 * 1)
#define M2M_GAIN_FLASH_OFFSET (M2M_PLL_FLASH_OFFSET + M2M_PLL_FLASH_SZ)
#define M2M_GAIN_FLASH_SZ (M2M_CONFIG_SECT_TOTAL_SZ - M2M_PLL_FLASH_SZ)
#define M2M_CONFIG_SECT_TOTAL_SZ (FLASH_SECTOR_SZ)
/*
* Certificate:
*
*/
#define M2M_TLS_ROOTCER_FLASH_OFFSET (M2M_PLL_FLASH_OFFSET + M2M_CONFIG_SECT_TOTAL_SZ)
#define M2M_TLS_ROOTCER_FLASH_SIZE (FLASH_SECTOR_SZ * 1)
#define M2M_TLS_FLASH_ROOTCERT_CACHE_OFFSET (M2M_PLL_FLASH_OFFSET + M2M_CONFIG_SECT_TOTAL_SZ)
#define M2M_TLS_FLASH_ROOTCERT_CACHE_SIZE (FLASH_SECTOR_SZ * 1)
/*
* TLS Server Key Files
* Scratch:
*
*/
#define M2M_TLS_SERVER_FLASH_OFFSET (M2M_TLS_ROOTCER_FLASH_OFFSET + M2M_TLS_ROOTCER_FLASH_SIZE)
#define M2M_TLS_SERVER_FLASH_SIZE (FLASH_SECTOR_SZ * 2)
#define M2M_TLS_FLASH_SESSION_CACHE_OFFSET (M2M_TLS_FLASH_ROOTCERT_CACHE_OFFSET + M2M_TLS_FLASH_ROOTCERT_CACHE_SIZE)
#define M2M_TLS_FLASH_SESSION_CACHE_SIZE (FLASH_SECTOR_SZ * 1)
/*
* reserved section
*
*/
#define M2M_RESERVED_FLASH_OFFSET (M2M_TLS_FLASH_SESSION_CACHE_OFFSET + M2M_TLS_FLASH_SESSION_CACHE_SIZE)
#define M2M_RESERVED_FLASH_SZ (FLASH_SECTOR_SZ * 1)
/*
* HTTP Files
*
*/
#define M2M_HTTP_MEM_FLASH_OFFSET (M2M_TLS_SERVER_FLASH_OFFSET + M2M_TLS_SERVER_FLASH_SIZE)
#define M2M_HTTP_MEM_FLASH_OFFSET (M2M_RESERVED_FLASH_OFFSET + M2M_RESERVED_FLASH_SZ)
#define M2M_HTTP_MEM_FLASH_SZ (FLASH_SECTOR_SZ * 2)
/*
* Saved Connection Parameters:
*
@ -172,17 +169,9 @@
* Common section size
*/
#define M2M_COMMON_DATA_SEC \
(\
M2M_BOOT_FIRMWARE_FLASH_SZ + \
M2M_CONTROL_FLASH_TOTAL_SZ + \
M2M_CONFIG_SECT_TOTAL_SZ + \
M2M_TLS_ROOTCER_FLASH_SIZE + \
M2M_TLS_SERVER_FLASH_SIZE + \
M2M_HTTP_MEM_FLASH_SZ + \
M2M_CACHED_CONNS_FLASH_SZ \
)
#define M2M_COMMON_DATA_SEC (M2M_BOOT_FIRMWARE_FLASH_SZ + M2M_CONTROL_FLASH_TOTAL_SZ + M2M_CONFIG_SECT_TOTAL_SZ + \
M2M_TLS_FLASH_ROOTCERT_CACHE_SIZE + M2M_TLS_FLASH_SESSION_CACHE_SIZE + \
M2M_HTTP_MEM_FLASH_SZ + M2M_CACHED_CONNS_FLASH_SZ + M2M_RESERVED_FLASH_SZ)
/*
*
* OTA image1 Offset
@ -194,45 +183,42 @@
*
*/
#if (defined _FIRMWARE_)||(defined OTA_GEN)
#define M2M_FIRMWARE_FLASH_OFFSET (0UL)
#define M2M_FIRMWARE_FLASH_OFFSET (0UL)
#else
#if (defined DOWNLOAD_ROLLBACK)
#define M2M_FIRMWARE_FLASH_OFFSET (M2M_OTA_IMAGE2_OFFSET)
#define M2M_FIRMWARE_FLASH_OFFSET (M2M_OTA_IMAGE2_OFFSET)
#else
#define M2M_FIRMWARE_FLASH_OFFSET (M2M_OTA_IMAGE1_OFFSET)
#define M2M_FIRMWARE_FLASH_OFFSET (M2M_OTA_IMAGE1_OFFSET)
#endif
#endif
/*
*
* Firmware
*/
#define M2M_FIRMWARE_FLASH_SZ (236 * 1024UL)
#define M2M_FIRMWARE_FLASH_SZ (236*1024UL)
/**
*
* OTA image Size
*/
#define OTA_IMAGE_SIZE (M2M_FIRMWARE_FLASH_SZ)
#define OTA_IMAGE_SIZE (M2M_FIRMWARE_FLASH_SZ)
/**
*
* Flash Total size
*/
#define FLASH_IMAGE1_CONTENT_SZ (M2M_COMMON_DATA_SEC + OTA_IMAGE_SIZE)
#define FLASH_IMAGE1_CONTENT_SZ (M2M_COMMON_DATA_SEC + OTA_IMAGE_SIZE)
/**
*
* OTA image 2 offset
*/
#define M2M_OTA_IMAGE2_OFFSET (FLASH_IMAGE1_CONTENT_SZ)
#define M2M_OTA_IMAGE2_OFFSET (FLASH_IMAGE1_CONTENT_SZ)
/*
* App(Cortus App 4M): App. which runs over firmware
*
*/
#define M2M_APP_4M_MEM_FLASH_SZ (FLASH_SECTOR_SZ * 16)
#define M2M_APP_4M_MEM_FLASH_OFFSET (FLASH_4M_TOTAL_SZ - M2M_APP_4M_MEM_FLASH_SZ)
#define M2M_APP_8M_MEM_FLASH_OFFSET (M2M_OTA_IMAGE2_OFFSET + OTA_IMAGE_SIZE)
#define M2M_APP_8M_MEM_FLASH_SZ (FLASH_SECTOR_SZ * 32)
#define M2M_APP_OTA_MEM_FLASH_OFFSET (M2M_APP_8M_MEM_FLASH_OFFSET + M2M_APP_8M_MEM_FLASH_SZ)
#define M2M_APP_4M_MEM_FLASH_SZ (FLASH_SECTOR_SZ * 10)
#define M2M_APP_4M_MEM_FLASH_OFFSET (FLASH_4M_TOTAL_SZ - M2M_APP_4M_MEM_FLASH_SZ)
/* Check if total size of content
* don't exceed total size of memory allowed
@ -241,5 +227,4 @@
#error "Excced 4M Flash Size"
#endif /* (FLASH_CONTENT_SZ > FLASH_TOTAL_SZ) */
#endif /* __SPI_FLASH_MAP_H__ */
#endif /* SPI_FLASH_MAP_H_INCLUDED */

View File

@ -4,7 +4,7 @@
*
* \brief NMC1500 Peripherials Application Interface.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -366,6 +366,7 @@ sint8 m2m_ate_start_tx(tstrM2mAteTx * strM2mAteTx)
(strM2mAteTx->duty_cycle > M2M_ATE_TX_DUTY_MIN_VALUE /*10*/ ) ||
(strM2mAteTx->dpd_ctrl < M2M_ATE_TX_DPD_DYNAMIC) ||
(strM2mAteTx->dpd_ctrl > M2M_ATE_TX_DPD_ENABLED) ||
(strM2mAteTx->use_pmu < M2M_ATE_PMU_DISBLE) ||
(strM2mAteTx->use_pmu > M2M_ATE_PMU_ENABLE) ||
(strM2mAteTx->phy_burst_tx < M2M_ATE_TX_SRC_MAC) ||
(strM2mAteTx->phy_burst_tx > M2M_ATE_TX_SRC_PHY) ||
@ -391,8 +392,6 @@ sint8 m2m_ate_start_tx(tstrM2mAteTx * strM2mAteTx)
goto __EXIT;
}
s8Ret += nm_write_reg(rBurstTx_NMI_USE_PMU, strM2mAteTx->use_pmu);
s8Ret += nm_write_reg(rBurstTx_NMI_TX_PHY_CONT, strM2mAteTx->phy_burst_tx);
s8Ret += nm_write_reg(rBurstTx_NMI_NUM_TX_FRAMES, strM2mAteTx->num_frames);
@ -507,6 +506,7 @@ sint8 m2m_ate_start_rx(tstrM2mAteRx * strM2mAteRxStr)
if( (strM2mAteRxStr->channel_num < M2M_ATE_CHANNEL_1) ||
(strM2mAteRxStr->channel_num > M2M_ATE_CHANNEL_14)||
(strM2mAteRxStr->use_pmu < M2M_ATE_PMU_DISBLE) ||
(strM2mAteRxStr->use_pmu > M2M_ATE_PMU_ENABLE)
)
{
@ -674,35 +674,6 @@ sint8 m2m_ate_get_dig_gain(double * dGaindB)
return M2M_SUCCESS;
}
/*!
@fn \
void m2m_ate_set_pa_gain(uint8 gain_db)
@brief
This function is used to set the PA gain (18/15/12/9/6/3/0 only)
@param [in] uint8 gain_db
PA gain level allowed (18/15/12/9/6/3/0 only)
*/
void m2m_ate_set_pa_gain(uint8 gain_db)
{
uint32 PA_1e9c;
uint8 aGain[] = {
/* "0 dB" */ 0x00,
/* "3 dB" */ 0x01,
/* "6 dB" */ 0x03,
/* "9 dB" */ 0x07,
/* "12 dB" */ 0x0f,
/* "15 dB" */ 0x1f,
/* "18 dB" */ 0x3f };
/* The variable PA gain is valid only for High power mode */
PA_1e9c = nm_read_reg(0x1e9c);
/* TX bank 0. */
PA_1e9c &= ~(0x3ful << 8);
PA_1e9c |= (((uint32)aGain[gain_db/3] & 0x3f) << 8);
nm_write_reg(0x1e9c, PA_1e9c);
}
/*!
@fn \
sint8 m2m_ate_get_pa_gain(double *paGaindB)

View File

@ -4,7 +4,7 @@
*
* \brief WINC Crypto module.
*
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*

View File

@ -4,7 +4,7 @@
*
* \brief This module contains M2M host interface APIs implementation.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -63,30 +63,27 @@
#define WIFI_HOST_RCV_CTRL_1 (0x1084)
#define WIFI_HOST_RCV_CTRL_2 (0x1078)
#define WIFI_HOST_RCV_CTRL_3 (0x106c)
#define WIFI_HOST_RCV_CTRL_4 (0x150400)
#define WIFI_HOST_RCV_CTRL_5 (0x1088)
#define WAKE_VALUE (0x5678)
#define SLEEP_VALUE (0x4321)
#define WAKE_REG (0x1074)
typedef struct {
uint8 u8ChipMode;
uint8 u8ChipSleep;
uint8 u8HifRXDone;
uint8 u8Interrupt;
uint32 u32RxAddr;
uint32 u32RxSize;
tpfHifCallBack pfWifiCb;
tpfHifCallBack pfIpCb;
tpfHifCallBack pfOtaCb;
tpfHifCallBack pfSigmaCb;
tpfHifCallBack pfHifCb;
tpfHifCallBack pfCryptoCb;
tpfHifCallBack pfSslCb;
}tstrHifContext;
volatile tstrHifContext gstrHifCxt;
static volatile uint8 gu8ChipMode = 0;
static volatile uint8 gu8ChipSleep = 0;
static volatile uint8 gu8HifSizeDone = 0;
static volatile uint8 gu8Interrupt = 0;
tpfHifCallBack pfWifiCb = NULL; /*!< pointer to Wi-Fi call back function */
tpfHifCallBack pfIpCb = NULL; /*!< pointer to Socket call back function */
tpfHifCallBack pfOtaCb = NULL; /*!< pointer to OTA call back function */
tpfHifCallBack pfSigmaCb = NULL;
tpfHifCallBack pfHifCb = NULL;
tpfHifCallBack pfCryptoCb = NULL;
static void isr(void)
{
gstrHifCxt.u8Interrupt++;
gu8Interrupt++;
#ifdef NM_LEVEL_INTERRUPT
nm_bsp_interrupt_ctrl(0);
#endif
@ -95,15 +92,16 @@ static sint8 hif_set_rx_done(void)
{
uint32 reg;
sint8 ret = M2M_SUCCESS;
gstrHifCxt.u8HifRXDone = 0;
#ifdef NM_EDGE_INTERRUPT
nm_bsp_interrupt_ctrl(1);
#endif
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_0,&reg);
if(ret != M2M_SUCCESS)goto ERR1;
//reg &= ~(1<<0);
/* Set RX Done */
reg |= NBIT1;
reg |= (1<<1);
ret = nm_write_reg(WIFI_HOST_RCV_CTRL_0,reg);
if(ret != M2M_SUCCESS)goto ERR1;
#ifdef NM_LEVEL_INTERRUPT
@ -142,23 +140,20 @@ static void m2m_hif_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
sint8 hif_chip_wake(void)
{
sint8 ret = M2M_SUCCESS;
if(gstrHifCxt.u8HifRXDone)
if(gu8ChipSleep == 0)
{
/*chip already wake for the rx not done no need to send wake request*/
return ret;
}
if(gstrHifCxt.u8ChipSleep == 0)
{
if(gstrHifCxt.u8ChipMode != M2M_NO_PS)
if((gu8ChipMode == M2M_PS_DEEP_AUTOMATIC)||(gu8ChipMode == M2M_PS_MANUAL))
{
ret = chip_wake();
ret = nm_clkless_wake();
if(ret != M2M_SUCCESS)goto ERR1;
ret = nm_write_reg(WAKE_REG, WAKE_VALUE);
if(ret != M2M_SUCCESS)goto ERR1;
}
else
{
}
}
gstrHifCxt.u8ChipSleep++;
gu8ChipSleep++;
ERR1:
return ret;
}
@ -178,7 +173,7 @@ ERR1:
void hif_set_sleep_mode(uint8 u8Pstype)
{
gstrHifCxt.u8ChipMode = u8Pstype;
gu8ChipMode = u8Pstype;
}
/*!
@fn \
@ -193,22 +188,7 @@ void hif_set_sleep_mode(uint8 u8Pstype)
uint8 hif_get_sleep_mode(void)
{
return gstrHifCxt.u8ChipMode;
}
/**
* @fn NMI_API sint8 hif_chip_sleep_sc(void);
* @brief To clear the chip sleep but keep the chip sleep
* @return The function shall return ZERO for successful operation and a negative value otherwise.
*/
sint8 hif_chip_sleep_sc(void)
{
if(gstrHifCxt.u8ChipSleep >= 1)
{
gstrHifCxt.u8ChipSleep--;
}
return M2M_SUCCESS;
return gu8ChipMode;
}
/**
* @fn NMI_API sint8 hif_chip_sleep(void);
@ -220,18 +200,26 @@ sint8 hif_chip_sleep(void)
{
sint8 ret = M2M_SUCCESS;
if(gstrHifCxt.u8ChipSleep >= 1)
if(gu8ChipSleep >= 1)
{
gstrHifCxt.u8ChipSleep--;
gu8ChipSleep--;
}
if(gstrHifCxt.u8ChipSleep == 0)
if(gu8ChipSleep == 0)
{
if(gstrHifCxt.u8ChipMode != M2M_NO_PS)
if((gu8ChipMode == M2M_PS_DEEP_AUTOMATIC)||(gu8ChipMode == M2M_PS_MANUAL))
{
ret = chip_sleep();
uint32 reg = 0;
ret = nm_write_reg(WAKE_REG, SLEEP_VALUE);
if(ret != M2M_SUCCESS)goto ERR1;
/* Clear bit 1 */
ret = nm_read_reg_with_ret(0x1, &reg);
if(ret != M2M_SUCCESS)goto ERR1;
if(reg&0x2)
{
reg &=~(1 << 1);
ret = nm_write_reg(0x1, reg);
}
}
else
{
@ -250,14 +238,22 @@ ERR1:
sint8 hif_init(void * arg)
{
m2m_memset((uint8*)&gstrHifCxt,0,sizeof(tstrHifContext));
pfWifiCb = NULL;
pfIpCb = NULL;
gu8ChipSleep = 0;
gu8ChipMode = M2M_NO_PS;
gu8Interrupt = 0;
nm_bsp_register_isr(isr);
hif_register_cb(M2M_REQ_GROUP_HIF,m2m_hif_cb);
return M2M_SUCCESS;
}
/**
* @fn NMI_API sint8 hif_deinit(void * arg);
* @brief To De-initialize HIF layer.
* @brief To Deinitialize HIF layer.
* @param [in] arg
* Pointer to the arguments.
* @return The function shall return ZERO for successful operation and a negative value otherwise.
@ -265,8 +261,31 @@ sint8 hif_init(void * arg)
sint8 hif_deinit(void * arg)
{
sint8 ret = M2M_SUCCESS;
#if 0
uint32 reg = 0, cnt=0;
while (reg != M2M_DISABLE_PS)
{
nm_bsp_sleep(1);
reg = nm_read_reg(STATE_REG);
if(++cnt > 1000)
{
M2M_DBG("failed to stop power save\n");
break;
}
}
#endif
ret = hif_chip_wake();
m2m_memset((uint8*)&gstrHifCxt,0,sizeof(tstrHifContext));
gu8ChipMode = 0;
gu8ChipSleep = 0;
gu8HifSizeDone = 0;
gu8Interrupt = 0;
pfWifiCb = NULL;
pfIpCb = NULL;
pfOtaCb = NULL;
pfHifCb = NULL;
return ret;
}
/**
@ -313,9 +332,7 @@ sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSiz
{
volatile uint32 reg, dma_addr = 0;
volatile uint16 cnt = 0;
//#define OPTIMIZE_BUS
/*please define in firmware also*/
#ifndef OPTIMIZE_BUS
reg = 0UL;
reg |= (uint32)u8Gid;
reg |= ((uint32)u8Opcode<<8);
@ -323,47 +340,31 @@ sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSiz
ret = nm_write_reg(NMI_STATE_REG,reg);
if(M2M_SUCCESS != ret) goto ERR1;
reg = 0UL;
reg |= NBIT1;
reg = 0;
reg |= (1<<1);
ret = nm_write_reg(WIFI_HOST_RCV_CTRL_2, reg);
if(M2M_SUCCESS != ret) goto ERR1;
#else
reg = 0UL;
reg |= NBIT1;
reg |= ((u8Opcode & NBIT7) ? (NBIT2):(0)); /*Data = 1 or config*/
reg |= (u8Gid == M2M_REQ_GROUP_IP) ? (NBIT3):(0); /*IP = 1 or non IP*/
reg |= ((uint32)strHif.u16Length << 4); /*length of pkt max = 4096*/
ret = nm_write_reg(WIFI_HOST_RCV_CTRL_2, reg);
if(M2M_SUCCESS != ret) goto ERR1;
#endif
dma_addr = 0;
//nm_bsp_interrupt_ctrl(0);
for(cnt = 0; cnt < 1000; cnt ++)
{
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_2,(uint32 *)&reg);
if(ret != M2M_SUCCESS) break;
/*
* If it takes too long to get a response, the slow down to
* avoid back-to-back register read operations.
*/
if(cnt >= 500) {
if(cnt < 501) {
M2M_INFO("Slowing down...\n");
}
nm_bsp_sleep(1);
}
if (!(reg & NBIT1))
if (!(reg & 0x2))
{
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_4,(uint32 *)&dma_addr);
ret = nm_read_reg_with_ret(0x150400,(uint32 *)&dma_addr);
if(ret != M2M_SUCCESS) {
/*in case of read error clear the DMA address and return error*/
/*in case of read error clear the dma address and return error*/
dma_addr = 0;
goto ERR1;
}
/*in case of success break */
break;
}
}
//nm_bsp_interrupt_ctrl(1);
if (dma_addr != 0)
{
@ -371,11 +372,17 @@ sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSiz
u32CurrAddr = dma_addr;
strHif.u16Length=NM_BSP_B_L_16(strHif.u16Length);
ret = nm_write_block(u32CurrAddr, (uint8*)&strHif, M2M_HIF_HDR_OFFSET);
#ifdef CONF_WINC_USE_I2C
nm_bsp_sleep(1);
#endif
if(M2M_SUCCESS != ret) goto ERR1;
u32CurrAddr += M2M_HIF_HDR_OFFSET;
if(pu8CtrlBuf != NULL)
{
ret = nm_write_block(u32CurrAddr, pu8CtrlBuf, u16CtrlBufSize);
#ifdef CONF_WINC_USE_I2C
nm_bsp_sleep(1);
#endif
if(M2M_SUCCESS != ret) goto ERR1;
u32CurrAddr += u16CtrlBufSize;
}
@ -383,37 +390,34 @@ sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSiz
{
u32CurrAddr += (u16DataOffset - u16CtrlBufSize);
ret = nm_write_block(u32CurrAddr, pu8DataBuf, u16DataSize);
#ifdef CONF_WINC_USE_I2C
nm_bsp_sleep(1);
#endif
if(M2M_SUCCESS != ret) goto ERR1;
u32CurrAddr += u16DataSize;
}
reg = dma_addr << 2;
reg |= NBIT1;
reg |= (1 << 1);
ret = nm_write_reg(WIFI_HOST_RCV_CTRL_3, reg);
if(M2M_SUCCESS != ret) goto ERR1;
}
else
{
ret = hif_chip_sleep();
M2M_DBG("Failed to alloc rx size %d\r",ret);
ret = M2M_ERR_MEM_ALLOC;
goto ERR2;
M2M_DBG("Failed to alloc rx size\r");
ret = M2M_ERR_MEM_ALLOC;
goto ERR1;
}
}
else
{
M2M_ERR("(HIF)Fail to wakup the chip\n");
goto ERR2;
goto ERR1;
}
/*actual sleep ret = M2M_SUCCESS*/
ret = hif_chip_sleep();
return ret;
ret = hif_chip_sleep();
ERR1:
/*reset the count but no actual sleep as it already bus error*/
hif_chip_sleep_sc();
ERR2:
/*logical error*/
return ret;
}
/**
@ -426,138 +430,126 @@ ERR2:
*/
static sint8 hif_isr(void)
{
sint8 ret = M2M_SUCCESS;
sint8 ret = M2M_ERR_BUS_FAIL;
uint32 reg;
volatile tstrHifHdr strHif;
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_0, &reg);
if(M2M_SUCCESS == ret)
ret = hif_chip_wake();
if(ret == M2M_SUCCESS)
{
if(reg & 0x1) /* New interrupt has been received */
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_0, &reg);
if(M2M_SUCCESS == ret)
{
uint16 size;
if(reg & 0x1) /* New interrupt has been received */
{
uint16 size;
nm_bsp_interrupt_ctrl(0);
/*Clearing RX interrupt*/
reg &= ~NBIT0;
ret = nm_write_reg(WIFI_HOST_RCV_CTRL_0,reg);
if(ret != M2M_SUCCESS)goto ERR1;
gstrHifCxt.u8HifRXDone = 1;
size = (uint16)((reg >> 2) & 0xfff);
if (size > 0) {
uint32 address = 0;
/**
start bus transfer
**/
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_1, &address);
if(M2M_SUCCESS != ret)
{
M2M_ERR("(hif) WIFI_HOST_RCV_CTRL_1 bus fail\n");
nm_bsp_interrupt_ctrl(1);
goto ERR1;
}
gstrHifCxt.u32RxAddr = address;
gstrHifCxt.u32RxSize = size;
ret = nm_read_block(address, (uint8*)&strHif, sizeof(tstrHifHdr));
strHif.u16Length = NM_BSP_B_L_16(strHif.u16Length);
if(M2M_SUCCESS != ret)
{
M2M_ERR("(hif) address bus fail\n");
nm_bsp_interrupt_ctrl(1);
goto ERR1;
}
if(strHif.u16Length != size)
{
if((size - strHif.u16Length) > 4)
nm_bsp_interrupt_ctrl(0);
/*Clearing RX interrupt*/
reg &= ~(1<<0);
ret = nm_write_reg(WIFI_HOST_RCV_CTRL_0,reg);
if(ret != M2M_SUCCESS)goto ERR1;
gu8HifSizeDone = 0;
size = (uint16)((reg >> 2) & 0xfff);
if (size > 0) {
uint32 address = 0;
/**
start bus transfer
**/
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_1, &address);
if(M2M_SUCCESS != ret)
{
M2M_ERR("(hif) Corrupted packet Size = %u <L = %u, G = %u, OP = %02X>\n",
size, strHif.u16Length, strHif.u8Gid, strHif.u8Opcode);
M2M_ERR("(hif) WIFI_HOST_RCV_CTRL_1 bus fail\n");
nm_bsp_interrupt_ctrl(1);
goto ERR1;
}
ret = nm_read_block(address, (uint8*)&strHif, sizeof(tstrHifHdr));
strHif.u16Length = NM_BSP_B_L_16(strHif.u16Length);
if(M2M_SUCCESS != ret)
{
M2M_ERR("(hif) address bus fail\n");
nm_bsp_interrupt_ctrl(1);
goto ERR1;
}
if(strHif.u16Length != size)
{
if((size - strHif.u16Length) > 4)
{
M2M_ERR("(hif) Corrupted packet Size = %u <L = %u, G = %u, OP = %02X>\n",
size, strHif.u16Length, strHif.u8Gid, strHif.u8Opcode);
nm_bsp_interrupt_ctrl(1);
ret = M2M_ERR_BUS_FAIL;
goto ERR1;
}
}
if(M2M_REQ_GROUP_WIFI == strHif.u8Gid)
{
if(pfWifiCb)
pfWifiCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
}
else if(M2M_REQ_GROUP_IP == strHif.u8Gid)
{
if(pfIpCb)
pfIpCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
}
else if(M2M_REQ_GROUP_OTA == strHif.u8Gid)
{
if(pfOtaCb)
pfOtaCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
}
else if(M2M_REQ_GROUP_CRYPTO == strHif.u8Gid)
{
if(pfCryptoCb)
pfCryptoCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
}
else if(M2M_REQ_GROUP_SIGMA == strHif.u8Gid)
{
if(pfSigmaCb)
pfSigmaCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
}
else
{
M2M_ERR("(hif) invalid group ID\n");
ret = M2M_ERR_BUS_FAIL;
goto ERR1;
}
}
if(M2M_REQ_GROUP_WIFI == strHif.u8Gid)
{
if(gstrHifCxt.pfWifiCb)
gstrHifCxt.pfWifiCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
else
M2M_ERR("WIFI callback is not registered\n");
}
else if(M2M_REQ_GROUP_IP == strHif.u8Gid)
{
if(gstrHifCxt.pfIpCb)
gstrHifCxt.pfIpCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
else
M2M_ERR("Scoket callback is not registered\n");
}
else if(M2M_REQ_GROUP_OTA == strHif.u8Gid)
{
if(gstrHifCxt.pfOtaCb)
gstrHifCxt.pfOtaCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
else
M2M_ERR("Ota callback is not registered\n");
}
else if(M2M_REQ_GROUP_CRYPTO == strHif.u8Gid)
{
if(gstrHifCxt.pfCryptoCb)
gstrHifCxt.pfCryptoCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
else
M2M_ERR("Crypto callback is not registered\n");
}
else if(M2M_REQ_GROUP_SIGMA == strHif.u8Gid)
{
if(gstrHifCxt.pfSigmaCb)
gstrHifCxt.pfSigmaCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
else
M2M_ERR("Sigma callback is not registered\n");
}
else if(M2M_REQ_GROUP_SSL == strHif.u8Gid)
{
if(gstrHifCxt.pfSslCb)
gstrHifCxt.pfSslCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
#ifndef ENABLE_UNO_BOARD
if(!gu8HifSizeDone)
{
M2M_ERR("(hif) host app didn't set RX Done\n");
ret = hif_set_rx_done();
}
#endif
}
else
{
M2M_ERR("(hif) invalid group ID\n");
ret = M2M_ERR_BUS_FAIL;
ret = M2M_ERR_RCV;
M2M_ERR("(hif) Wrong Size\n");
goto ERR1;
}
if(gstrHifCxt.u8HifRXDone)
{
M2M_ERR("(hif) host app didn't set RX Done <%u><%X>\n", strHif.u8Gid, strHif.u8Opcode);
ret = hif_set_rx_done();
if(ret != M2M_SUCCESS) goto ERR1;
}
}
else
{
M2M_ERR("(hif) Wrong Size\n");
ret = M2M_ERR_RCV;
goto ERR1;
#ifndef WIN32
M2M_ERR("(hif) False interrupt %lx",reg);
#endif
}
}
else
{
#ifndef WIN32
M2M_ERR("(hif) False interrupt %lx",reg);
ret = M2M_ERR_FAIL;
M2M_ERR("(hif) Fail to Read interrupt reg\n");
goto ERR1;
#else
#endif
}
}
else
{
M2M_ERR("(hif) Fail to Read interrupt reg\n");
M2M_ERR("(hif) FAIL to wakeup the chip\n");
goto ERR1;
}
ret = hif_chip_sleep();
ERR1:
return ret;
}
@ -570,11 +562,12 @@ ERR1:
sint8 hif_handle_isr(void)
{
sint8 ret = M2M_SUCCESS;
while (gstrHifCxt.u8Interrupt) {
sint8 ret = M2M_SUCCESS;
while (gu8Interrupt) {
/*must be at that place because of the race of interrupt increment and that decrement*/
/*when the interrupt enabled*/
gstrHifCxt.u8Interrupt--;
gu8Interrupt--;
while(1)
{
ret = hif_isr();
@ -605,11 +598,16 @@ sint8 hif_handle_isr(void)
*/
sint8 hif_receive(uint32 u32Addr, uint8 *pu8Buf, uint16 u16Sz, uint8 isDone)
{
uint32 address, reg;
uint16 size;
sint8 ret = M2M_SUCCESS;
if((u32Addr == 0)||(pu8Buf == NULL) || (u16Sz == 0))
if(u32Addr == 0 ||pu8Buf == NULL || u16Sz == 0)
{
if(isDone)
{
{
gu8HifSizeDone = 1;
/* set RX done */
ret = hif_set_rx_done();
}
@ -621,13 +619,22 @@ sint8 hif_receive(uint32 u32Addr, uint8 *pu8Buf, uint16 u16Sz, uint8 isDone)
goto ERR1;
}
if(u16Sz > gstrHifCxt.u32RxSize)
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_0,&reg);
if(ret != M2M_SUCCESS)goto ERR1;
size = (uint16)((reg >> 2) & 0xfff);
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_1,&address);
if(ret != M2M_SUCCESS)goto ERR1;
if(u16Sz > size)
{
ret = M2M_ERR_FAIL;
M2M_ERR("APP Requested Size is larger than the recived buffer size <%u><%lu>\n",u16Sz, gstrHifCxt.u32RxSize);
M2M_ERR("APP Requested Size is larger than the recived buffer size <%d><%d>\n",u16Sz, size);
goto ERR1;
}
if((u32Addr < gstrHifCxt.u32RxAddr)||((u32Addr + u16Sz)>(gstrHifCxt.u32RxAddr + gstrHifCxt.u32RxSize)))
if((u32Addr < address)||((u32Addr + u16Sz)>(address+size)))
{
ret = M2M_ERR_FAIL;
M2M_ERR("APP Requested Address beyond the recived buffer address and length\n");
@ -639,12 +646,16 @@ sint8 hif_receive(uint32 u32Addr, uint8 *pu8Buf, uint16 u16Sz, uint8 isDone)
if(ret != M2M_SUCCESS)goto ERR1;
/* check if this is the last packet */
if((((gstrHifCxt.u32RxAddr + gstrHifCxt.u32RxSize) - (u32Addr + u16Sz)) <= 0) || isDone)
if((((address + size) - (u32Addr + u16Sz)) <= 0) || isDone)
{
gu8HifSizeDone = 1;
/* set RX done */
ret = hif_set_rx_done();
}
ERR1:
return ret;
}
@ -665,25 +676,22 @@ sint8 hif_register_cb(uint8 u8Grp,tpfHifCallBack fn)
switch(u8Grp)
{
case M2M_REQ_GROUP_IP:
gstrHifCxt.pfIpCb = fn;
pfIpCb = fn;
break;
case M2M_REQ_GROUP_WIFI:
gstrHifCxt.pfWifiCb = fn;
pfWifiCb = fn;
break;
case M2M_REQ_GROUP_OTA:
gstrHifCxt.pfOtaCb = fn;
pfOtaCb = fn;
break;
case M2M_REQ_GROUP_HIF:
gstrHifCxt.pfHifCb = fn;
pfHifCb = fn;
break;
case M2M_REQ_GROUP_CRYPTO:
gstrHifCxt.pfCryptoCb = fn;
pfCryptoCb = fn;
break;
case M2M_REQ_GROUP_SIGMA:
gstrHifCxt.pfSigmaCb = fn;
break;
case M2M_REQ_GROUP_SSL:
gstrHifCxt.pfSslCb = fn;
pfSigmaCb = fn;
break;
default:
M2M_ERR("GRp ? %d\n",u8Grp);

View File

@ -4,7 +4,7 @@
*
* \brief NMC1500 IoT OTA Interface.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -163,7 +163,7 @@ NMI_API sint8 m2m_ota_notif_set_url(uint8 * u8Url)
/*Todo: we may change it to data pkt but we need to give it higer priority
but the priorty is not implemnted yet in data pkt
*/
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_NOTIF_SET_URL,u8Url,u16UrlSize,NULL,0,0);
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_START_UPDATE,u8Url,u16UrlSize,NULL,0,0);
return ret;
}
@ -226,28 +226,7 @@ NMI_API sint8 m2m_ota_start_update(uint8 * u8DownloadUrl)
/*Todo: we may change it to data pkt but we need to give it higer priority
but the priorty is not implemnted yet in data pkt
*/
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_START_FW_UPDATE,u8DownloadUrl,u16DurlSize,NULL,0,0);
return ret;
}
/*!
@fn \
NMI_API sint8 m2m_ota_start_update_crt(uint8 * u8DownloadUrl);
@brief
Request OTA start for the Cortus app image.
@param [in] u8DownloadUrl
The cortus application image url.
@return
The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_start_update_crt(uint8 * u8DownloadUrl)
{
sint8 ret = M2M_SUCCESS;
uint16 u16DurlSize = m2m_strlen(u8DownloadUrl) + 1;
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_START_CRT_UPDATE,u8DownloadUrl,u16DurlSize,NULL,0,0);
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_START_UPDATE,u8DownloadUrl,u16DurlSize,NULL,0,0);
return ret;
}
@ -265,40 +244,7 @@ NMI_API sint8 m2m_ota_start_update_crt(uint8 * u8DownloadUrl)
NMI_API sint8 m2m_ota_rollback(void)
{
sint8 ret = M2M_SUCCESS;
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_ROLLBACK_FW,NULL,0,NULL,0,0);
return ret;
}
/*!
@fn \
NMI_API sint8 m2m_ota_rollback_crt(void);
@brief
Request Cortus application OTA Rollback image
@return
The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_rollback_crt(void)
{
sint8 ret = M2M_SUCCESS;
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_ROLLBACK_CRT,NULL,0,NULL,0,0);
return ret;
}
/*!
@fn \
NMI_API sint8 m2m_ota_abort(void);
@brief
Request OTA Abort
@return
The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_abort(void)
{
sint8 ret = M2M_SUCCESS;
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_ABORT,NULL,0,NULL,0,0);
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_ROLLBACK,NULL,0,NULL,0,0);
return ret;
}
@ -319,23 +265,6 @@ NMI_API sint8 m2m_ota_switch_firmware(void)
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_SWITCH_FIRMWARE,NULL,0,NULL,0,0);
return ret;
}
/*!
@fn \
NMI_API sint8 m2m_ota_switch_crt(void);
@brief
Switch to the upgraded cortus application.
@return
The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ota_switch_crt(void)
{
sint8 ret = M2M_SUCCESS;
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_SWITCH_CRT_IMG,NULL,0,NULL,0,0);
return ret;
}
/*!
@fn \
NMI_API sint8 m2m_ota_get_firmware_version(tstrM2mRev * pstrRev);

View File

@ -4,7 +4,7 @@
*
* \brief NMC1500 Peripherials Application Interface.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -48,8 +48,6 @@ INCLUDES
#include "driver/include/nmasic.h"
#include "driver/include/m2m_hif.h"
#ifdef CONF_PERIPH
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
MACROS
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
@ -158,4 +156,3 @@ sint8 m2m_periph_pullup_ctrl(uint32 pinmask, uint8 enable)
{
return pullup_ctrl(pinmask, enable);
}
#endif /* CONF_PERIPH */

View File

@ -1,306 +0,0 @@
/**
*
* \file
*
* \brief This module contains M2M Wi-Fi APIs implementation.
*
* Copyright (c) 2017 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
INCLUDES
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
#include "driver/include/m2m_ssl.h"
#include "driver/include/m2m_hif.h"
#include "driver/include/nmasic.h"
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
MACROS
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
DATA TYPES
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
static tpfAppSSLCb gpfAppSSLCb = NULL;
static uint32 gu32HIFAddr = 0;
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
FUNCTION PROTOTYPES
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
/*!
@fn \ m2m_ssl_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
@brief SSL callback function
@param [in] u8OpCode
HIF Opcode type.
@param [in] u16DataSize
HIF data length.
@param [in] u32Addr
HIF address.
*/
static void m2m_ssl_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
{
sint8 s8tmp = M2M_SUCCESS;
switch(u8OpCode)
{
case M2M_SSL_REQ_ECC:
{
tstrEccReqInfo strEccREQ;
s8tmp = hif_receive(u32Addr, (uint8*)&strEccREQ, sizeof(tstrEccReqInfo), 0);
if(s8tmp == M2M_SUCCESS)
{
if (gpfAppSSLCb)
{
gu32HIFAddr = u32Addr + sizeof(tstrEccReqInfo);
gpfAppSSLCb(M2M_SSL_REQ_ECC, &strEccREQ);
}
}
}
break;
case M2M_SSL_RESP_SET_CS_LIST:
{
tstrSslSetActiveCsList strCsList;
s8tmp = hif_receive(u32Addr, (uint8*)&strCsList, sizeof(tstrSslSetActiveCsList), 0);
if(s8tmp == M2M_SUCCESS)
{
if (gpfAppSSLCb)
gpfAppSSLCb(M2M_SSL_RESP_SET_CS_LIST, &strCsList);
}
}
break;
}
if(s8tmp != M2M_SUCCESS)
{
M2M_ERR("Error receiving SSL from the HIF\n");
}
}
/*!
@fn \ m2m_ssl_handshake_rsp(tstrEccReqInfo* strECCResp, uint8* pu8RspDataBuff, uint16 u16RspDataSz)
@brief Sends ECC responses to the WINC
@param [in] strECCResp
ECC Response struct.
@param [in] pu8RspDataBuffe
Pointer of the response data to be sent.
@param [in] u16RspDataSz
Response data size.
@return The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ssl_handshake_rsp(tstrEccReqInfo* strECCResp, uint8* pu8RspDataBuff, uint16 u16RspDataSz)
{
sint8 s8Ret = M2M_SUCCESS;
s8Ret = hif_send(M2M_REQ_GROUP_SSL, (M2M_SSL_RESP_ECC | M2M_REQ_DATA_PKT), (uint8*)strECCResp, sizeof(tstrEccReqInfo), pu8RspDataBuff, u16RspDataSz, sizeof(tstrEccReqInfo));
return s8Ret;
}
/*!
@fn \ m2m_ssl_send_certs_to_winc(uint8* sector_buffer, uint32 sector_size)
@brief Sends certificates to the WINC
@param [in] pu8Buffer
Pointer to the certificates.
@param [in] u32BufferSz
Size of the certificates.
@return The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ssl_send_certs_to_winc(uint8* pu8Buffer, uint32 u32BufferSz)
{
sint8 s8Ret = M2M_SUCCESS;
s8Ret = hif_send(M2M_REQ_GROUP_SSL, (M2M_SSL_IND_CERTS_ECC | M2M_REQ_DATA_PKT), NULL, 0, pu8Buffer, u32BufferSz, 0);
return s8Ret;
}
/*!
@fn \ m2m_ssl_retrieve_cert(uint32 u32ReadAddr, uint16* pu16CurveType, uint8* pu8Hash, uint8* pu8Sig, tstrECPoint* pu8Key)
@brief Retrieve the certificate to be verified from the WINC
@param [in] pu16CurveType
Pointer to the certificate curve type.
@param [in] pu8Hash
Pointer to the certificate hash.
@param [in] pu8Sig
Pointer to the certificate signature.
@param [in] pu8Key
Pointer to the certificate Key.
@return The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ssl_retrieve_cert(uint16* pu16CurveType, uint8* pu8Hash, uint8* pu8Sig, tstrECPoint* pu8Key)
{
uint8 bSetRxDone = 1;
uint16 u16HashSz, u16SigSz, u16KeySz;
sint8 s8Ret = M2M_SUCCESS;
if(gu32HIFAddr == 0) return M2M_ERR_FAIL;
if(hif_receive(gu32HIFAddr, (uint8*)pu16CurveType, 2, 0) != M2M_SUCCESS) goto __ERR;
gu32HIFAddr += 2;
if(hif_receive(gu32HIFAddr, (uint8*)&u16KeySz, 2, 0) != M2M_SUCCESS) goto __ERR;
gu32HIFAddr += 2;
if(hif_receive(gu32HIFAddr, (uint8*)&u16HashSz, 2, 0) != M2M_SUCCESS) goto __ERR;
gu32HIFAddr += 2;
if(hif_receive(gu32HIFAddr, (uint8*)&u16SigSz, 2, 0) != M2M_SUCCESS) goto __ERR;
gu32HIFAddr += 2;
(*pu16CurveType)= _htons((*pu16CurveType));
pu8Key->u16Size = _htons(u16KeySz);
u16HashSz = _htons(u16HashSz);
u16SigSz = _htons(u16SigSz);
if(hif_receive(gu32HIFAddr, pu8Key->X, pu8Key->u16Size * 2, 0) != M2M_SUCCESS) goto __ERR;
gu32HIFAddr += (pu8Key->u16Size * 2);
if(hif_receive(gu32HIFAddr, pu8Hash, u16HashSz, 0) != M2M_SUCCESS) goto __ERR;
gu32HIFAddr += u16HashSz;
if(hif_receive(gu32HIFAddr, pu8Sig, u16SigSz, 0) != M2M_SUCCESS) goto __ERR;
gu32HIFAddr += u16SigSz;
bSetRxDone = 0;
__ERR:
if(bSetRxDone)
{
s8Ret = M2M_ERR_FAIL;
hif_receive(0, NULL, 0, 1);
}
return s8Ret;
}
/*!
@fn \ m2m_ssl_retrieve_hash(uint32 u32ReadAddr, uint8* pu8Hash, uint16 u16HashSz)
@brief Retrieve the certificate hash
@param [in] pu8Hash
Pointer to the certificate hash.
@param [in] u16HashSz
Hash size.
@return The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ssl_retrieve_hash(uint8* pu8Hash, uint16 u16HashSz)
{
uint8 bSetRxDone = 1;
sint8 s8Ret = M2M_SUCCESS;
if(gu32HIFAddr == 0) return M2M_ERR_FAIL;
if(hif_receive(gu32HIFAddr, pu8Hash, u16HashSz, 0) != M2M_SUCCESS) goto __ERR;
bSetRxDone = 0;
__ERR:
if(bSetRxDone)
{
s8Ret = M2M_ERR_FAIL;
hif_receive(0, NULL, 0, 1);
}
return s8Ret;
}
/*!
@fn \ m2m_ssl_stop_processing_certs(void)
@brief Stops receiving from the HIF
*/
NMI_API void m2m_ssl_stop_processing_certs(void)
{
hif_receive(0, NULL, 0, 1);
}
/*!
@fn \ m2m_ssl_ecc_process_done(void)
@brief Stops receiving from the HIF
*/
NMI_API void m2m_ssl_ecc_process_done(void)
{
gu32HIFAddr = 0;
}
/*!
@fn \
m2m_ssl_set_active_ciphersuites(uint32 u32SslCsBMP);
Override the default Active SSL ciphers in the SSL module with a certain combination selected by the caller in the form of
a bitmap containing the required ciphers to be on.
There is no need to call this function if the application will not change the default ciphersuites.
@param [in] u32SslCsBMP
Bitmap containing the desired ciphers to be enabled for the SSL module. The ciphersuites are defined in
@ref SSLCipherSuiteID.
The default ciphersuites are all ciphersuites supported by the firmware with the exception of ECC ciphersuites.
The caller can override the default with any desired combination, except for combinations involving both RSA
and ECC; if any RSA ciphersuite is enabled, then firmware will disable all ECC ciphersuites.
If u32SslCsBMP does not contain any ciphersuites supported by firmware, then the current active list will not
be changed.
@return
- [SOCK_ERR_NO_ERROR](@ref SOCK_ERR_NO_ERROR)
- [SOCK_ERR_INVALID_ARG](@ref SOCK_ERR_INVALID_ARG)
*/
sint8 m2m_ssl_set_active_ciphersuites(uint32 u32SslCsBMP)
{
sint8 s8Ret = M2M_SUCCESS;
tstrSslSetActiveCsList strCsList;
strCsList.u32CsBMP = u32SslCsBMP;
s8Ret = hif_send(M2M_REQ_GROUP_SSL, M2M_SSL_REQ_SET_CS_LIST, (uint8*)&strCsList, sizeof(tstrSslSetActiveCsList), NULL, 0, 0);
return s8Ret;
}
/*!
@fn \ m2m_ssl_init(tpfAppSslCb pfAppSslCb);
@brief Initializes the SSL layer.
@param [in] pfAppSslCb
Application SSL callback function.
@return The function SHALL return 0 for success and a negative value otherwise.
*/
NMI_API sint8 m2m_ssl_init(tpfAppSSLCb pfAppSSLCb)
{
sint8 s8Ret = M2M_SUCCESS;
gpfAppSSLCb = pfAppSSLCb;
gu32HIFAddr = 0;
s8Ret = hif_register_cb(M2M_REQ_GROUP_SSL,m2m_ssl_cb);
if (s8Ret != M2M_SUCCESS)
{
M2M_ERR("hif_register_cb() failed with ret=%d", s8Ret);
}
return s8Ret;
}

View File

@ -4,7 +4,7 @@
*
* \brief This module contains M2M Wi-Fi APIs implementation.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -360,25 +360,15 @@ static sint8 m2m_validate_ap_parameters(CONST tstrM2MAPConfig* pstrM2MAPConfig)
if( (pstrM2MAPConfig->u8KeySz != WEP_40_KEY_STRING_SIZE) &&
(pstrM2MAPConfig->u8KeySz != WEP_104_KEY_STRING_SIZE)
)
{
M2M_ERR("INVALID KEY STRING SIZE\n");
s8Ret = M2M_ERR_FAIL;
goto ERR1;
}
if((m2m_strlen((uint8 *)pstrM2MAPConfig->au8WepKey) <= 0) || (m2m_strlen((uint8 *)pstrM2MAPConfig->au8WepKey) > WEP_104_KEY_STRING_SIZE))
{
M2M_ERR("INVALID KEY SIZE\n");
s8Ret = M2M_ERR_FAIL;
goto ERR1;
}
}
else if(pstrM2MAPConfig->u8SecType == M2M_WIFI_SEC_WPA_PSK)
{
/* Check for WPA Key size */
if( ((pstrM2MAPConfig->u8KeySz + 1) < M2M_MIN_PSK_LEN) || ((pstrM2MAPConfig->u8KeySz + 1) > M2M_MAX_PSK_LEN))
/* Check for WEP Key */
if((pstrM2MAPConfig->au8WepKey == NULL) || (m2m_strlen((uint8 *)pstrM2MAPConfig->au8WepKey) <= 0) || (m2m_strlen((uint8 *)pstrM2MAPConfig->au8WepKey) > WEP_104_KEY_STRING_SIZE))
{
M2M_ERR("INVALID WPA KEY SIZE\n");
M2M_ERR("INVALID WEP KEY\n");
s8Ret = M2M_ERR_FAIL;
goto ERR1;
}
@ -393,6 +383,7 @@ static sint8 m2m_validate_ap_parameters(CONST tstrM2MAPConfig* pstrM2MAPConfig)
ERR1:
return s8Ret;
}
static sint8 m2m_validate_scan_options(tstrM2MScanOption* ptstrM2MScanOption)
{
sint8 s8Ret = M2M_SUCCESS;
@ -401,44 +392,31 @@ static sint8 m2m_validate_scan_options(tstrM2MScanOption* ptstrM2MScanOption)
{
M2M_ERR("INVALID POINTER\n");
s8Ret = M2M_ERR_FAIL;
goto ERR;
}
/* Check for valid No of slots */
if(ptstrM2MScanOption->u8NumOfSlot == 0)
if(ptstrM2MScanOption->u8NumOfSlot < 1)
{
M2M_ERR("INVALID No of scan slots! %d\n",ptstrM2MScanOption->u8NumOfSlot);
M2M_ERR("INVALID No of scan slots!\n");
s8Ret = M2M_ERR_FAIL;
goto ERR;
}
/* Check for valid time of slots */
if(ptstrM2MScanOption->u8SlotTime < 10 || ptstrM2MScanOption->u8SlotTime > 250)
if(ptstrM2MScanOption->u8SlotTime < 1)
{
M2M_ERR("INVALID scan slot time! %d\n",ptstrM2MScanOption->u8SlotTime);
M2M_ERR("INVALID scan slot time!\n");
s8Ret = M2M_ERR_FAIL;
goto ERR;
}
/* Check for valid No of probe requests per slot */
if((ptstrM2MScanOption->u8ProbesPerSlot == 0)||(ptstrM2MScanOption->u8ProbesPerSlot > M2M_SCAN_DEFAULT_NUM_PROBE))
if((ptstrM2MScanOption->u8ProbesPerSlot < 0)||(ptstrM2MScanOption->u8ProbesPerSlot > M2M_SCAN_DEFAULT_NUM_PROBE))
{
M2M_ERR("INVALID No of probe requests per scan slot %d\n",ptstrM2MScanOption->u8ProbesPerSlot);
M2M_ERR("INVALID No of probe requests per scan slot\n");
s8Ret = M2M_ERR_FAIL;
goto ERR;
}
/* Check for valid RSSI threshold */
if((ptstrM2MScanOption->s8RssiThresh < -99) || (ptstrM2MScanOption->s8RssiThresh >= 0))
if((ptstrM2MScanOption->s8RssiThresh < -99) || (ptstrM2MScanOption->s8RssiThresh >= 0))
{
M2M_ERR("INVALID RSSI threshold %d \n",ptstrM2MScanOption->s8RssiThresh);
s8Ret = M2M_ERR_FAIL;
}
ERR:
return s8Ret;
}
sint8 m2m_wifi_send_crl(tstrTlsCrlInfo* pCRL)
{
sint8 s8Ret = M2M_ERR_FAIL;
s8Ret = hif_send(M2M_REQ_GROUP_SSL, M2M_SSL_IND_CRL|M2M_REQ_DATA_PKT, NULL, 0, (uint8*)pCRL, sizeof(tstrTlsCrlInfo), 0);
}
return s8Ret;
}
@ -475,13 +453,11 @@ sint8 m2m_wifi_init(tstrWifiInitParam * param)
hif_register_cb(M2M_REQ_GROUP_WIFI,m2m_wifi_cb);
ret = nm_get_firmware_full_info(&strtmp);
ret = nm_get_firmware_info(&strtmp);
M2M_INFO("Firmware ver : %u.%u.%u Svnrev %u\n", strtmp.u8FirmwareMajor, strtmp.u8FirmwareMinor, strtmp.u8FirmwarePatch,strtmp.u16FirmwareSvnNum);
M2M_INFO("Firmware Build %s Time %s\n",strtmp.BuildDate,strtmp.BuildTime);
M2M_INFO("Firmware Min driver ver : %u.%u.%u\n", strtmp.u8DriverMajor, strtmp.u8DriverMinor, strtmp.u8DriverPatch);
M2M_INFO("Driver ver: %u.%u.%u\n", M2M_RELEASE_VERSION_MAJOR_NO, M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO);
M2M_INFO("Driver built at %s\t%s\n",__DATE__,__TIME__);
M2M_INFO("Firmware ver : %u.%u.%u\n", strtmp.u8FirmwareMajor, strtmp.u8FirmwareMinor, strtmp.u8FirmwarePatch);
M2M_INFO("Min driver ver : %u.%u.%u\n", strtmp.u8DriverMajor, strtmp.u8DriverMinor, strtmp.u8DriverPatch);
M2M_INFO("Curr driver ver: %u.%u.%u\n", M2M_DRIVER_VERSION_MAJOR_NO, M2M_DRIVER_VERSION_MINOR_NO, M2M_DRIVER_VERSION_PATCH_NO);
if(M2M_ERR_FW_VER_MISMATCH == ret)
{
M2M_ERR("Mismatch Firmawre Version\n");
@ -557,7 +533,7 @@ sint8 m2m_wifi_connect_sc(char *pcSsid, uint8 u8SsidLen, uint8 u8SecType, void *
goto ERR1;
}
if(u16Ch < M2M_WIFI_CH_1|| u16Ch > M2M_WIFI_CH_14)
if(u16Ch>M2M_WIFI_CH_14)
{
if(u16Ch!=M2M_WIFI_CH_ALL)
{
@ -751,77 +727,6 @@ sint8 m2m_wifi_request_scan(uint8 ch)
}
return s8Ret;
}
sint8 m2m_wifi_request_scan_passive(uint8 ch, uint16 scan_time)
{
sint8 s8Ret = M2M_SUCCESS;
if(!gu8scanInProgress)
{
if(((ch >= M2M_WIFI_CH_1) && (ch <= M2M_WIFI_CH_14)) || (ch == M2M_WIFI_CH_ALL))
{
tstrM2MScan strtmp;
strtmp.u8ChNum = ch;
strtmp.u16PassiveScanTime = scan_time;
s8Ret = hif_send(M2M_REQ_GROUP_WIFI, M2M_WIFI_REQ_PASSIVE_SCAN, (uint8*)&strtmp, sizeof(tstrM2MScan),NULL, 0,0);
if(s8Ret == M2M_SUCCESS)
{
gu8scanInProgress = 1;
}
}
else
{
s8Ret = M2M_ERR_INVALID_ARG;
}
}
else
{
s8Ret = M2M_ERR_SCAN_IN_PROGRESS;
}
return s8Ret;
}
sint8 m2m_wifi_request_scan_ssid_list(uint8 ch,uint8 * u8Ssidlist)
{
sint8 s8Ret = M2M_ERR_INVALID_ARG;
if(!gu8scanInProgress)
{
if((((ch >= M2M_WIFI_CH_1) && (ch <= M2M_WIFI_CH_14)) || (ch == M2M_WIFI_CH_ALL))&&(u8Ssidlist != NULL))
{
tstrM2MScan strtmp;
uint16 u16Lsize = 0;
uint8 u8Apnum = u8Ssidlist[u16Lsize];
if(u8Apnum <= MAX_HIDDEN_SITES)
{
u16Lsize++;
while(u8Apnum)
{
if(u8Ssidlist[u16Lsize] >= M2M_MAX_SSID_LEN){
goto EXIT;
}else {
u16Lsize += u8Ssidlist[u16Lsize] + 1;
u8Apnum--;
}
}
strtmp.u8ChNum = ch;
s8Ret = hif_send(M2M_REQ_GROUP_WIFI, M2M_WIFI_REQ_SCAN_SSID_LIST|M2M_REQ_DATA_PKT, (uint8*)&strtmp, sizeof(tstrM2MScan),u8Ssidlist, u16Lsize,sizeof(tstrM2MScan));
if(s8Ret == M2M_SUCCESS)
{
gu8scanInProgress = 1;
}
}
}
}
else
{
s8Ret = M2M_ERR_SCAN_IN_PROGRESS;
}
EXIT:
return s8Ret;
}
sint8 m2m_wifi_wps(uint8 u8TriggerType,const char *pcPinNumber)
{
tstrM2MWPSConnect strtmp;
@ -898,7 +803,7 @@ sint8 m2m_wifi_p2p(uint8 u8Channel)
}
else
{
M2M_ERR("Listen channel should only be M2M_WIFI_CH_1/6/11 \n");
M2M_ERR("Listen channel should only be 1, 6 or 11\n");
ret = M2M_ERR_FAIL;
}
return ret;
@ -918,16 +823,6 @@ sint8 m2m_wifi_enable_ap(CONST tstrM2MAPConfig* pstrM2MAPConfig)
}
return ret;
}
sint8 m2m_wifi_set_gains(tstrM2mWifiGainsParams* pstrM2mGain)
{
sint8 ret = M2M_ERR_FAIL;
if(pstrM2mGain != NULL)
{
ret = hif_send(M2M_REQ_GROUP_WIFI, M2M_WIFI_REQ_SET_GAINS, (uint8 *)pstrM2mGain, sizeof(tstrM2mWifiGainsParams), NULL, 0, 0);
}
return ret;
}
sint8 m2m_wifi_disable_ap(void)
{
sint8 ret = M2M_SUCCESS;
@ -1418,3 +1313,4 @@ NMI_API sint8 m2m_wifi_set_receive_buffer(void* pvBuffer,uint16 u16BufferLen)
return s8ret;
}
#endif /* ETH_MODE */

View File

@ -4,7 +4,7 @@
*
* \brief This module contains common APIs declarations.
*
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*

View File

@ -4,7 +4,7 @@
*
* \brief This module contains NMC1500 ASIC specific internal APIs.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -51,23 +51,17 @@
#define NMI_INTR_ENABLE (NMI_INTR_REG_BASE)
#define GET_UINT32(X,Y) (X[0+Y] + ((uint32)X[1+Y]<<8) + ((uint32)X[2+Y]<<16) +((uint32)X[3+Y]<<24))
/*SPI and I2C only*/
#define CORT_HOST_COMM (0x10)
#define HOST_CORT_COMM (0x0b)
#define WAKE_CLK_REG (0x1)
#define CLOCKS_EN_REG (0xf)
#define TIMEOUT (2000)
#define M2M_DISABLE_PS (0xd0ul)
#define TIMEOUT (0xfffffffful)
#define WAKUP_TRAILS_TIMEOUT (4)
static uint32 clk_status_reg_adr = 0xf; /* Assume initially it is B0 chip */
sint8 chip_apply_conf(uint32 u32Conf)
{
sint8 ret = M2M_SUCCESS;
uint32 val32 = u32Conf;
#if (defined __ENABLE_PMU__) || (defined CONF_WINC_INT_PMU)
#ifdef __ENABLE_PMU__
val32 |= rHAVE_USE_PMU_BIT;
#endif
#ifdef __ENABLE_SLEEP_CLK_SRC_RTC__
@ -84,8 +78,6 @@ sint8 chip_apply_conf(uint32 u32Conf)
#ifdef __DISABLE_FIRMWARE_LOGS__
val32 |= rHAVE_LOGS_DISABLED_BIT;
#endif
val32 |= rHAVE_RESERVED1_BIT;
do {
nm_write_reg(rNMI_GP_REG_1, val32);
if(val32 != 0) {
@ -102,68 +94,179 @@ sint8 chip_apply_conf(uint32 u32Conf)
return M2M_SUCCESS;
}
/**
* @fn nm_clkless_wake
* @brief Wakeup the chip using clockless registers
* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
* @author Samer Sarhan
* @date 06 June 2014
* @version 1.0
*/
sint8 nm_clkless_wake(void)
{
sint8 ret = M2M_SUCCESS;
uint32 reg, clk_status_reg,trials = 0;
/* wait 1ms, spi data read */
nm_bsp_sleep(1);
ret = nm_read_reg_with_ret(0x1, &reg);
if(ret != M2M_SUCCESS) {
M2M_ERR("Bus error (1). Wake up failed\n");
goto _WAKE_EXIT;
}
/*
* At this point, I am not sure whether it is B0 or A0
* If B0, then clks_enabled bit exists in register 0xf
* If A0, then clks_enabled bit exists in register 0xe
*/
do
{
/* Set bit 1 */
nm_write_reg(0x1, reg | (1 << 1));
/* wait 1ms, spi data read */
nm_bsp_sleep(1);
// Check the clock status
ret = nm_read_reg_with_ret(clk_status_reg_adr, &clk_status_reg);
if( (ret != M2M_SUCCESS) || ((ret == M2M_SUCCESS) && (clk_status_reg == 0)) ) {
/* Register 0xf did not exist in A0.
* If register 0xf fails to read or if it reads 0,
* then the chip is A0.
*/
clk_status_reg_adr = 0xe;
/* wait 1ms, spi data read */
nm_bsp_sleep(1);
ret = nm_read_reg_with_ret(clk_status_reg_adr, &clk_status_reg);
/* Aelmeleh 24-08-2015*/
/* Check for C3000 rev. D0 value */
if( (ret != M2M_SUCCESS) || ((ret == M2M_SUCCESS) && (clk_status_reg == 0)) ) {
clk_status_reg_adr = 0x13;
/* wait 1ms, spi data read */
nm_bsp_sleep(1);
ret = nm_read_reg_with_ret(clk_status_reg_adr, &clk_status_reg);
if(ret != M2M_SUCCESS) {
M2M_ERR("Bus error (2). Wake up failed\n");
goto _WAKE_EXIT;
}
}
}
// in case of clocks off, wait 2ms, and check it again.
// if still off, wait for another 2ms, for a total wait of 6ms.
// If still off, redo the wake up sequence
while( ((clk_status_reg & 0x4) == 0) && (((++trials) %3) == 0))
{
/* Wait for the chip to stabilize*/
nm_bsp_sleep(2);
// Make sure chip is awake. This is an extra step that can be removed
// later to avoid the bus access overhead
nm_read_reg_with_ret(clk_status_reg_adr, &clk_status_reg);
if((clk_status_reg & 0x4) == 0)
{
M2M_ERR("clocks still OFF. Wake up failed\n");
}
}
// in case of failure, Reset the wakeup bit to introduce a new edge on the next loop
if((clk_status_reg & 0x4) == 0)
{
// Reset bit 0
nm_write_reg(0x1, reg | (1 << 1));
}
} while((clk_status_reg & 0x4) == 0);
_WAKE_EXIT:
return ret;
}
void chip_idle(void)
{
uint32 reg = 0;
nm_read_reg_with_ret(WAKE_CLK_REG, &reg);
if(reg & NBIT1)
uint32 reg =0;
nm_read_reg_with_ret(0x1, &reg);
if(reg&0x2)
{
reg &=~ NBIT1;
nm_write_reg(WAKE_CLK_REG, reg);
reg &=~(1 << 1);
nm_write_reg(0x1, reg);
}
}
void enable_rf_blocks(void)
{
nm_write_reg(0x6, 0xdb);
nm_write_reg(0x7, 0x6);
nm_bsp_sleep(10);
nm_write_reg(0x1480, 0);
nm_write_reg(0x1484, 0);
nm_bsp_sleep(10);
nm_write_reg(0x6, 0x0);
nm_write_reg(0x7, 0x0);
}
sint8 enable_interrupts(void)
{
uint32 reg = 0;
sint8 ret = M2M_SUCCESS;
uint32 reg;
sint8 ret;
/**
interrupt pin mux select
**/
ret = nm_read_reg_with_ret(NMI_PIN_MUX_0, &reg);
if (M2M_SUCCESS != ret) goto ERR1;
if (M2M_SUCCESS != ret) {
return M2M_ERR_BUS_FAIL;
}
reg |= ((uint32) 1 << 8);
ret = nm_write_reg(NMI_PIN_MUX_0, reg);
if (M2M_SUCCESS != ret) goto ERR1;
if (M2M_SUCCESS != ret) {
return M2M_ERR_BUS_FAIL;
}
/**
interrupt enable
**/
ret = nm_read_reg_with_ret(NMI_INTR_ENABLE, &reg);
if (M2M_SUCCESS != ret) goto ERR1;
if (M2M_SUCCESS != ret) {
return M2M_ERR_BUS_FAIL;
}
reg |= ((uint32) 1 << 16);
ret = nm_write_reg(NMI_INTR_ENABLE, reg);
if (M2M_SUCCESS != ret) goto ERR1;
ERR1:
return ret;
if (M2M_SUCCESS != ret) {
return M2M_ERR_BUS_FAIL;
}
return M2M_SUCCESS;
}
sint8 cpu_start(void) {
uint32 reg = 0;
uint32 reg;
sint8 ret;
/**
reset regs
*/
ret = nm_write_reg(BOOTROM_REG,0);
ret += nm_write_reg(NMI_STATE_REG,0);
ret += nm_write_reg(NMI_REV_REG,0);
nm_write_reg(BOOTROM_REG,0);
nm_write_reg(NMI_STATE_REG,0);
nm_write_reg(NMI_REV_REG,0);
/**
Go...
**/
ret += nm_read_reg_with_ret(0x1118, &reg);
ret = nm_read_reg_with_ret(0x1118, &reg);
if (M2M_SUCCESS != ret) {
ret = M2M_ERR_BUS_FAIL;
M2M_ERR("[nmi start]: fail read reg 0x1118 ...\n");
}
reg |= (1 << 0);
ret += nm_write_reg(0x1118, reg);
ret = nm_write_reg(0x1118, reg);
ret = nm_write_reg(0x150014, 0x1);
ret += nm_read_reg_with_ret(NMI_GLB_RESET_0, &reg);
if ((reg & (1ul << 10)) == (1ul << 10)) {
reg &= ~(1ul << 10);
ret += nm_write_reg(NMI_GLB_RESET_0, reg);
}
reg |= (1ul << 10);
ret += nm_write_reg(NMI_GLB_RESET_0, reg);
nm_bsp_sleep(1);
nm_bsp_sleep(1); /* TODO: Why bus error if this delay is not here. */
return ret;
}
@ -173,7 +276,7 @@ uint32 nmi_get_chipid(void)
if (chipid == 0) {
uint32 rfrevid;
if((nm_read_reg_with_ret(0x1000, &chipid)) != M2M_SUCCESS) {
chipid = 0;
return 0;
@ -198,12 +301,12 @@ uint32 nmi_get_chipid(void)
} else /* if(rfrevid == 5) */ { /* 1002B2 */
chipid = 0x1002b2;
}
}else if(chipid == 0x1000F0) {
} else if(chipid == 0x1000F0) {
if((nm_read_reg_with_ret(0x3B0000, &chipid)) != M2M_SUCCESS) {
chipid = 0;
return 0;
}
}else {
} else {
}
//#define PROBE_FLASH
@ -275,125 +378,67 @@ void nmi_set_sys_clk_src_to_xo(void)
/* Do PLL update */
nmi_update_pll();
}
sint8 chip_sleep(void)
static uint8 check_3000_id(void)
{
uint32 reg;
sint8 ret = M2M_SUCCESS;
while(1)
{
ret = nm_read_reg_with_ret(CORT_HOST_COMM,&reg);
if(ret != M2M_SUCCESS) goto ERR1;
if((reg & NBIT0) == 0) break;
}
/* Clear bit 1 */
ret = nm_read_reg_with_ret(WAKE_CLK_REG, &reg);
if(ret != M2M_SUCCESS)goto ERR1;
if(reg & NBIT1)
{
reg &=~NBIT1;
ret = nm_write_reg(WAKE_CLK_REG, reg);
if(ret != M2M_SUCCESS)goto ERR1;
}
ret = nm_read_reg_with_ret(HOST_CORT_COMM, &reg);
if(ret != M2M_SUCCESS)goto ERR1;
if(reg & NBIT0)
{
reg &= ~NBIT0;
ret = nm_write_reg(HOST_CORT_COMM, reg);
if(ret != M2M_SUCCESS)goto ERR1;
}
ERR1:
return ret;
return ((nmi_get_chipid() & (0xf00000)) == 0x300000);
}
sint8 chip_wake(void)
{
sint8 ret = M2M_SUCCESS;
uint32 reg = 0, clk_status_reg = 0,trials = 0;
ret = nm_clkless_wake();
if(ret != M2M_SUCCESS) return ret;
if(!check_3000_id())
{
enable_rf_blocks();
}
ret = nm_read_reg_with_ret(HOST_CORT_COMM, &reg);
if(ret != M2M_SUCCESS)goto _WAKE_EXIT;
if(!(reg & NBIT0))
{
/*USE bit 0 to indicate host wakeup*/
ret = nm_write_reg(HOST_CORT_COMM, reg|NBIT0);
if(ret != M2M_SUCCESS)goto _WAKE_EXIT;
}
ret = nm_read_reg_with_ret(WAKE_CLK_REG, &reg);
if(ret != M2M_SUCCESS)goto _WAKE_EXIT;
/* Set bit 1 */
if(!(reg & NBIT1))
{
ret = nm_write_reg(WAKE_CLK_REG, reg | NBIT1);
if(ret != M2M_SUCCESS) goto _WAKE_EXIT;
}
do
{
ret = nm_read_reg_with_ret(CLOCKS_EN_REG, &clk_status_reg);
if(ret != M2M_SUCCESS) {
M2M_ERR("Bus error (5).%d %lx\n",ret,clk_status_reg);
goto _WAKE_EXIT;
}
if(clk_status_reg & NBIT2) {
break;
}
nm_bsp_sleep(2);
trials++;
if(trials > WAKUP_TRAILS_TIMEOUT)
{
M2M_ERR("Failed to wakup the chip\n");
ret = M2M_ERR_TIME_OUT;
goto _WAKE_EXIT;
}
}while(1);
/*workaround sometimes spi fail to read clock regs after reading/writing clockless registers*/
nm_bus_reset();
_WAKE_EXIT:
return ret;
}
sint8 cpu_halt(void)
{
sint8 ret;
uint32 reg = 0;
ret = nm_read_reg_with_ret(0x1118, &reg);
reg |= (1 << 0);
ret += nm_write_reg(0x1118, reg);
ret += nm_read_reg_with_ret(NMI_GLB_RESET_0, &reg);
if ((reg & (1ul << 10)) == (1ul << 10)) {
reg &= ~(1ul << 10);
ret += nm_write_reg(NMI_GLB_RESET_0, reg);
ret += nm_read_reg_with_ret(NMI_GLB_RESET_0, &reg);
}
return ret;
}
sint8 chip_reset_and_cpu_halt(void)
{
sint8 ret = M2M_SUCCESS;
uint32 reg = 0;
/*Wakeup needed only for I2C interface*/
ret = chip_wake();
if(ret != M2M_SUCCESS) goto ERR1;
/*Reset and CPU halt need for no wait board only*/
ret = chip_reset();
if(ret != M2M_SUCCESS) goto ERR1;
ret = cpu_halt();
if(ret != M2M_SUCCESS) goto ERR1;
ERR1:
if(ret != M2M_SUCCESS) {
return ret;
}
if(!check_3000_id())
{
chip_reset();
ret = nm_read_reg_with_ret(0x1118, &reg);
if (M2M_SUCCESS != ret) {
ret = M2M_ERR_BUS_FAIL;
M2M_ERR("[nmi start]: fail read reg 0x1118 ...\n");
}
reg |= (1 << 0);
ret = nm_write_reg(0x1118, reg);
ret += nm_read_reg_with_ret(NMI_GLB_RESET_0, &reg);
if ((reg & (1ul << 10)) == (1ul << 10)) {
reg &= ~(1ul << 10);
ret += nm_write_reg(NMI_GLB_RESET_0, reg);
ret += nm_read_reg_with_ret(NMI_GLB_RESET_0, &reg);
}
nm_write_reg(BOOTROM_REG,0);
nm_write_reg(NMI_STATE_REG,0);
nm_write_reg(NMI_REV_REG,0);
nm_write_reg(NMI_PIN_MUX_0, 0x11111000);
}
return ret;
}
sint8 chip_reset(void)
{
sint8 ret = M2M_SUCCESS;
ret = nm_write_reg(NMI_GLB_RESET_0, 0);
#ifndef CONF_WINC_USE_UART
nmi_set_sys_clk_src_to_xo();
#endif
ret += nm_write_reg(NMI_GLB_RESET_0, 0);
nm_bsp_sleep(50);
#ifndef CONF_WINC_USE_UART
restore_pmu_settings_after_global_reset();
#endif
return ret;
}
@ -402,11 +447,6 @@ sint8 wait_for_bootrom(uint8 arg)
sint8 ret = M2M_SUCCESS;
uint32 reg = 0, cnt = 0;
uint32 u32GpReg1 = 0;
uint32 u32DriverVerInfo = M2M_MAKE_VERSION_INFO(M2M_RELEASE_VERSION_MAJOR_NO,\
M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO,\
M2M_RELEASE_VERSION_MAJOR_NO, M2M_RELEASE_VERSION_MINOR_NO,\
M2M_RELEASE_VERSION_PATCH_NO);
reg = 0;
while(1) {
@ -445,19 +485,19 @@ sint8 wait_for_bootrom(uint8 arg)
nm_write_reg(NMI_STATE_REG, 0);
}else if(M2M_WIFI_MODE_ETHERNET == arg){
u32GpReg1 = rHAVE_ETHERNET_MODE_BIT;
nm_write_reg(NMI_STATE_REG, u32DriverVerInfo);
} else {
/*bypass this step*/
nm_write_reg(NMI_STATE_REG, u32DriverVerInfo);
}
if(REV(nmi_get_chipid()) >= REV_3A0){
if(REV(nmi_get_chipid()) == REV_3A0)
{
chip_apply_conf(u32GpReg1 | rHAVE_USE_PMU_BIT);
} else {
}
else
{
chip_apply_conf(u32GpReg1);
}
M2M_INFO("DriverVerInfo: 0x%08lx\n",u32DriverVerInfo);
nm_write_reg(BOOTROM_REG,M2M_START_FIRMWARE);
#ifdef __ROM_TEST__
@ -486,6 +526,7 @@ sint8 wait_for_firmware_start(uint8 arg)
while (checkValue != reg)
{
nm_bsp_sleep(2); /* TODO: Why bus error if this delay is not here. */
M2M_DBG("%x %x %x\n",(unsigned int)nm_read_reg(0x108c),(unsigned int)nm_read_reg(0x108c),(unsigned int)nm_read_reg(0x14A0));
reg = nm_read_reg(regAddress);
@ -508,6 +549,7 @@ sint8 chip_deinit(void)
{
uint32 reg = 0;
sint8 ret;
uint8 timeout = 10;
/**
stop the firmware, need a re-download
@ -515,21 +557,36 @@ sint8 chip_deinit(void)
ret = nm_read_reg_with_ret(NMI_GLB_RESET_0, &reg);
if (ret != M2M_SUCCESS) {
M2M_ERR("failed to de-initialize\n");
goto ERR1;
}
reg &= ~(1 << 10);
ret = nm_write_reg(NMI_GLB_RESET_0, reg);
if (ret != M2M_SUCCESS) {
M2M_ERR("failed to de-initialize\n");
goto ERR1;
M2M_ERR("Error while writing reg\n");
return ret;
}
ERR1:
do {
ret = nm_read_reg_with_ret(NMI_GLB_RESET_0, &reg);
if (ret != M2M_SUCCESS) {
M2M_ERR("Error while reading reg\n");
return ret;
}
/*Workaround to ensure that the chip is actually reset*/
if ((reg & (1 << 10))) {
M2M_DBG("Bit 10 not reset retry %d\n", timeout);
reg &= ~(1 << 10);
ret = nm_write_reg(NMI_GLB_RESET_0, reg);
timeout--;
} else {
break;
}
} while (timeout);
return ret;
}
#ifdef CONF_PERIPH
sint8 set_gpio_dir(uint8 gpio, uint8 dir)
{
uint32 val32;
@ -605,7 +662,6 @@ sint8 pullup_ctrl(uint32 pinmask, uint8 enable)
_EXIT:
return s8Ret;
}
#endif /* CONF_PERIPH */
sint8 nmi_get_otp_mac_address(uint8 *pu8MacAddr, uint8 * pu8IsValid)
{

View File

@ -4,7 +4,7 @@
*
* \brief This module contains NMC1000 bus APIs implementation.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -59,6 +59,7 @@ sint8 nm_bus_iface_init(void *pvInitVal)
{
sint8 ret = M2M_SUCCESS;
ret = nm_bus_init(pvInitVal);
return ret;
}
@ -78,26 +79,6 @@ sint8 nm_bus_iface_deinit(void)
return ret;
}
/**
* @fn nm_bus_reset
* @brief reset bus interface
* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
* @version 1.0
*/
sint8 nm_bus_reset(void)
{
sint8 ret = M2M_SUCCESS;
#ifdef CONF_WINC_USE_UART
#elif defined (CONF_WINC_USE_SPI)
return nm_spi_reset();
#elif defined (CONF_WINC_USE_I2C)
#else
#error "Plesae define bus usage"
#endif
return ret;
}
/**
* @fn nm_bus_iface_reconfigure
* @brief reconfigure bus interface
@ -214,7 +195,7 @@ static sint8 p_nm_read_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
* @author M. Abdelmawla
* @date 11 July 2012
* @version 1.0
*/
*/
sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
{
uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz - MAX_TRX_CFG_SZ;
@ -225,7 +206,7 @@ sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
{
if(u32Sz <= u16MaxTrxSz)
{
s8Ret += p_nm_read_block(u32Addr, &puBuf[off], (uint16)u32Sz);
s8Ret += p_nm_read_block(u32Addr, &puBuf[off], (uint16)u32Sz);
break;
}
else
@ -267,7 +248,7 @@ static sint8 p_nm_write_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
* @author M. Abdelmawla
* @date 11 July 2012
* @version 1.0
*/
*/
sint8 nm_write_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
{
uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz - MAX_TRX_CFG_SZ;
@ -278,7 +259,7 @@ sint8 nm_write_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
{
if(u32Sz <= u16MaxTrxSz)
{
s8Ret += p_nm_write_block(u32Addr, &puBuf[off], (uint16)u32Sz);
s8Ret += p_nm_write_block(u32Addr, &puBuf[off], (uint16)u32Sz);
break;
}
else

View File

@ -4,7 +4,7 @@
*
* \brief This module contains NMC1000 M2M driver APIs implementation.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -78,10 +78,9 @@ sint8 nm_get_firmware_info(tstrM2mRev* M2mRev)
M2mRev->u8FirmwareMinor = M2M_GET_FW_MINOR(reg);
M2mRev->u8FirmwarePatch = M2M_GET_FW_PATCH(reg);
M2mRev->u32Chipid = nmi_get_chipid();
M2mRev->u16FirmwareSvnNum = 0;
curr_firm_ver = M2M_MAKE_VERSION(M2mRev->u8FirmwareMajor, M2mRev->u8FirmwareMinor,M2mRev->u8FirmwarePatch);
curr_drv_ver = M2M_MAKE_VERSION(M2M_RELEASE_VERSION_MAJOR_NO, M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO);
curr_drv_ver = M2M_MAKE_VERSION(M2M_DRIVER_VERSION_MAJOR_NO, M2M_DRIVER_VERSION_MINOR_NO, M2M_DRIVER_VERSION_PATCH_NO);
min_req_drv_ver = M2M_MAKE_VERSION(M2mRev->u8DriverMajor, M2mRev->u8DriverMinor,M2mRev->u8DriverPatch);
if(curr_drv_ver < min_req_drv_ver) {
/*The current driver version should be larger or equal
@ -126,7 +125,7 @@ sint8 nm_get_firmware_full_info(tstrM2mRev* pstrRev)
if(ret == M2M_SUCCESS)
{
curr_firm_ver = M2M_MAKE_VERSION(pstrRev->u8FirmwareMajor, pstrRev->u8FirmwareMinor,pstrRev->u8FirmwarePatch);
curr_drv_ver = M2M_MAKE_VERSION(M2M_RELEASE_VERSION_MAJOR_NO, M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO);
curr_drv_ver = M2M_MAKE_VERSION(M2M_DRIVER_VERSION_MAJOR_NO, M2M_DRIVER_VERSION_MINOR_NO, M2M_DRIVER_VERSION_PATCH_NO);
min_req_drv_ver = M2M_MAKE_VERSION(pstrRev->u8DriverMajor, pstrRev->u8DriverMinor,pstrRev->u8DriverPatch);
if((curr_firm_ver == 0)||(min_req_drv_ver == 0)||(min_req_drv_ver == 0)){
ret = M2M_ERR_FAIL;
@ -190,7 +189,7 @@ sint8 nm_get_ota_firmware_info(tstrM2mRev* pstrRev)
if(ret == M2M_SUCCESS)
{
curr_firm_ver = M2M_MAKE_VERSION(pstrRev->u8FirmwareMajor, pstrRev->u8FirmwareMinor,pstrRev->u8FirmwarePatch);
curr_drv_ver = M2M_MAKE_VERSION(M2M_RELEASE_VERSION_MAJOR_NO, M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO);
curr_drv_ver = M2M_MAKE_VERSION(M2M_DRIVER_VERSION_MAJOR_NO, M2M_DRIVER_VERSION_MINOR_NO, M2M_DRIVER_VERSION_PATCH_NO);
min_req_drv_ver = M2M_MAKE_VERSION(pstrRev->u8DriverMajor, pstrRev->u8DriverMinor,pstrRev->u8DriverPatch);
if((curr_firm_ver == 0)||(min_req_drv_ver == 0)||(min_req_drv_ver == 0)){
ret = M2M_ERR_FAIL;
@ -207,7 +206,7 @@ sint8 nm_get_ota_firmware_info(tstrM2mRev* pstrRev)
}
}
}else{
ret = M2M_ERR_INVALID;
ret = M2M_ERR_FAIL;
}
}
}else{
@ -244,13 +243,11 @@ sint8 nm_drv_init_download_mode()
}
/**
TODO:reset the chip and halt the cpu in case of no wait efuse is set (add the no wait effuse check)
reset the chip and halt the cpu in case of no wait efuse is set.
*/
if(!ISNMC3000(GET_CHIPID()))
{
/*Execuate that function only for 1500A/B, no room in 3000, but it may be needed in 3400 no wait*/
chip_reset_and_cpu_halt();
}
chip_reset_and_cpu_halt();
#ifdef CONF_WINC_USE_SPI
/* Must do this after global reset to set SPI data packet size. */
@ -303,6 +300,7 @@ sint8 nm_drv_init(void * arg)
#ifdef NO_HW_CHIP_EN
ret = chip_wake();
nm_bsp_sleep(10);
if (M2M_SUCCESS != ret) {
M2M_ERR("[nmi start]: fail chip_wakeup\n");
goto ERR2;
@ -319,6 +317,15 @@ sint8 nm_drv_init(void * arg)
#ifdef CONF_WINC_USE_SPI
/* Must do this after global reset to set SPI data packet size. */
nm_spi_init();
#endif
#ifdef NO_HW_CHIP_EN
/*return power save to default value*/
chip_idle();
ret = cpu_start();
if (M2M_SUCCESS != ret) {
goto ERR2;
}
#endif
ret = wait_for_bootrom(u8Mode);
if (M2M_SUCCESS != ret) {
@ -341,6 +348,7 @@ sint8 nm_drv_init(void * arg)
M2M_ERR("failed to enable interrupts..\n");
goto ERR2;
}
return ret;
ERR2:
nm_bus_iface_deinit();

View File

@ -4,7 +4,7 @@
*
* \brief This module contains NMC1000 I2C protocol bus APIs implementation.
*
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*

View File

@ -4,7 +4,7 @@
*
* \brief This module contains NMC1000 SPI protocol bus APIs implementation.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -62,7 +62,6 @@
#define NMI_SPI_TX_MODE (NMI_SPI_REG_BASE+0x20)
#define NMI_SPI_PROTOCOL_CONFIG (NMI_SPI_REG_BASE+0x24)
#define NMI_SPI_INTR_CTL (NMI_SPI_REG_BASE+0x2c)
#define NMI_SPI_MISC_CTRL (NMI_SPI_REG_BASE+0x48)
#define NMI_SPI_PROTOCOL_OFFSET (NMI_SPI_PROTOCOL_CONFIG-NMI_SPI_REG_BASE)
@ -85,8 +84,6 @@
#define N_RESET -1
#define N_RETRY -2
#define SPI_RESP_RETRY_COUNT (10)
#define SPI_RETRY_COUNT (10)
#define DATA_PKT_SZ_256 256
#define DATA_PKT_SZ_512 512
#define DATA_PKT_SZ_1K 1024
@ -113,16 +110,7 @@ static sint8 nmi_spi_write(uint8* b, uint16 sz)
spi.u16Sz = sz;
return nm_bus_ioctl(NM_BUS_IOCTL_RW, &spi);
}
#ifndef USE_OLD_SPI_SW
static sint8 nmi_spi_rw(uint8 *bin,uint8* bout,uint16 sz)
{
tstrNmSpiRw spi;
spi.pu8InBuf = bin;
spi.pu8OutBuf = bout;
spi.u16Sz = sz;
return nm_bus_ioctl(NM_BUS_IOCTL_RW, &spi);
}
#endif
/********************************************
Crc7
@ -183,25 +171,6 @@ static uint8 crc7(uint8 crc, const uint8 *buffer, uint32 len)
********************************************/
#define CMD_DMA_WRITE 0xc1
#define CMD_DMA_READ 0xc2
#define CMD_INTERNAL_WRITE 0xc3
#define CMD_INTERNAL_READ 0xc4
#define CMD_TERMINATE 0xc5
#define CMD_REPEAT 0xc6
#define CMD_DMA_EXT_WRITE 0xc7
#define CMD_DMA_EXT_READ 0xc8
#define CMD_SINGLE_WRITE 0xc9
#define CMD_SINGLE_READ 0xca
#define CMD_RESET 0xcf
#define DATA_PKT_SZ_256 256
#define DATA_PKT_SZ_512 512
#define DATA_PKT_SZ_1K 1024
#define DATA_PKT_SZ_4K (4 * 1024)
#define DATA_PKT_SZ_8K (8 * 1024)
#define DATA_PKT_SZ DATA_PKT_SZ_8K
static sint8 spi_cmd(uint8 cmd, uint32 adr, uint32 u32data, uint32 sz,uint8 clockless)
{
uint8 bc[9];
@ -300,34 +269,6 @@ static sint8 spi_cmd(uint8 cmd, uint32 adr, uint32 u32data, uint32 sz,uint8 cloc
return result;
}
static sint8 spi_data_rsp(uint8 cmd)
{
uint8 len;
uint8 rsp[3];
sint8 result = N_OK;
if (!gu8Crc_off)
len = 2;
else
len = 3;
if (M2M_SUCCESS != nmi_spi_read(&rsp[0], len)) {
M2M_ERR("[nmi spi]: Failed bus error...\n");
result = N_FAIL;
goto _fail_;
}
if((rsp[len-1] != 0)||(rsp[len-2] != 0xC3))
{
M2M_ERR("[nmi spi]: Failed data response read, %x %x %x\n",rsp[0],rsp[1],rsp[2]);
result = N_FAIL;
goto _fail_;
}
_fail_:
return result;
}
static sint8 spi_cmd_rsp(uint8 cmd)
{
uint8 rsp;
@ -347,7 +288,7 @@ static sint8 spi_cmd_rsp(uint8 cmd)
}
/* wait for response */
s8RetryCnt = SPI_RESP_RETRY_COUNT;
s8RetryCnt = 10;
do
{
if (M2M_SUCCESS != nmi_spi_read(&rsp, 1)) {
@ -361,7 +302,7 @@ static sint8 spi_cmd_rsp(uint8 cmd)
State response
**/
/* wait for response */
s8RetryCnt = SPI_RESP_RETRY_COUNT;
s8RetryCnt = 10;
do
{
if (M2M_SUCCESS != nmi_spi_read(&rsp, 1)) {
@ -375,372 +316,7 @@ _fail_:
return result;
}
#ifndef USE_OLD_SPI_SW
static int spi_cmd_complete(uint8_t cmd, uint32_t adr, uint8_t *b, uint32_t sz, uint8_t clockless)
{
uint8_t wb[32], rb[32];
uint8_t wix, rix;
uint32_t len2;
uint8_t rsp;
int len = 0;
int result = N_OK;
wb[0] = cmd;
switch (cmd) {
case CMD_SINGLE_READ: /* single word (4 bytes) read */
wb[1] = (uint8_t)(adr >> 16);
wb[2] = (uint8_t)(adr >> 8);
wb[3] = (uint8_t)adr;
len = 5;
break;
case CMD_INTERNAL_READ: /* internal register read */
wb[1] = (uint8_t)(adr >> 8);
if(clockless == 1) wb[1] |= (1 << 7);
wb[2] = (uint8_t)adr;
wb[3] = 0x00;
len = 5;
break;
case CMD_TERMINATE: /* termination */
wb[1] = 0x00;
wb[2] = 0x00;
wb[3] = 0x00;
len = 5;
break;
case CMD_REPEAT: /* repeat */
wb[1] = 0x00;
wb[2] = 0x00;
wb[3] = 0x00;
len = 5;
break;
case CMD_RESET: /* reset */
wb[1] = 0xff;
wb[2] = 0xff;
wb[3] = 0xff;
len = 5;
break;
case CMD_DMA_WRITE: /* dma write */
case CMD_DMA_READ: /* dma read */
wb[1] = (uint8_t)(adr >> 16);
wb[2] = (uint8_t)(adr >> 8);
wb[3] = (uint8_t)adr;
wb[4] = (uint8_t)(sz >> 8);
wb[5] = (uint8_t)(sz);
len = 7;
break;
case CMD_DMA_EXT_WRITE: /* dma extended write */
case CMD_DMA_EXT_READ: /* dma extended read */
wb[1] = (uint8_t)(adr >> 16);
wb[2] = (uint8_t)(adr >> 8);
wb[3] = (uint8_t)adr;
wb[4] = (uint8_t)(sz >> 16);
wb[5] = (uint8_t)(sz >> 8);
wb[6] = (uint8_t)(sz);
len = 8;
break;
case CMD_INTERNAL_WRITE: /* internal register write */
wb[1] = (uint8_t)(adr >> 8);
if(clockless == 1) wb[1] |= (1 << 7);
wb[2] = (uint8_t)(adr);
wb[3] = b[3];
wb[4] = b[2];
wb[5] = b[1];
wb[6] = b[0];
len = 8;
break;
case CMD_SINGLE_WRITE: /* single word write */
wb[1] = (uint8_t)(adr >> 16);
wb[2] = (uint8_t)(adr >> 8);
wb[3] = (uint8_t)(adr);
wb[4] = b[3];
wb[5] = b[2];
wb[6] = b[1];
wb[7] = b[0];
len = 9;
break;
default:
result = N_FAIL;
break;
}
if (result != N_OK) {
return result;
}
if (!gu8Crc_off) {
wb[len-1] = (crc7(0x7f, (const uint8_t *)&wb[0], len-1)) << 1;
} else {
len -=1;
}
#define NUM_SKIP_BYTES (1)
#define NUM_RSP_BYTES (2)
#define NUM_DATA_HDR_BYTES (1)
#define NUM_DATA_BYTES (4)
#define NUM_CRC_BYTES (2)
#define NUM_DUMMY_BYTES (3)
if ((cmd == CMD_RESET) ||
(cmd == CMD_TERMINATE) ||
(cmd == CMD_REPEAT)) {
len2 = len + (NUM_SKIP_BYTES + NUM_RSP_BYTES + NUM_DUMMY_BYTES);
} else if ((cmd == CMD_INTERNAL_READ) || (cmd == CMD_SINGLE_READ)) {
if (!gu8Crc_off) {
len2 = len + (NUM_RSP_BYTES + NUM_DATA_HDR_BYTES + NUM_DATA_BYTES
+ NUM_CRC_BYTES + NUM_DUMMY_BYTES);
} else {
len2 = len + (NUM_RSP_BYTES + NUM_DATA_HDR_BYTES + NUM_DATA_BYTES
+ NUM_DUMMY_BYTES);
}
} else {
len2 = len + (NUM_RSP_BYTES + NUM_DUMMY_BYTES);
}
#undef NUM_DUMMY_BYTES
if(len2 > (sizeof(wb)/sizeof(wb[0]))) {
M2M_ERR("[nmi spi]: spi buffer size too small (%d) (%d)\n",
len2, (sizeof(wb)/sizeof(wb[0])));
result = N_FAIL;
return result;
}
/* zero spi write buffers. */
for(wix = len; wix< len2; wix++) {
wb[wix] = 0;
}
rix = len;
if (nmi_spi_rw(wb, rb, len2) != M2M_SUCCESS) {
M2M_ERR("[nmi spi]: Failed cmd write, bus error...\n");
result = N_FAIL;
return result;
}
#if 0
{
int jj;
printk("--- cnd = %x, len=%d, len2=%d\n", cmd, len, len2);
for(jj=0; jj<sizeof(wb)/sizeof(wb[0]); jj++) {
if(jj >= len2) break;
if(((jj+1)%16) != 0) {
if((jj%16) == 0) {
printk("wb[%02x]: %02x ", jj, wb[jj]);
} else {
printk("%02x ", wb[jj]);
}
} else {
printk("%02x\n", wb[jj]);
}
}
printk("\n");
for(jj=0; jj<sizeof(rb)/sizeof(rb[0]); jj++) {
if(jj >= len2) break;
if(((jj+1)%16) != 0) {
if((jj%16) == 0) {
printk("rb[%02x]: %02x ", jj, rb[jj]);
} else {
printk("%02x ", rb[jj]);
}
} else {
printk("%02x\n", rb[jj]);
}
}
printk("\n");
}
#endif
/**
Command/Control response
**/
if ((cmd == CMD_RESET) ||
(cmd == CMD_TERMINATE) ||
(cmd == CMD_REPEAT)) {
rix++; /* skip 1 byte */
}
rsp = rb[rix++];
if (rsp != cmd) {
M2M_ERR("[nmi spi]: Failed cmd response, cmd (%02x), resp (%02x)\n", cmd, rsp);
result = N_FAIL;
return result;
}
/**
State response
**/
rsp = rb[rix++];
if (rsp != 0x00) {
M2M_ERR("[nmi spi]: Failed cmd state response state (%02x)\n", rsp);
result = N_FAIL;
return result;
}
if ((cmd == CMD_INTERNAL_READ) || (cmd == CMD_SINGLE_READ)
|| (cmd == CMD_DMA_READ) || (cmd == CMD_DMA_EXT_READ)) {
int retry;
//uint16_t crc1, crc2;
uint8_t crc[2];
/**
Data Respnose header
**/
retry = SPI_RESP_RETRY_COUNT;
do {
/* ensure there is room in buffer later to read data and crc */
if(rix < len2) {
rsp = rb[rix++];
} else {
retry = 0;
break;
}
if (((rsp >> 4) & 0xf) == 0xf)
break;
} while (retry--);
if (retry <= 0) {
M2M_ERR("[nmi spi]: Error, data read response (%02x)\n", rsp);
result = N_RESET;
return result;
}
if ((cmd == CMD_INTERNAL_READ) || (cmd == CMD_SINGLE_READ)) {
/**
Read bytes
**/
if((rix+3) < len2) {
b[0] = rb[rix++];
b[1] = rb[rix++];
b[2] = rb[rix++];
b[3] = rb[rix++];
} else {
M2M_ERR("[nmi spi]: buffer overrun when reading data.\n");
result = N_FAIL;
return result;
}
if (!gu8Crc_off) {
/**
Read Crc
**/
if((rix+1) < len2) {
crc[0] = rb[rix++];
crc[1] = rb[rix++];
} else {
M2M_ERR("[nmi spi]: buffer overrun when reading crc.\n");
result = N_FAIL;
return result;
}
}
} else if((cmd == CMD_DMA_READ) || (cmd == CMD_DMA_EXT_READ)) {
int ix;
/* some data may be read in response to dummy bytes. */
for(ix=0; (rix < len2) && (ix < sz);) {
b[ix++] = rb[rix++];
}
#if 0
if(ix) M2M_INFO("ttt %d %d\n", sz, ix);
#endif
sz -= ix;
if(sz > 0) {
int nbytes;
if (sz <= (DATA_PKT_SZ-ix)) {
nbytes = sz;
} else {
nbytes = DATA_PKT_SZ-ix;
}
/**
Read bytes
**/
if (nmi_spi_read(&b[ix], nbytes) != M2M_SUCCESS) {
M2M_ERR("[nmi spi]: Failed data block read, bus error...\n");
result = N_FAIL;
goto _error_;
}
/**
Read Crc
**/
if (!gu8Crc_off) {
if (nmi_spi_read(crc, 2) != M2M_SUCCESS) {
M2M_ERR("[nmi spi]: Failed data block crc read, bus error...\n");
result = N_FAIL;
goto _error_;
}
}
ix += nbytes;
sz -= nbytes;
}
/* if any data in left unread, then read the rest using normal DMA code.*/
while(sz > 0) {
int nbytes;
if (sz <= DATA_PKT_SZ) {
nbytes = sz;
} else {
nbytes = DATA_PKT_SZ;
}
/**
read data response only on the next DMA cycles not
the first DMA since data response header is already
handled above for the first DMA.
**/
/**
Data Respnose header
**/
retry = SPI_RESP_RETRY_COUNT;
do {
if (nmi_spi_read(&rsp, 1) != M2M_SUCCESS) {
M2M_ERR("[nmi spi]: Failed data response read, bus error...\n");
result = N_FAIL;
break;
}
if (((rsp >> 4) & 0xf) == 0xf)
break;
} while (retry--);
if (result == N_FAIL)
break;
/**
Read bytes
**/
if (nmi_spi_read(&b[ix], nbytes) != M2M_SUCCESS) {
M2M_ERR("[nmi spi]: Failed data block read, bus error...\n");
result = N_FAIL;
break;
}
/**
Read Crc
**/
if (!gu8Crc_off) {
if (nmi_spi_read(crc, 2) != M2M_SUCCESS) {
M2M_ERR("[nmi spi]: Failed data block crc read, bus error...\n");
result = N_FAIL;
break;
}
}
ix += nbytes;
sz -= nbytes;
}
}
}
_error_:
return result;
}
#endif
static sint8 spi_data_read(uint8 *b, uint16 sz,uint8 clockless)
{
sint16 retry, ix, nbytes;
@ -761,7 +337,7 @@ static sint8 spi_data_read(uint8 *b, uint16 sz,uint8 clockless)
/**
Data Respnose header
**/
retry = SPI_RESP_RETRY_COUNT;
retry = 10;
do {
if (M2M_SUCCESS != nmi_spi_read(&rsp, 1)) {
M2M_ERR("[nmi spi]: Failed data response read, bus error...\n");
@ -892,12 +468,9 @@ static sint8 spi_data_write(uint8 *b, uint16 sz)
static sint8 spi_write_reg(uint32 addr, uint32 u32data)
{
uint8 retry = SPI_RETRY_COUNT;
sint8 result = N_OK;
uint8 cmd = CMD_SINGLE_WRITE;
uint8 clockless = 0;
_RETRY_:
if (addr <= 0x30)
{
/**
@ -916,71 +489,56 @@ _RETRY_:
result = spi_cmd(cmd, addr, u32data, 4, clockless);
if (result != N_OK) {
M2M_ERR("[nmi spi]: Failed cmd, write reg (%08x)...\n", (unsigned int)addr);
goto _FAIL_;
return N_FAIL;
}
result = spi_cmd_rsp(cmd);
if (result != N_OK) {
M2M_ERR("[nmi spi]: Failed cmd response, write reg (%08x)...\n", (unsigned int)addr);
goto _FAIL_;
spi_cmd(CMD_RESET, 0, 0, 0, 0);
return N_FAIL;
}
return N_OK;
#else
result = spi_cmd_complete(cmd, addr, (uint8*)&u32data, 4, clockless);
if (result != N_OK) {
M2M_ERR( "[nmi spi]: Failed cmd, write reg (%08x)...\n", addr);
goto _FAIL_;
}
#endif
_FAIL_:
if(result != N_OK)
{
nm_bsp_sleep(1);
spi_cmd(CMD_RESET, 0, 0, 0, 0);
spi_cmd_rsp(CMD_RESET);
M2M_ERR("Reset and retry %d %lx %lx\n",retry,addr,u32data);
nm_bsp_sleep(1);
retry--;
if(retry) goto _RETRY_;
}
return result;
#endif
}
static sint8 nm_spi_write(uint32 addr, uint8 *buf, uint16 size)
{
sint8 result;
uint8 retry = SPI_RETRY_COUNT;
uint8 cmd = CMD_DMA_EXT_WRITE;
_RETRY_:
/**
Command
**/
#if defined USE_OLD_SPI_SW
//Workaround hardware problem with single byte transfers over SPI bus
if (size == 1)
size = 2;
result = spi_cmd(cmd, addr, 0, size,0);
if (result != N_OK) {
M2M_ERR("[nmi spi]: Failed cmd, write block (%08x)...\n", (unsigned int)addr);
goto _FAIL_;
return N_FAIL;
}
result = spi_cmd_rsp(cmd);
if (result != N_OK) {
M2M_ERR("[nmi spi ]: Failed cmd response, write block (%08x)...\n", (unsigned int)addr);
goto _FAIL_;
spi_cmd(CMD_RESET, 0, 0, 0, 0);
return N_FAIL;
}
#else
result = spi_cmd_complete(cmd, addr, NULL, size, 0);
if (result != N_OK) {
M2M_ERR( "[nmi spi]: Failed cmd, write block (%08x)...\n", addr);
goto _FAIL_;
return N_FAIL;
}
#endif
@ -990,43 +548,19 @@ _RETRY_:
result = spi_data_write(buf, size);
if (result != N_OK) {
M2M_ERR("[nmi spi]: Failed block data write...\n");
goto _FAIL_;
}
/**
Data RESP
**/
result = spi_data_rsp(cmd);
if (result != N_OK) {
M2M_ERR("[nmi spi]: Failed block data write...\n");
goto _FAIL_;
}
_FAIL_:
if(result != N_OK)
{
nm_bsp_sleep(1);
spi_cmd(CMD_RESET, 0, 0, 0, 0);
spi_cmd_rsp(CMD_RESET);
M2M_ERR("Reset and retry %d %lx %d\n",retry,addr,size);
nm_bsp_sleep(1);
retry--;
if(retry) goto _RETRY_;
}
return result;
return N_OK;
}
static sint8 spi_read_reg(uint32 addr, uint32 *u32data)
{
uint8 retry = SPI_RETRY_COUNT;
sint8 result = N_OK;
uint8 cmd = CMD_SINGLE_READ;
uint8 tmp[4];
uint8 clockless = 0;
_RETRY_:
if (addr <= 0xff)
{
/**
@ -1045,26 +579,28 @@ _RETRY_:
result = spi_cmd(cmd, addr, 0, 4, clockless);
if (result != N_OK) {
M2M_ERR("[nmi spi]: Failed cmd, read reg (%08x)...\n", (unsigned int)addr);
goto _FAIL_;
return N_FAIL;
}
result = spi_cmd_rsp(cmd);
if (result != N_OK) {
M2M_ERR("[nmi spi]: Failed cmd response, read reg (%08x)...\n", (unsigned int)addr);
goto _FAIL_;
spi_cmd(CMD_RESET, 0, 0, 0, 0);
return N_FAIL;
}
/* to avoid endianess issues */
result = spi_data_read(&tmp[0], 4, clockless);
if (result != N_OK) {
M2M_ERR("[nmi spi]: Failed data read...\n");
goto _FAIL_;
spi_cmd(CMD_RESET, 0, 0, 0, 0);
return N_FAIL;
}
#else
result = spi_cmd_complete(cmd, addr, (uint8*)&tmp[0], 4, clockless);
if (result != N_OK) {
M2M_ERR( "[nmi spi]: Failed cmd, read reg (%08x)...\n", addr);
goto _FAIL_;
return N_FAIL;
}
#endif
@ -1073,93 +609,51 @@ _RETRY_:
((uint32)tmp[1] << 8) |
((uint32)tmp[2] << 16) |
((uint32)tmp[3] << 24);
_FAIL_:
if(result != N_OK)
{
nm_bsp_sleep(1);
spi_cmd(CMD_RESET, 0, 0, 0, 0);
spi_cmd_rsp(CMD_RESET);
M2M_ERR("Reset and retry %d %lx\n",retry,addr);
nm_bsp_sleep(1);
retry--;
if(retry) goto _RETRY_;
}
return result;
return N_OK;
}
static sint8 nm_spi_read(uint32 addr, uint8 *buf, uint16 size)
{
uint8 cmd = CMD_DMA_EXT_READ;
sint8 result;
uint8 retry = SPI_RETRY_COUNT;
#if defined USE_OLD_SPI_SW
uint8 tmp[2];
uint8 single_byte_workaround = 0;
#endif
_RETRY_:
/**
Command
**/
#if defined USE_OLD_SPI_SW
if (size == 1)
{
//Workaround hardware problem with single byte transfers over SPI bus
size = 2;
single_byte_workaround = 1;
}
result = spi_cmd(cmd, addr, 0, size,0);
if (result != N_OK) {
M2M_ERR("[nmi spi]: Failed cmd, read block (%08x)...\n", (unsigned int)addr);
goto _FAIL_;
return N_FAIL;
}
result = spi_cmd_rsp(cmd);
if (result != N_OK) {
M2M_ERR("[nmi spi]: Failed cmd response, read block (%08x)...\n", (unsigned int)addr);
goto _FAIL_;
spi_cmd(CMD_RESET, 0, 0, 0, 0);
return N_FAIL;
}
/**
Data
**/
if (single_byte_workaround)
{
result = spi_data_read(tmp, size,0);
buf[0] = tmp[0];
}
else
result = spi_data_read(buf, size,0);
result = spi_data_read(buf, size,0);
if (result != N_OK) {
M2M_ERR("[nmi spi]: Failed block data read...\n");
goto _FAIL_;
spi_cmd(CMD_RESET, 0, 0, 0, 0);
return N_FAIL;
}
#else
result = spi_cmd_complete(cmd, addr, buf, size, 0);
if (result != N_OK) {
M2M_ERR("[nmi spi]: Failed cmd, read block (%08x)...\n", addr);
goto _FAIL_;
}
result = spi_cmd_complete(cmd, addr, buf, size, 0);
if (result != N_OK) {
M2M_ERR("[nmi spi]: Failed cmd, read block (%08x)...\n", addr);
return N_FAIL;
}
#endif
_FAIL_:
if(result != N_OK)
{
nm_bsp_sleep(1);
spi_cmd(CMD_RESET, 0, 0, 0, 0);
spi_cmd_rsp(CMD_RESET);
M2M_ERR("Reset and retry %d %lx %d\n",retry,addr,size);
nm_bsp_sleep(1);
retry--;
if(retry) goto _RETRY_;
}
return result;
return N_OK;
}
/********************************************
@ -1188,13 +682,6 @@ static void spi_init_pkt_sz(void)
nm_spi_write_reg(SPI_BASE+0x24, val32);
}
sint8 nm_spi_reset(void)
{
spi_cmd(CMD_RESET, 0, 0, 0, 0);
spi_cmd_rsp(CMD_RESET);
return M2M_SUCCESS;
}
/*
* @fn nm_spi_init
* @brief Initialize the SPI
@ -1206,8 +693,7 @@ sint8 nm_spi_reset(void)
sint8 nm_spi_init(void)
{
uint32 chipid;
uint32 reg = 0;
uint32 reg =0;
/**
configure protocol
@ -1256,12 +742,12 @@ sint8 nm_spi_init(void)
/*
* @fn nm_spi_init
* @brief DeInitialize the SPI
* @brief DeInitialize the SPI
* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
* @author Samer Sarhan
* @date 27 Feb 2015
* @version 1.0
*/
*/
sint8 nm_spi_deinit(void)
{
gu8Crc_off = 0;

View File

@ -4,7 +4,7 @@
*
* \brief This module contains NMC1000 UART protocol bus APIs implementation.
*
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*

View File

@ -2,9 +2,9 @@
*
* \file
*
* \brief BSD compatible socket interface.
* \brief BSD alike socket interface.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -76,7 +76,6 @@ MACROS
#define SSL_FLAGS_3_RESERVD NBIT3
#define SSL_FLAGS_CACHE_SESSION NBIT4
#define SSL_FLAGS_NO_TX_COPY NBIT5
#define SSL_FLAGS_CHECK_SNI NBIT6
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
PRIVATE DATA TYPES
@ -162,7 +161,6 @@ NMI_API void Socket_ReadSocketData(SOCKET sock, tstrSocketRecvMsg *pstrRecv,uint
u8SetRxDone = 0;
u16Read = gastrSockets[sock].u16UserBufferSize;
}
if(hif_receive(u32Address, gastrSockets[sock].pu8UserBuffer, u16Read, u8SetRxDone) == M2M_SUCCESS)
{
pstrRecv->pu8Buffer = gastrSockets[sock].pu8UserBuffer;
@ -174,16 +172,6 @@ NMI_API void Socket_ReadSocketData(SOCKET sock, tstrSocketRecvMsg *pstrRecv,uint
u16ReadCount -= u16Read;
u32Address += u16Read;
if((!gastrSockets[sock].bIsUsed) && (u16ReadCount))
{
M2M_DBG("Application Closed Socket While Rx Is not Complete\n");
if(hif_receive(0, NULL, 0, 1) == M2M_SUCCESS)
M2M_DBG("hif_receive Success\n");
else
M2M_DBG("hif_receive Fail\n");
break;
}
}
else
{
@ -214,8 +202,8 @@ Date
17 July 2012
*********************************************************************/
static void m2m_ip_cb(uint8 u8OpCode, uint16 u16BufferSize,uint32 u32Address)
{
if((u8OpCode == SOCKET_CMD_BIND) || (u8OpCode == SOCKET_CMD_SSL_BIND))
{
if(u8OpCode == SOCKET_CMD_BIND)
{
tstrBindReply strBindReply;
tstrSocketBindMsg strBind;
@ -246,9 +234,8 @@ static void m2m_ip_cb(uint8 u8OpCode, uint16 u16BufferSize,uint32 u32Address)
{
if(strAcceptReply.sConnectedSock >= 0)
{
gastrSockets[strAcceptReply.sConnectedSock].u8SSLFlags = gastrSockets[strAcceptReply.sListenSock].u8SSLFlags;
gastrSockets[strAcceptReply.sConnectedSock].bIsUsed = 1;
gastrSockets[strAcceptReply.sConnectedSock].u16DataOffset = strAcceptReply.u16AppDataOffset - M2M_HIF_HDR_OFFSET;
gastrSockets[strAcceptReply.sConnectedSock].u8SSLFlags = 0;
gastrSockets[strAcceptReply.sConnectedSock].bIsUsed = 1;
/* The session ID is used to distinguish different socket connections
by comparing the assigned session ID to the one reported by the firmware*/
@ -288,6 +275,7 @@ static void m2m_ip_cb(uint8 u8OpCode, uint16 u16BufferSize,uint32 u32Address)
tstrDnsReply strDnsReply;
if(hif_receive(u32Address, (uint8*)&strDnsReply, sizeof(tstrDnsReply), 0) == M2M_SUCCESS)
{
strDnsReply.u32HostIP = strDnsReply.u32HostIP;
if(gpfAppResolveCb)
gpfAppResolveCb((uint8*)strDnsReply.acHostName, strDnsReply.u32HostIP);
}
@ -352,12 +340,7 @@ static void m2m_ip_cb(uint8 u8OpCode, uint16 u16BufferSize,uint32 u32Address)
{
M2M_DBG("Discard recv callback %d %d \r\n",u16SessionID , gastrSockets[sock].u16SessionID);
if(u16ReadSize < u16BufferSize)
{
if(hif_receive(0, NULL, 0, 1) == M2M_SUCCESS)
M2M_DBG("hif_receive Success\n");
else
M2M_DBG("hif_receive Fail\n");
}
hif_receive(0, NULL, 0, 1);
}
}
}
@ -425,12 +408,12 @@ Date
*********************************************************************/
void socketInit(void)
{
if(gbSocketInit == 0)
if(gbSocketInit==0)
{
m2m_memset((uint8*)gastrSockets, 0, MAX_SOCKET * sizeof(tstrSocket));
hif_register_cb(M2M_REQ_GROUP_IP,m2m_ip_cb);
gbSocketInit = 1;
gu16SessionID = 0;
gbSocketInit=1;
gu16SessionID = 0;
}
}
/*********************************************************************
@ -455,9 +438,9 @@ void socketDeinit(void)
{
m2m_memset((uint8*)gastrSockets, 0, MAX_SOCKET * sizeof(tstrSocket));
hif_register_cb(M2M_REQ_GROUP_IP, NULL);
gpfAppSocketCb = NULL;
gpfAppResolveCb = NULL;
gbSocketInit = 0;
gpfAppSocketCb = NULL;
gpfAppResolveCb = NULL;
gbSocketInit = 0;
}
/*********************************************************************
Function
@ -503,68 +486,56 @@ Version
Date
4 June 2012
*********************************************************************/
SOCKET socket(uint16 u16Domain, uint8 u8Type, uint8 u8Flags)
SOCKET WINC1500_EXPORT(socket)(uint16 u16Domain, uint8 u8Type, uint8 u8Flags)
{
SOCKET sock = -1;
uint8 u8SockID;
uint8 u8Count;
volatile tstrSocket *pstrSock;
static volatile uint8 u8NextTcpSock = 0;
static volatile uint8 u8NextUdpSock = 0;
SOCKET sock = -1;
uint8 u8Count,u8SocketCount = MAX_SOCKET;
volatile tstrSocket *pstrSock;
/* The only supported family is the AF_INET for UDP and TCP transport layer protocols. */
if(u16Domain == AF_INET)
{
if(u8Type == SOCK_STREAM)
{
for(u8Count = 0; u8Count < TCP_SOCK_MAX; u8Count ++)
{
u8SockID = u8NextTcpSock;
pstrSock = &gastrSockets[u8NextTcpSock];
u8NextTcpSock = (u8NextTcpSock + 1) % TCP_SOCK_MAX;
if(!pstrSock->bIsUsed)
{
sock = (SOCKET)u8SockID;
break;
}
}
u8SocketCount = TCP_SOCK_MAX;
u8Count = 0;
}
else if(u8Type == SOCK_DGRAM)
{
volatile tstrSocket *pastrUDPSockets = &gastrSockets[TCP_SOCK_MAX];
for(u8Count = 0; u8Count < UDP_SOCK_MAX; u8Count ++)
{
u8SockID = u8NextUdpSock;
pstrSock = &pastrUDPSockets[u8NextUdpSock];
u8NextUdpSock = (u8NextUdpSock + 1) % UDP_SOCK_MAX;
if(!pstrSock->bIsUsed)
{
sock = (SOCKET)(u8SockID + TCP_SOCK_MAX);
break;
}
}
/*--- UDP SOCKET ---*/
u8SocketCount = MAX_SOCKET;
u8Count = TCP_SOCK_MAX;
}
else
return sock;
if(sock >= 0)
for(;u8Count < u8SocketCount; u8Count ++)
{
m2m_memset((uint8*)pstrSock, 0, sizeof(tstrSocket));
pstrSock->bIsUsed = 1;
/* The session ID is used to distinguish different socket connections
by comparing the assigned session ID to the one reported by the firmware*/
++gu16SessionID;
if(gu16SessionID == 0)
++gu16SessionID;
pstrSock->u16SessionID = gu16SessionID;
M2M_INFO("Socket %d session ID = %d\r\n",sock, gu16SessionID );
if(u8Flags & SOCKET_FLAGS_SSL)
pstrSock = &gastrSockets[u8Count];
if(pstrSock->bIsUsed == 0)
{
tstrSSLSocketCreateCmd strSSLCreate;
strSSLCreate.sslSock = sock;
pstrSock->u8SSLFlags = SSL_FLAGS_ACTIVE | SSL_FLAGS_NO_TX_COPY;
SOCKET_REQUEST(SOCKET_CMD_SSL_CREATE, (uint8*)&strSSLCreate, sizeof(tstrSSLSocketCreateCmd), 0, 0, 0);
m2m_memset((uint8*)pstrSock, 0, sizeof(tstrSocket));
pstrSock->bIsUsed = 1;
/* The session ID is used to distinguish different socket connections
by comparing the assigned session ID to the one reported by the firmware*/
++gu16SessionID;
if(gu16SessionID == 0)
++gu16SessionID;
pstrSock->u16SessionID = gu16SessionID;
M2M_DBG("1 Socket %d session ID = %d\r\n",u8Count, gu16SessionID );
sock = (SOCKET)u8Count;
if(u8Flags & SOCKET_FLAGS_SSL)
{
tstrSSLSocketCreateCmd strSSLCreate;
strSSLCreate.sslSock = sock;
pstrSock->u8SSLFlags = SSL_FLAGS_ACTIVE | SSL_FLAGS_NO_TX_COPY;
SOCKET_REQUEST(SOCKET_CMD_SSL_CREATE, (uint8*)&strSSLCreate, sizeof(tstrSSLSocketCreateCmd), 0, 0, 0);
}
break;
}
}
}
@ -589,25 +560,24 @@ Version
Date
5 June 2012
*********************************************************************/
sint8 bind(SOCKET sock, struct sockaddr *pstrAddr, uint8 u8AddrLen)
sint8 WINC1500_EXPORT(bind)(SOCKET sock, struct sockaddr *pstrAddr, uint8 u8AddrLen)
{
sint8 s8Ret = SOCK_ERR_INVALID_ARG;
if((pstrAddr != NULL) && (sock >= 0) && (gastrSockets[sock].bIsUsed == 1) && (u8AddrLen != 0))
{
tstrBindCmd strBind;
uint8 u8CMD = SOCKET_CMD_BIND;
if(gastrSockets[sock].u8SSLFlags & SSL_FLAGS_ACTIVE)
{
u8CMD = SOCKET_CMD_SSL_BIND;
}
/* Build the bind request. */
strBind.sock = sock;
m2m_memcpy((uint8 *)&strBind.strAddr, (uint8 *)pstrAddr, sizeof(tstrSockAddr));
strBind.strAddr.u16Family = strBind.strAddr.u16Family;
strBind.strAddr.u16Port = strBind.strAddr.u16Port;
strBind.strAddr.u32IPAddr = strBind.strAddr.u32IPAddr;
strBind.u16SessionID = gastrSockets[sock].u16SessionID;
/* Send the request. */
s8Ret = SOCKET_REQUEST(u8CMD, (uint8*)&strBind,sizeof(tstrBindCmd) , NULL , 0, 0);
s8Ret = SOCKET_REQUEST(SOCKET_CMD_BIND, (uint8*)&strBind,sizeof(tstrBindCmd) , NULL , 0, 0);
if(s8Ret != SOCK_ERR_NO_ERROR)
{
s8Ret = SOCK_ERR_INVALID;
@ -634,7 +604,7 @@ Version
Date
5 June 2012
*********************************************************************/
sint8 listen(SOCKET sock, uint8 backlog)
sint8 WINC1500_EXPORT(listen)(SOCKET sock, uint8 backlog)
{
sint8 s8Ret = SOCK_ERR_INVALID_ARG;
@ -672,7 +642,7 @@ Version
Date
5 June 2012
*********************************************************************/
sint8 accept(SOCKET sock, struct sockaddr *addr, uint8 *addrlen)
sint8 WINC1500_EXPORT(accept)(SOCKET sock, struct sockaddr *addr, uint8 *addrlen)
{
sint8 s8Ret = SOCK_ERR_INVALID_ARG;
@ -701,7 +671,7 @@ Version
Date
5 June 2012
*********************************************************************/
sint8 connect(SOCKET sock, struct sockaddr *pstrAddr, uint8 u8AddrLen)
sint8 WINC1500_EXPORT(connect)(SOCKET sock, struct sockaddr *pstrAddr, uint8 u8AddrLen)
{
sint8 s8Ret = SOCK_ERR_INVALID_ARG;
if((sock >= 0) && (pstrAddr != NULL) && (gastrSockets[sock].bIsUsed == 1) && (u8AddrLen != 0))
@ -742,7 +712,7 @@ Version
Date
5 June 2012
*********************************************************************/
sint16 send(SOCKET sock, void *pvSendBuffer, uint16 u16SendLength, uint16 flags)
sint16 WINC1500_EXPORT(send)(SOCKET sock, void *pvSendBuffer, uint16 u16SendLength, uint16 flags)
{
sint16 s16Ret = SOCK_ERR_INVALID_ARG;
@ -794,7 +764,7 @@ Version
Date
4 June 2012
*********************************************************************/
sint16 sendto(SOCKET sock, void *pvSendBuffer, uint16 u16SendLength, uint16 flags, struct sockaddr *pstrDestAddr, uint8 u8AddrLen)
sint16 WINC1500_EXPORT(sendto)(SOCKET sock, void *pvSendBuffer, uint16 u16SendLength, uint16 flags, struct sockaddr *pstrDestAddr, uint8 u8AddrLen)
{
sint16 s16Ret = SOCK_ERR_INVALID_ARG;
@ -849,7 +819,7 @@ Version
Date
5 June 2012
*********************************************************************/
sint16 recv(SOCKET sock, void *pvRecvBuf, uint16 u16BufLen, uint32 u32Timeoutmsec)
sint16 WINC1500_EXPORT(recv)(SOCKET sock, void *pvRecvBuf, uint16 u16BufLen, uint32 u32Timeoutmsec)
{
sint16 s16Ret = SOCK_ERR_INVALID_ARG;
@ -905,10 +875,9 @@ Version
Date
4 June 2012
*********************************************************************/
sint8 close(SOCKET sock)
sint8 WINC1500_EXPORT(close)(SOCKET sock)
{
sint8 s8Ret = SOCK_ERR_INVALID_ARG;
M2M_INFO("Sock to delete <%d>\n", sock);
if(sock >= 0 && (gastrSockets[sock].bIsUsed == 1))
{
uint8 u8Cmd = SOCKET_CMD_CLOSE;
@ -951,7 +920,7 @@ Version
Date
5 June 2012
*********************************************************************/
sint16 recvfrom(SOCKET sock, void *pvRecvBuf, uint16 u16BufLen, uint32 u32Timeoutmsec)
sint16 WINC1500_EXPORT(recvfrom)(SOCKET sock, void *pvRecvBuf, uint16 u16BufLen, uint32 u32Timeoutmsec)
{
sint16 s16Ret = SOCK_ERR_NO_ERROR;
if((sock >= 0) && (pvRecvBuf != NULL) && (u16BufLen != 0) && (gastrSockets[sock].bIsUsed == 1))
@ -1067,13 +1036,17 @@ Version
Date
4 June 2012
*********************************************************************/
sint8 gethostbyname(uint8 * pcHostName)
sint8 WINC1500_EXPORT(gethostbyname)(uint8 * pcHostName)
{
sint8 s8Err = SOCK_ERR_INVALID_ARG;
uint8 u8HostNameSize = (uint8)m2m_strlen(pcHostName);
if(u8HostNameSize <= HOSTNAME_MAX_SIZE)
{
s8Err = SOCKET_REQUEST(SOCKET_CMD_DNS_RESOLVE, (uint8*)pcHostName, u8HostNameSize + 1, NULL,0, 0);
s8Err = SOCKET_REQUEST(SOCKET_CMD_DNS_RESOLVE|M2M_REQ_DATA_PKT, (uint8*)pcHostName, u8HostNameSize + 1, NULL,0, 0);
if(s8Err != SOCK_ERR_NO_ERROR)
{
s8Err = SOCK_ERR_INVALID;
}
}
return s8Err;
}
@ -1128,19 +1101,6 @@ static sint8 sslSetSockOpt(SOCKET sock, uint8 u8Opt, const void *pvOptVal, uint
}
s8Ret = SOCK_ERR_NO_ERROR;
}
else if(u8Opt == SO_SSL_ENABLE_SNI_VALIDATION)
{
int optVal = *((int*)pvOptVal);
if(optVal)
{
gastrSockets[sock].u8SSLFlags |= SSL_FLAGS_CHECK_SNI;
}
else
{
gastrSockets[sock].u8SSLFlags &= ~SSL_FLAGS_CHECK_SNI;
}
s8Ret = SOCK_ERR_NO_ERROR;
}
else if(u8Opt == SO_SSL_SNI)
{
if(u16OptLen < HOSTNAME_MAX_SIZE)
@ -1197,7 +1157,7 @@ Version
Date
9 September 2014
*********************************************************************/
sint8 setsockopt(SOCKET sock, uint8 u8Level, uint8 option_name,
sint8 WINC1500_EXPORT(setsockopt)(SOCKET sock, uint8 u8Level, uint8 option_name,
const void *option_value, uint16 u16OptionLen)
{
sint8 s8Ret = SOCK_ERR_INVALID_ARG;
@ -1243,7 +1203,7 @@ Version
Date
24 August 2014
*********************************************************************/
sint8 getsockopt(SOCKET sock, uint8 u8Level, uint8 u8OptName, const void *pvOptValue, uint8* pu8OptLen)
sint8 WINC1500_EXPORT(getsockopt)(SOCKET sock, uint8 u8Level, uint8 u8OptName, const void *pvOptValue, uint8* pu8OptLen)
{
/* TBD */
return M2M_SUCCESS;
@ -1285,10 +1245,10 @@ sint8 m2m_ping_req(uint32 u32DstIP, uint8 u8TTL, tpfPingCb fpPingCb)
}
/*********************************************************************
Function
sslEnableCertExpirationCheck
sslSetActiveCipherSuites
Description
Enable/Disable TLS Certificate Expiration Check.
Send Ping request.
Return
@ -1299,11 +1259,17 @@ Version
1.0
Date
4 June 2015
*********************************************************************/
sint8 sslEnableCertExpirationCheck(tenuSslCertExpSettings enuValidationSetting)
sint8 sslSetActiveCipherSuites(uint32 u32SslCsBMP)
{
tstrSslCertExpSettings strSettings;
strSettings.u32CertExpValidationOpt = (uint32)enuValidationSetting;
return SOCKET_REQUEST(SOCKET_CMD_SSL_EXP_CHECK, (uint8*)&strSettings, sizeof(tstrSslCertExpSettings), NULL, 0, 0);
sint8 s8Ret = SOCK_ERR_INVALID_ARG;
if(u32SslCsBMP != 0)
{
tstrSslSetActiveCsList strCsList;
strCsList.u32CsBMP = u32SslCsBMP;
s8Ret = SOCKET_REQUEST(SOCKET_CMD_SSL_SET_CS_LIST, (uint8*)&strCsList, sizeof(tstrSslSetActiveCsList), NULL, 0, 0);
}
return s8Ret;
}

View File

@ -4,7 +4,7 @@
*
* \brief WINC1500 SPI Flash.
*
* Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
@ -39,26 +39,8 @@
*
*/
#ifdef PROFILING
#include "windows.h"
#endif
#include "spi_flash/include/spi_flash.h"
#define DUMMY_REGISTER (0x1084)
#define TIMEOUT (-1) /*MS*/
//#define DISABLE_UNSED_FLASH_FUNCTIONS
#define FLASH_BLOCK_SIZE (32UL * 1024)
/*!<Block Size in Flash Memory
*/
#define FLASH_SECTOR_SZ (4 * 1024UL)
/*!<Sector Size in Flash Memory
*/
#define FLASH_PAGE_SZ (256)
/*!<Page Size in Flash Memory */
#define HOST_SHARE_MEM_BASE (0xd0000UL)
#define CORTUS_SHARE_MEM_BASE (0x60000000UL)
#define NMI_SPI_FLASH_ADDR (0x111c)
@ -88,9 +70,6 @@ SPI Flash DMA
* @param[OUT] val
value of status reg
* @return Status of execution
* @note Compatible with MX25L6465E
* @author M. Abdelmawla
* @version 1.0
*/
static sint8 spi_flash_read_status_reg(uint8 * val)
{
@ -122,9 +101,6 @@ static sint8 spi_flash_read_status_reg(uint8 * val)
* @fn spi_flash_read_security_reg
* @brief Read security register
* @return Security register value
* @note Compatible with MX25L6465E
* @author M. Abdelmawla
* @version 1.0
*/
static uint8 spi_flash_read_security_reg(void)
{
@ -153,9 +129,6 @@ static uint8 spi_flash_read_security_reg(void)
/**
* @fn spi_flash_gang_unblock
* @brief Unblock all flash area
* @note Compatible with MX25L6465E
* @author M. Abdelmawla
* @version 1.0
*/
static sint8 spi_flash_gang_unblock(void)
{
@ -183,9 +156,6 @@ static sint8 spi_flash_gang_unblock(void)
/**
* @fn spi_flash_clear_security_flags
* @brief Clear all security flags
* @note Compatible with MX25L6465E
* @author M. Abdelmawla
* @version 1.0
*/
static sint8 spi_flash_clear_security_flags(void)
{
@ -221,9 +191,6 @@ static sint8 spi_flash_clear_security_flags(void)
* @param[IN] u32Sz
* Data size
* @return Status of execution
* @note Compatible with MX25L6465E and should be working with other types
* @author M. Abdelmawla
* @version 1.0
*/
static sint8 spi_flash_load_to_cortus_mem(uint32 u32MemAdr, uint32 u32FlashAdr, uint32 u32Sz)
{
@ -259,9 +226,6 @@ static sint8 spi_flash_load_to_cortus_mem(uint32 u32MemAdr, uint32 u32FlashAdr,
* @param[IN] u32FlashAdr
* Any memory address within the sector
* @return Status of execution
* @note Compatible with MX25L6465E and should be working with other types
* @author M. Abdelmawla
* @version 1.0
*/
static sint8 spi_flash_sector_erase(uint32 u32FlashAdr)
{
@ -293,9 +257,6 @@ static sint8 spi_flash_sector_erase(uint32 u32FlashAdr)
* @fn spi_flash_write_enable
* @brief Send write enable command to SPI flash
* @return Status of execution
* @note Compatible with MX25L6465E and should be working with other types
* @author M. Abdelmawla
* @version 1.0
*/
static sint8 spi_flash_write_enable(void)
{
@ -323,9 +284,6 @@ static sint8 spi_flash_write_enable(void)
/**
* @fn spi_flash_write_disable
* @brief Send write disable command to SPI flash
* @note Compatible with MX25L6465E and should be working with other types
* @author M. Abdelmawla
* @version 1.0
*/
static sint8 spi_flash_write_disable(void)
{
@ -358,9 +316,6 @@ static sint8 spi_flash_write_disable(void)
* Address to write to at the SPI flash
* @param[IN] u32Sz
* Data size
* @note Compatible with MX25L6465E and should be working with other types
* @author M. Abdelmawla
* @version 1.0
*/
static sint8 spi_flash_page_program(uint32 u32MemAdr, uint32 u32FlashAdr, uint32 u32Sz)
{
@ -397,9 +352,6 @@ static sint8 spi_flash_page_program(uint32 u32MemAdr, uint32 u32FlashAdr, uint32
* Address to read from at the SPI flash
* @param[IN] u32Sz
* Data size
* @note Data size must be < 64KB (limitation imposed by the bus wrapper)
* @author M. Abdelmawla
* @version 1.0
*/
static sint8 spi_flash_read_internal(uint8 *pu8Buf, uint32 u32Addr, uint32 u32Sz)
{
@ -422,8 +374,6 @@ ERR:
* @param[IN] u32Sz
* Data size
* @return Status of execution
* @author M. Abdelmawla
* @version 1.0
*/
static sint8 spi_flash_pp(uint32 u32Offset, uint8 *pu8Buf, uint16 u16Sz)
{
@ -448,8 +398,6 @@ ERR:
* @fn spi_flash_rdid
* @brief Read SPI Flash ID
* @return SPI FLash ID
* @author M.S.M
* @version 1.0
*/
static uint32 spi_flash_rdid(void)
{
@ -484,8 +432,6 @@ static uint32 spi_flash_rdid(void)
/**
* @fn spi_flash_unlock
* @brief Unlock SPI Flash
* @author M.S.M
* @version 1.0
*/
#if 0
static void spi_flash_unlock(void)
@ -534,8 +480,6 @@ static void spi_flash_leave_low_power_mode(void) {
/**
* @fn spi_flash_enable
* @brief Enable spi flash operations
* @author M. Abdelmawla
* @version 1.0
*/
sint8 spi_flash_enable(uint8 enable)
{
@ -576,8 +520,6 @@ ERR1:
* Data size
* @return Status of execution
* @note Data size is limited by the SPI flash size only
* @author M. Abdelmawla
* @version 1.0
*/
sint8 spi_flash_read(uint8 *pu8Buf, uint32 u32offset, uint32 u32Sz)
{
@ -610,8 +552,6 @@ ERR:
* @param[IN] u32Sz
* Data size
* @return Status of execution
* @author M. Abdelmawla
* @version 1.0
*/
sint8 spi_flash_write(uint8* pu8Buf, uint32 u32Offset, uint32 u32Sz)
{
@ -687,8 +627,6 @@ ERR:
* Data size
* @return Status of execution
* @note Data size is limited by the SPI flash size only
* @author M. Abdelmawla
* @version 1.0
*/
sint8 spi_flash_erase(uint32 u32Offset, uint32 u32Sz)
{
@ -725,8 +663,6 @@ ERR:
* @fn spi_flash_get_size
* @brief Get size of SPI Flash
* @return Size of Flash
* @author M.S.M
* @version 1.0
*/
uint32 spi_flash_get_size(void)
{
@ -751,4 +687,4 @@ uint32 spi_flash_get_size(void)
}
return gu32InernalFlashSize;
}
}