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RP2: Move dcmi_config to pio file.
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parent
012313b791
commit
68663f489d
@ -19,17 +19,17 @@
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wait 1 gpio VSYNC ; Wait for VSYNC to go low
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wait 0 gpio VSYNC
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line_loop:
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HSYNC_LOOP:
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mov x, osr ; Copy line width from OSR to X
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wait 0 gpio HSYNC ; Wait for HSYNC to go high
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wait 1 gpio HSYNC
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pixels_loop:
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PIXEL_LOOP:
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wait 0 gpio PXCLK
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wait 1 gpio PXCLK
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in pins 8
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jmp x-- pixels_loop ; Keep reading pixels while x != 0
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jmp y-- line_loop ; Keep reading lines while y != 0
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jmp x-- PIXEL_LOOP ; Keep reading pixels while x != 0
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jmp y-- HSYNC_LOOP ; Keep reading lines while y != 0
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.wrap
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.program dcmi_odd_byte
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@ -41,17 +41,48 @@ pixels_loop:
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wait 1 gpio VSYNC ; Wait for VSYNC to go low
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wait 0 gpio VSYNC
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line_loop:
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HSYNC_LOOP:
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mov x, osr ; Copy line width from OSR to X
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wait 0 gpio HSYNC ; Wait for HSYNC to go high
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wait 1 gpio HSYNC
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pixels_loop:
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PIXEL_LOOP:
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wait 0 gpio PXCLK
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wait 1 gpio PXCLK
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in pins 8
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wait 0 gpio PXCLK
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wait 1 gpio PXCLK
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jmp x-- pixels_loop ; Keep reading pixels while x != 0
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jmp y-- line_loop ; Keep reading lines while y != 0
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jmp x-- PIXEL_LOOP ; Keep reading pixels while x != 0
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jmp y-- HSYNC_LOOP ; Keep reading lines while y != 0
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.wrap
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% c-sdk {
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static inline int dcmi_config(uint32_t pixformat)
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{
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uint offset;
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pio_sm_config config;
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pio_sm_set_enabled(DCMI_PIO, DCMI_SM, false);
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pio_sm_clear_fifos(DCMI_PIO, DCMI_SM);
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for(uint i=DCMI_D0_PIN; i<DCMI_D0_PIN+8; i++) {
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pio_gpio_init(DCMI_PIO, i);
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}
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pio_sm_set_consecutive_pindirs(DCMI_PIO, DCMI_SM, DCMI_D0_PIN, 8, false);
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if (pixformat == PIXFORMAT_GRAYSCALE) {
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offset = pio_add_program(DCMI_PIO, &dcmi_odd_byte_program);
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config = dcmi_odd_byte_program_get_default_config(offset);
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} else {
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offset = pio_add_program(DCMI_PIO, &dcmi_default_program);
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config = dcmi_default_program_get_default_config(offset);
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}
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sm_config_set_clkdiv(&config, 1);
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sm_config_set_in_pins(&config, DCMI_D0_PIN);
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sm_config_set_in_shift(&config, true, true, 32);
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pio_sm_init(DCMI_PIO, DCMI_SM, offset, &config);
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pio_sm_set_enabled(DCMI_PIO, DCMI_SM, true);
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return 0;
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}
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%}
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@ -137,35 +137,6 @@ static void dma_config(int w, int h, int bpp, uint32_t *capture_buf, bool rev_by
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dma_irqn_set_channel_enabled(DCMI_DMA, DCMI_DMA_CHANNEL, true);
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}
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static int dcmi_config(uint32_t pixformat)
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{
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uint offset;
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pio_sm_config config;
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pio_sm_set_enabled(DCMI_PIO, DCMI_SM, false);
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pio_sm_clear_fifos(DCMI_PIO, DCMI_SM);
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for(uint i=DCMI_D0_PIN; i<DCMI_D0_PIN+8; i++) {
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pio_gpio_init(DCMI_PIO, i);
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}
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pio_sm_set_consecutive_pindirs(DCMI_PIO, DCMI_SM, DCMI_D0_PIN, 8, false);
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if (pixformat == PIXFORMAT_GRAYSCALE) {
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offset = pio_add_program(DCMI_PIO, &dcmi_odd_byte_program);
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config = dcmi_odd_byte_program_get_default_config(offset);
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} else {
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offset = pio_add_program(DCMI_PIO, &dcmi_default_program);
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config = dcmi_default_program_get_default_config(offset);
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}
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sm_config_set_clkdiv(&config, 1);
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sm_config_set_in_pins(&config, DCMI_D0_PIN);
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sm_config_set_in_shift(&config, true, true, 32);
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pio_sm_init(DCMI_PIO, DCMI_SM, offset, &config);
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pio_sm_set_enabled(DCMI_PIO, DCMI_SM, true);
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return 0;
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}
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void dcmi_abort()
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{
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// Disable DMA channel
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