diff --git a/scripts/examples/01-Camera/03-Event-Cameras/genx320_color_dark with_tracking.py b/scripts/examples/01-Camera/03-Event-Cameras/genx320_color_dark with_tracking.py new file mode 100644 index 000000000..1a1b5c5a2 --- /dev/null +++ b/scripts/examples/01-Camera/03-Event-Cameras/genx320_color_dark with_tracking.py @@ -0,0 +1,32 @@ +# This work is licensed under the MIT license. +# Copyright (c) 2013-2024 OpenMV LLC. All rights reserved. +# https://github.com/openmv/openmv/blob/master/LICENSE +# +# This example shows off using the genx320 event camera from Prophesee. + +import sensor +import image +import time + +sensor.reset() +sensor.set_pixformat(sensor.GRAYSCALE) # Must always be grayscale. +sensor.set_framesize(sensor.B320X320) # Must always be 320x320. +sensor.set_color_palette(image.PALETTE_EVT_DARK) + +clock = time.clock() + +while True: + clock.tick() + + img = sensor.snapshot() + # img.median(1) # noise cleanup. + + blobs = img.find_blobs( + [(10, 20, -10, 10, -20, 0)], invert=True, pixels_threshold=10, area_threshold=100, merge=True + ) + + for blob in blobs: + img.draw_rectangle(blob.rect(), color=(255, 0, 0)) + img.draw_cross(blob.cx(), blob.cy(), color=(0, 255, 0)) + + print(clock.fps()) diff --git a/scripts/examples/01-Camera/03-Event-Cameras/genx320_color_dark.py b/scripts/examples/01-Camera/03-Event-Cameras/genx320_color_dark.py new file mode 100644 index 000000000..74bcbbbf4 --- /dev/null +++ b/scripts/examples/01-Camera/03-Event-Cameras/genx320_color_dark.py @@ -0,0 +1,24 @@ +# This work is licensed under the MIT license. +# Copyright (c) 2013-2024 OpenMV LLC. All rights reserved. +# https://github.com/openmv/openmv/blob/master/LICENSE +# +# This example shows off using the genx320 event camera from Prophesee. + +import sensor +import image +import time + +sensor.reset() +sensor.set_pixformat(sensor.GRAYSCALE) # Must always be grayscale. +sensor.set_framesize(sensor.B320X320) # Must always be 320x320. +sensor.set_color_palette(image.PALETTE_EVT_DARK) + +clock = time.clock() + +while True: + clock.tick() + + img = sensor.snapshot() + # img.median(1) # noise cleanup. + + print(clock.fps()) diff --git a/scripts/examples/01-Camera/03-Event-Cameras/genx320_color_light.py b/scripts/examples/01-Camera/03-Event-Cameras/genx320_color_light.py new file mode 100644 index 000000000..1718ec134 --- /dev/null +++ b/scripts/examples/01-Camera/03-Event-Cameras/genx320_color_light.py @@ -0,0 +1,24 @@ +# This work is licensed under the MIT license. +# Copyright (c) 2013-2024 OpenMV LLC. All rights reserved. +# https://github.com/openmv/openmv/blob/master/LICENSE +# +# This example shows off using the genx320 event camera from Prophesee. + +import sensor +import image +import time + +sensor.reset() +sensor.set_pixformat(sensor.GRAYSCALE) # Must always be grayscale. +sensor.set_framesize(sensor.B320X320) # Must always be 320x320. +sensor.set_color_palette(image.PALETTE_EVT_LIGHT) + +clock = time.clock() + +while True: + clock.tick() + + img = sensor.snapshot() + # img.median(1) # noise cleanup. + + print(clock.fps()) diff --git a/scripts/examples/01-Camera/03-Event-Cameras/genx320_color_light_with_tracking.py b/scripts/examples/01-Camera/03-Event-Cameras/genx320_color_light_with_tracking.py new file mode 100644 index 000000000..1e68df25b --- /dev/null +++ b/scripts/examples/01-Camera/03-Event-Cameras/genx320_color_light_with_tracking.py @@ -0,0 +1,32 @@ +# This work is licensed under the MIT license. +# Copyright (c) 2013-2024 OpenMV LLC. All rights reserved. +# https://github.com/openmv/openmv/blob/master/LICENSE +# +# This example shows off using the genx320 event camera from Prophesee. + +import sensor +import image +import time + +sensor.reset() +sensor.set_pixformat(sensor.GRAYSCALE) # Must always be grayscale. +sensor.set_framesize(sensor.B320X320) # Must always be 320x320. +sensor.set_color_palette(image.PALETTE_EVT_LIGHT) + +clock = time.clock() + +while True: + clock.tick() + + img = sensor.snapshot() + # img.median(1) # noise cleanup. + + blobs = img.find_blobs( + [(85, 95, -10, 10, -10, 10)], invert=True, pixels_threshold=10, area_threshold=100, merge=True + ) + + for blob in blobs: + img.draw_rectangle(blob.rect(), color=(255, 0, 0)) + img.draw_cross(blob.cx(), blob.cy(), color=(0, 255, 0)) + + print(clock.fps()) diff --git a/scripts/examples/01-Camera/03-Event-Cameras/genx320_grayscale.py b/scripts/examples/01-Camera/03-Event-Cameras/genx320_grayscale.py new file mode 100644 index 000000000..f5e154ffa --- /dev/null +++ b/scripts/examples/01-Camera/03-Event-Cameras/genx320_grayscale.py @@ -0,0 +1,22 @@ +# This work is licensed under the MIT license. +# Copyright (c) 2013-2024 OpenMV LLC. All rights reserved. +# https://github.com/openmv/openmv/blob/master/LICENSE +# +# This example shows off using the genx320 event camera from Prophesee. + +import sensor +import time + +sensor.reset() +sensor.set_pixformat(sensor.GRAYSCALE) # Must always be grayscale. +sensor.set_framesize(sensor.B320X320) # Must always be 320x320. + +clock = time.clock() + +while True: + clock.tick() + + img = sensor.snapshot() + # img.median(1) # noise cleanup. + + print(clock.fps()) diff --git a/scripts/examples/01-Camera/03-Event-Cameras/genx320_grayscale_with_tracking.py b/scripts/examples/01-Camera/03-Event-Cameras/genx320_grayscale_with_tracking.py new file mode 100644 index 000000000..684f9d527 --- /dev/null +++ b/scripts/examples/01-Camera/03-Event-Cameras/genx320_grayscale_with_tracking.py @@ -0,0 +1,30 @@ +# This work is licensed under the MIT license. +# Copyright (c) 2013-2024 OpenMV LLC. All rights reserved. +# https://github.com/openmv/openmv/blob/master/LICENSE +# +# This example shows off using the genx320 event camera from Prophesee. + +import sensor +import time + +sensor.reset() +sensor.set_pixformat(sensor.GRAYSCALE) # Must always be grayscale. +sensor.set_framesize(sensor.B320X320) # Must always be 320x320. + +clock = time.clock() + +while True: + clock.tick() + + img = sensor.snapshot() + # img.median(1) # noise cleanup. + + blobs = img.find_blobs( + [(120, 130)], invert=True, pixels_threshold=10, area_threshold=100, merge=True + ) + + for blob in blobs: + img.draw_rectangle(blob.rect(), color=(255, 255, 255)) + img.draw_cross(blob.cx(), blob.cy(), color=(0, 0, 0)) + + print(clock.fps()) diff --git a/src/Makefile b/src/Makefile index 81d058826..f38376a8b 100755 --- a/src/Makefile +++ b/src/Makefile @@ -54,6 +54,7 @@ OMV_DIR=omv CUBEAI_DIR=stm32cubeai CMSIS_DIR=hal/cmsis MICROPY_DIR=micropython +GENX320_DIR=drivers/genx320 LEPTON_DIR=drivers/lepton LSM6DS3_DIR=drivers/lsm6ds3 LSM6DSOX_DIR=drivers/lsm6dsox diff --git a/src/drivers/genx320/LICENSE b/src/drivers/genx320/LICENSE new file mode 100644 index 000000000..7f75f43b1 --- /dev/null +++ b/src/drivers/genx320/LICENSE @@ -0,0 +1,202 @@ + + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright Prophesee S.A. + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. diff --git a/src/drivers/genx320/Makefile b/src/drivers/genx320/Makefile new file mode 100644 index 000000000..30a4a1302 --- /dev/null +++ b/src/drivers/genx320/Makefile @@ -0,0 +1,28 @@ +### +# Copyright (c) Prophesee S.A. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# Unless required by applicable law or agreed to in writing, software distributed under the License is distributed +# on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and limitations under the License. +### + +SRCS = $(wildcard src/*.c) +OBJS = $(addprefix $(BUILD)/, $(SRCS:.c=.o)) +OBJ_DIRS = $(sort $(dir $(OBJS))) + +all: | $(OBJ_DIRS) $(OBJS) +$(OBJ_DIRS): + $(MKDIR) -p $@ + +$(BUILD)/%.o : %.c + $(ECHO) "CC $<" + $(CC) $(CFLAGS) -c -o $@ $< + +$(BUILD)/%.o : %.s + $(ECHO) "AS $<" + $(AS) $(AFLAGS) $< -o $@ + +-include $(OBJS:%.o=%.d) diff --git a/src/drivers/genx320/include/aer.h b/src/drivers/genx320/include/aer.h new file mode 100644 index 000000000..e3e8159a3 --- /dev/null +++ b/src/drivers/genx320/include/aer.h @@ -0,0 +1,23 @@ +/** + ****************************************************************************** + * @attention + * Copyright (c) Prophesee S.A. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 + * Unless required by applicable law or agreed to in writing, software distributed under the License is distributed + * on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and limitations under the License. + * + ****************************************************************************** + */ + +#ifndef INC_AER_H_ +#define INC_AER_H_ + +#define __AER_Y(__VAL__) ((__VAL__ ) & 0x1FFU) +#define __AER_X(__VAL__) ((__VAL__ >> 9) & 0x1FFU) +#define __AER_P(__VAL__) ((__VAL__ >> 18 ) & 0x1U) + +#endif /* INC_AER_H_ */ diff --git a/src/drivers/genx320/include/evt_2_0.h b/src/drivers/genx320/include/evt_2_0.h new file mode 100644 index 000000000..a47b2ebc0 --- /dev/null +++ b/src/drivers/genx320/include/evt_2_0.h @@ -0,0 +1,32 @@ +/** + ****************************************************************************** + * @attention + * Copyright (c) Prophesee S.A. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 + * Unless required by applicable law or agreed to in writing, software distributed under the License is distributed + * on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and limitations under the License. + * + ****************************************************************************** + */ + +#ifndef INC_EVT_2_0_H_ +#define INC_EVT_2_0_H_ + +#define __EVT20_TYPE(__VAL__) ((__VAL__ >> 28)& 0xFU) +#define __EVT20_TS(__VAL__) ((__VAL__ >> 22) & 0xF3U) +#define __EVT20_X(__VAL__) ((__VAL__ >> 11) & 0x7FFU) +#define __EVT20_Y(__VAL__) ((__VAL__ ) & 0x7FFU) +#define __EVT20_TIME_HIGH(__VAL__) ((__VAL__ ) & 0xFFFFFFFU) + +#define TD_LOW 0x0U /*!< EVT2.0 TD Event, Decrease in illumination */ +#define TD_HIGH 0x1U /*!< EVT2.0 TD Event, Increase in illumination */ +#define EV_TIME_HIGH 0x8U /*!< Timer High bits */ +#define EXT_TRIGGER 0xAU /*!< External triggers */ +#define OTHERS 0xEU /*!< To be used in extension in the event types */ +#define CONTINUED 0xFU /*!< Extra data to previous events */ + +#endif /* INC_EVT_2_0_H_ */ diff --git a/src/drivers/genx320/include/firmware.h b/src/drivers/genx320/include/firmware.h new file mode 100644 index 000000000..1899bae8c --- /dev/null +++ b/src/drivers/genx320/include/firmware.h @@ -0,0 +1,45 @@ +/** + ****************************************************************************** + * @file firmware.h + * @author PSEE Applications Team + * @brief RISC-V Firmwares + * + ****************************************************************************** + * @attention + * Copyright (c) Prophesee S.A. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 + * Unless required by applicable law or agreed to in writing, software distributed under the License is distributed + * on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and limitations under the License. + * + ****************************************************************************** + */ +#ifndef APPLICATION_USER_FIRMWARE_H_ +#define APPLICATION_USER_FIRMWARE_H_ + +/* Standard Includes */ +#include + +/* User Includes */ +#include "psee_genx320.h" + +#ifdef __cplusplus + extern "C" { +#endif + + /* Low power wakeup application Firmware */ + extern const size_t fw_esp_wakeup_size; + extern const Firmware fw_esp_wakeup[]; + + /* Led tracking application Firmware */ + extern const size_t fw_led_tracking_size; + extern const Firmware fw_led_tracking[]; + +#ifdef __cplusplus + } +#endif + +#endif /* APPLICATION_USER_FIRMWARE_H_ */ diff --git a/src/drivers/genx320/include/genx320_all_pub_registers.h b/src/drivers/genx320/include/genx320_all_pub_registers.h new file mode 100644 index 000000000..a7a0db173 --- /dev/null +++ b/src/drivers/genx320/include/genx320_all_pub_registers.h @@ -0,0 +1,8592 @@ + +/********************************************************************************************************************** + * Copyright (c) Prophesee S.A. * + * * + * Licensed under the Apache License, Version 2.0 (the "License"); * + * you may not use this file except in compliance with the License. * + * You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 * + * Unless required by applicable law or agreed to in writing, software distributed under the License is distributed * + * on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * + * See the License for the specific language governing permissions and limitations under the License. * + **********************************************************************************************************************/ +#ifndef __GENX320_ALL_PUB_REGISTERS_H +#define __GENX320_ALL_PUB_REGISTERS_H + +#ifdef __cplusplus + extern "C" { +#endif /* __cplusplus */ + +/* ------------------------------------------------------") + * : + * ------------------------------------------------------ */ + +#define ROI_CTRL (0x00000000UL) /* +#include +#include +#include +#include + +/* User Includes*/ +#include "genx320_all_pub_registers.h" +#include "psee_issd.h" + +/* Sensor I2C Address */ +#define I2C_ADDRESS 0x3C + +/* Sensor Chip ID */ +#define SAPHIR_CHIP_ID 0x0014 +#define SAPHIR_ES_ID 0x30501C01 +#define SAPHIR_MP_ID 0xB0602003 + +/* Memory Bank Defines */ +#define IMEM_START (0x00200000UL) +#define DMEM_START (0x00300000UL) +#define MEM_BANK_SELECT (0x0000F800UL) +#define MEM_BANK_MEM0 (0x0000F900UL) + +/* RISC-V Defines */ +#define RISC_BOOT_DONE 0x0ABCDEF + +/** + * @brief RISCV FW status structures definition + */ +typedef enum +{ + fw_OK = 0U, + fw_Error_InvalidSize = 1U, + fw_Error_InvalidPointer = 2U, + fw_Flash_Error = 3U, + fw_Start_Error = 4U, + fw_Flashed_Already = 5U +} FW_StatusTypeDef; + +/** + * @brief Shadow register status structures definition + */ +typedef enum +{ + shadow_valid = 0U, + shadow_not_valid = 01 +} Shadow_StatusTypeDef; + +/** + * @brief Structure to hold the parameters for the bias + */ +typedef struct { + uint8_t pr; + uint8_t fo; + uint8_t fes; + uint8_t hpf; + uint8_t diff_on; + uint8_t diff; + uint8_t diff_off; + uint8_t inv; + uint8_t refr; + uint8_t invp; + uint8_t req_pu; + uint8_t sm_pdy; +}BIAS_Params_t; + +/** + * @brief Structure to hold the border value for the Activity Map + */ +typedef struct { + uint16_t x0; + uint16_t x1; + uint16_t x2; + uint16_t x3; + uint16_t x4; + uint16_t y0; + uint16_t y1; + uint16_t y2; + uint16_t y3; + uint16_t y4; +}AM_Borders_t; + +/** + * @brief Structure to hold the risc-v firmware + */ +typedef struct { + uint32_t address; + uint32_t value; +} Firmware; + +/** + * @brief Structure to hold AFK Invalidation + */ +typedef struct { + uint32_t df_wait_time; + uint32_t df_timeout; +} Invalidation; + +/** + * @brief Structure to hold the sensor clock frequencies + */ +typedef struct { + uint32_t in_freq; + uint32_t sys_freq; + uint32_t evt_icn_freq; + uint32_t cpu_ss_freq; + uint32_t pll_in_freq; + uint32_t pll_vco_freq; + uint32_t phy_freq; + uint32_t mipi_freq; + uint32_t esc_freq; +} clk_freq_dict; + +/** + * @brief Sensor Boot mode structure definition + */ +typedef enum +{ + ROM_BOOT = 0U, + IMEM_BOOT = 1U +} Boot_Mode; + +/** + * @brief Enum to hold the parameters for the bias + */ +typedef enum { + PR, + FO, + FES, + HPF, + DIFF_ON, + DIFF, + DIFF_OFF, + INV, + REFR, + INVP, + REQ_PU, + SM_PDY, +} BIAS_Name_t; + +/* Constants/Variables to hold default bias */ +extern const BIAS_Params_t genx320es_default_biases; +extern const BIAS_Params_t genx320mp_default_biases; +extern BIAS_Params_t genx320_default_biases; + +/* Variable to hold default borders for Activity map */ +extern AM_Borders_t genx320mp_default_am_borders; + +/* ISSD sequences. */ +extern const struct issd dcmi_evt; +extern const struct issd dcmi_histo; +extern const struct issd *current_issd; + +/* Variable to hold the current boot mode */ +extern Boot_Mode genx320_boot_mode; + +/* Sensor Register Manipulation Functions */ +extern void psee_sensor_read(uint16_t register_address, uint32_t *buf); +extern void psee_sensor_write(uint16_t register_address, uint32_t register_data); + +/* Sensor Bring Up Functions */ +extern void psee_sensor_init(const struct issd *); +extern void psee_sensor_destroy(const struct issd *); +extern void psee_sensor_start(const struct issd *); +extern void psee_sensor_stop(const struct issd *); +extern Boot_Mode psee_detect_boot_mode(); +extern const struct issd *psee_open_evt(); +extern void psee_sensor_set_bias(BIAS_Name_t bias, uint32_t val); +extern void psee_sensor_set_biases(const BIAS_Params_t *bias); +extern void psee_sensor_set_CPI_EVT20(); +extern void psee_sensor_set_CPI_HISTO(); +extern void psee_sensor_set_flip(uint32_t flip_x, uint32_t flip_y); +extern void psee_sensor_powerdown(); + +/* Operating Mode Control Functions */ +extern void psee_PM3C_config(); +extern void psee_PM2_config(); + +/* Firmware flashing functions */ +extern FW_StatusTypeDef psee_write_firmware(const Firmware *firmwareArray, uint32_t n_bytes); +extern FW_StatusTypeDef psee_start_firmware(Boot_Mode boot_mode); +extern FW_StatusTypeDef psee_reset_firmware(Boot_Mode boot_mode); + +/* Mailbox Communication Functions */ +extern uint32_t psee_get_mbx_cmd_ptr(); +extern uint32_t psee_get_mbx_misc(); +extern uint32_t psee_get_mbx_status_ptr(); +extern void psee_set_mbx_cmd_ptr(uint32_t val); +extern void psee_set_mbx_misc(uint32_t val); +extern void psee_set_mbx_status_ptr(uint32_t val); + +/* ROI Access Functions */ +extern void psee_write_ROI_X(uint32_t offset, uint32_t val); +extern void psee_write_ROI_Y(uint32_t offset, uint32_t val); +extern void psee_write_ROI_CTRL(uint32_t val); + +/* RISC-V Debugger Functions */ +extern uint32_t psee_mbx_read_uint32(); +extern void psee_decode_debugger(); +extern uint32_t psee_sensor_read_dmem(uint32_t address); +extern uint32_t psee_sensor_read_imem(uint32_t address); + +/* Statistics Register Read Functions */ +extern void psee_read_ro_lp_evt_cnt(uint32_t *p_data); +extern uint32_t psee_read_ro_evt_cd_cnt(); +extern uint32_t psee_read_afk_flicker_evt_cnt(); +extern uint32_t psee_read_afk_total_evt_cnt(); + +/* Activity Map Configuration Functions */ +extern void psee_configure_activity_map(); +extern void psee_set_default_XY_borders(AM_Borders_t *border); + +/* AFK Configuration Functions */ +extern void psee_enable_afk(uint16_t min_freq, uint16_t max_freq); +extern void psee_disable_afk(); + +#endif diff --git a/src/drivers/genx320/include/psee_issd.h b/src/drivers/genx320/include/psee_issd.h new file mode 100644 index 000000000..4a79601fc --- /dev/null +++ b/src/drivers/genx320/include/psee_issd.h @@ -0,0 +1,63 @@ +/********************************************************************************************************************** + * Copyright (c) Prophesee S.A. * + * * + * Licensed under the Apache License, Version 2.0 (the "License"); * + * you may not use this file except in compliance with the License. * + * You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 * + * Unless required by applicable law or agreed to in writing, software distributed under the License is distributed * + * on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * + * See the License for the specific language governing permissions and limitations under the License. * + **********************************************************************************************************************/ + +#ifndef __PSEE_ISSD_H +#define __PSEE_ISSD_H + +#include +#include + +#ifndef ARRAY_SIZE +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#endif + +enum op_id { + READ, + WRITE, + DELAY +}; + +struct read_op { + uint16_t addr; + uint32_t data; + uint32_t mask; +}; + +struct write_op { + uint16_t addr; + uint32_t data; +}; + +struct delay_op { + uint32_t us; +}; + +struct reg_op { + enum op_id op; + union { + struct read_op read; + struct write_op write; + struct delay_op delay; + } args; +}; + +struct sequence { + const struct reg_op *ops; + size_t len; +}; + +struct issd { + const struct sequence init; + const struct sequence start; + const struct sequence stop; + const struct sequence destroy; +}; +#endif diff --git a/src/drivers/genx320/src/firmware.c b/src/drivers/genx320/src/firmware.c new file mode 100644 index 000000000..f3f1e6fdc --- /dev/null +++ b/src/drivers/genx320/src/firmware.c @@ -0,0 +1,9140 @@ +/** + ****************************************************************************** + * @file firmware.c + * @author PSEE Applications Team + * @brief RISC-V Firmwares + * + ****************************************************************************** + * @attention + * Copyright (c) Prophesee S.A. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 + * Unless required by applicable law or agreed to in writing, software distributed under the License is distributed + * on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "firmware.h" + +/* Firmware structure that holds the Low power wake-up application */ +const Firmware fw_esp_wakeup[] = { + { 0x00200000, 0x00000000 }, + { 0x00200004, 0x00000000 }, + { 0x00200008, 0x00000000 }, + { 0x0020000C, 0x00000000 }, + { 0x00200010, 0x00000000 }, + { 0x00200014, 0x00000000 }, + { 0x00200018, 0x00000000 }, + { 0x0020001C, 0x00000000 }, + { 0x00200020, 0x00000000 }, + { 0x00200024, 0x00000000 }, + { 0x00200028, 0x00000000 }, + { 0x0020002C, 0x00000000 }, + { 0x00200030, 0x00000000 }, + { 0x00200034, 0x00000000 }, + { 0x00200038, 0x00000000 }, + { 0x0020003C, 0x00000000 }, + { 0x00200040, 0x00000000 }, + { 0x00200044, 0x00000000 }, + { 0x00200048, 0x00000000 }, + { 0x0020004C, 0x00000000 }, + { 0x00200050, 0x00000000 }, + { 0x00200054, 0x00000000 }, + { 0x00200058, 0x00000000 }, + { 0x0020005C, 0x00000000 }, + { 0x00200060, 0x00000000 }, + { 0x00200064, 0x00000000 }, + { 0x00200068, 0x00000000 }, + { 0x0020006C, 0x00000000 }, + { 0x00200070, 0x00000000 }, + { 0x00200074, 0x00000000 }, + { 0x00200078, 0x00000000 }, + { 0x0020007C, 0x00000000 }, + { 0x00200080, 0x00000000 }, + { 0x00200084, 0x00000000 }, + { 0x00200088, 0x00000000 }, + { 0x0020008C, 0x00000000 }, + { 0x00200090, 0x00000000 }, + { 0x00200094, 0x00000000 }, + { 0x00200098, 0x00000000 }, + { 0x0020009C, 0x00000000 }, + { 0x002000A0, 0x00000000 }, + { 0x002000A4, 0x00000000 }, + { 0x002000A8, 0x00000000 }, + { 0x002000AC, 0x00000000 }, + { 0x002000B0, 0x00000000 }, + { 0x002000B4, 0x00000000 }, + { 0x002000B8, 0x00000000 }, + { 0x002000BC, 0x00000000 }, + { 0x002000C0, 0x00000000 }, + { 0x002000C4, 0x00000000 }, + { 0x002000C8, 0x00000000 }, + { 0x002000CC, 0x00000000 }, + { 0x002000D0, 0x00000000 }, + { 0x002000D4, 0x00000000 }, + { 0x002000D8, 0x00000000 }, + { 0x002000DC, 0x00000000 }, + { 0x002000E0, 0x00000000 }, + { 0x002000E4, 0x00000000 }, + { 0x002000E8, 0x00000000 }, + { 0x002000EC, 0x00000000 }, + { 0x002000F0, 0x00000000 }, + { 0x002000F4, 0x00000000 }, + { 0x002000F8, 0x00000000 }, + { 0x002000FC, 0x00000000 }, + { 0x00200100, 0x00000000 }, + { 0x00200104, 0x00000000 }, + { 0x00200108, 0x00000000 }, + { 0x0020010C, 0x00000000 }, + { 0x00200110, 0x00000000 }, + { 0x00200114, 0x00000000 }, + { 0x00200118, 0x00000000 }, + { 0x0020011C, 0x00000000 }, + { 0x00200120, 0x00000000 }, + { 0x00200124, 0x00000000 }, + { 0x00200128, 0x00000000 }, + { 0x0020012C, 0x00000000 }, + { 0x00200130, 0x00000000 }, + { 0x00200134, 0x00000000 }, + { 0x00200138, 0x00000000 }, + { 0x0020013C, 0x00000000 }, + { 0x00200140, 0x00000000 }, + { 0x00200144, 0x00000000 }, + { 0x00200148, 0x00000000 }, + { 0x0020014C, 0x00000000 }, + { 0x00200150, 0x00000000 }, + { 0x00200154, 0x00000000 }, + { 0x00200158, 0x00000000 }, + { 0x0020015C, 0x00000000 }, + { 0x00200160, 0x00000000 }, + { 0x00200164, 0x00000000 }, + { 0x00200168, 0x00000000 }, + { 0x0020016C, 0x00000000 }, + { 0x00200170, 0x00000000 }, + { 0x00200174, 0x00000000 }, + { 0x00200178, 0x00000000 }, + { 0x0020017C, 0x00000000 }, + { 0x00200180, 0x00000000 }, + { 0x00200184, 0x00000000 }, + { 0x00200188, 0x00000000 }, + { 0x0020018C, 0x00000000 }, + { 0x00200190, 0x00000000 }, + { 0x00200194, 0x00000000 }, + { 0x00200198, 0x00000000 }, + { 0x0020019C, 0x00000000 }, + { 0x002001A0, 0x00000000 }, + { 0x002001A4, 0x00000000 }, + { 0x002001A8, 0x00000000 }, + { 0x002001AC, 0x00000000 }, + { 0x002001B0, 0x00000000 }, + { 0x002001B4, 0x00000000 }, + { 0x002001B8, 0x00000000 }, + { 0x002001BC, 0x00000000 }, + { 0x002001C0, 0x00000000 }, + { 0x002001C4, 0x00000000 }, + { 0x002001C8, 0x00000000 }, + { 0x002001CC, 0x00000000 }, + { 0x002001D0, 0x00000000 }, + { 0x002001D4, 0x00000000 }, + { 0x002001D8, 0x00000000 }, + { 0x002001DC, 0x00000000 }, + { 0x002001E0, 0x00000000 }, + { 0x002001E4, 0x00000000 }, + { 0x002001E8, 0x00000000 }, + { 0x002001EC, 0x00000000 }, + { 0x002001F0, 0x00000000 }, + { 0x002001F4, 0x00000000 }, + { 0x002001F8, 0x00000000 }, + { 0x002001FC, 0x00000000 }, + { 0x00200200, 0x30047073 }, + { 0x00200204, 0x30405073 }, + { 0x00200208, 0x00200537 }, + { 0x0020020C, 0x21050067 }, + { 0x00200210, 0x00100197 }, + { 0x00200214, 0x5F018193 }, + { 0x00200218, 0x00108117 }, + { 0x0020021C, 0xD6810113 }, + { 0x00200220, 0x00004517 }, + { 0x00200224, 0xDF050513 }, + { 0x00200228, 0x00100597 }, + { 0x0020022C, 0xDD858593 }, + { 0x00200230, 0x00100617 }, + { 0x00200234, 0xDE860613 }, + { 0x00200238, 0x00C5FC63 }, + { 0x0020023C, 0x00052283 }, + { 0x00200240, 0x0055A023 }, + { 0x00200244, 0x00450513 }, + { 0x00200248, 0x00458593 }, + { 0x0020024C, 0xFEC5E8E3 }, + { 0x00200250, 0x00100517 }, + { 0x00200254, 0xDC850513 }, + { 0x00200258, 0x00101597 }, + { 0x0020025C, 0xDE458593 }, + { 0x00200260, 0x00B57863 }, + { 0x00200264, 0x00052023 }, + { 0x00200268, 0x00450513 }, + { 0x0020026C, 0xFEB56CE3 }, + { 0x00200270, 0x03C010EF }, + { 0x00200274, 0x0000006F }, + { 0x00200300, 0xFE010113 }, + { 0x00200304, 0x00812E23 }, + { 0x00200308, 0x02010413 }, + { 0x0020030C, 0xFEA42623 }, + { 0x00200310, 0xFEC42783 }, + { 0x00200314, 0x0007A023 }, + { 0x00200318, 0xFEC42783 }, + { 0x0020031C, 0x0007A223 }, + { 0x00200320, 0xFEC42783 }, + { 0x00200324, 0x0007A423 }, + { 0x00200328, 0xFEC42783 }, + { 0x0020032C, 0x0007A623 }, + { 0x00200330, 0xFEC42783 }, + { 0x00200334, 0x0007A823 }, + { 0x00200338, 0xFEC42783 }, + { 0x0020033C, 0x00078CA3 }, + { 0x00200340, 0xFEC42783 }, + { 0x00200344, 0x00079A23 }, + { 0x00200348, 0xFEC42783 }, + { 0x0020034C, 0x00079B23 }, + { 0x00200350, 0xFEC42783 }, + { 0x00200354, 0x00078C23 }, + { 0x00200358, 0x00000013 }, + { 0x0020035C, 0x01C12403 }, + { 0x00200360, 0x02010113 }, + { 0x00200364, 0x00008067 }, + { 0x00200368, 0xFE010113 }, + { 0x0020036C, 0x00812E23 }, + { 0x00200370, 0x02010413 }, + { 0x00200374, 0xFEA42623 }, + { 0x00200378, 0xFEC42783 }, + { 0x0020037C, 0x0007A023 }, + { 0x00200380, 0xFEC42783 }, + { 0x00200384, 0x0007A223 }, + { 0x00200388, 0xFEC42783 }, + { 0x0020038C, 0x0007A423 }, + { 0x00200390, 0xFEC42783 }, + { 0x00200394, 0x0007A623 }, + { 0x00200398, 0xFEC42783 }, + { 0x0020039C, 0x00000693 }, + { 0x002003A0, 0x00000713 }, + { 0x002003A4, 0x00D7A823 }, + { 0x002003A8, 0x00E7AA23 }, + { 0x002003AC, 0xFEC42783 }, + { 0x002003B0, 0x02078023 }, + { 0x002003B4, 0xFEC42783 }, + { 0x002003B8, 0x020780A3 }, + { 0x002003BC, 0xFEC42783 }, + { 0x002003C0, 0x00D7AC23 }, + { 0x002003C4, 0x00E7AE23 }, + { 0x002003C8, 0x00000013 }, + { 0x002003CC, 0x01C12403 }, + { 0x002003D0, 0x02010113 }, + { 0x002003D4, 0x00008067 }, + { 0x002003D8, 0xFE010113 }, + { 0x002003DC, 0x00812E23 }, + { 0x002003E0, 0x02010413 }, + { 0x002003E4, 0xFEA42623 }, + { 0x002003E8, 0xFEC42783 }, + { 0x002003EC, 0x00100713 }, + { 0x002003F0, 0x00E78023 }, + { 0x002003F4, 0xFEC42783 }, + { 0x002003F8, 0x00006737 }, + { 0x002003FC, 0x1A870713 }, + { 0x00200400, 0x00E7A223 }, + { 0x00200404, 0xFEC42783 }, + { 0x00200408, 0x00002737 }, + { 0x0020040C, 0xFAE70713 }, + { 0x00200410, 0x00E79423 }, + { 0x00200414, 0xFEC42783 }, + { 0x00200418, 0x05100713 }, + { 0x0020041C, 0x00E79523 }, + { 0x00200420, 0xFEC42783 }, + { 0x00200424, 0x00000693 }, + { 0x00200428, 0x00000713 }, + { 0x0020042C, 0x00D7A823 }, + { 0x00200430, 0x00E7AA23 }, + { 0x00200434, 0xFEC42783 }, + { 0x00200438, 0x10000713 }, + { 0x0020043C, 0x00E7AC23 }, + { 0x00200440, 0xFEC42783 }, + { 0x00200444, 0x00002737 }, + { 0x00200448, 0x40070713 }, + { 0x0020044C, 0x00E7AE23 }, + { 0x00200450, 0xFEC42783 }, + { 0x00200454, 0x00100713 }, + { 0x00200458, 0x02E780A3 }, + { 0x0020045C, 0xFEC42783 }, + { 0x00200460, 0x00A00713 }, + { 0x00200464, 0x02E78023 }, + { 0x00200468, 0xFEC42783 }, + { 0x0020046C, 0x00400713 }, + { 0x00200470, 0x02E78123 }, + { 0x00200474, 0xFEC42783 }, + { 0x00200478, 0x020781A3 }, + { 0x0020047C, 0xFEC42783 }, + { 0x00200480, 0x02078223 }, + { 0x00200484, 0xFEC42783 }, + { 0x00200488, 0x00100713 }, + { 0x0020048C, 0x02E782A3 }, + { 0x00200490, 0xFEC42783 }, + { 0x00200494, 0x00100713 }, + { 0x00200498, 0x02E78323 }, + { 0x0020049C, 0xFEC42783 }, + { 0x002004A0, 0x00400713 }, + { 0x002004A4, 0x02E783A3 }, + { 0x002004A8, 0xFEC42783 }, + { 0x002004AC, 0x00400713 }, + { 0x002004B0, 0x02E78423 }, + { 0x002004B4, 0x00000013 }, + { 0x002004B8, 0x01C12403 }, + { 0x002004BC, 0x02010113 }, + { 0x002004C0, 0x00008067 }, + { 0x002004C4, 0xFD010113 }, + { 0x002004C8, 0x02112623 }, + { 0x002004CC, 0x02812423 }, + { 0x002004D0, 0x03010413 }, + { 0x002004D4, 0xFCA42E23 }, + { 0x002004D8, 0xFE0407A3 }, + { 0x002004DC, 0x03C0006F }, + { 0x002004E0, 0xFEF44703 }, + { 0x002004E4, 0x00070793 }, + { 0x002004E8, 0x00279793 }, + { 0x002004EC, 0x00E787B3 }, + { 0x002004F0, 0x00379793 }, + { 0x002004F4, 0x03078793 }, + { 0x002004F8, 0xFDC42703 }, + { 0x002004FC, 0x00F707B3 }, + { 0x00200500, 0x00878793 }, + { 0x00200504, 0x00078513 }, + { 0x00200508, 0xE61FF0EF }, + { 0x0020050C, 0xFEF44783 }, + { 0x00200510, 0x00178793 }, + { 0x00200514, 0xFEF407A3 }, + { 0x00200518, 0xFEF44703 }, + { 0x0020051C, 0x00F00793 }, + { 0x00200520, 0xFCE7F0E3 }, + { 0x00200524, 0xFDC42783 }, + { 0x00200528, 0x02078823 }, + { 0x0020052C, 0xFDC42783 }, + { 0x00200530, 0x2A079C23 }, + { 0x00200534, 0xFDC42783 }, + { 0x00200538, 0x2BC78793 }, + { 0x0020053C, 0x00078513 }, + { 0x00200540, 0xDC1FF0EF }, + { 0x00200544, 0xFDC42783 }, + { 0x00200548, 0xFFF00713 }, + { 0x0020054C, 0x2CE7AC23 }, + { 0x00200550, 0xFDC42783 }, + { 0x00200554, 0x00100713 }, + { 0x00200558, 0x2EE78223 }, + { 0x0020055C, 0x00000013 }, + { 0x00200560, 0x02C12083 }, + { 0x00200564, 0x02812403 }, + { 0x00200568, 0x03010113 }, + { 0x0020056C, 0x00008067 }, + { 0x00200570, 0xED010113 }, + { 0x00200574, 0x12112623 }, + { 0x00200578, 0x12812423 }, + { 0x0020057C, 0x13212223 }, + { 0x00200580, 0x13312023 }, + { 0x00200584, 0x11412E23 }, + { 0x00200588, 0x11512C23 }, + { 0x0020058C, 0x11612A23 }, + { 0x00200590, 0x11712823 }, + { 0x00200594, 0x11812623 }, + { 0x00200598, 0x11912423 }, + { 0x0020059C, 0x11A12223 }, + { 0x002005A0, 0x11B12023 }, + { 0x002005A4, 0x13010413 }, + { 0x002005A8, 0xF2A42623 }, + { 0x002005AC, 0xF2B42423 }, + { 0x002005B0, 0xF2C42783 }, + { 0x002005B4, 0x0007C783 }, + { 0x002005B8, 0x0017C793 }, + { 0x002005BC, 0x0FF7F793 }, + { 0x002005C0, 0x3A0796E3 }, + { 0x002005C4, 0xF2C42783 }, + { 0x002005C8, 0x2A079C23 }, + { 0x002005CC, 0xF2C42783 }, + { 0x002005D0, 0x0307C783 }, + { 0x002005D4, 0xFCF406A3 }, + { 0x002005D8, 0xF2C42783 }, + { 0x002005DC, 0x0307C703 }, + { 0x002005E0, 0x00100793 }, + { 0x002005E4, 0x40E787B3 }, + { 0x002005E8, 0xFCF40623 }, + { 0x002005EC, 0xF2C42783 }, + { 0x002005F0, 0x0237C783 }, + { 0x002005F4, 0x00078713 }, + { 0x002005F8, 0x00A00793 }, + { 0x002005FC, 0x40E787B3 }, + { 0x00200600, 0xFCF42423 }, + { 0x00200604, 0xFC842783 }, + { 0x00200608, 0x00179713 }, + { 0x0020060C, 0x00D00793 }, + { 0x00200610, 0x40E787B3 }, + { 0x00200614, 0xFCF42223 }, + { 0x00200618, 0xFC0407A3 }, + { 0x0020061C, 0x1110006F }, + { 0x00200620, 0xFCF44703 }, + { 0x00200624, 0x00070793 }, + { 0x00200628, 0x00279793 }, + { 0x0020062C, 0x00E787B3 }, + { 0x00200630, 0x00379793 }, + { 0x00200634, 0x03078713 }, + { 0x00200638, 0xF2C42783 }, + { 0x0020063C, 0x00E787B3 }, + { 0x00200640, 0x00878793 }, + { 0x00200644, 0xFAF42C23 }, + { 0x00200648, 0xFC842783 }, + { 0x0020064C, 0x0207D663 }, + { 0x00200650, 0xFCF44783 }, + { 0x00200654, 0x00279713 }, + { 0x00200658, 0xF2842783 }, + { 0x0020065C, 0x00E787B3 }, + { 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0x00203D08, 0xB0CFE0EF }, + { 0x00203D0C, 0x02050663 }, + { 0x00203D10, 0xE94FE0EF }, + { 0x00203D14, 0x0240006F }, + { 0x00203D18, 0x861FD0EF }, + { 0x00203D1C, 0x01C0006F }, + { 0x00203D20, 0x00B00293 }, + { 0x00203D24, 0x00551663 }, + { 0x00203D28, 0xE7CFE0EF }, + { 0x00203D2C, 0x00C0006F }, + { 0x00203D30, 0x879FD0EF }, + { 0x00203D34, 0x0040006F }, + { 0x00203D38, 0x000FC317 }, + { 0x00203D3C, 0x2E832303 }, + { 0x00203D40, 0x00032103 }, + { 0x00203D44, 0x00012283 }, + { 0x00203D48, 0x34129073 }, + { 0x00203D4C, 0x07812283 }, + { 0x00203D50, 0x30029073 }, + { 0x00203D54, 0x07412283 }, + { 0x00203D58, 0x80C1A303 }, + { 0x00203D5C, 0x00532023 }, + { 0x00203D60, 0x00412083 }, + { 0x00203D64, 0x00812283 }, + { 0x00203D68, 0x00C12303 }, + { 0x00203D6C, 0x01012383 }, + { 0x00203D70, 0x01412403 }, + { 0x00203D74, 0x01812483 }, + { 0x00203D78, 0x01C12503 }, + { 0x00203D7C, 0x02012583 }, + { 0x00203D80, 0x02412603 }, + { 0x00203D84, 0x02812683 }, + { 0x00203D88, 0x02C12703 }, + { 0x00203D8C, 0x03012783 }, + { 0x00203D90, 0x03412803 }, + { 0x00203D94, 0x03812883 }, + { 0x00203D98, 0x03C12903 }, + { 0x00203D9C, 0x04012983 }, + { 0x00203DA0, 0x04412A03 }, + { 0x00203DA4, 0x04812A83 }, + { 0x00203DA8, 0x04C12B03 }, + { 0x00203DAC, 0x05012B83 }, + { 0x00203DB0, 0x05412C03 }, + { 0x00203DB4, 0x05812C83 }, + { 0x00203DB8, 0x05C12D03 }, + { 0x00203DBC, 0x06012D83 }, + { 0x00203DC0, 0x06412E03 }, + { 0x00203DC4, 0x06812E83 }, + { 0x00203DC8, 0x06C12F03 }, + { 0x00203DCC, 0x07012F83 }, + { 0x00203DD0, 0x07C10113 }, + { 0x00203DD4, 0x30200073 }, + { 0x00203DD8, 0x00000000 }, + { 0x00203DDC, 0x00F00313 }, + { 0x00203DE0, 0x00050713 }, + { 0x00203DE4, 0x02C37E63 }, + { 0x00203DE8, 0x00F77793 }, + { 0x00203DEC, 0x0A079063 }, + { 0x00203DF0, 0x08059263 }, + { 0x00203DF4, 0xFF067693 }, + { 0x00203DF8, 0x00F67613 }, + { 0x00203DFC, 0x00E686B3 }, + { 0x00203E00, 0x00B72023 }, + { 0x00203E04, 0x00B72223 }, + { 0x00203E08, 0x00B72423 }, + { 0x00203E0C, 0x00B72623 }, + { 0x00203E10, 0x01070713 }, + { 0x00203E14, 0xFED766E3 }, + { 0x00203E18, 0x00061463 }, + { 0x00203E1C, 0x00008067 }, + { 0x00203E20, 0x40C306B3 }, + { 0x00203E24, 0x00269693 }, + { 0x00203E28, 0x00000297 }, + { 0x00203E2C, 0x005686B3 }, + { 0x00203E30, 0x00C68067 }, + { 0x00203E34, 0x00B70723 }, + { 0x00203E38, 0x00B706A3 }, + { 0x00203E3C, 0x00B70623 }, + { 0x00203E40, 0x00B705A3 }, + { 0x00203E44, 0x00B70523 }, + { 0x00203E48, 0x00B704A3 }, + { 0x00203E4C, 0x00B70423 }, + { 0x00203E50, 0x00B703A3 }, + { 0x00203E54, 0x00B70323 }, + { 0x00203E58, 0x00B702A3 }, + { 0x00203E5C, 0x00B70223 }, + { 0x00203E60, 0x00B701A3 }, + { 0x00203E64, 0x00B70123 }, + { 0x00203E68, 0x00B700A3 }, + { 0x00203E6C, 0x00B70023 }, + { 0x00203E70, 0x00008067 }, + { 0x00203E74, 0x0FF5F593 }, + { 0x00203E78, 0x00859693 }, + { 0x00203E7C, 0x00D5E5B3 }, + { 0x00203E80, 0x01059693 }, + { 0x00203E84, 0x00D5E5B3 }, + { 0x00203E88, 0xF6DFF06F }, + { 0x00203E8C, 0x00279693 }, + { 0x00203E90, 0x00000297 }, + { 0x00203E94, 0x005686B3 }, + { 0x00203E98, 0x00008293 }, + { 0x00203E9C, 0xFA0680E7 }, + { 0x00203EA0, 0x00028093 }, + { 0x00203EA4, 0xFF078793 }, + { 0x00203EA8, 0x40F70733 }, + { 0x00203EAC, 0x00F60633 }, + { 0x00203EB0, 0xF6C378E3 }, + { 0x00203EB4, 0xF3DFF06F }, + { 0x00203EB8, 0x000107B7 }, + { 0x00203EBC, 0x02F57A63 }, + { 0x00203EC0, 0x10053793 }, + { 0x00203EC4, 0x0017C793 }, + { 0x00203EC8, 0x00379793 }, + { 0x00203ECC, 0x00204737 }, + { 0x00203ED0, 0x02000693 }, + { 0x00203ED4, 0x40F686B3 }, + { 0x00203ED8, 0x00F55533 }, + { 0x00203EDC, 0xF1070793 }, + { 0x00203EE0, 0x00A787B3 }, + { 0x00203EE4, 0x0007C503 }, + { 0x00203EE8, 0x40A68533 }, + { 0x00203EEC, 0x00008067 }, + { 0x00203EF0, 0x01000737 }, + { 0x00203EF4, 0x01000793 }, + { 0x00203EF8, 0xFCE56AE3 }, + { 0x00203EFC, 0x01800793 }, + { 0x00203F00, 0xFCDFF06F }, + { 0x00203F04, 0x0057504C }, + { 0x00203F08, 0x454C4449 }, + { 0x00203F0C, 0x00000000 }, + { 0x00203F10, 0x02020100 }, + { 0x00203F14, 0x03030303 }, + { 0x00203F18, 0x04040404 }, + { 0x00203F1C, 0x04040404 }, + { 0x00203F20, 0x05050505 }, + { 0x00203F24, 0x05050505 }, + { 0x00203F28, 0x05050505 }, + { 0x00203F2C, 0x05050505 }, + { 0x00203F30, 0x06060606 }, + { 0x00203F34, 0x06060606 }, + { 0x00203F38, 0x06060606 }, + { 0x00203F3C, 0x06060606 }, + { 0x00203F40, 0x06060606 }, + { 0x00203F44, 0x06060606 }, + { 0x00203F48, 0x06060606 }, + { 0x00203F4C, 0x06060606 }, + { 0x00203F50, 0x07070707 }, + { 0x00203F54, 0x07070707 }, + { 0x00203F58, 0x07070707 }, + { 0x00203F5C, 0x07070707 }, + { 0x00203F60, 0x07070707 }, + { 0x00203F64, 0x07070707 }, + { 0x00203F68, 0x07070707 }, + { 0x00203F6C, 0x07070707 }, + { 0x00203F70, 0x07070707 }, + { 0x00203F74, 0x07070707 }, + { 0x00203F78, 0x07070707 }, + { 0x00203F7C, 0x07070707 }, + { 0x00203F80, 0x07070707 }, + { 0x00203F84, 0x07070707 }, + { 0x00203F88, 0x07070707 }, + { 0x00203F8C, 0x07070707 }, + { 0x00203F90, 0x08080808 }, + { 0x00203F94, 0x08080808 }, + { 0x00203F98, 0x08080808 }, + { 0x00203F9C, 0x08080808 }, + { 0x00203FA0, 0x08080808 }, + { 0x00203FA4, 0x08080808 }, + { 0x00203FA8, 0x08080808 }, + { 0x00203FAC, 0x08080808 }, + { 0x00203FB0, 0x08080808 }, + { 0x00203FB4, 0x08080808 }, + { 0x00203FB8, 0x08080808 }, + { 0x00203FBC, 0x08080808 }, + { 0x00203FC0, 0x08080808 }, + { 0x00203FC4, 0x08080808 }, + { 0x00203FC8, 0x08080808 }, + { 0x00203FCC, 0x08080808 }, + { 0x00203FD0, 0x08080808 }, + { 0x00203FD4, 0x08080808 }, + { 0x00203FD8, 0x08080808 }, + { 0x00203FDC, 0x08080808 }, + { 0x00203FE0, 0x08080808 }, + { 0x00203FE4, 0x08080808 }, + { 0x00203FE8, 0x08080808 }, + { 0x00203FEC, 0x08080808 }, + { 0x00203FF0, 0x08080808 }, + { 0x00203FF4, 0x08080808 }, + { 0x00203FF8, 0x08080808 }, + { 0x00203FFC, 0x08080808 }, + { 0x00204000, 0x08080808 }, + { 0x00204004, 0x08080808 }, + { 0x00204008, 0x08080808 }, + { 0x0020400C, 0x08080808 }, + { 0x00204010, 0x00000006 }, + { 0x00204014, 0x00300060 }, + { 0x00204018, 0xAAAAAAAA }, + { 0x0020401C, 0x00300008 }, + { 0x00204020, 0x00308000 }, + { 0x00204024, 0x00002710 }, + +}; + +/* Size of wakeup application */ +const size_t fw_esp_wakeup_size = (sizeof(fw_esp_wakeup)/sizeof(Firmware)); + +/* Firmware structure that holds the LED Tracking application */ +const Firmware fw_led_tracking[] = { + { 0x00200000, 0x00000000 }, + { 0x00200004, 0x00000000 }, + { 0x00200008, 0x00000000 }, + { 0x0020000C, 0x00000000 }, + { 0x00200010, 0x00000000 }, + { 0x00200014, 0x00000000 }, + { 0x00200018, 0x00000000 }, + { 0x0020001C, 0x00000000 }, + { 0x00200020, 0x00000000 }, + { 0x00200024, 0x00000000 }, + { 0x00200028, 0x00000000 }, + { 0x0020002C, 0x00000000 }, + { 0x00200030, 0x00000000 }, + { 0x00200034, 0x00000000 }, + { 0x00200038, 0x00000000 }, + { 0x0020003C, 0x00000000 }, + { 0x00200040, 0x00000000 }, + { 0x00200044, 0x00000000 }, + { 0x00200048, 0x00000000 }, + { 0x0020004C, 0x00000000 }, + { 0x00200050, 0x00000000 }, + { 0x00200054, 0x00000000 }, + { 0x00200058, 0x00000000 }, + { 0x0020005C, 0x00000000 }, + { 0x00200060, 0x00000000 }, + { 0x00200064, 0x00000000 }, + { 0x00200068, 0x00000000 }, + { 0x0020006C, 0x00000000 }, + { 0x00200070, 0x00000000 }, + { 0x00200074, 0x00000000 }, + { 0x00200078, 0x00000000 }, + { 0x0020007C, 0x00000000 }, + { 0x00200080, 0x00000000 }, + { 0x00200084, 0x00000000 }, + { 0x00200088, 0x00000000 }, + { 0x0020008C, 0x00000000 }, + { 0x00200090, 0x00000000 }, + { 0x00200094, 0x00000000 }, + { 0x00200098, 0x00000000 }, + { 0x0020009C, 0x00000000 }, + { 0x002000A0, 0x00000000 }, + { 0x002000A4, 0x00000000 }, + { 0x002000A8, 0x00000000 }, + { 0x002000AC, 0x00000000 }, + { 0x002000B0, 0x00000000 }, + { 0x002000B4, 0x00000000 }, + { 0x002000B8, 0x00000000 }, + { 0x002000BC, 0x00000000 }, + { 0x002000C0, 0x00000000 }, + { 0x002000C4, 0x00000000 }, + { 0x002000C8, 0x00000000 }, + { 0x002000CC, 0x00000000 }, + { 0x002000D0, 0x00000000 }, + { 0x002000D4, 0x00000000 }, + { 0x002000D8, 0x00000000 }, + { 0x002000DC, 0x00000000 }, + { 0x002000E0, 0x00000000 }, + { 0x002000E4, 0x00000000 }, + { 0x002000E8, 0x00000000 }, + { 0x002000EC, 0x00000000 }, + { 0x002000F0, 0x00000000 }, + { 0x002000F4, 0x00000000 }, + { 0x002000F8, 0x00000000 }, + { 0x002000FC, 0x00000000 }, + { 0x00200100, 0x00000000 }, + { 0x00200104, 0x00000000 }, + { 0x00200108, 0x00000000 }, + { 0x0020010C, 0x00000000 }, + { 0x00200110, 0x00000000 }, + { 0x00200114, 0x00000000 }, + { 0x00200118, 0x00000000 }, + { 0x0020011C, 0x00000000 }, + { 0x00200120, 0x00000000 }, + { 0x00200124, 0x00000000 }, + { 0x00200128, 0x00000000 }, + { 0x0020012C, 0x00000000 }, + { 0x00200130, 0x00000000 }, + { 0x00200134, 0x00000000 }, + { 0x00200138, 0x00000000 }, + { 0x0020013C, 0x00000000 }, + { 0x00200140, 0x00000000 }, + { 0x00200144, 0x00000000 }, + { 0x00200148, 0x00000000 }, + { 0x0020014C, 0x00000000 }, + { 0x00200150, 0x00000000 }, + { 0x00200154, 0x00000000 }, + { 0x00200158, 0x00000000 }, + { 0x0020015C, 0x00000000 }, + { 0x00200160, 0x00000000 }, + { 0x00200164, 0x00000000 }, + { 0x00200168, 0x00000000 }, + { 0x0020016C, 0x00000000 }, + { 0x00200170, 0x00000000 }, + { 0x00200174, 0x00000000 }, + { 0x00200178, 0x00000000 }, + { 0x0020017C, 0x00000000 }, + { 0x00200180, 0x00000000 }, + { 0x00200184, 0x00000000 }, + { 0x00200188, 0x00000000 }, + { 0x0020018C, 0x00000000 }, + { 0x00200190, 0x00000000 }, + { 0x00200194, 0x00000000 }, + { 0x00200198, 0x00000000 }, + { 0x0020019C, 0x00000000 }, + { 0x002001A0, 0x00000000 }, + { 0x002001A4, 0x00000000 }, + { 0x002001A8, 0x00000000 }, + { 0x002001AC, 0x00000000 }, + { 0x002001B0, 0x00000000 }, + { 0x002001B4, 0x00000000 }, + { 0x002001B8, 0x00000000 }, + { 0x002001BC, 0x00000000 }, + { 0x002001C0, 0x00000000 }, + { 0x002001C4, 0x00000000 }, + { 0x002001C8, 0x00000000 }, + { 0x002001CC, 0x00000000 }, + { 0x002001D0, 0x00000000 }, + { 0x002001D4, 0x00000000 }, + { 0x002001D8, 0x00000000 }, + { 0x002001DC, 0x00000000 }, + { 0x002001E0, 0x00000000 }, + { 0x002001E4, 0x00000000 }, + { 0x002001E8, 0x00000000 }, + { 0x002001EC, 0x00000000 }, + { 0x002001F0, 0x00000000 }, + { 0x002001F4, 0x00000000 }, + { 0x002001F8, 0x00000000 }, + { 0x002001FC, 0x00000000 }, + { 0x00200200, 0x30047073 }, + { 0x00200204, 0x30405073 }, + { 0x00200208, 0x00200537 }, + { 0x0020020C, 0x21050067 }, + { 0x00200210, 0x00100197 }, + { 0x00200214, 0x5F018193 }, + { 0x00200218, 0x00108117 }, + { 0x0020021C, 0xD6810113 }, + { 0x00200220, 0x00005517 }, + { 0x00200224, 0xCE850513 }, + { 0x00200228, 0x00100597 }, + { 0x0020022C, 0xDD858593 }, + { 0x00200230, 0x00100617 }, + { 0x00200234, 0xDE860613 }, + { 0x00200238, 0x00C5FC63 }, + { 0x0020023C, 0x00052283 }, + { 0x00200240, 0x0055A023 }, + { 0x00200244, 0x00450513 }, + { 0x00200248, 0x00458593 }, + { 0x0020024C, 0xFEC5E8E3 }, + { 0x00200250, 0x00100517 }, + { 0x00200254, 0xDC850513 }, + { 0x00200258, 0x5A418593 }, + { 0x0020025C, 0x00B57863 }, + { 0x00200260, 0x00052023 }, + { 0x00200264, 0x00450513 }, + { 0x00200268, 0xFEB56CE3 }, + { 0x0020026C, 0x228000EF }, + { 0x00200270, 0x0000006F }, + { 0x00200300, 0xFD010113 }, + { 0x00200304, 0x02812623 }, + { 0x00200308, 0x03010413 }, + { 0x0020030C, 0xFCA42E23 }, + { 0x00200310, 0xFCB42C23 }, + { 0x00200314, 0xFDC42783 }, + { 0x00200318, 0xFEF42623 }, + { 0x0020031C, 0xFEC42783 }, + { 0x00200320, 0xFD842703 }, + { 0x00200324, 0x00E7A023 }, + { 0x00200328, 0x00000013 }, + { 0x0020032C, 0x02C12403 }, + { 0x00200330, 0x03010113 }, + { 0x00200334, 0x00008067 }, + { 0x00200338, 0xFD010113 }, + { 0x0020033C, 0x02812623 }, + { 0x00200340, 0x03010413 }, + { 0x00200344, 0xFCA42E23 }, + { 0x00200348, 0xFCB42C23 }, + { 0x0020034C, 0xFD842783 }, + { 0x00200350, 0xFEF42623 }, + { 0x00200354, 0xFEC42783 }, + { 0x00200358, 0x0007A703 }, + { 0x0020035C, 0xFDC42783 }, + { 0x00200360, 0x00E7A023 }, + { 0x00200364, 0x00000013 }, + { 0x00200368, 0x02C12403 }, + { 0x0020036C, 0x03010113 }, + { 0x00200370, 0x00008067 }, + { 0x00200374, 0xFD010113 }, + { 0x00200378, 0x02112623 }, + { 0x0020037C, 0x02812423 }, + { 0x00200380, 0x03010413 }, + { 0x00200384, 0xFCA42E23 }, + { 0x00200388, 0xFCB42C23 }, + { 0x0020038C, 0x00060793 }, + { 0x00200390, 0xFCF41B23 }, + { 0x00200394, 0xFE0407A3 }, + { 0x00200398, 0x0400006F }, + { 0x0020039C, 0xFEF44783 }, + { 0x002003A0, 0x00279793 }, + { 0x002003A4, 0xFDC42703 }, + { 0x002003A8, 0x00F70733 }, + { 0x002003AC, 0xFEF44783 }, + { 0x002003B0, 0x00279793 }, + { 0x002003B4, 0x00078693 }, + { 0x002003B8, 0xFD842783 }, + { 0x002003BC, 0x00F687B3 }, + { 0x002003C0, 0x00078593 }, + { 0x002003C4, 0x00070513 }, + { 0x002003C8, 0xF71FF0EF }, + { 0x002003CC, 0xFEF44783 }, + { 0x002003D0, 0x00178793 }, + { 0x002003D4, 0xFEF407A3 }, + { 0x002003D8, 0xFEF44783 }, + { 0x002003DC, 0x01079793 }, + { 0x002003E0, 0x0107D793 }, + { 0x002003E4, 0xFD645703 }, + { 0x002003E8, 0xFAE7EAE3 }, + { 0x002003EC, 0x00000013 }, + { 0x002003F0, 0x00000013 }, + { 0x002003F4, 0x02C12083 }, + { 0x002003F8, 0x02812403 }, + { 0x002003FC, 0x03010113 }, + { 0x00200400, 0x00008067 }, + { 0x00200404, 0xFF010113 }, + { 0x00200408, 0x00112623 }, + { 0x0020040C, 0x00812423 }, + { 0x00200410, 0x01010413 }, + { 0x00200414, 0x002047B7 }, + { 0x00200418, 0x00078793 }, + { 0x0020041C, 0x30579073 }, + { 0x00200420, 0x47C000EF }, + { 0x00200424, 0x388000EF }, + { 0x00200428, 0x4CC000EF }, + { 0x0020042C, 0x00000013 }, + { 0x00200430, 0x00C12083 }, + { 0x00200434, 0x00812403 }, + { 0x00200438, 0x01010113 }, + { 0x0020043C, 0x00008067 }, + { 0x00200440, 0xFF010113 }, + { 0x00200444, 0x00112623 }, + { 0x00200448, 0x00812423 }, + { 0x0020044C, 0x01010413 }, + { 0x00200450, 0x00100593 }, + { 0x00200454, 0x000097B7 }, + { 0x00200458, 0x02878513 }, + { 0x0020045C, 0xEA5FF0EF }, + { 0x00200460, 0x00500593 }, + { 0x00200464, 0x000097B7 }, + { 0x00200468, 0x05478513 }, + { 0x0020046C, 0xE95FF0EF }, + { 0x00200470, 0x3E800593 }, + { 0x00200474, 0x000097B7 }, + { 0x00200478, 0x05878513 }, + { 0x0020047C, 0xE85FF0EF }, + { 0x00200480, 0x00000013 }, + { 0x00200484, 0x00C12083 }, + { 0x00200488, 0x00812403 }, + { 0x0020048C, 0x01010113 }, + { 0x00200490, 0x00008067 }, + { 0x00200494, 0xFE010113 }, + { 0x00200498, 0x00112E23 }, + { 0x0020049C, 0x00812C23 }, + { 0x002004A0, 0x02010413 }, + { 0x002004A4, 0xF61FF0EF }, + { 0x002004A8, 0xF99FF0EF }, + { 0x002004AC, 0x003007B7 }, + { 0x002004B0, 0x08078513 }, + { 0x002004B4, 0x46C000EF }, + { 0x002004B8, 0x003007B7 }, + { 0x002004BC, 0x08078793 }, + { 0x002004C0, 0x03200713 }, + { 0x002004C4, 0x00E79123 }, + { 0x002004C8, 0x003007B7 }, + { 0x002004CC, 0x08078793 }, + { 0x002004D0, 0x03200713 }, + { 0x002004D4, 0x00E79223 }, + { 0x002004D8, 0x003007B7 }, + { 0x002004DC, 0x08078793 }, + { 0x002004E0, 0x02000713 }, + { 0x002004E4, 0x02E7AC23 }, + { 0x002004E8, 0x003007B7 }, + { 0x002004EC, 0x08078793 }, + { 0x002004F0, 0x01600713 }, + { 0x002004F4, 0x04E7A023 }, + { 0x002004F8, 0x003007B7 }, + { 0x002004FC, 0x08078793 }, + { 0x00200500, 0x02000713 }, + { 0x00200504, 0x04E78223 }, + { 0x00200508, 0x003007B7 }, + { 0x0020050C, 0x08078793 }, + { 0x00200510, 0x01400713 }, + { 0x00200514, 0x04E782A3 }, + { 0x00200518, 0x00300613 }, + { 0x0020051C, 0x00000593 }, + { 0x00200520, 0x00100513 }, + { 0x00200524, 0x5FD020EF }, + { 0x00200528, 0x00050713 }, + { 0x0020052C, 0x003007B7 }, + { 0x00200530, 0x00E7AC23 }, + { 0x00200534, 0xFE042423 }, + { 0x00200538, 0xFE840793 }, + { 0x0020053C, 0x00400713 }, + { 0x00200540, 0x00000693 }, + { 0x00200544, 0x20000613 }, + { 0x00200548, 0x002055B7 }, + { 0x0020054C, 0xDA858593 }, + { 0x00200550, 0x00200537 }, + { 0x00200554, 0x57850513 }, + { 0x00200558, 0x650010EF }, + { 0x0020055C, 0xFEA42623 }, + { 0x00200560, 0xFEC42703 }, + { 0x00200564, 0x00100793 }, + { 0x00200568, 0x00F70463 }, + { 0x0020056C, 0x0BC000EF }, + { 0x00200570, 0x2E9010EF }, + { 0x00200574, 0x0000006F }, + { 0x00200578, 0xF9010113 }, + { 0x0020057C, 0x06112623 }, + { 0x00200580, 0x06812423 }, + { 0x00200584, 0x07010413 }, + { 0x00200588, 0xF8A42E23 }, + { 0x0020058C, 0x274000EF }, + { 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0x00204B2C, 0x00803433 }, + { 0x00204B30, 0x0086E7B3 }, + { 0x00204B34, 0x0077F713 }, + { 0x00204B38, 0x00070A63 }, + { 0x00204B3C, 0x00F7F713 }, + { 0x00204B40, 0x00400693 }, + { 0x00204B44, 0x00D70463 }, + { 0x00204B48, 0x00478793 }, + { 0x00204B4C, 0x04000737 }, + { 0x00204B50, 0x00E7F733 }, + { 0x00204B54, 0x0037D793 }, + { 0x00204B58, 0xE80700E3 }, + { 0x00204B5C, 0x00000793 }, + { 0x00204B60, 0x00100713 }, + { 0x00204B64, 0xE75FF06F }, + { 0x00204B68, 0x004007B7 }, + { 0x00204B6C, 0x0FF00713 }, + { 0x00204B70, 0x00000513 }, + { 0x00204B74, 0xE65FF06F }, + { 0x00204B78, 0x00000793 }, + { 0x00204B7C, 0x0FF00713 }, + { 0x00204B80, 0xE59FF06F }, + { 0x00204B84, 0x01755793 }, + { 0x00204B88, 0x00800637 }, + { 0x00204B8C, 0xFFF60693 }, + { 0x00204B90, 0x0FF7F793 }, + { 0x00204B94, 0x07E00593 }, + { 0x00204B98, 0x00A6F6B3 }, + { 0x00204B9C, 0x01F55713 }, + { 0x00204BA0, 0x00000513 }, + { 0x00204BA4, 0x02F5DE63 }, + { 0x00204BA8, 0x02071C63 }, + { 0x00204BAC, 0x09E00713 }, + { 0x00204BB0, 0xFFF00513 }, + { 0x00204BB4, 0x02F74663 }, + { 0x00204BB8, 0x09500713 }, + { 0x00204BBC, 0x00C6E533 }, + { 0x00204BC0, 0x00F75863 }, + { 0x00204BC4, 0xF6A78793 }, + { 0x00204BC8, 0x00F51533 }, + { 0x00204BCC, 0x00008067 }, + { 0x00204BD0, 0x09600713 }, + { 0x00204BD4, 0x40F707B3 }, + { 0x00204BD8, 0x00F55533 }, + { 0x00204BDC, 0x00008067 }, + { 0x00204BE0, 0x00008067 }, + { 0x00204BE4, 0xFF010113 }, + { 0x00204BE8, 0x00812423 }, + { 0x00204BEC, 0x00112623 }, + { 0x00204BF0, 0x00050413 }, + { 0x00204BF4, 0x00000793 }, + { 0x00204BF8, 0x02050463 }, + { 0x00204BFC, 0xDE0FF0EF }, + { 0x00204C00, 0x09E00793 }, + { 0x00204C04, 0x40A787B3 }, + { 0x00204C08, 0x09600713 }, + { 0x00204C0C, 0x02F74A63 }, + { 0x00204C10, 0x00800713 }, + { 0x00204C14, 0x0AE50863 }, + { 0x00204C18, 0xFF850513 }, + { 0x00204C1C, 0x00A41433 }, + { 0x00204C20, 0x00941413 }, + { 0x00204C24, 0x00945413 }, + { 0x00204C28, 0x01779513 }, + { 0x00204C2C, 0x00C12083 }, + { 0x00204C30, 0x00856533 }, + { 0x00204C34, 0x00812403 }, + { 0x00204C38, 0x01010113 }, + { 0x00204C3C, 0x00008067 }, + { 0x00204C40, 0x09900713 }, + { 0x00204C44, 0x06F75663 }, + { 0x00204C48, 0x01B50713 }, + { 0x00204C4C, 0x00500693 }, + { 0x00204C50, 0x00E41733 }, + { 0x00204C54, 0x40A686B3 }, + { 0x00204C58, 0x00E03733 }, + { 0x00204C5C, 0x00D45433 }, + { 0x00204C60, 0x00876433 }, + { 0x00204C64, 0xFC000737 }, + { 0x00204C68, 0xFFF70713 }, + { 0x00204C6C, 0x00747693 }, + { 0x00204C70, 0x00E47733 }, + { 0x00204C74, 0x00068A63 }, + { 0x00204C78, 0x00F47413 }, + { 0x00204C7C, 0x00400693 }, + { 0x00204C80, 0x00D40463 }, + { 0x00204C84, 0x00470713 }, + { 0x00204C88, 0x040006B7 }, + { 0x00204C8C, 0x00D776B3 }, + { 0x00204C90, 0x00068C63 }, + { 0x00204C94, 0xFC0007B7 }, + { 0x00204C98, 0xFFF78793 }, + { 0x00204C9C, 0x00F77733 }, + { 0x00204CA0, 0x09F00793 }, + { 0x00204CA4, 0x40A787B3 }, + { 0x00204CA8, 0x00375413 }, + { 0x00204CAC, 0xF75FF06F }, + { 0x00204CB0, 0x00500693 }, + { 0x00204CB4, 0xFFB50713 }, + { 0x00204CB8, 0xFAD506E3 }, + { 0x00204CBC, 0x00E41433 }, + { 0x00204CC0, 0xFA5FF06F }, + { 0x00204CC4, 0x09600793 }, + { 0x00204CC8, 0xF59FF06F }, + { 0x00204CCC, 0x00F00313 }, + { 0x00204CD0, 0x00050713 }, + { 0x00204CD4, 0x02C37E63 }, + { 0x00204CD8, 0x00F77793 }, + { 0x00204CDC, 0x0A079063 }, + { 0x00204CE0, 0x08059263 }, + { 0x00204CE4, 0xFF067693 }, + { 0x00204CE8, 0x00F67613 }, + { 0x00204CEC, 0x00E686B3 }, + { 0x00204CF0, 0x00B72023 }, + { 0x00204CF4, 0x00B72223 }, + { 0x00204CF8, 0x00B72423 }, + { 0x00204CFC, 0x00B72623 }, + { 0x00204D00, 0x01070713 }, + { 0x00204D04, 0xFED766E3 }, + { 0x00204D08, 0x00061463 }, + { 0x00204D0C, 0x00008067 }, + { 0x00204D10, 0x40C306B3 }, + { 0x00204D14, 0x00269693 }, + { 0x00204D18, 0x00000297 }, + { 0x00204D1C, 0x005686B3 }, + { 0x00204D20, 0x00C68067 }, + { 0x00204D24, 0x00B70723 }, + { 0x00204D28, 0x00B706A3 }, + { 0x00204D2C, 0x00B70623 }, + { 0x00204D30, 0x00B705A3 }, + { 0x00204D34, 0x00B70523 }, + { 0x00204D38, 0x00B704A3 }, + { 0x00204D3C, 0x00B70423 }, + { 0x00204D40, 0x00B703A3 }, + { 0x00204D44, 0x00B70323 }, + { 0x00204D48, 0x00B702A3 }, + { 0x00204D4C, 0x00B70223 }, + { 0x00204D50, 0x00B701A3 }, + { 0x00204D54, 0x00B70123 }, + { 0x00204D58, 0x00B700A3 }, + { 0x00204D5C, 0x00B70023 }, + { 0x00204D60, 0x00008067 }, + { 0x00204D64, 0x0FF5F593 }, + { 0x00204D68, 0x00859693 }, + { 0x00204D6C, 0x00D5E5B3 }, + { 0x00204D70, 0x01059693 }, + { 0x00204D74, 0x00D5E5B3 }, + { 0x00204D78, 0xF6DFF06F }, + { 0x00204D7C, 0x00279693 }, + { 0x00204D80, 0x00000297 }, + { 0x00204D84, 0x005686B3 }, + { 0x00204D88, 0x00008293 }, + { 0x00204D8C, 0xFA0680E7 }, + { 0x00204D90, 0x00028093 }, + { 0x00204D94, 0xFF078793 }, + { 0x00204D98, 0x40F70733 }, + { 0x00204D9C, 0x00F60633 }, + { 0x00204DA0, 0xF6C378E3 }, + { 0x00204DA4, 0xF3DFF06F }, + { 0x00204DA8, 0x5464654C }, + { 0x00204DAC, 0x6B636172 }, + { 0x00204DB0, 0x00676E69 }, + { 0x00204DB4, 0x002009F0 }, + { 0x00204DB8, 0x00200A84 }, + { 0x00204DBC, 0x00200B18 }, + { 0x00204DC0, 0x00200BAC }, + { 0x00204DC4, 0x00200C40 }, + { 0x00204DC8, 0x00200CD4 }, + { 0x00204DCC, 0x00200D68 }, + { 0x00204DD0, 0x00200DFC }, + { 0x00204DD4, 0x00200E90 }, + { 0x00204DD8, 0x00200F24 }, + { 0x00204DDC, 0x00200FB8 }, + { 0x00204DE0, 0x0020104C }, + { 0x00204DE4, 0x002010E0 }, + { 0x00204DE8, 0x00201174 }, + { 0x00204DEC, 0x00201208 }, + { 0x00204DF0, 0x0020129C }, + { 0x00204DF4, 0x3D7A43FE }, + { 0x00204DF8, 0x4197999A }, + { 0x00204DFC, 0x437F0000 }, + { 0x00204E00, 0x454C4449 }, + { 0x00204E04, 0x00000000 }, + { 0x00204E08, 0x02020100 }, + { 0x00204E0C, 0x03030303 }, + { 0x00204E10, 0x04040404 }, + { 0x00204E14, 0x04040404 }, + { 0x00204E18, 0x05050505 }, + { 0x00204E1C, 0x05050505 }, + { 0x00204E20, 0x05050505 }, + { 0x00204E24, 0x05050505 }, + { 0x00204E28, 0x06060606 }, + { 0x00204E2C, 0x06060606 }, + { 0x00204E30, 0x06060606 }, + { 0x00204E34, 0x06060606 }, + { 0x00204E38, 0x06060606 }, + { 0x00204E3C, 0x06060606 }, + { 0x00204E40, 0x06060606 }, + { 0x00204E44, 0x06060606 }, + { 0x00204E48, 0x07070707 }, + { 0x00204E4C, 0x07070707 }, + { 0x00204E50, 0x07070707 }, + { 0x00204E54, 0x07070707 }, + { 0x00204E58, 0x07070707 }, + { 0x00204E5C, 0x07070707 }, + { 0x00204E60, 0x07070707 }, + { 0x00204E64, 0x07070707 }, + { 0x00204E68, 0x07070707 }, + { 0x00204E6C, 0x07070707 }, + { 0x00204E70, 0x07070707 }, + { 0x00204E74, 0x07070707 }, + { 0x00204E78, 0x07070707 }, + { 0x00204E7C, 0x07070707 }, + { 0x00204E80, 0x07070707 }, + { 0x00204E84, 0x07070707 }, + { 0x00204E88, 0x08080808 }, + { 0x00204E8C, 0x08080808 }, + { 0x00204E90, 0x08080808 }, + { 0x00204E94, 0x08080808 }, + { 0x00204E98, 0x08080808 }, + { 0x00204E9C, 0x08080808 }, + { 0x00204EA0, 0x08080808 }, + { 0x00204EA4, 0x08080808 }, + { 0x00204EA8, 0x08080808 }, + { 0x00204EAC, 0x08080808 }, + { 0x00204EB0, 0x08080808 }, + { 0x00204EB4, 0x08080808 }, + { 0x00204EB8, 0x08080808 }, + { 0x00204EBC, 0x08080808 }, + { 0x00204EC0, 0x08080808 }, + { 0x00204EC4, 0x08080808 }, + { 0x00204EC8, 0x08080808 }, + { 0x00204ECC, 0x08080808 }, + { 0x00204ED0, 0x08080808 }, + { 0x00204ED4, 0x08080808 }, + { 0x00204ED8, 0x08080808 }, + { 0x00204EDC, 0x08080808 }, + { 0x00204EE0, 0x08080808 }, + { 0x00204EE4, 0x08080808 }, + { 0x00204EE8, 0x08080808 }, + { 0x00204EEC, 0x08080808 }, + { 0x00204EF0, 0x08080808 }, + { 0x00204EF4, 0x08080808 }, + { 0x00204EF8, 0x08080808 }, + { 0x00204EFC, 0x08080808 }, + { 0x00204F00, 0x08080808 }, + { 0x00204F04, 0x08080808 }, + { 0x00204F08, 0x00000006 }, + { 0x00204F0C, 0x00300068 }, + { 0x00204F10, 0xAAAAAAAA }, + { 0x00204F14, 0x00300008 }, + { 0x00204F18, 0x00308000 }, + { 0x00204F1C, 0x00002710 }, + +}; + +/* Size of LED tracking application */ +const size_t fw_led_tracking_size = (sizeof(fw_led_tracking)/sizeof(Firmware)); + diff --git a/src/drivers/genx320/src/genx320_issd_cpi.c b/src/drivers/genx320/src/genx320_issd_cpi.c new file mode 100644 index 000000000..5146fca85 --- /dev/null +++ b/src/drivers/genx320/src/genx320_issd_cpi.c @@ -0,0 +1,161 @@ +/********************************************************************************************************************** + * Copyright (c) Prophesee S.A. * + * * + * Licensed under the Apache License, Version 2.0 (the "License"); * + * you may not use this file except in compliance with the License. * + * You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 * + * Unless required by applicable law or agreed to in writing, software distributed under the License is distributed * + * on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * + * See the License for the specific language governing permissions and limitations under the License. * + * * + * This is an automatically generated file * + **********************************************************************************************************************/ + +#ifndef __ISSD_CPI_H +#define __ISSD_CPI_H + +#include "psee_issd.h" + +static const struct reg_op dcmi_init_seq[] = { + {.op = WRITE, .args = {.write = {0x9008UL, 0x00000320}} }, // saphir/ro/time_base_ctrl Write fields: time_base_enable + {.op = WRITE, .args = {.write = {0x9008UL, 0x00010320}} }, // saphir/ro/time_base_ctrl Write fields: time_base_srst + {.op = WRITE, .args = {.write = {0x020CUL, 0x00000015}} }, // saphir/rtc_clk_ctrl Write fields: rtc_clk_en|rtc_clk_div + {.op = WRITE, .args = {.write = {0x0204UL, 0x00004D6C}} }, // saphir/sys_clk_ctrl Write fields: sys_clk_auto_mode + {.op = WRITE, .args = {.write = {0x0210UL, 0x00000C00}} }, // saphir/evt_icn_clk_ctrl Write fields: ro_clk_en|esp_clk_en + {.op = WRITE, .args = {.write = {0x9008UL, 0x000000A0}} }, // saphir/ro/time_base_ctrl Write fields: us_counter_max + {.op = WRITE, .args = {.write = {0x00B8UL, 0x00000040}} }, // saphir/sram_initn Write fields: cpi_initn + {.op = WRITE, .args = {.write = {0x00C0UL, 0x00000078}} }, // saphir/sram_pd1 Write fields: cpi_pd + {.op = WRITE, .args = {.write = {0x800CUL, 0x0001040A}} }, // saphir/cpi/packet_time_control Write fields: packet_period + {.op = WRITE, .args = {.write = {0x8008UL, 0x00000400}} }, // saphir/cpi/packet_size_control Write fields: packet_size + {.op = WRITE, .args = {.write = {0x8010UL, 0x00000140}} }, // saphir/cpi/frame_size_control Write fields: frame_size + {.op = WRITE, .args = {.write = {0x8000UL, 0x0001EFA1}} }, // saphir/cpi/pipeline_control Write fields: enable|clk_out_en|clk_control_inversion|packet_fixed_size_enable|packet_fixed_rate_enable|frame_fixed_size_enable|output_if_mode|output_data_format|output_width|clk_out_gating_enable + {.op = WRITE, .args = {.write = {0x8000UL, 0x0001FFA1}} }, // saphir/cpi/pipeline_control Write fields: clk_out_gating_enable + {.op = WRITE, .args = {.write = {0xE000UL, 0x00000005}} }, // saphir/nfl/pipeline_control Write fields: enable|bypass + {.op = WRITE, .args = {.write = {0xC000UL, 0x00000005}} }, // saphir/afk/pipeline_control Write fields: enable|bypass + {.op = WRITE, .args = {.write = {0xD000UL, 0x00000005}} }, // saphir/stc/pipeline_control Write fields: enable|bypass + {.op = WRITE, .args = {.write = {0x6000UL, 0x00000005}} }, // saphir/erc/pipeline_control Write fields: enable|bypass + {.op = WRITE, .args = {.write = {0x60A0UL, 0x00000000}} }, // saphir/erc/delay_fifo_flush_and_bypass Write fields: en + {.op = WRITE, .args = {.write = {0x704CUL, 0x000007D0}} }, // saphir/edf/output_interface_control + {.op = WRITE, .args = {.write = {0x7100UL, 0x00010280}} }, // saphir/edf/external_output_adapter Write fields: qos_timeout|atomic_qos_mode + {.op = WRITE, .args = {.write = {0x7044UL, 0x00000002}} }, // saphir/edf/control Write fields: format|endianness + {.op = WRITE, .args = {.write = {0x7048UL, 0x00000000}} }, // saphir/edf/event_injection Write fields: sysmon_end_of_frame_en + {.op = WRITE, .args = {.write = {0x7000UL, 0x00000001}} }, // saphir/edf/pipeline_control Write fields: enable|bypass + {.op = WRITE, .args = {.write = {0x9008UL, 0x000000A4}} }, // saphir/ro/time_base_ctrl Write fields: time_base_mode|external_mode|external_mode_enable|us_counter_max + {.op = WRITE, .args = {.write = {0x9000UL, 0x00000200}} }, // saphir/ro/readout_ctrl Write fields: ro_digital_pipe_en + {.op = WRITE, .args = {.write = {0x001CUL, 0x00000004}} }, // saphir/dig_soft_reset Write fields: analog_rstn + {.op = WRITE, .args = {.write = {0xA000UL, 0x00000406}} }, // saphir/ldo/bg Write fields: bg_en|bg_buf_en|bg_bypass|bg_chk|bg_adj + {.op = WRITE, .args = {.write = {0xA01CUL, 0x0007641F}} }, // saphir/ldo/pmu Write fields: pmu_icgm_en|pmu_v2i_en|pmu_v2i_cal_en|mipi_v2i_en + {.op = WRITE, .args = {.write = {0xB030UL, 0x00000010}} }, // saphir/mipi_csi/power Write fields: cur_en + {.op = WRITE, .args = {.write = {0x004CUL, 0x00204E22}} }, // saphir/adc_control Write fields: adc_clk_en + {.op = DELAY, .args = {.delay = {1000}} }, // us + {.op = WRITE, .args = {.write = {0xA01CUL, 0x0007E41F}} }, // saphir/ldo/pmu Write fields: pmu_v2i_en|pmu_v2i_adj|pmu_v2i_cal_en + {.op = DELAY, .args = {.delay = {1000}} }, // us + {.op = READ, .args = {.read = {0xA01CUL, 0x0014E41F}} }, // saphir/ldo/pmu Read fields: pmu_v2i_cal_done_dyn + {.op = WRITE, .args = {.write = {0x004CUL, 0x00204E20}} }, // saphir/adc_control Write fields: adc_clk_en + {.op = WRITE, .args = {.write = {0x1218UL, 0x00000111}} }, // saphir/bias/bgen_cgm_sub Write fields: bias_cgm_sub_en + {.op = WRITE, .args = {.write = {0x1218UL, 0x00000111}} }, // saphir/bias/bgen_cgm_sub Write fields: bias_cgm_sub_trim + {.op = WRITE, .args = {.write = {0x1218UL, 0x00000111}} }, // saphir/bias/bgen_cgm_sub Write fields: bias_cgm_sub_slp_ctl + {.op = DELAY, .args = {.delay = {1000}} }, // us + {.op = WRITE, .args = {.write = {0x1220UL, 0x00000001}} }, // saphir/bias/bgen_cc_en Write fields: bias_cc_hv_en + {.op = DELAY, .args = {.delay = {1000}} }, // us + {.op = WRITE, .args = {.write = {0xA008UL, 0x00008085}} }, // saphir/ldo/ldo_lv Write fields: ldo_lv_en|ldo_lv_climit_en|ldo_lv_climit|ldo_lv_ind_en|ldo_lv_adj|ldo_lv_ind_vth_ok|ldo_lv_ind_vth_bo + {.op = WRITE, .args = {.write = {0xA004UL, 0x00008025}} }, // saphir/ldo/ldo_hv Write fields: ldo_hv_en|ldo_hv_climit_en|ldo_hv_climit|ldo_hv_ind_en|ldo_hv_adj|ldo_hv_ind_vth_ok|ldo_hv_ind_vth_bo + {.op = DELAY, .args = {.delay = {1000}} }, // us + {.op = WRITE, .args = {.write = {0x0070UL, 0x0000055F}} }, // saphir/cp_ctrl Write fields: cp_en|cp_clk_en|cp_adj|cp_cfly|cp_mphase|cp_clk_divider + {.op = DELAY, .args = {.delay = {1000}} }, // us + {.op = WRITE, .args = {.write = {0x1220UL, 0x00000003}} }, // saphir/bias/bgen_cc_en Write fields: bias_cc_lv_en + {.op = DELAY, .args = {.delay = {1000}} }, // us + {.op = WRITE, .args = {.write = {0x1208UL, 0x00000030}} }, // saphir/bias/bgen_ctrl Write fields: bias_rstn_hv|bias_rstn_lv + {.op = DELAY, .args = {.delay = {1000}} }, // us + {.op = WRITE, .args = {.write = {0x0000UL, 0x00000420}} }, // saphir/roi_ctrl Write fields: roi_td_en|roi_td_shadow_trigger + {.op = WRITE, .args = {.write = {0x0000UL, 0x00000400}} }, // saphir/roi_ctrl Write fields: roi_td_en|roi_td_shadow_trigger + {.op = WRITE, .args = {.write = {0x0000UL, 0x00000802}} }, // saphir/roi_ctrl Write fields: roi_td_en|px_sw_rstn|px_roi_halt_programming + {.op = WRITE, .args = {.write = {0x0000UL, 0x00000822}} }, // saphir/roi_ctrl Write fields: roi_td_en|roi_td_shadow_trigger + {.op = WRITE, .args = {.write = {0x0000UL, 0x00000802}} }, // saphir/roi_ctrl Write fields: roi_td_en|roi_td_shadow_trigger + {.op = WRITE, .args = {.write = {0x3000UL, 0x00000000}} }, // saphir/roi/td_roi_y00 + {.op = WRITE, .args = {.write = {0x3004UL, 0x00000000}} }, // saphir/roi/td_roi_y01 + {.op = WRITE, .args = {.write = {0x3008UL, 0x00000000}} }, // saphir/roi/td_roi_y02 + {.op = WRITE, .args = {.write = {0x300CUL, 0x00000000}} }, // saphir/roi/td_roi_y03 + {.op = WRITE, .args = {.write = {0x3010UL, 0x00000000}} }, // saphir/roi/td_roi_y04 + {.op = WRITE, .args = {.write = {0x3014UL, 0x00000000}} }, // saphir/roi/td_roi_y05 + {.op = WRITE, .args = {.write = {0x3018UL, 0x00000000}} }, // saphir/roi/td_roi_y06 + {.op = WRITE, .args = {.write = {0x301CUL, 0x00000000}} }, // saphir/roi/td_roi_y07 + {.op = WRITE, .args = {.write = {0x3020UL, 0x00000000}} }, // saphir/roi/td_roi_y08 + {.op = WRITE, .args = {.write = {0x3024UL, 0x00000000}} }, // saphir/roi/td_roi_y09 + {.op = WRITE, .args = {.write = {0x3028UL, 0x00000000}} }, // saphir/roi/td_roi_y10 + {.op = WRITE, .args = {.write = {0x0000UL, 0x00000822}} }, // saphir/roi_ctrl Write fields: roi_td_shadow_trigger + {.op = WRITE, .args = {.write = {0x0000UL, 0x00000802}} }, // saphir/roi_ctrl Write fields: roi_td_shadow_trigger + {.op = WRITE, .args = {.write = {0x2000UL, 0x00000000}} }, // saphir/roi/td_roi_x00 Write fields: effective + {.op = WRITE, .args = {.write = {0x2004UL, 0x00000000}} }, // saphir/roi/td_roi_x01 Write fields: effective + {.op = WRITE, .args = {.write = {0x2008UL, 0x00000000}} }, // saphir/roi/td_roi_x02 Write fields: effective + {.op = WRITE, .args = {.write = {0x200CUL, 0x00000000}} }, // saphir/roi/td_roi_x03 Write fields: effective + {.op = WRITE, .args = {.write = {0x2010UL, 0x00000000}} }, // saphir/roi/td_roi_x04 Write fields: effective + {.op = WRITE, .args = {.write = {0x2014UL, 0x00000000}} }, // saphir/roi/td_roi_x05 Write fields: effective + {.op = WRITE, .args = {.write = {0x2018UL, 0x00000000}} }, // saphir/roi/td_roi_x06 Write fields: effective + {.op = WRITE, .args = {.write = {0x201CUL, 0x00000000}} }, // saphir/roi/td_roi_x07 Write fields: effective + {.op = WRITE, .args = {.write = {0x2020UL, 0x00000000}} }, // saphir/roi/td_roi_x08 Write fields: effective + {.op = WRITE, .args = {.write = {0x2024UL, 0x00000000}} }, // saphir/roi/td_roi_x09 Write fields: effective + {.op = WRITE, .args = {.write = {0x3000UL, 0xFFFFFFFF}} }, // saphir/roi/td_roi_y00 Write fields: effective + {.op = WRITE, .args = {.write = {0x3004UL, 0xFFFFFFFF}} }, // saphir/roi/td_roi_y01 Write fields: effective + {.op = WRITE, .args = {.write = {0x3008UL, 0xFFFFFFFF}} }, // saphir/roi/td_roi_y02 Write fields: effective + {.op = WRITE, .args = {.write = {0x300CUL, 0xFFFFFFFF}} }, // saphir/roi/td_roi_y03 Write fields: effective + {.op = WRITE, .args = {.write = {0x3010UL, 0xFFFFFFFF}} }, // saphir/roi/td_roi_y04 Write fields: effective + {.op = WRITE, .args = {.write = {0x3014UL, 0xFFFFFFFF}} }, // saphir/roi/td_roi_y05 Write fields: effective + {.op = WRITE, .args = {.write = {0x3018UL, 0xFFFFFFFF}} }, // saphir/roi/td_roi_y06 Write fields: effective + {.op = WRITE, .args = {.write = {0x301CUL, 0xFFFFFFFF}} }, // saphir/roi/td_roi_y07 Write fields: effective + {.op = WRITE, .args = {.write = {0x3020UL, 0xFFFFFFFF}} }, // saphir/roi/td_roi_y08 Write fields: effective + {.op = WRITE, .args = {.write = {0x3024UL, 0xFFFFFFFF}} }, // saphir/roi/td_roi_y09 Write fields: effective + {.op = WRITE, .args = {.write = {0x0000UL, 0x00000822}} }, // saphir/roi_ctrl Write fields: roi_td_shadow_trigger + {.op = WRITE, .args = {.write = {0x0000UL, 0x00000802}} }, // saphir/roi_ctrl Write fields: roi_td_shadow_trigger + {.op = DELAY, .args = {.delay = {1000}} }, // us + {.op = WRITE, .args = {.write = {0x1000UL, 0x0301003D}} }, // saphir/bias/bias_pr_hv0 Write fields: bias_en|bias_ctl + {.op = WRITE, .args = {.write = {0x1004UL, 0x03010027}} }, // saphir/bias/bias_fo_hv0 Write fields: bias_en|bias_ctl + {.op = WRITE, .args = {.write = {0x1008UL, 0x0101003F}} }, // saphir/bias/bias_fes_hv0 Write fields: bias_en|bias_ctl + {.op = WRITE, .args = {.write = {0x1100UL, 0x03010000}} }, // saphir/bias/bias_hpf_lv0 Write fields: bias_en|bias_ctl + {.op = WRITE, .args = {.write = {0x1104UL, 0x01090018}} }, // saphir/bias/bias_diff_on_lv0 Write fields: bias_en|bias_ctl + {.op = WRITE, .args = {.write = {0x1108UL, 0x01010033}} }, // saphir/bias/bias_diff_lv0 Write fields: bias_en|bias_ctl + {.op = WRITE, .args = {.write = {0x110CUL, 0x01090013}} }, // saphir/bias/bias_diff_off_lv0 Write fields: bias_en|bias_ctl + {.op = WRITE, .args = {.write = {0x1110UL, 0x01010039}} }, // saphir/bias/bias_inv_lv0 Write fields: bias_en|bias_ctl + {.op = WRITE, .args = {.write = {0x1114UL, 0x03010052}} }, // saphir/bias/bias_refr_lv0 Write fields: bias_en|bias_ctl + {.op = WRITE, .args = {.write = {0x1118UL, 0x03010042}} }, // saphir/bias/bias_invp_lv0 Write fields: bias_en|bias_ctl + {.op = WRITE, .args = {.write = {0x111CUL, 0x03000074}} }, // saphir/bias/bias_req_pu_lv0 Write fields: bias_en|bias_ctl + {.op = WRITE, .args = {.write = {0x1120UL, 0x010000A4}} }, // saphir/bias/bias_sm_pdy_lv0 Write fields: bias_en|bias_ctl + {.op = WRITE, .args = {.write = {0x1208UL, 0x00000035}} }, // saphir/bias/bgen_ctrl Write fields: burst_transfer_hv_bank_0|burst_transfer_lv_bank_0 + {.op = WRITE, .args = {.write = {0x0000UL, 0x00000802}} } // saphir/roi_ctrl Write fields: roi_td_en +}; +static const struct reg_op dcmi_start_seq[] = { + {.op = WRITE, .args = {.write = {0x9028UL, 0x00000000}} }, // saphir/ro/ro_lp_ctrl Write fields: lp_output_disable + {.op = WRITE, .args = {.write = {0x9008UL, 0x000000A5}} }, // saphir/ro/time_base_ctrl Write fields: time_base_enable + {.op = DELAY, .args = {.delay = {1000}} }, // us + {.op = WRITE, .args = {.write = {0x002CUL, 0x0022C724}} }, // saphir/ro_td_ctrl Write fields: ro_td_ack_y_rstn|ro_td_arb_y_rstn|ro_td_addr_y_rstn|ro_td_sendreq_y_rstn + {.op = WRITE, .args = {.write = {0x0000UL, 0x00000C02}} }, // saphir/roi_ctrl Write fields: roi_td_en|px_sw_rstn + {.op = DELAY, .args = {.delay = {1000}} } // us +}; +static const struct reg_op dcmi_stop_seq[] = { + {.op = WRITE, .args = {.write = {0x0000UL, 0x00000802}} }, // saphir/roi_ctrl Write fields: roi_td_en|px_sw_rstn + {.op = WRITE, .args = {.write = {0x002CUL, 0x00200624}} }, // saphir/ro_td_ctrl Write fields: ro_td_ack_y_rstn|ro_td_arb_y_rstn|ro_td_addr_y_rstn|ro_td_sendreq_y_rstn + {.op = WRITE, .args = {.write = {0x9028UL, 0x00000002}} }, // saphir/ro/ro_lp_ctrl Write fields: lp_output_disable|lp_keep_th + {.op = DELAY, .args = {.delay = {1000}} }, // us + {.op = WRITE, .args = {.write = {0x9008UL, 0x000000A4}} }, // saphir/ro/time_base_ctrl Write fields: time_base_enable + {.op = WRITE, .args = {.write = {0x8000UL, 0x0001FFA2}} }, // saphir/cpi/pipeline_control Write fields: enable|drop_nbackpressure|hot_disable_enable + {.op = READ, .args = {.read = {0x8004UL, 0x00000002}} }, // saphir/cpi/pipeline_status Read fields: busy + {.op = DELAY, .args = {.delay = {1000}} } // us +}; +static const struct reg_op dcmi_destroy_seq[] = { +}; +const struct issd dcmi_evt = { + .init = { + .ops = dcmi_init_seq, + .len = ARRAY_SIZE(dcmi_init_seq)}, + .start = { + .ops = dcmi_start_seq, + .len = ARRAY_SIZE(dcmi_start_seq)}, + .stop = { + .ops = dcmi_stop_seq, + .len = ARRAY_SIZE(dcmi_stop_seq)}, + .destroy = { + .ops = dcmi_destroy_seq, + .len = ARRAY_SIZE(dcmi_destroy_seq)}, +}; + +#endif diff --git a/src/drivers/genx320/src/psee_genx320.c b/src/drivers/genx320/src/psee_genx320.c new file mode 100644 index 000000000..c4f8dc707 --- /dev/null +++ b/src/drivers/genx320/src/psee_genx320.c @@ -0,0 +1,1469 @@ +/** + ****************************************************************************** + * @file genx320.c + * @author PSEE Applications Team + * @brief GenX320 driver. + * This file provides functions to manage the following + * functionalities of the GenX320 sensor: + * + Sensor Register Manipulation + * + Sensor Bring Up + * + Operating Mode Control + * + Firmware Flashing + * + Mailbox Communication + * + ROI Access + * + RISC-V Debugger + * + Read Statistics Register + * + Activity Map Configuration + * + AFK Configuration + * + ****************************************************************************** + * @attention + * Copyright (c) Prophesee S.A. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 + * Unless required by applicable law or agreed to in writing, software distributed under the License is distributed + * on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "psee_genx320.h" +#include "sensor.h" +#include "py/mphal.h" + +/** @defgroup GenX320 - Sensor Register Manipulation Functions + * @brief Sensor Register Manipulation Functions + * +@verbatim + =============================================================================== + ##### Sensor Register Manipulation Functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) To perform single register access + (+) To perform sequential register access + +@endverbatim + * @{ + */ + +/** + * @brief Platform dependent function to perform a single-read operation from the sensor's register. + * @param register_address Sensor's register from which the data needs to be read + * @param buf Pointer to the variable where the data needs to be stored + */ +void psee_sensor_read(uint16_t register_address, uint32_t *buf) { + uint8_t addr[] = {(register_address >> 8), register_address}; + omv_i2c_write_bytes(&sensor.i2c_bus, sensor.slv_addr, addr, 2, OMV_I2C_XFER_NO_STOP); + omv_i2c_read_bytes(&sensor.i2c_bus, sensor.slv_addr, (uint8_t *) buf, 4, OMV_I2C_XFER_NO_FLAGS); + *buf = __REV(*buf); +}; + +/** + * @brief Platform dependent function to perform a single-write operation to the sensor's register. + * @param register_address Sensor's register to which the data needs to be written + * @param register_data Data to be written + */ +void psee_sensor_write(uint16_t register_address, uint32_t register_data) { + uint8_t buf[] = {(register_address >> 8), register_address, + (register_data >> 24), (register_data >> 16), (register_data >> 8), register_data}; + omv_i2c_write_bytes(&sensor.i2c_bus, sensor.slv_addr, buf, 6, OMV_I2C_XFER_NO_FLAGS); +}; + +/** + * @brief Platform dependent function to perform a sequential-read operation from the sensor's register. + * @param reg Sensor's starting register address from which the data needs to be read + * @param data Pointer to the array where the data needs to be stored + * @param n_word Total number of 32-bits that needs to be read + */ +void psee_sensor_sequential_read(uint16_t reg, uint32_t *data, uint16_t n_word) { + uint8_t buf[] = {(reg >> 8), reg}; + omv_i2c_write_bytes(&sensor.i2c_bus, sensor.slv_addr, buf, sizeof(buf), OMV_I2C_XFER_NO_STOP); + omv_i2c_read_bytes(&sensor.i2c_bus, sensor.slv_addr, (uint8_t *) data, n_word * sizeof(uint32_t), + OMV_I2C_XFER_NO_FLAGS); + for (int32_t i = 0; i < n_word; i++) { + data[i] = __builtin_bswap32(data[i]); + } +} + +/** + * @brief Platform dependent function to perform a sequential-write operation to the sensor's register. + * @param register_data Address of the data array that needs to be written + * @param n_bytes Total number of bytes that needs to be written + */ +void psee_sensor_sequential_write(uint8_t *register_data, uint16_t n_bytes) { + omv_i2c_write_bytes(&sensor.i2c_bus, sensor.slv_addr, register_data, n_bytes, OMV_I2C_XFER_NO_FLAGS); +} + +/** + * @} + */ + +/** @defgroup GenX320 - Sensor Bring Up Functions + * @brief Sensor Bring Up Functions + * +@verbatim + =============================================================================== + ##### Sensor Bring Up Functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Initialize the platform + (+) Implement platform specific delay function + (+) Initialize the Sensor + (+) Execute Operation sequence + (+) Execute ISSD sequence + (+) Init sensor in EVT mode + (+) Init sensor in Histo mode + (+) Set & Change Bias + (+) Set CPI + (+) Set Flip + +@endverbatim + * @{ + */ + +/** + * @brief Platform dependent initialization routine, this can include Sensor reset, Sensor power up, etc. + */ +void psee_sensor_platform_init() { +}; + +/** + * @brief Platform dependent delay function. + * @param duration Delay duration in milliseconds + */ +void psee_sleep_ms_imp(uint32_t duration) { + mp_hal_delay_ms(duration); +}; + +/** + * @brief Platform dependent delay function. + * @param duration Delay duration in microseconds + */ +void psee_sleep_us_imp(uint32_t duration) { + mp_hal_delay_us(duration); +}; + +/** + * @brief Function to execute the operation sequence. + * @param seq Operation sequence that needs to be executed + */ +static void execute_reg_op_sequence(const struct sequence seq) { + for(unsigned int i = 0; i < seq.len; i++) { + if(seq.ops[i].op == WRITE) { + psee_sensor_write(seq.ops[i].args.write.addr, seq.ops[i].args.write.data); + } + else if (seq.ops[i].op == READ) { + uint32_t data = 0; + psee_sensor_read(seq.ops[i].args.write.addr, &data); + (void)data; + // if (data == seq.ops[i].args.read.data){} + } + else if (seq.ops[i].op == DELAY) { + uint32_t delay_ms = seq.ops[i].args.delay.us/1000<1?1:seq.ops[i].args.delay.us/1000; + + psee_sleep_ms_imp(delay_ms); + + } + psee_sleep_ms_imp(1); + } +} + +/** + * @brief Function to execute the Init sequence of the ISSD. + */ +void psee_sensor_init(const struct issd *issd) { + if (issd) + execute_reg_op_sequence(issd->init); +} + +/** + * @brief Function to execute the Destroy sequence of the ISSD. + */ +void psee_sensor_destroy(const struct issd *issd) { + if (issd) + execute_reg_op_sequence(issd->destroy); +} + +/** + * @brief Function to execute the Start sequence of the ISSD. + */ +void psee_sensor_start(const struct issd *issd) { + if (issd) + execute_reg_op_sequence(issd->start); +} + +/** + * @brief Function to execute the Stop sequence of the ISSD. + */ +void psee_sensor_stop(const struct issd *issd) { + if (issd) + execute_reg_op_sequence(issd->stop); +} + +/** + * @brief Function to detect the boot mode of the sensor. + */ +Boot_Mode psee_detect_boot_mode() { + + Boot_Mode boot_mode = 0; + + /* Read the boot message */ + uint32_t boot_value = psee_get_mbx_misc(); + + if(boot_value == 0) { + boot_mode = IMEM_BOOT; + } + else if((boot_value == 0xCAFEBABE) || (boot_value == 0xBAADF00D)) { + boot_mode = ROM_BOOT; + } + + return boot_mode; +} + +/** + * @brief Function to enable and configure the sensor in Event streaming mode. + */ +BIAS_Params_t genx320_default_biases; +Boot_Mode genx320_boot_mode; +const struct issd *psee_open_evt() { + + /* Setup I2C */ + psee_sensor_platform_init(); + psee_sleep_ms_imp(100); + + /* Check chip ID */ + uint32_t chip_id; + psee_sensor_read(SAPHIR_CHIP_ID, &chip_id); + printf("Sensor ID : %lX \n\r",chip_id); + if ((chip_id != SAPHIR_MP_ID) && (chip_id != SAPHIR_ES_ID)) { + while(1); + } + + /* Detect the Boot mode */ + genx320_boot_mode = psee_detect_boot_mode(); + + if(chip_id == SAPHIR_ES_ID) { + genx320_default_biases = genx320es_default_biases; + } else { + genx320_default_biases = genx320mp_default_biases; + } + + /* Force CPI with chicken bits */ + psee_sensor_write(TOP_CHICKEN, 0x03E8000A); //EVT + + /* Start the Init sequence */ + psee_sensor_init(&dcmi_evt); + + /* Configure CPI for event streaming */ + psee_sensor_set_CPI_EVT20(); + + return &dcmi_evt; + +} + +/** + * @brief Default bias parameters for ES sensor + */ +const BIAS_Params_t genx320es_default_biases = { + .pr = 61, + .fo = 19, + .fes = 63, + .hpf = 0, + .diff_on = 40, + .diff = 51, + .diff_off = 28, + .diff = 51, + .inv = 57, + .refr = 82, + .invp = 66, + .req_pu = 116, + .sm_pdy = 164 +}; + +/** + * @brief Default bias parameters for MP sensor + */ +const BIAS_Params_t genx320mp_default_biases = { + .pr = 61, + .fo = 34, + .fes = 63, + .hpf = 0, + .diff_on = 30, + .diff = 51, + .diff_off = 33, + .inv = 57, + .refr = 10, + .invp = 56, + .req_pu = 116, + .sm_pdy = 164 +}; + +/** + * @brief Function to set the standard biases + */ +void psee_sensor_set_biases(const BIAS_Params_t *bias) { + + /* PR */ + psee_sensor_write(BIAS_BIAS_PR_HV0, (0x03010000 + bias->pr) | BIAS_PR_HV0_SINGLE_Msk); + /* FO */ + psee_sensor_write(BIAS_BIAS_FO_HV0, (0x03010000 + bias->fo) | BIAS_FO_HV0_SINGLE_Msk); + /* FES */ + psee_sensor_write(BIAS_BIAS_FES_HV0, (0x01010000 + bias->fes) | BIAS_FES_HV0_SINGLE_Msk); + /* HPF */ + psee_sensor_write(BIAS_BIAS_HPF_LV0, (0x03010000 + bias->hpf) | BIAS_HPF_LV0_SINGLE_Msk); + /* DIFF ON */ + psee_sensor_write(BIAS_BIAS_DIFF_ON_LV1, (0x01010000 + bias->diff_on) | BIAS_DIFF_ON_LV1_SINGLE_Msk); + /* DIFF */ + psee_sensor_write(BIAS_BIAS_DIFF_LV1, (0x01010000 + bias->diff) | BIAS_DIFF_LV1_SINGLE_Msk); + /* DIFF OFF */ + psee_sensor_write(BIAS_BIAS_DIFF_OFF_LV1, (0x01010000 + bias->diff_off) | BIAS_DIFF_OFF_LV1_SINGLE_Msk); + /* INV */ + psee_sensor_write(BIAS_BIAS_INV_LV0, (0x01010000 + bias->inv) | BIAS_INV_LV0_SINGLE_Msk); + /* REFR */ + psee_sensor_write(BIAS_BIAS_REFR_LV0, (0x03010000 + bias->refr) | BIAS_REFR_LV0_SINGLE_Msk); + /* INVP */ + psee_sensor_write(BIAS_BIAS_INVP_LV0, (0x03010000 + bias->invp) | BIAS_INVP_LV0_SINGLE_Msk); + /* REQ_PU */ + psee_sensor_write(BIAS_BIAS_REQ_PU_LV0, (0x03010000 + bias->req_pu) | BIAS_REQ_PU_LV0_SINGLE_Msk); + /* SM_PDy */ + psee_sensor_write(BIAS_BIAS_SM_PDY_LV0, (0x01010000 + bias->sm_pdy) | BIAS_SM_PDY_LV0_SINGLE_Msk); + +} + +/** + * @brief Function to change the Bias setting + */ +void psee_sensor_set_bias(BIAS_Name_t bias, uint32_t val) { + switch(bias) { + case PR: + psee_sensor_write(BIAS_BIAS_PR_HV0, (0x03010000 + val) | BIAS_PR_HV0_SINGLE_Msk); + break; + case FO: + psee_sensor_write(BIAS_BIAS_FO_HV0, (0x03010000 + val) | BIAS_FO_HV0_SINGLE_Msk); + break; + case FES: + psee_sensor_write(BIAS_BIAS_FES_HV0, (0x01010000 + val) | BIAS_FES_HV0_SINGLE_Msk); + break; + case HPF: + psee_sensor_write(BIAS_BIAS_HPF_LV0, (0x03010000 + val) | BIAS_HPF_LV0_SINGLE_Msk); + break; + case DIFF_ON: + psee_sensor_write(BIAS_BIAS_DIFF_ON_LV1, (0x01010000 + val) | BIAS_DIFF_ON_LV1_SINGLE_Msk); + break; + case DIFF: + psee_sensor_write(BIAS_BIAS_DIFF_LV1, (0x01010000 + val) | BIAS_DIFF_LV1_SINGLE_Msk); + break; + case DIFF_OFF: + psee_sensor_write(BIAS_BIAS_DIFF_OFF_LV1, (0x01010000 + val) | BIAS_DIFF_OFF_LV1_SINGLE_Msk); + break; + case INV: + psee_sensor_write(BIAS_BIAS_INV_LV0, (0x01010000 + val) | BIAS_INV_LV0_SINGLE_Msk); + break; + case REFR: + psee_sensor_write(BIAS_BIAS_REFR_LV0, (0x03010000 + val) | BIAS_REFR_LV0_SINGLE_Msk); + break; + case INVP: + psee_sensor_write(BIAS_BIAS_INVP_LV0, (0x03010000 + val) | BIAS_INVP_LV0_SINGLE_Msk); + break; + case REQ_PU: + psee_sensor_write(BIAS_BIAS_REQ_PU_LV0, (0x03010000 + val) | BIAS_REQ_PU_LV0_SINGLE_Msk); + break; + case SM_PDY: + psee_sensor_write(BIAS_BIAS_SM_PDY_LV0, (0x01010000 + val) | BIAS_SM_PDY_LV0_SINGLE_Msk); + break; + default: + break; + } +} + +/** + * @brief Function to configure the CPI and configure the sensor data format in EVT2.0 + */ +void psee_sensor_set_CPI_EVT20() { + + /* Set EVT20 mode */ + psee_sensor_write(EDF_CONTROL, 0x00UL); /* Event Format : Legacy EVT2.0 */ + + /* Configure Packet and Frame sizes */ + psee_sensor_write(CPI_FRAME_SIZE_CONTROL, 0x4UL); /* Frame Size in Packets : 4 Packets */ + + /* Polarities fr VSYNC & HSYNC */ + psee_sensor_write(CPI_OUTPUT_IF_CONTROL, CPI_OUTPUT_IF_CONTROL_HSYNC_POL | /* HSYNC polarity control : Synchronize at active high */ + CPI_OUTPUT_IF_CONTROL_VSYNC_POL /* VSYNC polarity control : Synchronize at active high */ + ); + + /* Enable dropping */ + psee_sensor_write(RO_READOUT_CTRL, RO_READOUT_CTRL_DIGITAL_PIPE_EN | /* Enable Whole Readout block */ + RO_READOUT_CTRL_AVOID_BPRESS_TD | /* Avoid back pressure propagation when readout is busy */ + RO_READOUT_CTRL_DROP_EN | /* Drop all events at the output of the RO except first events and timer high */ + RO_READOUT_CTRL_DROP_ON_FULL_EN /* Drop a packet only if cannot be accepted by the following stage */ + ); + + /* Configure CPI Pipeline */ + psee_sensor_write(CPI_PIPELINE_CONTROL, CPI_PIPELINE_CONTROL_ENABLE | /* Enable Output Interface */ + CPI_PIPELINE_CONTROL_OUTPUT_IF_MODE | /* Output Interface Mode : DCMI */ + CPI_PIPELINE_CONTROL_PACKET_FIXED_SIZE_ENABLE | /* Fixed Packet Size */ + CPI_PIPELINE_CONTROL_FRAME_FIXED_SIZE_ENABLE | /* Fixed Frame Size */ + CPI_PIPELINE_CONTROL_CLK_OUT_EN /* Enable Clock Out */ + ); +} + +/** + * @brief Function to flip + * @param flip_x To indicate that x axis needs to be flipped + * @param flip_y To indicate that y axis needs to be flipped + */ +void psee_sensor_set_flip(uint32_t flip_x, uint32_t flip_y) { + uint32_t reg_val; + + /* Read the old value*/ + psee_sensor_read(RO_READOUT_CTRL, ®_val ); + reg_val &= 0x003FF6FF; + + /* Check if it is a X axis flip*/ + if(flip_x) reg_val |= (flip_x << 6); + else reg_val &= ~(flip_x << 6); + + /* Check if it is a Y axis flip*/ + if(flip_y) reg_val |= (flip_y << 7); + else reg_val &= ~(flip_y << 7); + + /* Update the new value*/ + psee_sensor_write(RO_READOUT_CTRL, reg_val); +} + +/** + * @brief Function to execute mipi_phy power down sequence. + */ +static void mipi_dphy_power_down() { + + /* MIPI Power and Clock control */ + psee_sensor_write(MIPI_CSI_POWER, (0UL << MIPI_CSI_POWER_CL_ENABLE_Pos) | /* Clock lane power up input signal */ + (0UL << MIPI_CSI_POWER_DL_ENABLE_Pos) /* Data lane power up input signal */ + ); + + psee_sensor_write(MIPI_CSI_CLK_CTRL, (0UL << MIPI_CSI_CLK_CTRL_STBUS_EN_Pos) | /* STbus clock */ + (0UL << MIPI_CSI_CLK_CTRL_CL_CLKESC_EN_Pos) | /* Clock Lane escape clock */ + (0UL << MIPI_CSI_CLK_CTRL_DL_CLKESC_EN_Pos) /* Data Lane escape clock */ + ); + + psee_sensor_write(MIPI_CSI_POWER, (0UL << MIPI_CSI_POWER_CL_RSTN_Pos) | /* Asynchronous Reset of Clock Lane */ + (0UL << MIPI_CSI_POWER_DL_RSTN_Pos) /* Asynchronous Reset of Data Lane */ + ); + + psee_sensor_write(MIPI_CSI_CLK_CTRL, (0UL << MIPI_CSI_CLK_CTRL_TXCLKESC_EN_Pos) ); /* Escape clock */ + + /* Disable Calibration */ + psee_sensor_write(LDO_PMU, (0UL << LDO_PMU_V2I_CAL_EN_Pos) ); /* Calibration to adjust resistor value */ + + psee_sensor_write(ADC_CONTROL, (0UL << ADC_CONTROL_CLK_EN_Pos) ); /* ADC Clock */ + + psee_sensor_write(MIPI_CSI_POWER, (0UL << MIPI_CSI_POWER_CUR_EN_Pos) ); /* MIPI Bias */ + + /* Disable pmu_igcm, v2i, mipi_v2i */ + psee_sensor_write(LDO_PMU, (0UL << LDO_PMU_ICGM_EN_Pos) | /* CGM Current */ + (0UL << LDO_PMU_V2I_EN_Pos) | /* V2i */ + (0UL << LDO_PMU_MIPI_V2I_EN_Pos) /* Reference bias current for MIPI V2i */ + ); + + /* Disable BG */ + psee_sensor_write(LDO_BG, (0UL << LDO_BG_EN_Pos) | /* Bandgap */ + (0UL << LDO_BG_BUF_EN_Pos) /* Bandgap Buffer */ + ); + + +} + +/** + * @brief Function to read all the sensor clock tree registers and compute the value of each clocks. + * @args in_freq Sensor input clock in MHz + */ +static clk_freq_dict get_sensor_clk_freq(uint32_t in_freq) { + + /* Create a Instance of Clock frequency structure */ + clk_freq_dict clk_freq; + + /* Reset the values */ + clk_freq.in_freq = in_freq; + clk_freq.sys_freq = 0; + clk_freq.evt_icn_freq = 0; + clk_freq.cpu_ss_freq = 0; + clk_freq.pll_in_freq = 0; + clk_freq.pll_vco_freq = 0; + clk_freq.phy_freq = 0; + clk_freq.mipi_freq = 0; + clk_freq.esc_freq = 0; + + /* Get sys clock freq */ + uint32_t sys_clk_ctrl = 0, sys_clk_switch = 0, sys_clk_auto_mode = 0; + psee_sensor_read(SYS_CLK_CTRL, &sys_clk_ctrl); + sys_clk_switch = (sys_clk_ctrl & SYS_CLK_CTRL_SWITCH_Msk) >> SYS_CLK_CTRL_SWITCH_Pos; + + if(sys_clk_switch == 0) { + clk_freq.sys_freq = clk_freq.in_freq; + } + else { + /* Get all PLL freq */ + uint32_t ref_clk_ctrl = 0, ref_clk_switch = 0, ref_clk_div = 0; + psee_sensor_read(REF_CLK_CTRL, &ref_clk_ctrl); + ref_clk_switch = (ref_clk_ctrl & REF_CLK_CTRL_SWITCH_Msk) >> REF_CLK_CTRL_SWITCH_Pos; + + if(ref_clk_switch == 0) { + clk_freq.pll_in_freq = clk_freq.in_freq; + } + else { + ref_clk_div = (ref_clk_ctrl & REF_CLK_CTRL_DIV_Msk) >> REF_CLK_CTRL_DIV_Pos; + clk_freq.pll_in_freq = clk_freq.in_freq / ref_clk_div; + } + + uint32_t pll_ctrl = 0, pl_ndiv = 0, pl_odf = 0; + psee_sensor_read(PLL_CTRL, &pll_ctrl); + pl_ndiv = (pll_ctrl & PLL_CTRL_PL_NDIV_Msk) >> PLL_CTRL_PL_NDIV_Pos; + pl_odf = (pll_ctrl & PLL_CTRL_PL_ODF_Msk) >> PLL_CTRL_PL_ODF_Pos; + clk_freq.pll_vco_freq = clk_freq.pll_in_freq * pl_ndiv * 2; + clk_freq.phy_freq = clk_freq.pll_vco_freq / 2; + clk_freq.mipi_freq = clk_freq.pll_vco_freq / pl_odf; + + uint32_t phy_clk_div2 = 0, phy_clk_off_count = 0 , phy_freq_divider = 0; + phy_clk_div2 = (sys_clk_ctrl & SYS_CLK_CTRL_PHY_DIV2_Msk) >> SYS_CLK_CTRL_PHY_DIV2_Pos; + phy_clk_off_count = (sys_clk_ctrl & SYS_CLK_CTRL_PHY_OFF_COUNT_Msk) >> SYS_CLK_CTRL_PHY_OFF_COUNT_Pos; + + if(phy_clk_div2 == 0) { + phy_freq_divider = phy_clk_off_count + 3; + } + else { + phy_freq_divider = ((phy_clk_off_count + 3) << 1); + } + clk_freq.sys_freq = clk_freq.phy_freq / phy_freq_divider; + } + + /* Get evt_icn and cpu clock freq */ + sys_clk_auto_mode = (sys_clk_ctrl & SYS_CLK_CTRL_AUTO_MODE_Msk) >> SYS_CLK_CTRL_AUTO_MODE_Pos; + + uint32_t evt_icn_clk_ctrl = 0, evt_icn_clk_switch = 0, esp_clk_en = 0; + psee_sensor_read(EVT_ICN_CLK_CTRL, &evt_icn_clk_ctrl); + evt_icn_clk_switch = (evt_icn_clk_ctrl & EVT_ICN_CLK_CTRL_SWITCH_Msk) >> EVT_ICN_CLK_CTRL_SWITCH_Pos; + + uint32_t cpu_ss_clk_ctrl = 0, cpu_ss_clk_switch = 0; + psee_sensor_read(CPU_SS_CLK_CTRL, &cpu_ss_clk_ctrl); + cpu_ss_clk_switch = (cpu_ss_clk_ctrl & CPU_SS_CLK_CTRL_SWITCH_Msk) >> CPU_SS_CLK_CTRL_SWITCH_Pos; + + if (((sys_clk_auto_mode == 0) && (evt_icn_clk_switch == 1)) || ((sys_clk_auto_mode == 1) && (sys_clk_switch == 1))) { + uint32_t evt_icn_clk_div = (evt_icn_clk_ctrl & CPU_SS_CLK_CTRL_DIV_Msk) >> CPU_SS_CLK_CTRL_DIV_Pos; + clk_freq.evt_icn_freq = clk_freq.sys_freq / evt_icn_clk_div; + } + else { + clk_freq.evt_icn_freq = clk_freq.sys_freq; + } + + if (((sys_clk_auto_mode == 0) && (cpu_ss_clk_switch == 1)) || ((sys_clk_auto_mode == 1) && (sys_clk_switch == 1))) { + uint32_t cpu_ss_clk_div = (cpu_ss_clk_ctrl & CPU_SS_CLK_CTRL_DIV_Msk) >> CPU_SS_CLK_CTRL_DIV_Pos; + clk_freq.cpu_ss_freq = clk_freq.sys_freq / cpu_ss_clk_div; + } + else { + clk_freq.cpu_ss_freq = clk_freq.sys_freq; + } + + /* Get mipi escape clock freq */ + esp_clk_en = (evt_icn_clk_ctrl & EVT_ICN_CLK_CTRL_EN_Msk) >> EVT_ICN_CLK_CTRL_EN_Pos; + if (esp_clk_en == 1) { + uint32_t mipi_csi_clk_ctrl = 0, txclkesc_en = 0; + psee_sensor_read(MIPI_CSI_CLK_CTRL, &mipi_csi_clk_ctrl); + txclkesc_en = (mipi_csi_clk_ctrl & MIPI_CSI_CLK_CTRL_TXCLKESC_EN_Msk) >> MIPI_CSI_CLK_CTRL_TXCLKESC_EN_Pos; + + if(txclkesc_en == 1) { + uint32_t txclkesc_divider = (mipi_csi_clk_ctrl & MIPI_CSI_CLK_CTRL_TXCLKESC_DIVIDER_Msk) >> MIPI_CSI_CLK_CTRL_TXCLKESC_DIVIDER_Pos; + clk_freq.esc_freq = clk_freq.sys_freq / txclkesc_divider; + } + } + + return clk_freq; + +} + +/** + * @brief Function to execute pll power down sequence + */ +static void pll_power_down_and_switch(uint32_t in_freq) { + + /* Read sensor clock tree */ + clk_freq_dict clk_freq; + clk_freq = get_sensor_clk_freq(in_freq); + + /* Put back the cpu_ss and evt_icn clocks to sys_freq/2 before switch the sys clock to ref clock */ + if(clk_freq.sys_freq != clk_freq.cpu_ss_freq) { + psee_sensor_write(CPU_SS_CLK_CTRL, (2UL << CPU_SS_CLK_CTRL_DIV_Pos) ); + } + if(clk_freq.sys_freq != clk_freq.evt_icn_freq) { + psee_sensor_write(EVT_ICN_CLK_CTRL, (2UL << EVT_ICN_CLK_CTRL_DIV_Pos)); + } + + /* Switch sys clock and pll power down */ + if(clk_freq.pll_vco_freq != 0) { + psee_sensor_write(SYS_CLK_CTRL, (1UL << SYS_CLK_CTRL_EN_Pos) | + (0UL << SYS_CLK_CTRL_SWITCH_Pos) ); + + psee_sensor_write(SYS_CLK_CTRL, (0UL << SYS_CLK_CTRL_EN_Pos) | + (0UL << SYS_CLK_CTRL_SWITCH_Pos) ); + + psee_sensor_write(PLL_CTRL, (0UL << PLL_CTRL_PL_ENABLE_Pos)); + } + + if(clk_freq.sys_freq != clk_freq.cpu_ss_freq) { + psee_sensor_write(CPU_SS_CLK_CTRL, (0UL << CPU_SS_CLK_CTRL_SWITCH_Pos)); + } + + if(clk_freq.sys_freq != clk_freq.evt_icn_freq) { + psee_sensor_write(EVT_ICN_CLK_CTRL, (0UL << EVT_ICN_CLK_CTRL_SWITCH_Pos)); + } + + +} + +/** + * @brief Function to execute the destroy sequence of the ISSD. + */ +void psee_sensor_powerdown() { + + /* MIPI power down */ + mipi_dphy_power_down(); + + /* PLL power down and switch */ + pll_power_down_and_switch(10); + +} + +/** + * @brief Function to reconfigure the sensor. + */ +void psee_sensor_reconfig() { + + /* Execute the DESTROY sequence of the ISSD */ + psee_sensor_powerdown(); + + /* Execute the INIT sequence of the ISSD */ + psee_sensor_init(current_issd); + + /* Configure CPI for event streaming */ + psee_sensor_set_CPI_EVT20(); + + /* Set Standard biases */ + psee_sensor_set_biases(&genx320_default_biases); + + /* Start the sensor */ + psee_sensor_start(current_issd); + + /* Set Flip */ + psee_sensor_set_flip(0,0); + +} + +/** + * @} + */ + +/** @defgroup GenX320 - Operating Mode Control Functions + * @brief Operating Mode Control Functions + * +@verbatim + =============================================================================== + ##### Operating Mode Control Functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) To configure the sensor for different power modes + +@endverbatim + * @{ + */ + +/** + * @brief Function to configure the sensor for streaming mode. + */ +void psee_PM3C_config() { + + /* + * RO - ON + * CPU - ON + * Clock - ON + * ESP - ON + * CPI - ON + */ + + /* CPI Default Pipeline Setting */ + psee_sensor_write(CPI_PIPELINE_CONTROL, CPI_PIPELINE_CONTROL_ENABLE | /* Enable Output Interface */ + CPI_PIPELINE_CONTROL_OUTPUT_IF_MODE | /* Output Interface Mode : DCMI */ + CPI_PIPELINE_CONTROL_PACKET_FIXED_SIZE_ENABLE | /* Fixed Packet Size */ + CPI_PIPELINE_CONTROL_FRAME_FIXED_SIZE_ENABLE | /* Fixed Frame Size */ + CPI_PIPELINE_CONTROL_CLK_OUT_EN /* Enable Clock Out */ + ); + +} + +/** + * @brief Function to configure the sensor for low power monitor mode. + */ +void psee_PM2_config() { + + /* + * RO - ON + * CPU - ON + * Clock - ON + * ESP - OFF + * CPI - OFF + */ + + /* CPI Hot Disable */ + psee_sensor_write(CPI_PIPELINE_CONTROL, (0x0UL << CPI_PIPELINE_CONTROL_ENABLE_Pos) | /* Disable Output Interface */ + CPI_PIPELINE_CONTROL_DROP_NBACKPRESSURE | /* Drop the back-pressure when the block is disabled */ + CPI_PIPELINE_CONTROL_HOT_DISABLE_ENABLE /* Hot Disable Mode */ + ); + +} + +/** + * @} + */ + +/** @defgroup GenX320 - Firmware Flashing Functions + * @brief Firmware Flashing Functions + * +@verbatim + =============================================================================== + ##### Firmware Flashing Functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Flash the firmware + (+) Start the firmware + (+) Reset the firmware + +@endverbatim + * @{ + */ + +/** + * @brief Function to read and flash the firmware from a string. + * @param firmwareArray Pointer to the firmware array + * @param n_bytes Size of the firmware + */ +FW_StatusTypeDef psee_write_firmware(const Firmware *firmwareArray, uint32_t n_bytes) { + + /* Check for invalid pointer */ + if (firmwareArray == NULL) { + return fw_Error_InvalidPointer; + } + + /* Check for invalid size */ + if (n_bytes == 0) { + return fw_Error_InvalidSize; + } + + uint32_t mem_bank_size[80] = {0}; + uint32_t mem_bank_index = 0; + uint32_t count = 0; + uint32_t write_count = 0; + + uint32_t reg; + uint8_t buff[258] = {0}; + + /* Calculate the bank index of the first bank */ + uint32_t bank = (firmwareArray[0].address - IMEM_START) / 0x100; + + /* Calculate number of Memory banks required and its corresponding size */ + for(uint32_t i = 0; i < n_bytes ; i ++ ){ + + if(firmwareArray[i].address == (IMEM_START+0x100) + (mem_bank_index * 0x100) ){ + mem_bank_size[mem_bank_index] = count; + count = 0; + mem_bank_index ++; + + }else if(firmwareArray[i].address == firmwareArray[n_bytes-1].address) + { + mem_bank_size[mem_bank_index] = count + 1; + count = 0; + mem_bank_index ++; + } + count ++; + } + + /* Write value on the corresponding memory bank */ + for(uint32_t b_index = 0; b_index < mem_bank_index; b_index++) + { + + /* Select the memory bank for IMEM */ + psee_sensor_write(MEM_BANK_SELECT, ((0x2 << 28) + (bank+b_index))); + + reg = MEM_BANK_MEM0; + + /* Send the Register Address */ + buff[0] = (uint8_t)((reg & 0x0000ff00) >> 8); + buff[1] = (uint8_t)(reg & 0x000000ff); + + for(uint32_t d_index = 0; d_index < mem_bank_size[b_index] ; d_index ++) + { + /* Write value */ + buff[2 + (d_index*4)] = (uint8_t)((firmwareArray[write_count].value & 0xff000000) >> 24); + buff[3 + (d_index*4)] = (uint8_t)((firmwareArray[write_count].value & 0x00ff0000) >> 16); + buff[4 + (d_index*4)] = (uint8_t)((firmwareArray[write_count].value & 0x0000ff00) >> 8); + buff[5 + (d_index*4)] = (uint8_t)(firmwareArray[write_count].value & 0x000000ff); + write_count++; + } + + /* Flash the firmware on the IMEM */ + psee_sensor_sequential_write(buff,((mem_bank_size[b_index]*4)+2)); + + } + + /* Reset Memory Bank */ + psee_sensor_write(MEM_BANK_SELECT, 0x00000000); + + return fw_OK; +} + +/** + * @brief Function to start the firmware. + * @retval FW status + */ +static FW_StatusTypeDef psee_start_fw_imem() { + + /* CPU is active, no reset is applied */ + psee_sensor_write(MBX_CPU_SOFT_RESET, (0UL << MBX_CPU_SOFT_RESET_Pos) ); + + /* Release the IMEM code execution */ + psee_sensor_write(MBX_CPU_START_EN, MBX_CPU_START_EN_Msk); + + return fw_OK; +} + +/** + * @brief Function to reset the firmware. + * @retval FW status + */ +static FW_StatusTypeDef psee_reset_fw_imem() { + + /* Keep CPU core under reset */ + psee_sensor_write(MBX_CPU_START_EN, (0UL << MBX_CPU_START_EN_Pos)); + + /* Force a reset on CPU system*/ + psee_sensor_write(MBX_CPU_SOFT_RESET, MBX_CPU_SOFT_RESET_Msk); + + return fw_OK; +} + +/** + * @brief Function to reset the firmware for ROM_BOOT. + * @retval FW status + */ +static FW_StatusTypeDef psee_reset_fw_rom() { + + /* Force a reset on CPU system*/ + psee_sensor_write(MBX_CPU_SOFT_RESET, MBX_CPU_SOFT_RESET_Msk); + psee_sleep_ms_imp(1); + + return fw_OK; +} + +/** + * @brief Function to start the firmware for ROM_BOOT. + * @retval FW status + */ +static FW_StatusTypeDef psee_start_fw_rom() { + + /* Remove the Reset */ + psee_sensor_write(MBX_CPU_SOFT_RESET, (0UL << MBX_CPU_SOFT_RESET_Pos)); + + /* Check if the ROM_BOOT is successful */ + uint32_t mbx_misc_val = psee_get_mbx_misc(); + while(mbx_misc_val != 0xCAFEBABE) { + mbx_misc_val = psee_get_mbx_misc(); + } + + /* Reconfigure the sensor for CPI */ + psee_sensor_reconfig(); + + /* Release the IMEM code execution */ + psee_sensor_write(MBX_CMD_PTR, (0x7 << 28) | 0x200200); + + /* Check if the application has started processing */ + uint32_t mbx_val = psee_get_mbx_misc(); + while(mbx_val == 0xCAFEBABE) { + mbx_val = psee_get_mbx_misc(); + } + + return fw_OK; +} + +/** + * @brief Function to start the RISC-V firmware. + * @retval FW status + */ +FW_StatusTypeDef psee_start_firmware(Boot_Mode boot_mode) { + + /* Check the boot mode and flash the FW accordingly */ + if(boot_mode == IMEM_BOOT) { + psee_start_fw_imem(); + } + else if(boot_mode == ROM_BOOT) { + psee_start_fw_rom(); + } + return fw_OK; +} + +/** + * @brief Function to reset the RISC-V firmware. + * @retval FW status + */ +FW_StatusTypeDef psee_reset_firmware(Boot_Mode boot_mode) { + + /* Check the boot mode and reset the FW accordingly */ + if(boot_mode == IMEM_BOOT) { + psee_reset_fw_imem(); + } + else if(boot_mode == ROM_BOOT) { + psee_reset_fw_rom(); + } + return fw_OK; +} + +/** + * @} + */ + +/** @defgroup GenX320 - Mailbox Communication Functions + * @brief Mailbox Communication Functions + * +@verbatim + =============================================================================== + ##### Mailbox Communication Functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Write on the Mailbox MISC/CMD_PTR/STATUS_PTR registers + (+) Read from the Mailbox MISC/CMD_PTR/STATUS_PTR registers + +@endverbatim + * @{ + */ + +/** + * @brief Function to read the 32-bit value from the Mailbox cmd_ptr register. + * @retval Value of Mailbox cmd_ptr register + */ +uint32_t psee_get_mbx_cmd_ptr() { + uint32_t mbx_cmd_ptr = 0; + psee_sensor_read(MBX_CMD_PTR, &mbx_cmd_ptr); + return mbx_cmd_ptr; +} + +/** + * @brief Function to read the 32-bit value from the Mailbox misc register. + * @retval Value of Mailbox misc register + */ +uint32_t psee_get_mbx_misc() { + uint32_t mbx_misc = 0; + psee_sensor_read(MBX_MISC, &mbx_misc); + return mbx_misc; +} + +/** + * @brief Function to read the 32-bit value from the Mailbox status_ptr register. + * @retval Value of Mailbox status_ptr register + */ +uint32_t psee_get_mbx_status_ptr() { + uint32_t mbx_status_ptr = 0; + psee_sensor_read(MBX_STATUS_PTR, &mbx_status_ptr); + return mbx_status_ptr; +} + +/** + * @brief Function to write a 32-bit value on the Mailbox cmd_ptr register. + * @param val Data to be written on the Mailbox cmd_ptr register + */ +void psee_set_mbx_cmd_ptr(uint32_t val) { + psee_sensor_write(MBX_CMD_PTR, val); +} + +/** + * @brief Function to write a 32-bit value on the Mailbox misc register. + * @param val Data to be written on the Mailbox misc register + */ +void psee_set_mbx_misc(uint32_t val) { + psee_sensor_write(MBX_MISC, val); +} + +/** + * @brief Function to write a 32-bit value on the Mailbox status_ptr register. + * @param val Data to be written on the Mailbox status_ptr register + */ +void psee_set_mbx_status_ptr(uint32_t val) { + psee_sensor_write(MBX_STATUS_PTR, val); +} + +/** + * @} + */ + +/** @defgroup GenX320 - ROI Access Functions + * @brief ROI Access Functions + * +@verbatim + =============================================================================== + ##### ROI Access Functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Read/Write ROI Registers + +@endverbatim + * @{ + */ + +/** + * @brief Function to write a 32-bit value on the TD_ROI_X register + * @param offset Register Offset + * @param val Data to be written on the TD_ROI_X register + */ +void psee_write_ROI_X(uint32_t offset, uint32_t val) { + psee_sensor_write(ROI_TD_ROI_X00 + offset, val); +} + +/** + * @brief Function to write a 32-bit value on the TD_ROI_Y register + * @param offset Register Offset + * @param val Data to be written on the TD_ROI_Y register + */ +void psee_write_ROI_Y(uint32_t offset, uint32_t val) { + psee_sensor_write(ROI_TD_ROI_Y00 + offset, val); +} + +/** + * @brief Function to write a 32-bit value on the TD_ROI_CTR register + * @param val Data to be written on the TD_ROI_CTR register + */ +void psee_write_ROI_CTRL(uint32_t val) { + psee_sensor_write(ROI_CTRL, val); +} + +/** + * @} + */ + +/** @defgroup GenX320 - RISC-V Debugger Function + * @brief RISC-V Debugger Function + * +@verbatim + =============================================================================== + ##### RISC-V Debugger Functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Read value from the RISC-V MCU with a handshake mechanism + (+) Read from DMEM + +@endverbatim + * @{ + */ + +/** + * @brief Helper function of the debugger, which reads one 32-bit value from + * the RISC-V and sends an acknowledgment to receive the next value. + * @retval Value of Mailbox status_ptr register + */ +uint32_t psee_mbx_read_uint32(){ + + /* Wait until a new value is available */ + while(psee_get_mbx_misc()==0); + + /* Get the value from the RISC V */ + uint32_t val = psee_get_mbx_status_ptr(); + + /* Indicate that the value has been consumed */ + psee_set_mbx_misc(0); + + return val; +} + +/** + * @brief Decoder function to decode the message sent from the RISC-V. + */ +void psee_decode_debugger(){ + + printf("Starting Debugger...\r\n"); + + while(1) + { + uint32_t v = psee_mbx_read_uint32(); + for (int pos =0; pos < sizeof(uint32_t); ++pos) { + char c = v & 0xff; + if (c == 0){ + printf("\r"); + break; + } + putchar(c); + v >>= 8; + } + fflush(stdout); + } +} + + +/** + * @brief Function to read the 32-bit value from a DMEM register. + * @param address Address of the DMEM register + * @retval Value of the DMEM register + */ +uint32_t psee_sensor_read_dmem(uint32_t address) { + + static uint32_t offsets[80] = {0}; + + /* Sensor read variable */ + uint32_t dmem_data; + + /* Calculate the bank index */ + uint32_t bank = (address - DMEM_START) / 0x100; + + /* Calculate the offset */ + offsets[bank] = (address - DMEM_START) - (bank * 0x100); + + if (bank < 80) + { + /* Select the memory bank for DMEM */ + psee_sensor_write(MEM_BANK_SELECT, ((0x3 << 28) + bank)); + + /* Read the value from corresponding bank */ + psee_sensor_read((MEM_BANK_MEM0 + offsets[bank]), &dmem_data); + + } + + /* Reset the Mem_bank */ + psee_sensor_write(MEM_BANK_SELECT, 0x00000000); + + return dmem_data; + +} + + +/** + * @brief Function to read the 32-bit value from a IMEM register. + * @param address Address of the IMEM register + * @retval Value of the IMEM register + */ +uint32_t psee_sensor_read_imem(uint32_t address) { + + static uint32_t offsets[80] = {0}; + + /* Sensor read variable */ + uint32_t imem_data; + + /* Calculate the bank index */ + uint32_t bank = (address - IMEM_START) / 0x100; + + /* Calculate the offset */ + offsets[bank] = (address - IMEM_START) - (bank * 0x100); + + if (bank < 80) + { + /* Select the memory bank for DMEM */ + psee_sensor_write(MEM_BANK_SELECT, ((0x2 << 28) + bank)); + + /* Read the value from corresponding bank */ + psee_sensor_read((MEM_BANK_MEM0 + offsets[bank]), &imem_data ); + + } + + /* Reset the Mem_bank */ + psee_sensor_write(MEM_BANK_SELECT, 0x00000000); + + return imem_data; + +} + +/** + * @} + */ + +/** @defgroup GenX320 - Statistics Register Read Functions + * @brief Statistics Register Read Functions + * +@verbatim + =============================================================================== + ##### Statistics Register Read Functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Read from low power event counters + (+) Read total pixel's CD events + (+) Read total AFK Flickering events + (+) Read total AFK Valid events + +@endverbatim + * @{ + */ + +/** + * @brief Reads the counter value from the 16 low-power event counters (RO_LP_CNT00 - RO_LP_CNT15). + * @param p_data Pointer to data buffer + */ +void psee_read_ro_lp_evt_cnt(uint32_t *p_data) { + + uint16_t total_counters = 16; + uint32_t start_address = RO_LP_CNT00; + uint32_t ro_shadow_status = 0; + + /* Check if shadow status is valid */ + psee_sensor_read(RO_SHADOW_STATUS, &ro_shadow_status); + while((ro_shadow_status & 1) != 1) { + psee_sensor_read(RO_SHADOW_STATUS, &ro_shadow_status ); + psee_sleep_ms_imp(1); + } + + /* If shadow status is valid read the counter values*/ + psee_sensor_sequential_read(start_address, p_data, total_counters); + +} + +/** + * @brief Reads the value from the RO_EVT_CD_CNT register + * @retval Value of the RO_EVT_CD_CNT register + */ +uint32_t psee_read_ro_evt_cd_cnt() { + uint32_t evt_cd_cnt; + + psee_sensor_read(RO_EVT_CD_CNT, &evt_cd_cnt); + return evt_cd_cnt; +} + +/** + * @brief Reads the value from the AFK_FLICKER_EVT_CNT register + * @retval Value of the AFK_FLICKER_EVT_CNT register + */ +uint32_t psee_read_afk_flicker_evt_cnt() { + uint32_t flicker_evt_cnt; + + psee_sensor_read(AFK_FLICKER_EVT_CNT, &flicker_evt_cnt); + return flicker_evt_cnt; +} + +/** + * @brief Reads the value from the AFK_TOTAL_EVT_CNT register + * @retval Value of the AFK_TOTAL_EVT_CNT register + */ +uint32_t psee_read_afk_total_evt_cnt() { + uint32_t total_evt_cnt; + + psee_sensor_read(AFK_TOTAL_EVT_CNT, &total_evt_cnt); + return total_evt_cnt; +} + +/** + * @} + */ + +/** @defgroup GenX320 - Activity Map Configuration Functions + * @brief Activity Map Configuration Functions + * +@verbatim + =============================================================================== + ##### Activity Map Configuration Functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) To enable the low power event counters and configure it + (+) To configure the X and Y borders + +@endverbatim + * @{ + */ + +/** + * @brief Function to enable and configure the Activity map + */ +void psee_configure_activity_map() { + + /* Enable Low power control*/ + psee_sensor_write(RO_RO_LP_CTRL, RO_LP_CTRL_CNT_EN | /* Enable the 16 event counters */ + RO_LP_CTRL_KEEP_TH /* Keep timer high and trash all the rest when in lp_out_disable mode */ + ); + + /* Enable Shadow control*/ + psee_sensor_write(RO_SHADOW_CTRL, RO_SHADOW_CTRL_TIMER_EN | /* Enable microsecond-based timer */ + RO_SHADOW_CTRL_RESET_ON_COPY /* Reset the counters after a copy&reset IRQ */ + ); + + /* Set Shadow Timer Threshold - Accumulation Time */ + psee_sensor_write(RO_SHADOW_TIMER_THRESHOLD,25000); +} + +/** + * @brief Default borders for the activity map + */ +AM_Borders_t genx320mp_default_am_borders = { + + .x0 = 0, + .x1 = 64, + .x2 = 160, + .x3 = 256, + .x4 = 320, + .y0 = 0, + .y1 = 64, + .y2 = 160, + .y3 = 256, + .y4 = 320, + +}; + +/** + * @brief Function to set the default X and Y borders for the Activity map + */ +void psee_set_default_XY_borders(AM_Borders_t *border) { + + /* Set the default X borders */ + psee_sensor_write(RO_LP_X0, border->x0); + psee_sensor_write(RO_LP_X1, border->x1); + psee_sensor_write(RO_LP_X2, border->x2); + psee_sensor_write(RO_LP_X3, border->x3); + psee_sensor_write(RO_LP_X4, border->x4); + + /* Set the default Y borders */ + psee_sensor_write(RO_LP_Y0, border->y0); + psee_sensor_write(RO_LP_Y1, border->y1); + psee_sensor_write(RO_LP_Y2, border->y2); + psee_sensor_write(RO_LP_Y3, border->y3); + psee_sensor_write(RO_LP_Y4, border->y4); + +} + + +/** + * @} + */ + +/** @defgroup GenX320 - AFK Configuration Functions + * @brief AFK Configuration Functions + * +@verbatim + =============================================================================== + ##### AFK Configuration Functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Enable and Disable the AFK + +@endverbatim + * @{ + */ + +/** + * @brief Function to convert frequency to period + * @param freq Frequency to be converted + * @retval period Period that corresponds to the frequency + */ +static uint32_t psee_freq_to_period(const uint32_t freq) { + + /* Convert frequency to period */ + uint32_t period = 1000000 / freq; + + /* Convert it to Units of 128us */ + return period >> 7; +} + +/** + * @brief Function to compute the invalidation period + * @param max_cutoff_period Maximum cut off period + * @retval clk_freq Frequency of the MCU in MHz + */ +static Invalidation compute_invalidation(const uint32_t max_cutoff_period, const uint32_t clk_freq) { + + Invalidation result; + + /* computation of invalidation speed parameter based on processing frequency and max_cut_freq + max_cutoff_period : in unit of 128us + evt_clk_freq; processing frequency, in unit of MHz */ + + /* Processing clock period in nanoseconds */ + uint32_t clk_period_ns = 1000 / clk_freq; + uint32_t in_parallel = 5; + + float invalidation_period = + (((2 << 15) - (128 * (3 + max_cutoff_period))) * in_parallel * 1000) / (160 * 5 * clk_period_ns); + + result.df_wait_time = 4; + + result.df_timeout = floor(invalidation_period) - result.df_wait_time; + + if (result.df_timeout > 4095) { + result.df_timeout = 4095; + } + + return result; +} + +/** + * @brief Function to enable and configure the Anti-Flickering Filter(AFK) + */ +void psee_enable_afk(uint16_t min_freq, uint16_t max_freq) { + + Invalidation afk_invalidation; + + /* Disable/bypass the block in order to configure AFK parameters */ + psee_sensor_write(AFK_PIPELINE_CONTROL, AFK_PIPELINE_CONTROL_BYPASS); /* Bypass the block */ + + /* SRAM Powerup */ + uint32_t sram_initn = 0; + psee_sensor_read(SRAM_INITN, &sram_initn); + psee_sensor_write(SRAM_INITN, sram_initn | /* Previous State of SRAM_INITN */ + (1UL << SRAM_INITN_AFK_Pos) /* Initialize the memory state machine : AFK's SRAM control init_n */ + ); + + psee_sensor_write(SRAM_PD0, (0UL << SRAM_PD0_AFK_ALR_PD_Pos) | /* SRAM's Power Down Register : 0 - AFK's SRAM cuts are supplied */ + (0UL << SRAM_PD0_AFK_STR0_PD_Pos) | /* SRAM's Power Down Register : 0 - AFK's SRAM cuts are supplied */ + (0UL << SRAM_PD0_AFK_STR1_PD_Pos) /* SRAM's Power Down Register : 0 - AFK's SRAM cuts are supplied */ + ); + + /* Set the AFK Frequency Bandwidth */ + uint32_t min_period = psee_freq_to_period(max_freq); + uint32_t max_period = psee_freq_to_period(min_freq); + psee_sensor_write(AFK_FILTER_PERIOD, (min_period << AFK_FILTER_PERIOD_MIN_CUTOFF_Pos) | /* AntiFlickering Filter : Minimum cutoff period of undesired flickering light */ + (max_period << AFK_FILTER_PERIOD_MAX_CUTOFF_Pos) | /* AntiFlickering Filter : Maximum cutoff period of undesired flickering light */ + (8UL << AFK_FILTER_PERIOD_INVERTED_DUTY_CYCLE_Pos) /* Flickering duty cycle ratio */ + ); + + /* Configure the AFK Invalidation */ + afk_invalidation = compute_invalidation(max_period,10); + + psee_sensor_write(AFK_INVALIDATION, (afk_invalidation.df_wait_time << AFK_INVALIDATION_DT_FIFO_WAIT_TIME_Pos) | /* Deadtime fifo wait time, in unit of clock cycle */ + (afk_invalidation.df_timeout << AFK_INVALIDATION_DT_FIFO_TIMEOUT_Pos) | /* Deadtime fifo time out, in unit of clock cycles */ + (5UL << AFK_INVALIDATION_IN_PARALLEL_Pos) /* Number of ram invalidated together this is then changed into one hot, in unit of SRAM cut on parallel */ + ); + + /* Configure the AFK parameters */ + psee_sensor_write(AFK_AFK_PARAM, (6UL << AFK_PARAM_COUNTER_HIGH_Pos) | /* Hysteresis threshold above which we consider the block flickering */ + (4UL << AFK_PARAM_COUNTER_LOW_Pos) | /* Hysteresis threshold below which we consider the block is not flickering anymore */ + (0UL << AFK_PARAM_INVERT_Pos) /* Invert the output of anti-flicker filter : 0 No-flickering event pass */ + ); + + /* Configure the Atomic Register */ + psee_sensor_write(AFK_SHADOW_CTRL, AFK_SHADOW_CTRL_TIMER_EN | /* Enable Microsecond-based Timer */ + AFK_SHADOW_CTRL_RESET_ON_COPY /* Reset the Counters after a copy&reset IRQ */ + ); + + /* Set Shadow Timer Threshold - Accumulation Time */ + psee_sensor_write(AFK_SHADOW_TIMER_THRESHOLD, 20000UL); /* Accumulation time in Microseconds */ + + /* Enable the AFK_PIPELINE_CONTROL */ + psee_sensor_write(AFK_PIPELINE_CONTROL, AFK_PIPELINE_CONTROL_ENABLE); /* Enable the block */ + +} + +/** + * @brief Function to disable the Anti-Flickering Filter(AFK) + */ +void psee_disable_afk() { + + /* Disable AFK Output */ + psee_sensor_write(AFK_PIPELINE_CONTROL, AFK_PIPELINE_CONTROL_ENABLE | /* Enable the block */ + AFK_PIPELINE_CONTROL_BYPASS /* Bypass the block */ + ); + +} + +/** + * @} + */ diff --git a/src/omv/Makefile b/src/omv/Makefile index ed6793d30..58d523abe 100644 --- a/src/omv/Makefile +++ b/src/omv/Makefile @@ -44,6 +44,7 @@ SRCS += $(addprefix sensors/, \ hm01b0.c \ hm0360.c \ gc2145.c \ + genx320.c \ pag7920.c \ paj6100.c \ frogeye2020.c \ diff --git a/src/omv/boards/OPENMV4P/omv_boardconfig.h b/src/omv/boards/OPENMV4P/omv_boardconfig.h index e2476f2ec..e8e757c8e 100644 --- a/src/omv/boards/OPENMV4P/omv_boardconfig.h +++ b/src/omv/boards/OPENMV4P/omv_boardconfig.h @@ -48,6 +48,7 @@ #define OMV_MT9M114_ENABLE (1) #define OMV_MT9V0XX_ENABLE (1) #define OMV_LEPTON_ENABLE (1) +#define OMV_GENX320_ENABLE (1) #define OMV_PAG7920_ENABLE (1) #define OMV_PAJ6100_ENABLE (1) #define OMV_FROGEYE2020_ENABLE (1) diff --git a/src/omv/boards/OPENMV_RT1060/omv_boardconfig.h b/src/omv/boards/OPENMV_RT1060/omv_boardconfig.h index 9098a8625..78a5bb537 100644 --- a/src/omv/boards/OPENMV_RT1060/omv_boardconfig.h +++ b/src/omv/boards/OPENMV_RT1060/omv_boardconfig.h @@ -42,6 +42,7 @@ #define OMV_MT9M114_ENABLE (1) #define OMV_MT9V0XX_ENABLE (1) #define OMV_LEPTON_ENABLE (1) +#define OMV_GENX320_ENABLE (1) #define OMV_PAG7920_ENABLE (1) #define OMV_PAJ6100_ENABLE (1) #define OMV_FROGEYE2020_ENABLE (1) diff --git a/src/omv/common/sensor.h b/src/omv/common/sensor.h index a4b78d58e..d313430e6 100644 --- a/src/omv/common/sensor.h +++ b/src/omv/common/sensor.h @@ -22,6 +22,7 @@ #define LEPTON_SLV_ADDR (0x54) #define HM0XX0_SLV_ADDR (0x48) #define GC2145_SLV_ADDR (0x78) +#define GENX320_SLV_ADDR (0x78) #define FROGEYE2020_SLV_ADDR (0x6E) #define PAG7920_SLV_ADDR (0x80) @@ -31,6 +32,7 @@ #define ON_CHIP_ID (0x00) #define HIMAX_CHIP_ID (0x0001) #define GC_CHIP_ID (0xF0) +#define GENX320_CHIP_ID (0x0014) #define PIXART_CHIP_ID (0x00) // Chip ID Values @@ -57,6 +59,8 @@ #define HM01B0_ID (0xB0) #define HM0360_ID (0x60) #define GC2145_ID (0x21) +#define GENX320_ID_ES (0x30501C01) +#define GENX320_ID_MP (0xB0602003) #define PAG7920_ID (0x7920) #define PAJ6100_ID (0x6100) #define FROGEYE2020_ID (0x2020) @@ -211,10 +215,7 @@ typedef void (*frame_cb_t) (); typedef struct _sensor sensor_t; typedef struct _sensor { - union { - uint8_t chip_id; // Sensor ID. - uint16_t chip_id_w; // Sensor ID 16 bits. - }; + uint32_t chip_id; // Sensor ID 32 bits. uint8_t slv_addr; // Sensor I2C slave address. // Hardware flags (clock polarities, hw capabilities etc..) diff --git a/src/omv/common/sensor_utils.c b/src/omv/common/sensor_utils.c index f2f26a07a..8b6a2c3fa 100644 --- a/src/omv/common/sensor_utils.c +++ b/src/omv/common/sensor_utils.c @@ -30,6 +30,7 @@ #include "paj6100.h" #include "frogeye2020.h" #include "gc2145.h" +#include "genx320.h" #include "framebuffer.h" #include "unaligned_memcpy.h" #include "omv_boardconfig.h" @@ -190,37 +191,47 @@ static int sensor_detect() { switch (slv_addr) { #if (OMV_OV2640_ENABLE == 1) case OV2640_SLV_ADDR: // Or OV9650. - omv_i2c_readb(&sensor.i2c_bus, slv_addr, OV_CHIP_ID, &sensor.chip_id); + omv_i2c_readb(&sensor.i2c_bus, slv_addr, OV_CHIP_ID, (uint8_t *) &sensor.chip_id); return slv_addr; #endif // (OMV_OV2640_ENABLE == 1) - #if (OMV_OV5640_ENABLE == 1) || (OMV_GC2145_ENABLE == 1) - // OV5640 and GC2145 share the same I2C address - case OV5640_SLV_ADDR: // Or GC2145 + #if (OMV_OV5640_ENABLE == 1) || (OMV_GC2145_ENABLE == 1) || (OMV_GENX320_ENABLE == 1) + // OV5640, GC2145, and GENX320 share the same I2C address + case OV5640_SLV_ADDR: // Or GC2145, or GENX320. // Try to read GC2145 chip ID first - omv_i2c_readb(&sensor.i2c_bus, slv_addr, GC_CHIP_ID, &sensor.chip_id); + omv_i2c_readb(&sensor.i2c_bus, slv_addr, GC_CHIP_ID, (uint8_t *) &sensor.chip_id); if (sensor.chip_id != GC2145_ID) { // If it fails, try reading OV5640 chip ID. - omv_i2c_readb2(&sensor.i2c_bus, slv_addr, OV5640_CHIP_ID, &sensor.chip_id); + omv_i2c_readb2(&sensor.i2c_bus, slv_addr, OV5640_CHIP_ID, (uint8_t *) &sensor.chip_id); + + #if (OMV_GENX320_ENABLE == 1) + if (sensor.chip_id != OV5640_ID) { + // If it fails, try reading GENX320 chip ID. + uint8_t buf[] = {(GENX320_CHIP_ID >> 8), GENX320_CHIP_ID}; + omv_i2c_write_bytes(&sensor.i2c_bus, slv_addr, buf, 2, OMV_I2C_XFER_NO_STOP); + omv_i2c_read_bytes(&sensor.i2c_bus, slv_addr, (uint8_t *) &sensor.chip_id, 4, OMV_I2C_XFER_NO_FLAGS); + sensor.chip_id = __REV(sensor.chip_id); + } + #endif // (OMV_GENX320_ENABLE == 1) } return slv_addr; - #endif // (OMV_OV5640_ENABLE == 1) || (OMV_GC2145_ENABLE == 1) + #endif // (OMV_OV5640_ENABLE == 1) || (OMV_GC2145_ENABLE == 1) || (OMV_GENX320_ENABLE == 1) #if (OMV_OV7725_ENABLE == 1) || (OMV_OV7670_ENABLE == 1) || (OMV_OV7690_ENABLE == 1) case OV7725_SLV_ADDR: // Or OV7690 or OV7670. - omv_i2c_readb(&sensor.i2c_bus, slv_addr, OV_CHIP_ID, &sensor.chip_id); + omv_i2c_readb(&sensor.i2c_bus, slv_addr, OV_CHIP_ID, (uint8_t *) &sensor.chip_id); return slv_addr; #endif //(OMV_OV7725_ENABLE == 1) || (OMV_OV7670_ENABLE == 1) || (OMV_OV7690_ENABLE == 1) #if (OMV_MT9V0XX_ENABLE == 1) case MT9V0XX_SLV_ADDR: - omv_i2c_readw(&sensor.i2c_bus, slv_addr, ON_CHIP_ID, &sensor.chip_id_w); + omv_i2c_readw(&sensor.i2c_bus, slv_addr, ON_CHIP_ID, (uint16_t *) &sensor.chip_id); return slv_addr; #endif //(OMV_MT9V0XX_ENABLE == 1) #if (OMV_MT9M114_ENABLE == 1) case MT9M114_SLV_ADDR: - omv_i2c_readw2(&sensor.i2c_bus, slv_addr, ON_CHIP_ID, &sensor.chip_id_w); + omv_i2c_readw2(&sensor.i2c_bus, slv_addr, ON_CHIP_ID, (uint16_t *) &sensor.chip_id); return slv_addr; #endif // (OMV_MT9M114_ENABLE == 1) @@ -232,20 +243,20 @@ static int sensor_detect() { #if (OMV_HM01B0_ENABLE == 1) || (OMV_HM0360_ENABLE == 1) case HM0XX0_SLV_ADDR: - omv_i2c_readb2(&sensor.i2c_bus, slv_addr, HIMAX_CHIP_ID, &sensor.chip_id); + omv_i2c_readb2(&sensor.i2c_bus, slv_addr, HIMAX_CHIP_ID, (uint8_t *) &sensor.chip_id); return slv_addr; #endif // (OMV_HM01B0_ENABLE == 1) || (OMV_HM0360_ENABLE == 1) #if (OMV_FROGEYE2020_ENABLE == 1) case FROGEYE2020_SLV_ADDR: - sensor.chip_id_w = FROGEYE2020_ID; + sensor.chip_id = FROGEYE2020_ID; return slv_addr; #endif // (OMV_FROGEYE2020_ENABLE == 1) #if (OMV_PAG7920_ENABLE == 1) case PAG7920_SLV_ADDR: - omv_i2c_readw(&sensor.i2c_bus, slv_addr, ON_CHIP_ID, &sensor.chip_id_w); - sensor.chip_id_w = (sensor.chip_id_w << 8) | (sensor.chip_id_w >> 8); + omv_i2c_readw(&sensor.i2c_bus, slv_addr, ON_CHIP_ID, (uint16_t *) &sensor.chip_id); + sensor.chip_id = (sensor.chip_id << 8) | (sensor.chip_id >> 8); return slv_addr; #endif // (OMV_PAG7920_ENABLE == 1) } @@ -315,7 +326,7 @@ int sensor_probe_init(uint32_t bus_id, uint32_t bus_speed) { #if (OMV_PAJ6100_ENABLE == 1) } else if (paj6100_detect(&sensor)) { // Found PixArt PAJ6100 - sensor.chip_id_w = PAJ6100_ID; + sensor.chip_id = PAJ6100_ID; sensor.power_pol = ACTIVE_LOW; sensor.reset_pol = ACTIVE_LOW; #endif @@ -326,7 +337,7 @@ int sensor_probe_init(uint32_t bus_id, uint32_t bus_speed) { } // A supported sensor was detected, try to initialize it. - switch (sensor.chip_id_w) { + switch (sensor.chip_id) { #if (OMV_OV2640_ENABLE == 1) case OV2640_ID: if (sensor_set_xclk_frequency(OMV_OV2640_XCLK_FREQ) != 0) { @@ -387,7 +398,7 @@ int sensor_probe_init(uint32_t bus_id, uint32_t bus_speed) { case MT9V0X2_ID_V_1: case MT9V0X2_ID_V_2: // Force old versions to the newest. - sensor.chip_id_w = MT9V0X2_ID; + sensor.chip_id = MT9V0X2_ID; case MT9V0X2_ID: case MT9V0X4_ID: if (sensor_set_xclk_frequency(OMV_MT9V0XX_XCLK_FREQ) != 0) { @@ -442,6 +453,16 @@ int sensor_probe_init(uint32_t bus_id, uint32_t bus_speed) { break; #endif //(OMV_GC2145_ENABLE == 1) + #if (OMV_GENX320_ENABLE == 1) + case GENX320_ID_ES: + case GENX320_ID_MP: + if (sensor_set_xclk_frequency(OMV_GENX320_XCLK_FREQ) != 0) { + return SENSOR_ERROR_TIM_INIT_FAILED; + } + init_ret = genx320_init(&sensor); + break; + #endif // (OMV_GENX320_ENABLE == 1) + #if (OMV_PAG7920_ENABLE == 1) case PAG7920_ID: if (sensor_set_xclk_frequency(OMV_PAG7920_XCLK_FREQ) != 0) { @@ -487,7 +508,7 @@ __weak int sensor_config(sensor_config_t config) { } __weak int sensor_get_id() { - return sensor.chip_id_w; + return sensor.chip_id; } __weak uint32_t sensor_get_xclk_frequency() { @@ -1129,13 +1150,12 @@ __weak int sensor_set_framebuffers(int count) { return SENSOR_ERROR_INVALID_FRAMESIZE; } - uint32_t bpp = IM_MAX(sensor_get_src_bpp(), sensor_get_dst_bpp()); #if OMV_CSI_HW_CROP_ENABLE // If hardware cropping is supported, use window size. - MAIN_FB()->frame_size = MAIN_FB()->u * MAIN_FB()->v * bpp; + MAIN_FB()->frame_size = MAIN_FB()->u * MAIN_FB()->v * 2; #else // Otherwise, use the real frame size. - MAIN_FB()->frame_size = resolution[sensor.framesize][0] * resolution[sensor.framesize][1] * bpp; + MAIN_FB()->frame_size = resolution[sensor.framesize][0] * resolution[sensor.framesize][1] * 2; #endif return framebuffer_set_buffers(count); } diff --git a/src/omv/imlib/imlib.h b/src/omv/imlib/imlib.h index 06bea41f1..c1cbac1f2 100644 --- a/src/omv/imlib/imlib.h +++ b/src/omv/imlib/imlib.h @@ -359,12 +359,16 @@ extern const int8_t lab_table[196608 / 2]; typedef enum { COLOR_PALETTE_RAINBOW, - COLOR_PALETTE_IRONBOW + COLOR_PALETTE_IRONBOW, + COLOR_PALETTE_EVT_DARK, + COLOR_PALETTE_EVT_LIGHT } color_palette_t; // Color palette LUTs extern const uint16_t rainbow_table[256]; extern const uint16_t ironbow_table[256]; +extern const uint16_t evt_dark_table[256]; +extern const uint16_t evt_light_table[256]; ///////////////// // Image Stuff // diff --git a/src/omv/imlib/rainbow_tab.c b/src/omv/imlib/rainbow_tab.c index 0593131ed..922edfbb0 100644 --- a/src/omv/imlib/rainbow_tab.c +++ b/src/omv/imlib/rainbow_tab.c @@ -67,3 +67,71 @@ const uint16_t ironbow_table[256] = { 0xFF05, 0xFF26, 0xFF28, 0xFF4A, 0xFF4C, 0xFF4D, 0xFF6F, 0xFF71, 0xFF92, 0xFF94, 0xFFB6, 0xFFB7, 0xFFD9, 0xFFDB, 0xFFFD, 0xFFE3 }; +const uint16_t evt_dark_table[256] = { + 0xD6FD, 0xD6FC, 0xD6DC, 0xD6DC, 0xD6DC, 0xCEBC, 0xCEBC, 0xCE9B, + 0xCE9B, 0xCE9B, 0xC67B, 0xC67B, 0xC67B, 0xC65A, 0xC65A, 0xC65A, + 0xBE3A, 0xBE3A, 0xBE1A, 0xBE19, 0xBE19, 0xB5F9, 0xB5F9, 0xB5F9, + 0xB5D8, 0xB5D8, 0xB5D8, 0xADB8, 0xADB8, 0xAD98, 0xAD97, 0xAD97, + 0xAD77, 0xA577, 0xA577, 0xA556, 0xA556, 0xA556, 0x9D36, 0x9D36, + 0x9D36, 0x9D16, 0x9D15, 0x9D15, 0x94F5, 0x94F5, 0x94F5, 0x94D4, + 0x94D4, 0x94B4, 0x8CB4, 0x8CB4, 0x8C94, 0x8C93, 0x8C93, 0x8C73, + 0x8473, 0x8473, 0x8452, 0x8452, 0x8432, 0x7C32, 0x7C32, 0x7C12, + 0x7C12, 0x7C11, 0x7BF1, 0x73F1, 0x73F1, 0x73D1, 0x73D0, 0x73B0, + 0x6BB0, 0x6BB0, 0x6B90, 0x6B90, 0x6B8F, 0x6B6F, 0x636F, 0x636F, + 0x634F, 0x634E, 0x632E, 0x632E, 0x5B2E, 0x5B0E, 0x5B0E, 0x5B0D, + 0x5AED, 0x52ED, 0x52ED, 0x52CD, 0x52CD, 0x52AC, 0x52AC, 0x4AAC, + 0x4AAC, 0x4A8C, 0x4A8C, 0x4A8B, 0x4A6B, 0x426B, 0x424B, 0x424B, + 0x424A, 0x422A, 0x3A2A, 0x3A2A, 0x3A0A, 0x3A0A, 0x3A09, 0x39E9, + 0x31E9, 0x31C9, 0x31C9, 0x31C9, 0x31A8, 0x29A8, 0x29A8, 0x2988, + 0x2988, 0x2988, 0x2967, 0x2167, 0x2147, 0x2147, 0x2147, 0x2126, + 0x2126, 0x2126, 0x2127, 0x2147, 0x2147, 0x2147, 0x2147, 0x2147, + 0x2147, 0x2168, 0x2168, 0x2168, 0x2168, 0x2168, 0x2168, 0x2188, + 0x2189, 0x2189, 0x2189, 0x2189, 0x2189, 0x21A9, 0x21A9, 0x21A9, + 0x21AA, 0x21AA, 0x21CA, 0x21CA, 0x21CA, 0x21CA, 0x21CA, 0x29CB, + 0x29EB, 0x29EB, 0x29EB, 0x29EB, 0x29EB, 0x29EC, 0x2A0C, 0x2A0C, + 0x2A0C, 0x2A0C, 0x2A0C, 0x2A0C, 0x2A2D, 0x2A2D, 0x2A2D, 0x2A2D, + 0x2A2D, 0x2A4D, 0x2A4D, 0x2A4D, 0x2A4E, 0x2A4E, 0x2A4E, 0x2A6E, + 0x2A6E, 0x2A6E, 0x2A6E, 0x2A6F, 0x2A6F, 0x328F, 0x328F, 0x328F, + 0x328F, 0x328F, 0x3290, 0x32B0, 0x32B0, 0x32B0, 0x32B0, 0x32B0, + 0x32B0, 0x32B1, 0x32D1, 0x32D1, 0x32D1, 0x32D1, 0x32D1, 0x32D1, + 0x32F2, 0x32F2, 0x32F2, 0x32F2, 0x32F2, 0x3312, 0x3312, 0x3313, + 0x3313, 0x3313, 0x3313, 0x3B33, 0x3B33, 0x3B33, 0x3B34, 0x3B34, + 0x3B34, 0x3B54, 0x3B54, 0x3B54, 0x3B54, 0x3B55, 0x3B55, 0x3B75, + 0x3B75, 0x3B75, 0x3B75, 0x3B75, 0x3B96, 0x3B96, 0x3B96, 0x3B96, + 0x3B96, 0x3B96, 0x3BB6, 0x3BB6, 0x3BB7, 0x3BB7, 0x3BB7, 0x3BB7, + 0x3BD7, 0x43D7, 0x43D8, 0x43D8, 0x43D8, 0x43D8, 0x43F8, 0x43F8 +}; +const uint16_t evt_light_table[256] = { + 0x43F8, 0x43F8, 0x43F8, 0x4418, 0x4419, 0x4419, 0x4C19, 0x4C19, + 0x4C39, 0x4C39, 0x4C39, 0x4C39, 0x4C39, 0x5439, 0x5459, 0x5459, + 0x5459, 0x5459, 0x5459, 0x5479, 0x5C79, 0x5C79, 0x5C79, 0x5C79, + 0x5C99, 0x5C99, 0x5C99, 0x6499, 0x6499, 0x6499, 0x64B9, 0x64B9, + 0x64B9, 0x6CBA, 0x6CBA, 0x6CDA, 0x6CDA, 0x6CDA, 0x6CDA, 0x6CDA, + 0x6CFA, 0x74FA, 0x74FA, 0x74FA, 0x74FA, 0x751A, 0x751A, 0x751A, + 0x7D1A, 0x7D1A, 0x7D1A, 0x7D3A, 0x7D3A, 0x7D3A, 0x853A, 0x853A, + 0x855A, 0x855A, 0x855A, 0x855A, 0x855A, 0x8D5A, 0x8D5A, 0x8D7B, + 0x8D7B, 0x8D7B, 0x8D7B, 0x8D7B, 0x959B, 0x959B, 0x959B, 0x959B, + 0x959B, 0x95BB, 0x95BB, 0x9DBB, 0x9DBB, 0x9DBB, 0x9DDB, 0x9DDB, + 0x9DDB, 0x9DDB, 0xA5DB, 0xA5DB, 0xA5FB, 0xA5FB, 0xA5FB, 0xA5FB, + 0xA5FB, 0xAE1B, 0xAE1B, 0xAE1B, 0xAE1B, 0xAE1B, 0xAE3B, 0xAE3B, + 0xB63C, 0xB63C, 0xB63C, 0xB65C, 0xB65C, 0xB65C, 0xB65C, 0xBE5C, + 0xBE5C, 0xBE7C, 0xBE7C, 0xBE7C, 0xBE7C, 0xBE7C, 0xC69C, 0xC69C, + 0xC69C, 0xC69C, 0xC69C, 0xC6BC, 0xC6BC, 0xCEBC, 0xCEBC, 0xCEBC, + 0xCEBC, 0xCEDC, 0xCEDC, 0xD6DC, 0xD6DC, 0xD6DD, 0xD6FD, 0xD6FD, + 0xD6FD, 0xD6FC, 0xD6DC, 0xD6DC, 0xD6DC, 0xCEBC, 0xCEBC, 0xCE9B, + 0xCE9B, 0xCE9B, 0xC67B, 0xC67B, 0xC67B, 0xC65A, 0xC65A, 0xC65A, + 0xBE3A, 0xBE3A, 0xBE1A, 0xBE19, 0xBE19, 0xB5F9, 0xB5F9, 0xB5F9, + 0xB5D8, 0xB5D8, 0xB5D8, 0xADB8, 0xADB8, 0xAD98, 0xAD97, 0xAD97, + 0xAD77, 0xA577, 0xA577, 0xA556, 0xA556, 0xA556, 0x9D36, 0x9D36, + 0x9D36, 0x9D16, 0x9D15, 0x9D15, 0x94F5, 0x94F5, 0x94F5, 0x94D4, + 0x94D4, 0x94B4, 0x8CB4, 0x8CB4, 0x8C94, 0x8C93, 0x8C93, 0x8C73, + 0x8473, 0x8473, 0x8452, 0x8452, 0x8432, 0x7C32, 0x7C32, 0x7C12, + 0x7C12, 0x7C11, 0x7BF1, 0x73F1, 0x73F1, 0x73D1, 0x73D0, 0x73B0, + 0x6BB0, 0x6BB0, 0x6B90, 0x6B90, 0x6B8F, 0x6B6F, 0x636F, 0x636F, + 0x634F, 0x634E, 0x632E, 0x632E, 0x5B2E, 0x5B0E, 0x5B0E, 0x5B0D, + 0x5AED, 0x52ED, 0x52ED, 0x52CD, 0x52CD, 0x52AC, 0x52AC, 0x4AAC, + 0x4AAC, 0x4A8C, 0x4A8C, 0x4A8B, 0x4A6B, 0x426B, 0x424B, 0x424B, + 0x424A, 0x422A, 0x3A2A, 0x3A2A, 0x3A0A, 0x3A0A, 0x3A09, 0x39E9, + 0x31E9, 0x31C9, 0x31C9, 0x31C9, 0x31A8, 0x29A8, 0x29A8, 0x2988, + 0x2988, 0x2988, 0x2967, 0x2167, 0x2147, 0x2147, 0x2147, 0x2126 +}; diff --git a/src/omv/modules/py_helper.c b/src/omv/modules/py_helper.c index 52b5d440d..8a4f743ff 100644 --- a/src/omv/modules/py_helper.c +++ b/src/omv/modules/py_helper.c @@ -63,6 +63,12 @@ const void *py_helper_arg_to_palette(const mp_obj_t arg, uint32_t pixfmt) { palette = rainbow_table; } else if (type == COLOR_PALETTE_IRONBOW) { palette = ironbow_table; + #if (OMV_GENX320_ENABLE == 1) + } else if (type == COLOR_PALETTE_EVT_DARK) { + palette = evt_dark_table; + } else if (type == COLOR_PALETTE_EVT_LIGHT) { + palette = evt_light_table; + #endif // OMV_GENX320_ENABLE == 1 } else { mp_raise_msg(&mp_type_ValueError, MP_ERROR_TEXT("Invalid color palette")); } @@ -463,6 +469,12 @@ const uint16_t *py_helper_keyword_color_palette(uint n_args, const mp_obj_t *arg default_color_palette = rainbow_table; } else if (palette == COLOR_PALETTE_IRONBOW) { default_color_palette = ironbow_table; + #if (OMV_GENX320_ENABLE == 1) + } else if (palette == COLOR_PALETTE_EVT_DARK) { + default_color_palette = evt_dark_table; + } else if (palette == COLOR_PALETTE_EVT_LIGHT) { + default_color_palette = evt_light_table; + #endif // OMV_GENX320_ENABLE == 1 } else { mp_raise_msg(&mp_type_ValueError, MP_ERROR_TEXT("Invalid pre-defined color palette!")); diff --git a/src/omv/modules/py_image.c b/src/omv/modules/py_image.c index caf7c68e2..d0ffbf776 100644 --- a/src/omv/modules/py_image.c +++ b/src/omv/modules/py_image.c @@ -1195,6 +1195,18 @@ static mp_obj_t py_image_to_ironbow(uint n_args, const mp_obj_t *args, mp_map_t } static MP_DEFINE_CONST_FUN_OBJ_KW(py_image_to_ironbow_obj, 1, py_image_to_ironbow); +#if (OMV_GENX320_ENABLE == 1) +static mp_obj_t py_image_to_evt_dark(uint n_args, const mp_obj_t *args, mp_map_t *kw_args) { + return py_image_to(PIXFORMAT_RGB565, MP_ROM_INT(COLOR_PALETTE_EVT_DARK), false, n_args, args, kw_args); +} +static MP_DEFINE_CONST_FUN_OBJ_KW(py_image_to_evt_dark_obj, 1, py_image_to_evt_dark); + +static mp_obj_t py_image_to_evt_light(uint n_args, const mp_obj_t *args, mp_map_t *kw_args) { + return py_image_to(PIXFORMAT_RGB565, MP_ROM_INT(COLOR_PALETTE_EVT_LIGHT), false, n_args, args, kw_args); +} +static MP_DEFINE_CONST_FUN_OBJ_KW(py_image_to_evt_light_obj, 1, py_image_to_evt_light); +#endif // OMV_GENX320_ENABLE == 1 + static mp_obj_t py_image_to_jpeg(uint n_args, const mp_obj_t *args, mp_map_t *kw_args) { return py_image_to(PIXFORMAT_JPEG, MP_ROM_NONE, false, n_args, args, kw_args); } @@ -6218,6 +6230,10 @@ static const mp_rom_map_elem_t locals_dict_table[] = { {MP_ROM_QSTR(MP_QSTR_to_rgb565), MP_ROM_PTR(&py_image_to_rgb565_obj)}, {MP_ROM_QSTR(MP_QSTR_to_rainbow), MP_ROM_PTR(&py_image_to_rainbow_obj)}, {MP_ROM_QSTR(MP_QSTR_to_ironbow), MP_ROM_PTR(&py_image_to_ironbow_obj)}, + #if (OMV_GENX320_ENABLE == 1) + {MP_ROM_QSTR(MP_QSTR_to_evt_dark), MP_ROM_PTR(&py_image_to_evt_dark_obj)}, + {MP_ROM_QSTR(MP_QSTR_to_evt_light), MP_ROM_PTR(&py_image_to_evt_light_obj)}, + #endif // OMV_GENX320_ENABLE == 1 {MP_ROM_QSTR(MP_QSTR_to_jpeg), MP_ROM_PTR(&py_image_to_jpeg_obj)}, {MP_ROM_QSTR(MP_QSTR_to_png), MP_ROM_PTR(&py_image_to_png_obj)}, {MP_ROM_QSTR(MP_QSTR_compress), MP_ROM_PTR(&py_image_to_jpeg_obj)}, @@ -7027,6 +7043,10 @@ static const mp_rom_map_elem_t globals_dict_table[] = { {MP_ROM_QSTR(MP_QSTR_PNG), MP_ROM_INT(PIXFORMAT_PNG)}, /* PNG/COMPRESSED*/ {MP_ROM_QSTR(MP_QSTR_PALETTE_RAINBOW), MP_ROM_INT(COLOR_PALETTE_RAINBOW)}, {MP_ROM_QSTR(MP_QSTR_PALETTE_IRONBOW), MP_ROM_INT(COLOR_PALETTE_IRONBOW)}, + #if (OMV_GENX320_ENABLE == 1) + {MP_ROM_QSTR(MP_QSTR_PALETTE_EVT_DARK), MP_ROM_INT(COLOR_PALETTE_EVT_DARK)}, + {MP_ROM_QSTR(MP_QSTR_PALETTE_EVT_LIGHT), MP_ROM_INT(COLOR_PALETTE_EVT_LIGHT)}, + #endif // OMV_GENX320_ENABLE == 1 {MP_ROM_QSTR(MP_QSTR_AREA), MP_ROM_INT(IMAGE_HINT_AREA)}, {MP_ROM_QSTR(MP_QSTR_BILINEAR), MP_ROM_INT(IMAGE_HINT_BILINEAR)}, {MP_ROM_QSTR(MP_QSTR_BICUBIC), MP_ROM_INT(IMAGE_HINT_BICUBIC)}, diff --git a/src/omv/modules/py_sensor.c b/src/omv/modules/py_sensor.c index b55ad1eb7..ccf7c13ef 100644 --- a/src/omv/modules/py_sensor.c +++ b/src/omv/modules/py_sensor.c @@ -1004,6 +1004,14 @@ static mp_obj_t py_sensor_set_color_palette(mp_obj_t palette_obj) { case COLOR_PALETTE_IRONBOW: sensor_set_color_palette(ironbow_table); break; + #if (OMV_GENX320_ENABLE == 1) + case COLOR_PALETTE_EVT_DARK: + sensor_set_color_palette(evt_dark_table); + break; + case COLOR_PALETTE_EVT_LIGHT: + sensor_set_color_palette(evt_light_table); + break; + #endif // OMV_GENX320_ENABLE == 1 default: sensor_raise_error(SENSOR_ERROR_INVALID_ARGUMENT); break; @@ -1018,6 +1026,12 @@ static mp_obj_t py_sensor_get_color_palette() { return mp_obj_new_int(COLOR_PALETTE_RAINBOW); } else if (palette == ironbow_table) { return mp_obj_new_int(COLOR_PALETTE_IRONBOW); + #if (OMV_GENX320_ENABLE == 1) + } else if (palette == evt_dark_table) { + return mp_obj_new_int(COLOR_PALETTE_EVT_DARK); + } else if (palette == evt_light_table) { + return mp_obj_new_int(COLOR_PALETTE_EVT_LIGHT); + #endif // OMV_GENX320_ENABLE == 1 } return mp_const_none; } diff --git a/src/omv/ports/mimxrt/omv_portconfig.mk b/src/omv/ports/mimxrt/omv_portconfig.mk index e9918206d..794306f68 100644 --- a/src/omv/ports/mimxrt/omv_portconfig.mk +++ b/src/omv/ports/mimxrt/omv_portconfig.mk @@ -96,6 +96,7 @@ OMV_CFLAGS += -I$(TOP_DIR)/$(OMV_DIR)/templates/ OMV_CFLAGS += -I$(TOP_DIR)/$(OMV_DIR)/ports/$(PORT)/ OMV_CFLAGS += -I$(TOP_DIR)/$(OMV_DIR)/ports/$(PORT)/modules/ +OMV_CFLAGS += -I$(TOP_DIR)/$(GENX320_DIR)/include/ OMV_CFLAGS += -I$(TOP_DIR)/$(LEPTON_DIR)/include/ OMV_CFLAGS += -I$(TOP_DIR)/$(LSM6DS3_DIR)/include/ OMV_CFLAGS += -I$(TOP_DIR)/$(LSM6DSOX_DIR)/include/ @@ -118,6 +119,7 @@ LIBS += $(TOP_DIR)/$(TENSORFLOW_DIR)/libtflm/lib/libtflm-$(CPU)+fp-release.a #------------- Firmware Objects ----------------# FIRM_OBJ += $(wildcard $(BUILD)/$(CMSIS_DIR)/src/dsp/*/*.o) FIRM_OBJ += $(wildcard $(BUILD)/$(HAL_DIR)/drivers/*.o) +FIRM_OBJ += $(wildcard $(BUILD)/$(GENX320_DIR)/src/*.o) FIRM_OBJ += $(wildcard $(BUILD)/$(LEPTON_DIR)/src/*.o) ifeq ($(MICROPY_PY_IMU), 1) FIRM_OBJ += $(wildcard $(BUILD)/$(LSM6DS3_DIR)/src/*.o) @@ -171,6 +173,7 @@ FIRM_OBJ += $(addprefix $(BUILD)/$(OMV_DIR)/sensors/, \ hm01b0.o \ hm0360.o \ gc2145.o \ + genx320.o \ pag7920.o \ paj6100.o \ frogeye2020.o \ @@ -525,6 +528,7 @@ FIRMWARE_OBJS: | $(BUILD) $(FW_DIR) $(MAKE) -C $(HAL_DIR) BUILD=$(BUILD)/$(HAL_DIR) CFLAGS="$(CFLAGS) -MMD" $(MAKE) -C $(TENSORFLOW_DIR) BUILD=$(BUILD)/$(TENSORFLOW_DIR) CFLAGS="$(CFLAGS) -MMD" headers $(MAKE) -C $(MICROPY_DIR)/ports/$(PORT) BUILD=$(BUILD)/$(MICROPY_DIR) $(MICROPY_ARGS) + $(MAKE) -C $(GENX320_DIR) BUILD=$(BUILD)/$(GENX320_DIR) CFLAGS="$(CFLAGS) -MMD" $(MAKE) -C $(LEPTON_DIR) BUILD=$(BUILD)/$(LEPTON_DIR) CFLAGS="$(CFLAGS) -MMD" ifeq ($(MICROPY_PY_IMU), 1) $(MAKE) -C $(LSM6DS3_DIR) BUILD=$(BUILD)/$(LSM6DS3_DIR) CFLAGS="$(CFLAGS) -MMD" diff --git a/src/omv/ports/stm32/omv_portconfig.mk b/src/omv/ports/stm32/omv_portconfig.mk index 99948174b..39b217b3d 100644 --- a/src/omv/ports/stm32/omv_portconfig.mk +++ b/src/omv/ports/stm32/omv_portconfig.mk @@ -90,6 +90,7 @@ OMV_CFLAGS += -I$(TOP_DIR)/$(OMV_DIR)/templates/ OMV_CFLAGS += -I$(TOP_DIR)/$(OMV_DIR)/ports/$(PORT)/ OMV_CFLAGS += -I$(TOP_DIR)/$(OMV_DIR)/ports/$(PORT)/modules/ +OMV_CFLAGS += -I$(TOP_DIR)/$(GENX320_DIR)/include/ OMV_CFLAGS += -I$(TOP_DIR)/$(LEPTON_DIR)/include/ OMV_CFLAGS += -I$(TOP_DIR)/$(LSM6DS3_DIR)/include/ OMV_CFLAGS += -I$(TOP_DIR)/$(LSM6DSOX_DIR)/include/ @@ -145,6 +146,7 @@ LIBS += $(TOP_DIR)/$(TENSORFLOW_DIR)/libtflm/lib/libtflm-$(CPU)+fp-release.a FIRM_OBJ += $(wildcard $(BUILD)/$(CMSIS_DIR)/src/dsp/*/*.o) FIRM_OBJ += $(wildcard $(BUILD)/$(HAL_DIR)/src/*.o) +FIRM_OBJ += $(wildcard $(BUILD)/$(GENX320_DIR)/src/*.o) FIRM_OBJ += $(wildcard $(BUILD)/$(LEPTON_DIR)/src/*.o) ifeq ($(MICROPY_PY_IMU), 1) FIRM_OBJ += $(wildcard $(BUILD)/$(LSM6DS3_DIR)/src/*.o) @@ -201,6 +203,7 @@ FIRM_OBJ += $(addprefix $(BUILD)/$(OMV_DIR)/sensors/, \ hm01b0.o \ hm0360.o \ gc2145.o \ + genx320.o \ pag7920.o \ paj6100.o \ frogeye2020.o \ @@ -607,6 +610,7 @@ UVC_OBJ += $(addprefix $(BUILD)/$(OMV_DIR)/sensors/, \ hm01b0.o \ hm0360.o \ gc2145.o \ + genx320.o \ pag7920.o \ paj6100.o \ frogeye2020.o \ @@ -637,6 +641,7 @@ UVC_OBJ += $(addprefix $(BUILD)/$(OMV_DIR)/ports/stm32/,\ omv_spi.o \ ) +UVC_OBJ += $(wildcard $(BUILD)/$(GENX320_DIR)/src/*.o) UVC_OBJ += $(wildcard $(BUILD)/$(LEPTON_DIR)/src/*.o) ifeq ($(MICROPY_PY_IMU), 1) UVC_OBJ += $(wildcard $(BUILD)/$(LSM6DS3_DIR)/src/*.o) @@ -663,6 +668,7 @@ FIRMWARE_OBJS: | $(BUILD) $(FW_DIR) $(MAKE) -C $(HAL_DIR) BUILD=$(BUILD)/$(HAL_DIR) CFLAGS="$(CFLAGS) -MMD" $(MAKE) -C $(TENSORFLOW_DIR) BUILD=$(BUILD)/$(TENSORFLOW_DIR) CFLAGS="$(CFLAGS) -MMD" headers $(MAKE) -C $(MICROPY_DIR)/ports/$(PORT) BUILD=$(BUILD)/$(MICROPY_DIR) $(MICROPY_ARGS) + $(MAKE) -C $(GENX320_DIR) BUILD=$(BUILD)/$(GENX320_DIR) CFLAGS="$(CFLAGS) -MMD" $(MAKE) -C $(LEPTON_DIR) BUILD=$(BUILD)/$(LEPTON_DIR) CFLAGS="$(CFLAGS) -MMD" ifeq ($(MICROPY_PY_IMU), 1) $(MAKE) -C $(LSM6DS3_DIR) BUILD=$(BUILD)/$(LSM6DS3_DIR) CFLAGS="$(CFLAGS) -MMD" diff --git a/src/omv/sensors/genx320.c b/src/omv/sensors/genx320.c new file mode 100644 index 000000000..1f7877474 --- /dev/null +++ b/src/omv/sensors/genx320.c @@ -0,0 +1,427 @@ +/* + * This file is part of the OpenMV project. + * + * Copyright (c) 2013-2024 Ibrahim Abdelkader + * Copyright (c) 2013-2024 Kwabena W. Agyeman + * + * This work is licensed under the MIT license, see the file LICENSE for details. + * + * GENX320 driver. + */ +#include "omv_boardconfig.h" +#if (OMV_GENX320_ENABLE == 1) + +#include +#include +#include + +#include "omv_i2c.h" +#include "sensor.h" +#include "framebuffer.h" +#include "genx320.h" +#include "py/mphal.h" +#include "evt_2_0.h" +#include "psee_genx320.h" + +#define BLANK_LINES 4 +#define BLANK_COLUMNS 4 + +#define SENSOR_WIDTH 324 +#define SENSOR_HEIGHT 324 + +#define ACTIVE_SENSOR_WIDTH (SENSOR_WIDTH - BLANK_COLUMNS) +#define ACTIVE_SENSOR_HEIGHT (SENSOR_HEIGHT - BLANK_LINES) +#define ACTIVE_SENSOR_SIZE (ACTIVE_SENSOR_WIDTH * ACTIVE_SENSOR_HEIGHT) + +#define HSYNC_CLOCK_CYCLES 32 +#define VSYNC_CLOCK_CYCLES 32 + +#define CONTRAST_DEFAULT 16 +#define BRIGHTNESS_DEFAULT 128 + +#define I2C_TIMEOUT 1000 +#define SRAM_INIT_TIMEOUT 100 + +#define INTEGRATION_DEF_PREIOD 10000 // 10ms (100 FPS) +#define INTEGRATION_MIN_PREIOD 0x10 // 16us +#define INTEGRATION_MAX_PREIOD 0x1FFF0 // 131056us + +#define FPS_TO_US(fps) (1000000 / (fps)) + +#define EVENT_THRESHOLD_TO_CALIBRATE 100000 +#define EVENT_THRESHOLD_SIGMA 10 + +#if (OMV_GENX320_CAL_ENABLE == 1) +static bool hot_pixels_disabled = false; +#endif // (OMV_GENX320_CAL_ENABLE == 1) +static int32_t contrast = CONTRAST_DEFAULT; +static int32_t brightness = BRIGHTNESS_DEFAULT; + +static int reset(sensor_t *sensor) { + sensor->color_palette = NULL; + + #if (OMV_GENX320_CAL_ENABLE == 1) + hot_pixels_disabled = false; + #endif // (OMV_GENX320_CAL_ENABLE == 1) + contrast = CONTRAST_DEFAULT; + brightness = BRIGHTNESS_DEFAULT; + + BIAS_Params_t biases = (sensor->chip_id == SAPHIR_ES_ID) ? genx320es_default_biases : genx320mp_default_biases; + + // Force CPI with chicken bits + psee_sensor_write(TOP_CHICKEN, TOP_CHICKEN_OVERRIDE_MIPI_MODE_EN | + TOP_CHICKEN_OVERRIDE_HISTO_MODE_EN | + #if (OMV_GENX320_EHC_ENABLE == 1) + 1 << TOP_CHICKEN_OVERRIDE_HISTO_MODE_Pos | + #else + 0 << TOP_CHICKEN_OVERRIDE_HISTO_MODE_Pos | + #endif // (OMV_GENX320_EHC_ENABLE == 1) + I2C_TIMEOUT << TOP_CHICKEN_I2C_TIMEOUT_Pos); + + // Start the Init sequence + psee_sensor_init(&dcmi_evt); + + // Set EVT20 mode + psee_sensor_write(EDF_CONTROL, 0); + + // Configure Packet and Frame sizes + psee_sensor_write(CPI_PACKET_SIZE_CONTROL, ACTIVE_SENSOR_WIDTH); + psee_sensor_write(CPI_PACKET_TIME_CONTROL, ACTIVE_SENSOR_WIDTH << CPI_PACKET_TIME_CONTROL_PERIOD_Pos | + HSYNC_CLOCK_CYCLES << CPI_PACKET_TIME_CONTROL_BLANKING_Pos); + psee_sensor_write(CPI_FRAME_SIZE_CONTROL, ACTIVE_SENSOR_HEIGHT); + psee_sensor_write(CPI_FRAME_TIME_CONTROL, VSYNC_CLOCK_CYCLES); + + // Enable dropping + psee_sensor_write(RO_READOUT_CTRL, RO_READOUT_CTRL_DIGITAL_PIPE_EN | + RO_READOUT_CTRL_AVOID_BPRESS_TD | + RO_READOUT_CTRL_DROP_EN | + RO_READOUT_CTRL_DROP_ON_FULL_EN); + + // Disable the Anti-FlicKering filter + psee_disable_afk(); + + // Operation Mode Configuration + psee_PM3C_config(); + + // Set the default border for the Activity map + psee_set_default_XY_borders(&genx320mp_default_am_borders); + + // Configure the activity map + psee_configure_activity_map(); + + // Set Standard biases + psee_sensor_set_biases(&biases); + + // Start the sensor + psee_sensor_start(&dcmi_evt); + + #if (OMV_GENX320_EHC_ENABLE == 1) + // Bypass Filter + psee_sensor_write(EHC_PIPELINE_CONTROL, 0); + + // Start sram init + psee_sensor_write(SRAM_INITN, SRAM_INITN_EHC_STC); + uint32_t reg; + psee_sensor_read(SRAM_PD0, ®); + psee_sensor_write(SRAM_PD0, reg & ~(SRAM_PD0_EHC_PD | SRAM_PD0_STC0_PD | SRAM_PD0_STC1_PD)); + psee_sensor_write(EHC_INITIALISATION, EHC_INITIALISATION_REQ_INIT); + + // Configure the block + psee_sensor_write(EHC_EHC_CONTROL, 0 << EHC_CONTROL_ALGO_SEL_Pos | // diff3 + 1 << EHC_CONTROL_TRIG_SEL_Pos); // integration period + psee_sensor_write(EHC_BITS_SPLITTING, INT8_T_BITS << EHC_BITS_SPLITTING_NEGATIVE_BIT_LENGTH_Pos | + 0 << EHC_BITS_SPLITTING_POSITIVE_BIT_LENGTH_Pos | + 0 << EHC_BITS_SPLITTING_OUT_16BITS_PADDING_MODE_Pos); + psee_sensor_write(EHC_INTEGRATION_PERIOD, INTEGRATION_DEF_PREIOD); + + // Check SRAM INIT done + for (mp_uint_t start = mp_hal_ticks_ms();; mp_hal_delay_ms(1)) { + uint32_t reg; + psee_sensor_read(EHC_INITIALISATION, ®); + + if (reg & EHC_INITIALISATION_FLAG_INIT_DONE) { + psee_sensor_write(EHC_INITIALISATION, EHC_INITIALISATION_FLAG_INIT_DONE); + break; + } + + if ((mp_hal_ticks_ms() - start) >= SRAM_INIT_TIMEOUT) { + return -1; + } + } + + // Re-enable filter + psee_sensor_write(EHC_PIPELINE_CONTROL, EHC_PIPELINE_CONTROL_ENABLE); + #endif // (OMV_GENX320_EHC_ENABLE == 1) + + return 0; +} + +static int sleep(sensor_t *sensor, int enable) { + if (enable) { + psee_PM2_config(); + } else { + psee_PM3C_config(); + } + return 0; +} + +static int read_reg(sensor_t *sensor, uint16_t reg_addr) { + uint32_t reg_data; + uint8_t addr[] = {(reg_addr >> 8), reg_addr}; + if (omv_i2c_write_bytes(&sensor->i2c_bus, sensor->slv_addr, addr, 2, OMV_I2C_XFER_NO_STOP) != 0) { + return -1; + } + if (omv_i2c_read_bytes(&sensor->i2c_bus, sensor->slv_addr, (uint8_t *) ®_data, 4, OMV_I2C_XFER_NO_FLAGS) != 0) { + return -1; + } + reg_data = __REV(reg_data); + return reg_data; +} + +static int write_reg(sensor_t *sensor, uint16_t reg_addr, uint16_t reg_data) { + uint8_t buf[] = {(reg_addr >> 8), reg_addr, (reg_data >> 24), (reg_data >> 16), (reg_data >> 8), reg_data}; + return omv_i2c_write_bytes(&sensor->i2c_bus, sensor->slv_addr, buf, 6, OMV_I2C_XFER_NO_FLAGS); +} + +static int set_pixformat(sensor_t *sensor, pixformat_t pixformat) { + return (pixformat == PIXFORMAT_GRAYSCALE) ? 0 : -1; +} + +static int set_framesize(sensor_t *sensor, framesize_t framesize) { + return (framesize == FRAMESIZE_320X320) ? 0 : -1; +} + +static int set_framerate(sensor_t *sensor, int framerate) { + #if (OMV_GENX320_EHC_ENABLE == 1) + int us = FPS_TO_US(framerate); + + if (us < INTEGRATION_MIN_PREIOD) { + return -1; + } + + if (us > INTEGRATION_MAX_PREIOD) { + return -1; + } + + psee_sensor_write(EHC_INTEGRATION_PERIOD, us); + #endif // (OMV_GENX320_EHC_ENABLE == 1) + return 0; +} + +static int set_contrast(sensor_t *sensor, int level) { + contrast = __USAT(level, UINT8_T_BITS); + return 0; +} + +static int set_brightness(sensor_t *sensor, int level) { + brightness = __USAT(level, UINT8_T_BITS); + return 0; +} + +static int set_colorbar(sensor_t *sensor, int enable) { + uint32_t reg; + psee_sensor_read(RO_READOUT_CTRL, ®); + reg = (reg & ~RO_READOUT_CTRL_ERC_SELF_TEST_EN) | (enable ? RO_READOUT_CTRL_ERC_SELF_TEST_EN : 0); + psee_sensor_write(RO_READOUT_CTRL, reg); + return 0; +} + +static int set_hmirror(sensor_t *sensor, int enable) { + psee_sensor_set_flip(enable, sensor->vflip); + return 0; +} + +static int set_vflip(sensor_t *sensor, int enable) { + psee_sensor_set_flip(sensor->hmirror, enable); + return 0; +} + +#if (OMV_GENX320_CAL_ENABLE == 1) +static void disable_hot_pixels(uint8_t *histogram) { + // Compute average + int32_t avg = 0; + + for (uint32_t i = 0; i < ACTIVE_SENSOR_SIZE; i++) { + avg += histogram[i]; + } + + avg /= ACTIVE_SENSOR_SIZE; + + // Compute std + int32_t std = 0; + + for (uint32_t i = 0; i < ACTIVE_SENSOR_SIZE; i++) { + int32_t diff = histogram[i] - avg; + std += diff * diff; + } + + std = fast_sqrtf(std / ACTIVE_SENSOR_SIZE); + + int32_t threshold = avg + (std * EVENT_THRESHOLD_SIGMA); + + for (uint32_t y = 0; y < ACTIVE_SENSOR_HEIGHT; y++) { + // Reset all blocks + for (uint32_t i = 0; i < (ACTIVE_SENSOR_WIDTH / UINT32_T_BITS); i++) { + psee_write_ROI_X(i * sizeof(uint32_t), 0); + } + + // Select line + uint32_t offset = y / UINT32_T_BITS; + psee_write_ROI_Y(offset * sizeof(uint32_t), 1 << (y % UINT32_T_BITS)); + + // Trigger shadow + psee_write_ROI_CTRL(ROI_CTRL_PX_SW_RSTN | ROI_CTRL_TD_SHADOW_TRIGGER); + + uint32_t tmp[ACTIVE_SENSOR_WIDTH / UINT32_T_BITS] = {}; + for (uint32_t x = 0; x < ACTIVE_SENSOR_WIDTH; x++) { + if (histogram[(y * ACTIVE_SENSOR_WIDTH) + x] > threshold) { + tmp[x / UINT32_T_BITS] |= 1 << (x % UINT32_T_BITS); + } + } + + // Write x values to disable + for (uint32_t i = 0; i < (ACTIVE_SENSOR_WIDTH / UINT32_T_BITS); i++) { + psee_write_ROI_X(i * sizeof(uint32_t), tmp[i]); + } + + // Activate block + psee_write_ROI_CTRL(ROI_CTRL_PX_SW_RSTN | ROI_CTRL_TD_SHADOW_TRIGGER | ROI_CTRL_TD_EN); + + // Disable roi block + psee_write_ROI_CTRL(ROI_CTRL_PX_SW_RSTN); + psee_write_ROI_Y(offset * sizeof(uint32_t), 0); + } +} +#endif // (OMV_GENX320_CAL_ENABLE == 1) + +static void snapshot_post_process(image_t *image) { + #if (OMV_GENX320_EHC_ENABLE == 1) + for (uint32_t i = 0; i < ACTIVE_SENSOR_SIZE; i++) { + image->data[i] = __USAT((((int8_t *) image->data)[i] * contrast) + brightness, UINT8_T_BITS); + } + #else + uint8_t *out = fb_alloc(ACTIVE_SENSOR_SIZE, FB_ALLOC_NO_HINT); + memset(out, brightness, ACTIVE_SENSOR_SIZE); + + for (uint32_t i = 0; i < (ACTIVE_SENSOR_SIZE / sizeof(uint32_t)); i++) { + uint32_t val = ((uint32_t *) image->data)[i]; + uint32_t x = __EVT20_X(val); + uint32_t y = __EVT20_Y(val); + switch (__EVT20_TYPE(val)) { + case TD_LOW: { + if ((x < ACTIVE_SENSOR_WIDTH) && (y < ACTIVE_SENSOR_HEIGHT)) { + uint32_t index = (y * ACTIVE_SENSOR_WIDTH) + x; + out[index] = __USAT(((int32_t) out[index]) - contrast, UINT8_T_BITS); + } + break; + } + case TD_HIGH: { + if ((x < ACTIVE_SENSOR_WIDTH) && (y < ACTIVE_SENSOR_HEIGHT)) { + uint32_t index = (y * ACTIVE_SENSOR_WIDTH) + x; + out[index] = __USAT(((int32_t) out[index]) + contrast, UINT8_T_BITS); + } + break; + } + default: { + break; + } + } + } + + memcpy(image->data, out, ACTIVE_SENSOR_SIZE); + fb_free(); + #endif // (OMV_GENX320_EHC_ENABLE == 1) + + if (sensor.color_palette && (framebuffer_get_buffer_size() >= (ACTIVE_SENSOR_SIZE * sizeof(uint16_t)))) { + for (int32_t i = ACTIVE_SENSOR_SIZE - 1; i >= 0; i--) { + ((uint16_t *) image->data)[i] = sensor.color_palette[image->data[i]]; + } + image->pixfmt = PIXFORMAT_RGB565; + MAIN_FB()->pixfmt = PIXFORMAT_RGB565; + } +} + +static int snapshot(sensor_t *sensor, image_t *image, uint32_t flags) { + #if (OMV_GENX320_CAL_ENABLE == 1) + if (!hot_pixels_disabled) { + uint8_t *histogram = fb_alloc0(ACTIVE_SENSOR_SIZE, FB_ALLOC_NO_HINT); + + // Collect events to calibrate hot pixels. + for (uint32_t i = 0; i < EVENT_THRESHOLD_TO_CALIBRATE; ) { + int ret = sensor_snapshot(sensor, image, flags); + + if (ret < 0) { + return ret; + } + + // Build histogram of events. + #if (OMV_GENX320_EHC_ENABLE == 1) + for (uint32_t j = 0; j < ACTIVE_SENSOR_SIZE; j++) { + int32_t val = abs(((int8_t *) image->data)[j]); + histogram[j] = val; + i += val; + } + #else + for (uint32_t j = 0; j < (ACTIVE_SENSOR_SIZE / sizeof(uint32_t)); j++) { + uint32_t val = ((uint32_t *) image->data)[j]; + switch (__EVT20_TYPE(val)) { + case TD_LOW: + case TD_HIGH: { + uint32_t x = __EVT20_X(val); + uint32_t y = __EVT20_Y(val); + if ((x < ACTIVE_SENSOR_WIDTH) && (y < ACTIVE_SENSOR_HEIGHT)) { + uint32_t index = (y * ACTIVE_SENSOR_WIDTH) + x; + histogram[index] = __USAT(histogram[index] + 1, UINT8_T_BITS); + i++; + } + break; + } + default: { + break; + } + } + } + #endif // (OMV_GENX320_EHC_ENABLE == 1) + + snapshot_post_process(image); + } + + disable_hot_pixels(histogram); + + fb_free(); + hot_pixels_disabled = true; + } + #endif // (OMV_GENX320_CAL_ENABLE == 1) + + int ret = sensor_snapshot(sensor, image, flags); + + if (ret < 0) { + return ret; + } + + snapshot_post_process(image); + return ret; +} + +int genx320_init(sensor_t *sensor) { + // Initialize sensor structure + sensor->reset = reset; + sensor->sleep = sleep; + sensor->read_reg = read_reg; + sensor->write_reg = write_reg; + sensor->set_pixformat = set_pixformat; + sensor->set_framesize = set_framesize; + sensor->set_framerate = set_framerate; + sensor->set_contrast = set_contrast; + sensor->set_brightness = set_brightness; + sensor->set_colorbar = set_colorbar; + sensor->set_hmirror = set_hmirror; + sensor->set_vflip = set_vflip; + sensor->snapshot = snapshot; + + // Set sensor flags + sensor->mono_bpp = sizeof(uint8_t); + + return 0; +} +#endif // (OMV_GENX320_ENABLE == 1) diff --git a/src/omv/sensors/genx320.h b/src/omv/sensors/genx320.h new file mode 100644 index 000000000..0da68bbf9 --- /dev/null +++ b/src/omv/sensors/genx320.h @@ -0,0 +1,15 @@ +/* + * This file is part of the OpenMV project. + * + * Copyright (c) 2013-2024 Ibrahim Abdelkader + * Copyright (c) 2013-2024 Kwabena W. Agyeman + * + * This work is licensed under the MIT license, see the file LICENSE for details. + * + * GENX320 driver. + */ +#ifndef __GENX320_H__ +#define __GENX320_H__ +#define OMV_GENX320_XCLK_FREQ (24000000) +int genx320_init(sensor_t *sensor); +#endif // __GENX320_H__ diff --git a/src/omv/sensors/lepton.c b/src/omv/sensors/lepton.c index bf7e6e4ca..02808a2e4 100644 --- a/src/omv/sensors/lepton.c +++ b/src/omv/sensors/lepton.c @@ -522,17 +522,17 @@ int lepton_init(sensor_t *sensor) { // xxxx == Version // 01/00 == Shutter/NoShutter if (!strncmp(part.value, "500-0771", 8)) { - sensor->chip_id_w = LEPTON_3_5; + sensor->chip_id = LEPTON_3_5; } else if (!strncmp(part.value, "500-0726", 8)) { - sensor->chip_id_w = LEPTON_3_0; + sensor->chip_id = LEPTON_3_0; } else if (!strncmp(part.value, "500-0763", 8)) { - sensor->chip_id_w = LEPTON_2_5; + sensor->chip_id = LEPTON_2_5; } else if (!strncmp(part.value, "500-0659", 8)) { - sensor->chip_id_w = LEPTON_2_0; + sensor->chip_id = LEPTON_2_0; } else if (!strncmp(part.value, "500-0690", 8)) { - sensor->chip_id_w = LEPTON_1_6; + sensor->chip_id = LEPTON_1_6; } else if (!strncmp(part.value, "500-0643", 8)) { - sensor->chip_id_w = LEPTON_1_5; + sensor->chip_id = LEPTON_1_5; } return 0; } diff --git a/src/omv/sensors/mt9v0xx.c b/src/omv/sensors/mt9v0xx.c index f22deca00..120b5cd3c 100644 --- a/src/omv/sensors/mt9v0xx.c +++ b/src/omv/sensors/mt9v0xx.c @@ -37,11 +37,11 @@ static enum { cfa_type = MONO_CFA; static bool is_mt9v0x2(sensor_t *sensor) { - return (sensor->chip_id_w == MT9V0X2_ID) || (sensor->chip_id_w == MT9V0X2_C_ID); + return (sensor->chip_id == MT9V0X2_ID) || (sensor->chip_id == MT9V0X2_C_ID); } static bool is_mt9v0x4(sensor_t *sensor) { - return (sensor->chip_id_w == MT9V0X4_ID) || (sensor->chip_id_w == MT9V0X4_C_ID); + return (sensor->chip_id == MT9V0X4_ID) || (sensor->chip_id == MT9V0X4_C_ID); } static int reset(sensor_t *sensor) { @@ -525,13 +525,13 @@ int mt9v0xx_init(sensor_t *sensor) { switch ((cfa_type_reg >> 9) & 0x7) { case BAYER_CFA_ID: { cfa_type = BAYER_CFA; - switch (sensor->chip_id_w) { + switch (sensor->chip_id) { case MT9V0X2_ID: { - sensor->chip_id_w = MT9V0X2_C_ID; + sensor->chip_id = MT9V0X2_C_ID; break; } case MT9V0X4_ID: { - sensor->chip_id_w = MT9V0X4_C_ID; + sensor->chip_id = MT9V0X4_C_ID; break; } default: { diff --git a/tools/gen_rainbow.py b/tools/gen_rainbow.py index c5939bf2c..d25d9e11f 100644 --- a/tools/gen_rainbow.py +++ b/tools/gen_rainbow.py @@ -2,13 +2,39 @@ # -*- coding: utf-8 -*- # This file is part of the OpenMV project. # -# Copyright (c) 2013-2021 Ibrahim Abdelkader -# Copyright (c) 2013-2021 Kwabena W. Agyeman +# Copyright (c) 2013-2024 Ibrahim Abdelkader +# Copyright (c) 2013-2024 Kwabena W. Agyeman # # This work is licensed under the MIT license, see the file LICENSE for details. # # This script generates the rainbow lookup table. +def interpolate_color(color1, color2, factor): + return ( + int(color1[0] + (color2[0] - color1[0]) * factor), + int(color1[1] + (color2[1] - color1[1]) * factor), + int(color1[2] + (color2[2] - color1[2]) * factor) + ) + +def generate_lookup_table(lo_color, mid_color, hi_color): + lookup_table = [] + + for i in range(256): + if i < 128: + factor = i / 128.0 + color = interpolate_color(lo_color, mid_color, factor) + else: + factor = (i - 128) / 128.0 + color = interpolate_color(mid_color, hi_color, factor) + lookup_table.append(color) + + return lookup_table + +def rgb888_to_rgb565(tup): + return [(int(((r * 31) + 127.5) / 255) & 0x1F) << 11 | + (int(((g * 63) + 127.5) / 255) & 0x3F) << 5 | + (int(((b * 31) + 127.5) / 255) & 0x1F) for r,g,b in tup] + NUM_COL=256 SAT=1.0 VAL=1.0 @@ -309,3 +335,37 @@ for i in range(NUM_COL): sys.stdout.write(",\n") else: sys.stdout.write("\n};\n") + +on_event = (216, 223, 236) +background = (30, 37, 52) +off_event = (64, 126, 201) +col = rgb888_to_rgb565(generate_lookup_table(on_event, background, off_event)) + +sys.stdout.write("const uint16_t evt_dark_table[%d] = {\n" % NUM_COL) +for i in range(NUM_COL): + if not (i % 8): + sys.stdout.write(" ") + sys.stdout.write("0x%04X" % col[i]) + if (i + 1) % 8: + sys.stdout.write(", ") + elif i != (NUM_COL-1): + sys.stdout.write(",\n") + else: + sys.stdout.write("\n};\n") + +on_event = (64, 126, 201) +background = (216, 223, 236) +off_event = (30, 37, 52) +col = rgb888_to_rgb565(generate_lookup_table(on_event, background, off_event)) + +sys.stdout.write("const uint16_t evt_light_table[%d] = {\n" % NUM_COL) +for i in range(NUM_COL): + if not (i % 8): + sys.stdout.write(" ") + sys.stdout.write("0x%04X" % col[i]) + if (i + 1) % 8: + sys.stdout.write(", ") + elif i != (NUM_COL-1): + sys.stdout.write(",\n") + else: + sys.stdout.write("\n};\n")