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Merge pull request #2579 from openmv/stm32_gpu_driver
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ports/stm32: Update GPU driver.
This commit is contained in:
commit
6e038b7ceb
@ -79,57 +79,55 @@ int omv_gpu_draw_image(image_t *src_img,
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const uint8_t *alpha_palette,
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const uint8_t *alpha_palette,
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image_hint_t hint) {
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image_hint_t hint) {
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OMV_PROFILE_START();
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OMV_PROFILE_START();
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if (color_palette || alpha_palette) {
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if ((dst_rect->w != src_rect->w) || (dst_rect->h != src_rect->h)) {
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// Create command list.
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#if OMV_GPU_NEMA_MM_STATIC
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nema_buffer_t bo = {
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.size = sizeof(NEMA_BUFFER),
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.base_virt = NEMA_BUFFER,
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.base_phys = (uint32_t) NEMA_BUFFER,
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};
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nema_cmdlist_t cl = nema_cl_create_prealloc(&bo);
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#else
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nema_cmdlist_t cl = nema_cl_create_sized(OMV_GPU_NEMA_BUFFER_SIZE);
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#endif
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// Bind command list.
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nema_cl_bind_circular(&cl);
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nema_tex_mode_t blit_mode;
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if (hint & IMAGE_HINT_BILINEAR) {
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blit_mode = NEMA_FILTER_BL;
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} else {
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blit_mode = NEMA_FILTER_PS;
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}
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// Set up destination texture.
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nema_tex_format_t dst_pixfmt = omv_gpu_pixfmt(dst_img->pixfmt);
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nema_bind_dst_tex((uintptr_t) dst_img->data, dst_rect->w, dst_rect->h, dst_pixfmt, -1);
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// Set up source texture.
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nema_tex_format_t src_pixfmt = omv_gpu_pixfmt(src_img->pixfmt);
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nema_bind_src_tex((uintptr_t) src_img->data, src_rect->w, src_rect->h, src_pixfmt, -1, blit_mode);
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// Configure operations.
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nema_set_blend_blit(NEMA_BL_SRC);
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nema_set_clip(0, 0, dst_rect->w, dst_rect->h);
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nema_blit_rect_fit(0, 0, dst_rect->w, dst_rect->h);
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// Flush source image
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SCB_CleanDCache_by_Addr(src_img->data, image_size(src_img));
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nema_cl_submit(&cl);
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nema_cl_wait(&cl);
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#if !OMV_GPU_NEMA_MM_STATIC
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nema_cl_destroy(&cl);
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#endif
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// Invalidate the destination image.
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SCB_InvalidateDCache_by_Addr(dst_img->data, image_size(dst_img));
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} else {
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return -1;
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return -1;
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}
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}
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// Create command list.
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#if OMV_GPU_NEMA_MM_STATIC
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nema_buffer_t bo = {
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.size = sizeof(NEMA_BUFFER),
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.base_virt = NEMA_BUFFER,
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.base_phys = (uint32_t) NEMA_BUFFER,
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};
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nema_cmdlist_t cl = nema_cl_create_prealloc(&bo);
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#else
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nema_cmdlist_t cl = nema_cl_create_sized(OMV_GPU_NEMA_BUFFER_SIZE);
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#endif
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// Bind command list.
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nema_cl_bind_circular(&cl);
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nema_tex_mode_t blit_mode;
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if (hint & IMAGE_HINT_BILINEAR) {
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blit_mode = NEMA_FILTER_BL;
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} else {
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blit_mode = NEMA_FILTER_PS;
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}
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// Set up destination texture.
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nema_tex_format_t dst_pixfmt = omv_gpu_pixfmt(dst_img->pixfmt);
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nema_bind_dst_tex((uintptr_t) dst_img->data, dst_img->w, dst_img->h, dst_pixfmt, -1);
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// Set up source texture.
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nema_tex_format_t src_pixfmt = omv_gpu_pixfmt(src_img->pixfmt);
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nema_bind_src_tex((uintptr_t) src_img->data, src_img->w, src_img->h, src_pixfmt, -1, blit_mode);
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// Configure operations.
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nema_set_blend_blit(NEMA_BL_SRC);
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nema_set_clip(0, 0, dst_rect->w, dst_rect->h);
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nema_blit_subrect_fit(dst_rect->x, dst_rect->y, dst_rect->w, dst_rect->h,
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src_rect->x, src_rect->y, src_rect->w, src_rect->h);
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// Flush source image
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SCB_CleanDCache_by_Addr(src_img->data, image_size(src_img));
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nema_cl_submit(&cl);
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nema_cl_wait(&cl);
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#if !OMV_GPU_NEMA_MM_STATIC
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nema_cl_destroy(&cl);
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#endif
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// Invalidate the destination image.
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SCB_InvalidateDCache_by_Addr(dst_img->data, image_size(dst_img));
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OMV_PROFILE_PRINT();
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OMV_PROFILE_PRINT();
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return 0;
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return 0;
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}
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}
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@ -145,7 +145,7 @@ void nema_host_free(void *ptr) {
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}
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}
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void *nema_host_malloc(unsigned size) {
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void *nema_host_malloc(unsigned size) {
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return malloc(size);
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return aligned_alloc(__SCB_DCACHE_LINE_SIZE, (size + (__SCB_DCACHE_LINE_SIZE - 1)) & ~(__SCB_DCACHE_LINE_SIZE - 1));
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}
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}
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int nema_mutex_lock(int mutex_id) {
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int nema_mutex_lock(int mutex_id) {
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