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ports/stm32: Improve GPU cache maintenance.
This commit is contained in:
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79ee351692
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@ -167,10 +167,14 @@ int omv_gpu_draw_image(image_t *src_img,
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#if __DCACHE_PRESENT
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#if __DCACHE_PRESENT
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// Ensures any cached writes to dst16 are flushed.
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// Ensures any cached writes to dst16 are flushed.
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uint16_t *dst16_tmp = dst16;
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if (dst_img->w == dst_rect->w) {
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for (int i = 0; i < dst_rect->h; i++) {
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SCB_CleanInvalidateDCache_by_Addr(dst16, dst_rect->w * dst_rect->h * sizeof(uint16_t));
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SCB_CleanInvalidateDCache_by_Addr(dst16_tmp, dst_rect->w * sizeof(uint16_t));
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} else {
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dst16_tmp += dst_img->w;
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uint16_t *dst16_tmp = dst16;
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for (int i = 0; i < dst_rect->h; i++) {
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SCB_CleanInvalidateDCache_by_Addr(dst16_tmp, dst_rect->w * sizeof(uint16_t));
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dst16_tmp += dst_img->w;
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}
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}
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}
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#endif
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#endif
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@ -181,10 +185,14 @@ int omv_gpu_draw_image(image_t *src_img,
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src = (uint32_t) src8;
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src = (uint32_t) src8;
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#if __DCACHE_PRESENT
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#if __DCACHE_PRESENT
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uint8_t *src8_tmp = src8;
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if (src_img->w == src_rect->w) {
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for (int i = 0; i < src_rect->h; i++) {
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SCB_CleanDCache_by_Addr(src8, src_rect->w * src_rect->h);
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SCB_CleanDCache_by_Addr(src8_tmp, src_rect->w);
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} else {
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src8_tmp += src_img->w;
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uint8_t *src8_tmp = src8;
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for (int i = 0; i < src_rect->h; i++) {
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SCB_CleanDCache_by_Addr(src8_tmp, src_rect->w);
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src8_tmp += src_img->w;
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}
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}
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}
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#endif
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#endif
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} else {
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} else {
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@ -192,10 +200,14 @@ int omv_gpu_draw_image(image_t *src_img,
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src = (uint32_t) src16;
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src = (uint32_t) src16;
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#if __DCACHE_PRESENT
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#if __DCACHE_PRESENT
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uint16_t *src16_tmp = src16;
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if (src_img->w == src_rect->w) {
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for (int i = 0; i < src_rect->h; i++) {
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SCB_CleanDCache_by_Addr(src16, src_rect->w * src_rect->h);
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SCB_CleanDCache_by_Addr(src16_tmp, src_rect->w * sizeof(uint16_t));
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} else {
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src16_tmp += src_img->w;
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uint16_t *src16_tmp = src16;
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for (int i = 0; i < src_rect->h; i++) {
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SCB_CleanDCache_by_Addr(src16_tmp, src_rect->w * sizeof(uint16_t));
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src16_tmp += src_img->w;
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}
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}
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}
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#endif
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#endif
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}
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}
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@ -213,10 +225,14 @@ int omv_gpu_draw_image(image_t *src_img,
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#if __DCACHE_PRESENT
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#if __DCACHE_PRESENT
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// Ensures any cached reads to dst16 are dropped.
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// Ensures any cached reads to dst16 are dropped.
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dst16_tmp = dst16;
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if (dst_img->w == dst_rect->w) {
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for (int i = 0; i < dst_rect->h; i++) {
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SCB_InvalidateDCache_by_Addr(dst16, dst_rect->w * dst_rect->h * sizeof(uint16_t));
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SCB_InvalidateDCache_by_Addr(dst16_tmp, dst_rect->w * sizeof(uint16_t));
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} else {
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dst16_tmp += dst_img->w;
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uint16_t *dst16_tmp = dst16;
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for (int i = 0; i < dst_rect->h; i++) {
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SCB_InvalidateDCache_by_Addr(dst16_tmp, dst_rect->w * sizeof(uint16_t));
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dst16_tmp += dst_img->w;
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}
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}
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}
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#endif
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#endif
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