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Update WINC1500 firmware and host driver.
* Update to firmware 19.6.1 host driver 19.3.0.
This commit is contained in:
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BIN
src/winc1500/firmware/winc_19_6_1.bin
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src/winc1500/firmware/winc_19_6_1.bin
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@ -2,52 +2,57 @@
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*
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* \file
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*
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* \brief This module contains NMC1500 BSP APIs declarations.
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* \brief WINC BSP API Declarations.
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*
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* Copyright (c) 2015 Atmel Corporation. All rights reserved.
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* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
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*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
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||||
*/
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/**@defgroup BSPDefine Defines
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* @ingroup nm_bsp
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* @{
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/** @defgroup nm_bsp BSP
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@brief
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Description of the BSP (<strong>B</strong>oard <strong>S</strong>upport <strong>P</strong>ackage) module.
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@{
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@defgroup DataT Data Types
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@defgroup BSPDefine Defines
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@defgroup BSPAPI Functions
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@brief
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Lists the available BSP (<strong>B</strong>oard <strong>S</strong>upport <strong>P</strong>ackage) APIs.
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@}
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*/
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/**@addtogroup BSPDefine
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@{
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*/
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#ifndef _NM_BSP_H_
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#define _NM_BSP_H_
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#define NMI_API
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/*!<
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* Attribute used to define memory section to map Functions in host memory.
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* Attribute used to define the memory section to map Functions in host memory.
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*/
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#define CONST const
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@ -55,35 +60,31 @@
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* Used for code portability.
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*/
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/*!
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* @typedef void (*tpfNmBspIsr) (void);
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* @brief Pointer to function.\n
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* Used as a data type of ISR function registered by \ref nm_bsp_register_isr
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* @return None
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*/
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typedef void (*tpfNmBspIsr)(void);
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#ifndef NULL
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#define NULL ((void*)0)
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#endif
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/*!<
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* Void Pointer to '0' in case of NULL is not defined.
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/*!<
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* Void Pointer to '0' in case NULL is not defined.
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*/
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#define BSP_MIN(x,y) ((x)>(y)?(y):(x))
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/*!<
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* Computes the minimum of \b x and \b y.
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/*!<
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* Computes the minimum value between \b x and \b y.
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*/
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/**@}*/ //BSPDefine
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//@}
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/**@defgroup DataT DataTypes
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* @ingroup nm_bsp
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/**@addtogroup DataT
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* @{
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*/
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/*!
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* @typedef void (*tpfNmBspIsr) (void);
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* @brief Pointer to function.\n Used as a data type of ISR function registered by
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* @ref nm_bsp_register_isr.
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* @return None
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*/
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typedef void (*tpfNmBspIsr)(void);
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/*!
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* @ingroup DataTypes
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@ -103,10 +104,9 @@ typedef unsigned short uint16;
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* @ingroup Data Types
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* @typedef unsigned long uint32;
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* @brief Range of values between 0 to 4294967295
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*/
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*/
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typedef unsigned long uint32;
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/*!
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* @ingroup Data Types
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* @typedef signed char sint8;
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@ -126,135 +126,170 @@ typedef signed short sint16;
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* @typedef signed long sint32;
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* @brief Range of values between -2147483648 to 2147483647
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*/
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typedef signed long sint32;
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//@}
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/**@}*/ //DataTypes
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#ifndef CORTUS_APP
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#ifdef __cplusplus
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extern "C"{
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#endif
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/** \defgroup BSPAPI Function
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* @ingroup nm_bsp
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*/
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/** @defgroup NmBspInitFn nm_bsp_init
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* @ingroup BSPAPI
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* Initialization for BSP such as Reset and Chip Enable Pins for WINC, delays, register ISR, enable/disable IRQ for WINC, ...etc. You must use this function in the head of your application to
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* enable WINC and Host Driver communicate each other.
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* Initialization for BSP (<strong>B</strong>oard <strong>S</strong>upport <strong>P</strong>ackage)
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* such as Reset and Chip Enable Pins for WINC, delays, register ISR, enable/disable IRQ for WINC, etc.
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* You must use this function at the head of your application to enable WINC and Host Driver to
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* communicate with each other.
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*/
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/**@{*/
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/*!
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* @fn sint8 nm_bsp_init(void);
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* @note Implementation of this function is host dependent.
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* @warning Missing use will lead to unavailability of host communication.\n
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* @brief This function is used to initialize the <strong>B</strong>oard <strong>S</strong>upport
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* <strong>P</strong>ackage <strong>(BSP)</strong> in order to prepare the WINC before any
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* WINC API calls.
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* @details The nm_bsp_init function is the first function that should be called at the beginning of
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* every application to initialize the BSP and the WINC board. Otherwise, the rest of the BSP
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* function calls will return with failure. This function should also be called after the WINC
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* has been switched off with a successful call to @ref nm_bsp_deinit in order to reinitialize
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* the BSP before the Application can use any of the WINC APIs again. After the function
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* initializes the WINC, a hard reset must be applied to start the WINC board by calling
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* @ref nm_bsp_reset.
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*
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* @note Implementation of this function is host dependent.
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* @warning Inappropriate use of this function will lead to unavailability of host-chip communication.
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*
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* @see nm_bsp_deinit, nm_bsp_reset
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* @return The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
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*/
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sint8 nm_bsp_init(void);
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/**@}*/
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/**@}*/ //NmBspInitFn
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/** @defgroup NmBspDeinitFn nm_bsp_deinit
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* @ingroup BSPAPI
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* De-initialization for BSP (\e Board \e Support \e Package)
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* De-initialization of the BSP (<strong>B</strong>oard <strong>S</strong>upport <strong>P</strong>ackage).\n
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* This function should be called only after a successful call to @ref nm_bsp_init.
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*/
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/**@{*/
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/*!
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* @fn sint8 nm_bsp_deinit(void);
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* @pre Initialize \ref nm_bsp_init first
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* @brief This function is used to de-initialize the BSP and turn off the WINC board.
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* @details The nm_bsp_deinit is the last function that should be called after the application has
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* finished and before the WINC is switched off. A call to this function will turn off the WINC
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* board by setting CHIP_EN and RESET_N signals low. Every function call of @ref nm_bsp_init
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* should be matched with a call to nm_bsp_deinit. Failure to do so may result in the WINC
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* consuming higher power than expected, since it won't be properly de-initialized.
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* @pre The BSP should be initialized through @ref nm_bsp_init first.
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* @note Implementation of this function is host dependent.
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* @warning Missing use may lead to unknown behavior in case of soft reset.\n
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* @see nm_bsp_init
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* @warning Misuse may lead to unknown behavior in case of soft reset.
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* @see nm_bsp_init
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* @return The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
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*/
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sint8 nm_bsp_deinit(void);
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/**@}*/
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/**@}*/ //NmBspDeinitFn
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/** @defgroup NmBspResetFn nm_bsp_reset
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* @ingroup BSPAPI
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* Resetting NMC1500 SoC by setting CHIP_EN and RESET_N signals low, then after specific delay the function will put CHIP_EN high then RESET_N high,
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* for the timing between signals please review the WINC data-sheet
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* Resets the WINC SoC by setting CHIP_EN and RESET_N signals low, then after an appropriate delay,
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* this function will put CHIP_EN high then RESET_N high, for more details on the timing between signals
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* please check the WINC data-sheet.
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*/
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/**@{*/
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/*!
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* @fn void nm_bsp_reset(void);
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* @param [in] None
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* @pre Initialize \ref nm_bsp_init first
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* @note Implementation of this function is host dependent and called by HIF layer.
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* @see nm_bsp_init
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* @fn void nm_bsp_reset(void);
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* @brief Performs a hardware reset to the WINC board.
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* @details The nm_bsp_reset is used to perform a hard reset on the WINC board by setting CHIP_EN and
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* RESET_N signals low, then after an appropriate delay this function puts CHIP_EN high then
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* RESET_N high, for more details on the timing between signals please check the WINC data-sheet.
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* After a successful call, the WINC board firmware will kick off to load and start the WINC
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* firmware. This function should be called to reset the WINC firmware after the BSP is
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* initialized and before the start of any communication with WINC board. Calling this
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* function at any other time will result in losing the state and connections saved in the
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* WINC board and starting again from the initial state. The host driver will need to be
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* de-initialized before calling nm_bsp_reset and initialized again, which can be achieved by
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* use of @ref m2m_wifi_init and @ref m2m_wifi_deinit.
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* @pre Initialize the BSP first by calling @ref nm_bsp_init.
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* @note Implementation of this function is host dependent and it is called by HIF layer.
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* @warning Calling this function will drop any connection and lose the internal state saved on the
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* WINC firmware.
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* @see nm_bsp_init, m2m_wifi_init, m2m_wifi_deinit
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* @return None
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*/
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void nm_bsp_reset(void);
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/**@}*/
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/**@}*/ //NmBspResetFn
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/** @defgroup NmBspSleepFn nm_bsp_sleep
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* @ingroup BSPAPI
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* Sleep in units of milliseconds.\n
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* This function used by HIF Layer according to different situations.
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* This function used by the HIF Layer on several different scenarios.
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*/
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/**@{*/
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/*!
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* @fn void nm_bsp_sleep(uint32);
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* @brief
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* @brief Used to put the host to sleep for the specified duration (in milliseconds).
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* Forcing the host to sleep for extended period may lead to host not being able to respond
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* to WINC board events. It is important to be considerate while choosing the sleep period.
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* @param [in] u32TimeMsec
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* Time unit in milliseconds
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* @pre Initialize \ref nm_bsp_init first
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* @warning Maximum value must nor exceed 4294967295 milliseconds which is equal to 4294967.295 seconds.\n
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* Time unit in milliseconds.
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* @pre Initialize @ref nm_bsp_init first.
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* @note Implementation of this function is host dependent.
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* @see nm_bsp_init
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* @warning Maximum value must nor exceed 4294967295 milliseconds which is equal to 4294967.295 seconds.
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* @see nm_bsp_init
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* @return None
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*/
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void nm_bsp_sleep(uint32 u32TimeMsec);
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/**@}*/
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/**@}*/ //NmBspSleepFn
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/** @defgroup NmBspRegisterFn nm_bsp_register_isr
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* @ingroup BSPAPI
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* Register ISR (Interrupt Service Routine) in the initialization of HIF (Host Interface) Layer.
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* When the interrupt trigger the BSP layer should call the pfisr function once inside the interrupt.
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* Register ISR (Interrupt Service Routine) in the initialization of the HIF (Host Interface) Layer.
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* When the interrupt is triggered, the BSP layer should call the pfisr function from the interrupt handler.
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*/
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/**@{*/
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/*!
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* @fn void nm_bsp_register_isr(tpfNmBspIsr);
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* @param [in] tpfNmBspIsr pfIsr
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* Pointer to ISR handler in HIF
|
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* @warning Make sure that ISR for IRQ pin for WINC is disabled by default in your implementation.
|
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* @fn void nm_bsp_register_isr(tpfNmBspIsr pfIsr);
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* @brief Register the host interface interrupt service routine.
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* @details The WINC board uses the SPI interface to communicate with the host. This function registers
|
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* the SPI interrupt to notify the host whenever there is an outstanding message from the WINC
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* board. This function should be called during the initialization of the host interface. It is
|
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* an internal driver function and shouldn't be called by the Application.
|
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* @param [in] pfIsr tpfNmBspIsr
|
||||
* Pointer to ISR handler in the HIF Layer.
|
||||
* @note Implementation of this function is host dependent and called by HIF layer.
|
||||
* @warning Make sure that ISR for IRQ pin for WINC is disabled by default in your implementation.
|
||||
* @see tpfNmBspIsr
|
||||
* @return None
|
||||
|
||||
*/
|
||||
void nm_bsp_register_isr(tpfNmBspIsr pfIsr);
|
||||
/**@}*/
|
||||
|
||||
/**@}*/ //NmBspRegisterFn
|
||||
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||||
|
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/** @defgroup NmBspInterruptCtrl nm_bsp_interrupt_ctrl
|
||||
* @ingroup BSPAPI
|
||||
* Synchronous enable/disable interrupts function
|
||||
* Synchronous enable/disable of WINC to host interrupts.
|
||||
*/
|
||||
/**@{*/
|
||||
/*!
|
||||
* @fn void nm_bsp_interrupt_ctrl(uint8);
|
||||
* @brief Enable/Disable interrupts
|
||||
* @brief Enable/Disable interrupts from the WINC.
|
||||
* @details This function can be used to enable/disable the WINC to host interrupts, depending on how
|
||||
* the driver is implemented. It is an internal driver function and shouldn't be called by
|
||||
* the application.
|
||||
* @param [in] u8Enable
|
||||
* '0' disable interrupts. '1' enable interrupts
|
||||
* @see tpfNmBspIsr
|
||||
* - '0' disable interrupts.
|
||||
* - '1' enable interrupts.
|
||||
* @pre The interrupt must be registered using @ref nm_bsp_register_isr first.
|
||||
* @note Implementation of this function is host dependent and called by HIF layer.
|
||||
* @see tpfNmBspIsr, nm_bsp_register_isr
|
||||
* @return None
|
||||
|
||||
*/
|
||||
void nm_bsp_interrupt_ctrl(uint8 u8Enable);
|
||||
/**@}*/
|
||||
/**@}*/ //NmBspInterruptCtrl
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
@ -268,6 +303,7 @@ void nm_bsp_interrupt_ctrl(uint8 u8Enable);
|
||||
(((x) & 0x0000FF00) << 8) + \
|
||||
(((x) & 0x00FF0000) >> 8) + \
|
||||
(((x) & 0xFF000000) >> 24))
|
||||
|
||||
#define NM_BSP_B_L_16(x) \
|
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((((x) & 0x00FF) << 8) + \
|
||||
(((x) & 0xFF00) >> 8))
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains NMC1500 BSP APIs declarations.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -71,10 +64,18 @@
|
||||
#include "nm_bsp_aps3_cortus.h"
|
||||
#endif
|
||||
|
||||
#if (defined __SAMR21G18A__) || (defined __SAMR21E18A__)
|
||||
#include "bsp/include/nm_bsp_samr21.h"
|
||||
#endif
|
||||
|
||||
#if (defined __SAML21J18A__) || (defined __SAML21J18B__)
|
||||
#include "bsp/include/nm_bsp_saml21.h"
|
||||
#endif
|
||||
|
||||
#if (defined __SAML22N18A__)
|
||||
#include "bsp/include/nm_bsp_saml22.h"
|
||||
#endif
|
||||
|
||||
#if (defined __SAMD21J18A__) || (defined __SAMD21G18A__)
|
||||
#include "bsp/include/nm_bsp_samd21.h"
|
||||
#endif
|
||||
@ -91,6 +92,10 @@
|
||||
#include "bsp/include/nm_bsp_samg55.h"
|
||||
#endif
|
||||
|
||||
#if (defined __SAME70Q21__) || (defined __SAME70Q21B__) || (defined __SAMV71Q21__)
|
||||
#include "bsp/include/nm_bsp_same70.h"
|
||||
#endif
|
||||
|
||||
#ifdef CORTUS_APP
|
||||
#include "crt_iface.h"
|
||||
#endif
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains NMC1000 bus wrapper APIs declarations.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -59,12 +52,12 @@
|
||||
(same start/stop conditions) ==> I2C only. Parameter:tstrNmI2cSpecial */
|
||||
#define NM_BUS_IOCTL_RW ((uint8)3) /*!< Read/Write at the same time ==> SPI only. Parameter:tstrNmSpiRw */
|
||||
|
||||
#define NM_BUS_IOCTL_WR_RESTART ((uint8)4) /*!< Write buffer then made restart condition then read ==> I2C only. parameter:tstrNmI2cSpecial */
|
||||
#define NM_BUS_IOCTL_WR_RESTART ((uint8)4) /*!< Write buffer then made restart condition then read ==> I2C only. parameter:tstrNmI2cSpecial */
|
||||
/**
|
||||
* @struct tstrNmBusCapabilities
|
||||
* @brief Structure holding bus capabilities information
|
||||
* @sa NM_BUS_TYPE_I2C, NM_BUS_TYPE_SPI
|
||||
*/
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16 u16MaxTrxSz; /*!< Maximum transfer size. Must be >= 16 bytes*/
|
||||
@ -74,7 +67,7 @@ typedef struct
|
||||
* @struct tstrNmI2cDefault
|
||||
* @brief Structure holding I2C default operation parameters
|
||||
* @sa NM_BUS_IOCTL_R, NM_BUS_IOCTL_W
|
||||
*/
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8 u8SlaveAdr;
|
||||
@ -86,12 +79,12 @@ typedef struct
|
||||
* @struct tstrNmI2cSpecial
|
||||
* @brief Structure holding I2C special operation parameters
|
||||
* @sa NM_BUS_IOCTL_W_SPECIAL
|
||||
*/
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8 u8SlaveAdr;
|
||||
uint8 *pu8Buf1; /*!< pointer to the 1st buffer */
|
||||
uint8 *pu8Buf2; /*!< pointer to the 2nd buffer */
|
||||
uint8 *pu8Buf2; /*!< pointer to the 2nd buffer */
|
||||
uint16 u16Sz1; /*!< 1st buffer size */
|
||||
uint16 u16Sz2; /*!< 2nd buffer size */
|
||||
} tstrNmI2cSpecial;
|
||||
@ -100,14 +93,14 @@ typedef struct
|
||||
* @struct tstrNmSpiRw
|
||||
* @brief Structure holding SPI R/W parameters
|
||||
* @sa NM_BUS_IOCTL_RW
|
||||
*/
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8 *pu8InBuf; /*!< pointer to input buffer.
|
||||
uint8 *pu8InBuf; /*!< pointer to input buffer.
|
||||
Can be set to null and in this case zeros should be sent at MOSI */
|
||||
uint8 *pu8OutBuf; /*!< pointer to output buffer.
|
||||
uint8 *pu8OutBuf; /*!< pointer to output buffer.
|
||||
Can be set to null and in this case data from MISO can be ignored */
|
||||
uint16 u16Sz; /*!< Transfere size */
|
||||
uint16 u16Sz; /*!< Transfere size */
|
||||
} tstrNmSpiRw;
|
||||
|
||||
|
||||
@ -115,7 +108,7 @@ typedef struct
|
||||
* @struct tstrNmUartDefault
|
||||
* @brief Structure holding UART default operation parameters
|
||||
* @sa NM_BUS_IOCTL_R, NM_BUS_IOCTL_W
|
||||
*/
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8 *pu8Buf; /*!< Operation buffer */
|
||||
@ -132,7 +125,7 @@ extern tstrNmBusCapabilities egstrNmBusCapabilities;
|
||||
* @fn nm_bus_init
|
||||
* @brief Initialize the bus wrapper
|
||||
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
*/
|
||||
*/
|
||||
sint8 nm_bus_init(void *);
|
||||
|
||||
/**
|
||||
@ -144,14 +137,14 @@ sint8 nm_bus_init(void *);
|
||||
* Arbitrary parameter depending on IOCTL
|
||||
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
* @note For SPI only, it's important to be able to send/receive at the same time
|
||||
*/
|
||||
*/
|
||||
sint8 nm_bus_ioctl(uint8 u8Cmd, void* pvParameter);
|
||||
|
||||
/**
|
||||
* @fn nm_bus_deinit
|
||||
* @brief De-initialize the bus wrapper
|
||||
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
*/
|
||||
*/
|
||||
sint8 nm_bus_deinit(void);
|
||||
|
||||
/*
|
||||
@ -166,9 +159,10 @@ sint8 nm_bus_reinit(void *);
|
||||
* @fn nm_bus_get_chip_type
|
||||
* @brief get chip type
|
||||
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
*/
|
||||
*/
|
||||
#ifdef CONF_WINC_USE_UART
|
||||
uint8 nm_bus_get_chip_type(void);
|
||||
sint8 nm_bus_break(void);
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -4,51 +4,48 @@
|
||||
*
|
||||
* \brief WINC Driver Common API Declarations.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/** @defgroup COMMON Common
|
||||
@{
|
||||
@defgroup COMMONDEF Defines
|
||||
@defgroup COMMONAPI Functions
|
||||
@}
|
||||
*/
|
||||
|
||||
#ifndef _NM_COMMON_H_
|
||||
#define _NM_COMMON_H_
|
||||
|
||||
#include "bsp/include/nm_bsp.h"
|
||||
#include "common/include/nm_debug.h"
|
||||
|
||||
#define WINC1500_EXPORT(name) winc1500_ ## name
|
||||
|
||||
/**@defgroup CommonDefines CommonDefines
|
||||
* @ingroup WlanDefines
|
||||
/**@addtogroup COMMONDEF
|
||||
*/
|
||||
/**@{*/
|
||||
#define M2M_TIME_OUT_DELAY 10000
|
||||
@ -69,23 +66,28 @@
|
||||
#define M2M_ERR_FAIL ((sint8)-12)
|
||||
#define M2M_ERR_FW_VER_MISMATCH ((sint8)-13)
|
||||
#define M2M_ERR_SCAN_IN_PROGRESS ((sint8)-14)
|
||||
/*
|
||||
Invalid argument
|
||||
*/
|
||||
#define M2M_ERR_INVALID_ARG ((sint8)-15)
|
||||
#define M2M_ERR_INVALID ((sint8)-16)
|
||||
|
||||
/*i2c MAASTER ERR*/
|
||||
#define I2C_ERR_LARGE_ADDRESS 0xE1UL /*the address exceed the max addressing mode in i2c flash*/
|
||||
#define I2C_ERR_TX_ABRT 0xE2UL /*NO ACK from slave*/
|
||||
#define I2C_ERR_OVER_SIZE 0xE3UL /**/
|
||||
#define ERR_PREFIX_NMIS 0xE4UL /*wrong first four byte in flash NMIS*/
|
||||
#define ERR_FIRMEWARE_EXCEED_SIZE 0xE5UL /*Total size of firmware exceed the max size 256k*/
|
||||
#define I2C_ERR_LARGE_ADDRESS 0xE1UL
|
||||
/*!< The address exceeds the max addressing mode in I2C flash.
|
||||
*/
|
||||
#define I2C_ERR_TX_ABRT 0xE2UL
|
||||
/*!< NO ACK from slave.
|
||||
*/
|
||||
#define I2C_ERR_OVER_SIZE 0xE3UL
|
||||
#define ERR_PREFIX_NMIS 0xE4UL
|
||||
/*!< Wrong first four bytes in flash NMIS.
|
||||
*/
|
||||
#define ERR_FIRMEWARE_EXCEED_SIZE 0xE5UL
|
||||
/*!< Total size of firmware exceeds the max size 256k.
|
||||
*/
|
||||
/**/
|
||||
#define PROGRAM_START 0x26961735UL
|
||||
#define BOOT_SUCCESS 0x10add09eUL
|
||||
#define BOOT_START 0x12345678UL
|
||||
|
||||
|
||||
#define NBIT31 (0x80000000)
|
||||
#define NBIT30 (0x40000000)
|
||||
#define NBIT29 (0x20000000)
|
||||
@ -123,11 +125,9 @@ Invalid argument
|
||||
#define M2M_SEL(x,m1,m2,m3) ((x>1)?((x>2)?(m3):(m2)):(m1))
|
||||
#define WORD_ALIGN(val) (((val) & 0x03) ? ((val) + 4 - ((val) & 0x03)) : (val))
|
||||
|
||||
|
||||
|
||||
#define DATA_PKT_OFFSET 4
|
||||
|
||||
#ifndef BIG_ENDIAN
|
||||
#if _BYTE_ORDER == _LITTLE_ENDIAN
|
||||
#define BYTE_0(word) ((uint8)(((word) >> 0 ) & 0x000000FFUL))
|
||||
#define BYTE_1(word) ((uint8)(((word) >> 8 ) & 0x000000FFUL))
|
||||
#define BYTE_2(word) ((uint8)(((word) >> 16) & 0x000000FFUL))
|
||||
@ -139,18 +139,107 @@ Invalid argument
|
||||
#define BYTE_3(word) ((uint8)(((word) >> 0 ) & 0x000000FFUL))
|
||||
#endif
|
||||
|
||||
/**@}*/
|
||||
/**@}*/ //COMMONDEF
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @ingroup COMMONAPI
|
||||
* @fn void m2m_memcpy(uint8* pDst, uint8* pSrc, uint32 sz);
|
||||
* @brief Copy specified number of bytes from source buffer to destination buffer.
|
||||
* @param [in] sz
|
||||
* Number of data bytes to copy.
|
||||
* @param [in] pSrc
|
||||
* Source buffer.
|
||||
* @param [out] pDst
|
||||
* Destination buffer.
|
||||
* @return None
|
||||
*/
|
||||
NMI_API void m2m_memcpy(uint8* pDst,uint8* pSrc,uint32 sz);
|
||||
|
||||
/*!
|
||||
* @ingroup COMMONAPI
|
||||
* @fn void m2m_memset(uint8* pBuf, uint8 val, uint32 sz);
|
||||
* @brief Set specified number of data bytes in specified data buffer to specified value.
|
||||
* @param [in] sz
|
||||
* Number of data bytes (in specified data buffer whose values are to be set to the specified value).
|
||||
* @param [in] val
|
||||
* The specified value (to which data bytes in data buffer will be set).
|
||||
* @param [out] pBuf
|
||||
* The specified data buffer (whose data bytes will be set to the specified value).
|
||||
* @return None
|
||||
*/
|
||||
NMI_API void m2m_memset(uint8* pBuf,uint8 val,uint32 sz);
|
||||
|
||||
/*!
|
||||
* @ingroup COMMONAPI
|
||||
* @fn uint16 m2m_strlen(uint8 * pcStr);
|
||||
* @brief Returns the length of a null terminated string buffer.
|
||||
* @param [in] pcStr
|
||||
* Null terminated string buffer.
|
||||
* @return Length of the string in the specified string buffer.
|
||||
*/
|
||||
NMI_API uint16 m2m_strlen(uint8 * pcStr);
|
||||
|
||||
/*!
|
||||
* @ingroup COMMONAPI
|
||||
* @fn sint8 m2m_memcmp(uint8 *pu8Buff1, uint8 *pu8Buff2, uint32 u32Size);
|
||||
* @brief Compare specified number of data bytes in pu8Buff1 and pu8Buff2 and decide if they all match.
|
||||
* @param [in] u32Size
|
||||
* Number of data bytes to compare.
|
||||
* @param [in] pu8Buff1
|
||||
* One of two data buffers for the comparison.
|
||||
* @param [in] pu8Buff2
|
||||
* One of two data buffers for the comparison.
|
||||
* @return Zero if matched, one if not matched.
|
||||
*/
|
||||
NMI_API sint8 m2m_memcmp(uint8 *pu8Buff1,uint8 *pu8Buff2 ,uint32 u32Size);
|
||||
|
||||
/*!
|
||||
* @ingroup COMMONAPI
|
||||
* @fn uint8 m2m_strncmp(uint8 *pcS1, uint8 *pcS2, uint16 u16Len);
|
||||
* @brief Compare specified number of data bytes in string buffers pcS1 and pcS2.
|
||||
* @param [in] u16Len
|
||||
* Number of data bytes to compare.
|
||||
* @param [in] pcS1
|
||||
* First of two string buffers for the comparison.
|
||||
* @param [in] pcS2
|
||||
* Second of two string buffers for the comparison.
|
||||
* @return 0 if matched, -1 if the first non-matching byte in pcS1 is smaller than that in pcS2, +1 if it is bigger.
|
||||
*/
|
||||
NMI_API uint8 m2m_strncmp(uint8 *pcS1, uint8 *pcS2, uint16 u16Len);
|
||||
|
||||
/*!
|
||||
* @ingroup COMMONAPI
|
||||
* @fn uint8 * m2m_strstr(uint8 *pcIn, uint8 *pcStr);
|
||||
* @brief Find the occurrence of pcStr string in pcIn string.
|
||||
* @param [in] pcStr
|
||||
* One of two string buffers.
|
||||
* @param [in] pcIn
|
||||
* One of two string buffers.
|
||||
* @return If pcStr string is part of pcIn string return a valid pointer to the start of pcStr within pcIn. If not, a NULL Pointer is returned
|
||||
*/
|
||||
NMI_API uint8 * m2m_strstr(uint8 *pcIn, uint8 *pcStr);
|
||||
|
||||
/*!
|
||||
* @ingroup COMMONAPI
|
||||
* @fn uint8 m2m_checksum(uint8* buf, int sz);
|
||||
* @brief Calculates checksum for the specified number of data bytes in specified data buffer.
|
||||
* @param [in] sz
|
||||
* Number of data bytes used in the checksum calculation.
|
||||
* @param [in] buf
|
||||
* The specified data buffer (whose data bytes will be used to calculate the checksum).
|
||||
* @return The calculated checksum.
|
||||
*/
|
||||
NMI_API uint8 m2m_checksum(uint8* buf, int sz);
|
||||
|
||||
/*!
|
||||
* @ingroup COMMONAPI
|
||||
* @fn void (*at_sb_printf)(const char *_format, ...);
|
||||
* @brief Chooses which function to use in order to output debug.
|
||||
*/
|
||||
NMI_API void (*at_sb_printf)(const char *_format, ...);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains debug APIs declarations.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -58,7 +51,7 @@
|
||||
#define M2M_LOG_DBG 4
|
||||
|
||||
#if (defined __APS3_CORTUS__)
|
||||
#define M2M_LOG_LEVEL M2M_LOG_ERROR
|
||||
#define M2M_LOG_LEVEL M2M_LOG_INFO
|
||||
#else
|
||||
#define M2M_LOG_LEVEL M2M_LOG_REQ
|
||||
#endif
|
||||
@ -72,9 +65,9 @@
|
||||
|
||||
#if (CONF_WINC_DEBUG == 1)
|
||||
#undef M2M_LOG_LEVEL
|
||||
#define M2M_LOG_LEVEL M2M_LOG_DBG
|
||||
#define M2M_LOG_LEVEL M2M_LOG_DBG
|
||||
#undef M2M_PRINT
|
||||
#define M2M_PRINT(...) do{CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
|
||||
#define M2M_PRINT(...) do{CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
|
||||
#if (M2M_LOG_LEVEL >= M2M_LOG_ERROR)
|
||||
#undef M2M_ERR
|
||||
#define M2M_ERR(...) do{CONF_WINC_PRINTF("(APP)(ERR)[%s][%d]",__FUNCTION__,__LINE__); CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
|
||||
|
||||
238
src/winc1500/include/driver/include/ecc_types.h
Normal file
238
src/winc1500/include/driver/include/ecc_types.h
Normal file
@ -0,0 +1,238 @@
|
||||
/**
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief WINC Application Interface Internal Types.
|
||||
*
|
||||
* Copyright (c) 2017-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __ECC_TYPES_H__
|
||||
#define __ECC_TYPES_H__
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
INCLUDES
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
#include "m2m_types.h"
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
MACROS
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
|
||||
|
||||
#define ECC_LARGEST_CURVE_SIZE (32)
|
||||
/*!<
|
||||
The size of the the largest supported EC. For now, assuming
|
||||
the 256-bit EC is the largest supported curve type.
|
||||
*/
|
||||
|
||||
|
||||
#define ECC_POINT_MAX_SIZE ECC_LARGEST_CURVE_SIZE
|
||||
/*!<
|
||||
Maximum size of one coordinate of an EC point.
|
||||
*/
|
||||
|
||||
|
||||
#define ECC_POINT_MAX_SIZE_WORDS (ECC_POINT_MAX_SIZE / 4)
|
||||
/*!<
|
||||
SIZE in 32-bit words.
|
||||
*/
|
||||
|
||||
#if 0
|
||||
#define ECC_NUM_SUPP_CURVES ((sizeof(gastrECCSuppList)) / (sizeof(tstrEllipticCurve)))
|
||||
#endif
|
||||
/*!<
|
||||
*/
|
||||
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
DATA TYPES
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
|
||||
/*!
|
||||
@enum \
|
||||
tenuEcNamedCurve
|
||||
|
||||
@brief EC Named Curves
|
||||
|
||||
Defines a list of supported ECC named curves.
|
||||
*/
|
||||
typedef enum EcNamedCurve{
|
||||
EC_SECP192R1 = 19,
|
||||
/*!<
|
||||
It is defined by NIST as P192 and by the SEC Group as secp192r1.
|
||||
*/
|
||||
EC_SECP256R1 = 23,
|
||||
/*!<
|
||||
It is defined by NIST as P256 and by the SEC Group as secp256r1.
|
||||
*/
|
||||
EC_SECP384R1 = 24,
|
||||
/*!<
|
||||
It is defined by NIST as P384 and by the SEC Group as secp384r1.
|
||||
*/
|
||||
EC_SECP521R1 = 25,
|
||||
/*!<
|
||||
It is defined by NIST as P521 and by the SEC Group as secp521r1.
|
||||
*/
|
||||
EC_UNKNOWN = 255
|
||||
}tenuEcNamedCurve;
|
||||
|
||||
|
||||
/*!
|
||||
@struct \
|
||||
tstrECPoint
|
||||
|
||||
@brief Elliptic Curve point representation
|
||||
*/
|
||||
typedef struct EcPoint{
|
||||
uint8 X[ECC_POINT_MAX_SIZE];
|
||||
/*!<
|
||||
The X-coordinate of the ec point.
|
||||
*/
|
||||
uint8 Y[ECC_POINT_MAX_SIZE];
|
||||
/*!<
|
||||
The Y-coordinate of the ec point.
|
||||
*/
|
||||
uint16 u16Size;
|
||||
/*!<
|
||||
Point size in bytes (for each of the coordinates).
|
||||
*/
|
||||
uint16 u16PrivKeyID;
|
||||
/*!<
|
||||
ID for the corresponding private key.
|
||||
*/
|
||||
}tstrECPoint;
|
||||
|
||||
|
||||
/*!
|
||||
@struct \
|
||||
tstrECDomainParam
|
||||
|
||||
@brief ECC Curve Domain Parameters
|
||||
|
||||
The structure defines the ECC domain parameters for curves defined over prime finite fields.
|
||||
*/
|
||||
typedef struct EcDomainParam{
|
||||
uint32 p[ECC_POINT_MAX_SIZE_WORDS];
|
||||
uint32 a[ECC_POINT_MAX_SIZE_WORDS];
|
||||
uint32 b[ECC_POINT_MAX_SIZE_WORDS];
|
||||
tstrECPoint G;
|
||||
}tstrECDomainParam;
|
||||
|
||||
|
||||
/*!
|
||||
@struct \
|
||||
tstrEllipticCurve
|
||||
|
||||
@brief
|
||||
Definition of an elliptic curve
|
||||
*/
|
||||
typedef struct{
|
||||
tenuEcNamedCurve enuType;
|
||||
tstrECDomainParam strParam;
|
||||
}tstrEllipticCurve;
|
||||
|
||||
|
||||
typedef enum{
|
||||
ECC_REQ_NONE,
|
||||
ECC_REQ_CLIENT_ECDH,
|
||||
ECC_REQ_SERVER_ECDH,
|
||||
ECC_REQ_GEN_KEY,
|
||||
ECC_REQ_SIGN_GEN,
|
||||
ECC_REQ_SIGN_VERIFY
|
||||
}tenuEccREQ;
|
||||
|
||||
|
||||
typedef struct{
|
||||
tstrECPoint strPubKey;
|
||||
uint8 au8Key[ECC_POINT_MAX_SIZE];
|
||||
}tstrEcdhReqInfo;
|
||||
|
||||
|
||||
typedef struct{
|
||||
uint32 u32nSig;
|
||||
}tstrEcdsaVerifyReqInfo;
|
||||
|
||||
|
||||
typedef struct{
|
||||
uint16 u16CurveType;
|
||||
uint16 u16HashSz;
|
||||
}tstrEcdsaSignReqInfo;
|
||||
|
||||
|
||||
typedef struct{
|
||||
uint16 u16REQ;
|
||||
uint16 u16Status;
|
||||
uint32 u32UserData;
|
||||
uint32 u32SeqNo;
|
||||
union{
|
||||
tstrEcdhReqInfo strEcdhREQ;
|
||||
tstrEcdsaSignReqInfo strEcdsaSignREQ;
|
||||
tstrEcdsaVerifyReqInfo strEcdsaVerifyREQ;
|
||||
};
|
||||
}tstrEccReqInfo;
|
||||
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
GLOBALS
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
#if 0
|
||||
static tstrEllipticCurve gastrECCSuppList[] = {
|
||||
{
|
||||
EC_SECP256R1,
|
||||
{
|
||||
{0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0xFFFFFFFF},
|
||||
{0xFFFFFFFC, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0xFFFFFFFF},
|
||||
{0x27D2604B, 0x3BCE3C3E, 0xCC53B0F6, 0x651D06B0, 0x769886BC, 0xB3EBBD55, 0xAA3A93E7, 0x5AC635D8},
|
||||
{
|
||||
{
|
||||
0x6B, 0x17, 0xD1, 0xF2, 0xE1, 0x2C, 0x42, 0x47, 0xF8, 0xBC, 0xE6, 0xE5, 0x63, 0xA4, 0x40, 0xF2,
|
||||
0x77, 0x03, 0x7D, 0x81, 0x2D, 0xEB, 0x33, 0xA0, 0xF4, 0xA1, 0x39, 0x45, 0xD8, 0x98, 0xC2, 0x96
|
||||
},
|
||||
{
|
||||
0x4F, 0xE3, 0x42, 0xE2, 0xFE, 0x1A, 0x7F, 0x9B, 0x8E, 0xE7, 0xEB, 0x4A, 0x7C, 0x0F, 0x9E, 0x16,
|
||||
0x2B, 0xCE, 0x33, 0x57, 0x6B, 0x31, 0x5E, 0xCE, 0xCB, 0xB6, 0x40, 0x68, 0x37, 0xBF, 0x51, 0xF5
|
||||
},
|
||||
32
|
||||
}
|
||||
}
|
||||
}
|
||||
};
|
||||
#endif
|
||||
|
||||
/*!<
|
||||
List of supported Elliptic Curves ordered by security level (most secure curve is at index ZERO).
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#endif /* __ECC_TYPES_H__ */
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief WINC ATE Test Driver Interface.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -50,11 +43,19 @@ INCLUDES
|
||||
#include "common/include/nm_common.h"
|
||||
#include "driver/include/m2m_types.h"
|
||||
|
||||
|
||||
/** \defgroup m2m_ate ATE
|
||||
*/
|
||||
/**@defgroup ATEDefine Defines
|
||||
* @ingroup m2m_ate
|
||||
* @{
|
||||
*/
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
MACROS
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
#define M2M_ATE_MAX_NUM_OF_RATES (20)
|
||||
/*!< Maximum number of all rates (b,g and n)
|
||||
/*!<
|
||||
Maximum number of all rates (b,g and n)
|
||||
*/
|
||||
#define M2M_ATE_MAX_FRAME_LENGTH (1024)
|
||||
/*!< Maximum number of length for each frame
|
||||
@ -62,37 +63,57 @@ MACROS
|
||||
#define M2M_ATE_MIN_FRAME_LENGTH (1)
|
||||
/*!< Minimum number of length for each frame
|
||||
*/
|
||||
|
||||
|
||||
#define M2M_ATE_SUCCESS (M2M_SUCCESS)
|
||||
/*!< No Error and operation has been completed successfully.
|
||||
/*!< No Error and operation completed successfully.
|
||||
*/
|
||||
#define M2M_ATE_ERR_VALIDATE (M2M_ERR_FAIL)
|
||||
/*!< Error in parameters passed to functions.
|
||||
*/
|
||||
#define M2M_ATE_ERR_TX_ALREADY_RUNNING (-1)
|
||||
/*!< This means that TX case is already running and RX or even TX can't start without stopping it first.
|
||||
/*!< Error in starting a transmission test. Another test is already running and its not allowed to start another ATE test.
|
||||
*/
|
||||
#define M2M_ATE_ERR_RX_ALREADY_RUNNING (-2)
|
||||
/*!< This means that RX case is already running and TX or even RX can't start without stopping it first.
|
||||
/*!< Error in starting a reception test. Another test is already running and its not allowed to start another ATE test.
|
||||
*/
|
||||
#define M2M_ATE_ERR_UNHANDLED_CASE (-3)
|
||||
/*!< Invalid case.
|
||||
*/
|
||||
#define M2M_ATE_RX_DISABLE_DA 0x0
|
||||
/*!< Filter selection for received frames: Disable filtering received frames by the destination address.
|
||||
*/
|
||||
#define M2M_ATE_RX_ENABLE_DA 0x1
|
||||
|
||||
/*!< Filter selection for received frames: Enable filtering received frames by the destination address.
|
||||
*/
|
||||
#define M2M_ATE_RX_DISABLE_SA 0x0
|
||||
/*!< Filter selection for received frames: Disable filtering received frames by the source address.
|
||||
*/
|
||||
#define M2M_ATE_RX_ENABLE_SA 0x1
|
||||
|
||||
#define M2M_ATE_DISABLE_SELF_MACADDR 0x0
|
||||
/*!< Filter selection for received frames: Enable filtering received frames by the source address.
|
||||
*/
|
||||
#define M2M_ATE_DISABLE_SELF_MACADDR 0x0
|
||||
/*!<Disable setting a new mac address through the ATE test application and use the pre-set mac address in the firmware.
|
||||
*/
|
||||
#define M2M_ATE_SET_SELF_MACADDR 0x1
|
||||
/*!<Enable setting a new mac address through the ATE test application and use the pre-set mac address.
|
||||
*/
|
||||
#define M2M_ATE_TX_DUTY_MAX_VALUE M2M_ATE_TX_DUTY_1
|
||||
/*!< The maximum value of duty cycle
|
||||
*/
|
||||
#define M2M_ATE_TX_DUTY_MIN_VALUE M2M_ATE_TX_DUTY_10
|
||||
/*!< The minimum value of duty cycle
|
||||
*/
|
||||
//@}
|
||||
/**@defgroup ATEDataTypes DataTypes
|
||||
* @ingroup m2m_ate
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
DATA TYPES
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
/*!
|
||||
*@enum tenuM2mAteFwState
|
||||
*@brief Enumeration used for change ATE firmware state
|
||||
*@brief Enumeration used to change ATE firmware states
|
||||
*/
|
||||
typedef enum {
|
||||
M2M_ATE_FW_STATE_STOP = 0x00,
|
||||
@ -105,7 +126,7 @@ typedef enum {
|
||||
|
||||
/*!
|
||||
*@enum tenuM2mAteTxRates
|
||||
*@brief Used to get value of rate referenced by this index
|
||||
*@brief Enumeration used to index the TX rates that can be used during the transmission test.
|
||||
*/
|
||||
typedef enum {
|
||||
M2M_ATE_TX_RATE_1_Mbps_INDEX = 0x00,
|
||||
@ -138,7 +159,7 @@ typedef enum {
|
||||
|
||||
/*!
|
||||
*@enum tenuM2mAteTxDutyCycle
|
||||
*@brief Values of duty cycle
|
||||
*@brief Enumeration used to index the TX duty cycle that can be used during the transmission test.
|
||||
*/
|
||||
typedef enum {
|
||||
M2M_ATE_TX_DUTY_1 = 0x01,
|
||||
@ -153,33 +174,39 @@ typedef enum {
|
||||
M2M_ATE_TX_DUTY_10 = 0xA0,
|
||||
}tenuM2mAteTxDutyCycle;
|
||||
|
||||
|
||||
#define M2M_ATE_TX_DUTY_MAX_VALUE M2M_ATE_TX_DUTY_1
|
||||
/*!< The maximum value of duty cycle
|
||||
*/
|
||||
#define M2M_ATE_TX_DUTY_MIN_VALUE M2M_ATE_TX_DUTY_10
|
||||
/*!< The minimum value of duty cycle
|
||||
*/
|
||||
|
||||
/*!
|
||||
*@enum tenuM2mAteTxDpdControl
|
||||
*@brief Allowed values for DPD control
|
||||
*@brief Enumeration for the allowed Digital-pre distortion(DPD) control values.
|
||||
*/
|
||||
typedef enum {
|
||||
M2M_ATE_TX_DPD_DYNAMIC = 0x00,
|
||||
/*!< Dynamic mode indicates that DPD values will be set dynamically from a lookup table pre-set with the DPD coefficients.
|
||||
*/
|
||||
M2M_ATE_TX_DPD_BYPASS = 0x01,
|
||||
/*!< Bypass mode indicates that the DPD control will be bypassed.
|
||||
*/
|
||||
M2M_ATE_TX_DPD_ENABLED = 0x02,
|
||||
/*!< Enabled mode allows the tester to manually set the DPD coefficients.
|
||||
*/
|
||||
}tenuM2mAteTxDpdControl;
|
||||
|
||||
/*!
|
||||
*@enum tenuM2mAteTxGainSetting
|
||||
*@brief Options for TX gain selection mode
|
||||
*@brief Enumeration for the allowed TX gain selection modes.
|
||||
*/
|
||||
typedef enum {
|
||||
M2M_ATE_TX_GAIN_DYNAMIC = 0x00,
|
||||
/*!< Dynamic mode indicates that Tx gain values for the digital gain,pa and ppa, will be set dynamically from a lookup table based on the Tx_rate configured.
|
||||
*/
|
||||
M2M_ATE_TX_GAIN_BYPASS = 0x01,
|
||||
/*!< Bypass mode indicates that Tx gain configurations will be bypassed.
|
||||
*/
|
||||
M2M_ATE_TX_GAIN_FCC = 0x02,
|
||||
/*!< Using the FCC tx gain configuration indicates that the tx gain values will be used from the FCC flashed table(pre-configured values from a customer).
|
||||
*/
|
||||
M2M_ATE_TX_GAIN_TELEC = 0x03,
|
||||
/*!< Using the TELEC tx gain configuration indicates that the tx gain values will be used from the TELEC flashed table(pre-configured values from a customer).
|
||||
*/
|
||||
}tenuM2mAteTxGainSetting;
|
||||
|
||||
/*!
|
||||
@ -188,25 +215,37 @@ typedef enum {
|
||||
*/
|
||||
typedef enum {
|
||||
M2M_ATE_PMU_DISBLE = 0x00,
|
||||
/*!< Disable using PMU mode
|
||||
*/
|
||||
M2M_ATE_PMU_ENABLE = 0x01,
|
||||
/*!< Enable using PMU mode
|
||||
*/
|
||||
}tenuM2mAtePMUSetting;
|
||||
|
||||
/*!
|
||||
*@enum tenuM2mAteTxSource
|
||||
*@brief Used to define if enable PHY continues mode or MAC
|
||||
*@enum tenuM2mAteTxSource
|
||||
*@brief Used to define the Tx source, either PHY mode or MAC mode.
|
||||
*/
|
||||
typedef enum {
|
||||
M2M_ATE_TX_SRC_MAC = 0x00,
|
||||
/*!< When the TX Source is set to MAC, it indicates that the TX frames are manually framed and sent from the MAC layer
|
||||
*/
|
||||
M2M_ATE_TX_SRC_PHY = 0x01,
|
||||
/*!< When the TX source is set to PHY, it indicates that transmission sequence occurs from PHY layer in the form of pulses
|
||||
*/
|
||||
}tenuM2mAteTxSource;
|
||||
|
||||
/*!
|
||||
*@enum tenuM2mAteTxMode
|
||||
*@brief Used to define type of TX mode either normal or CW(Continuous Wave) TX sequence
|
||||
*@enum tenuM2mAteTxMode
|
||||
*@brief Used to define the mode of PHY TX transmission source: Continuous Wave(CW) or Normal(i.e CW is disabled) TX sequence
|
||||
*/
|
||||
typedef enum {
|
||||
M2M_ATE_TX_MODE_NORM = 0x00,
|
||||
/*!< When the TX source is set to PHY,normal mode indicates that continuous transmission is disabled.
|
||||
*/
|
||||
M2M_ATE_TX_MODE_CW = 0x01,
|
||||
/*!< When the TX source is set to PHY, continuous mode indicates that transmission sequences occur back to back in a continuous wave from the PHY layer.
|
||||
*/
|
||||
}tenuM2mAteTxMode;
|
||||
|
||||
/*!
|
||||
@ -215,37 +254,69 @@ typedef enum {
|
||||
*/
|
||||
typedef enum {
|
||||
M2M_ATE_RX_PWR_HIGH = 0x00,
|
||||
/*!< Indicates that receive mode is operating at high power
|
||||
*/
|
||||
M2M_ATE_RX_PWR_LOW = 0x01,
|
||||
/*!< Indicates that receive mode is operating at low power
|
||||
*/
|
||||
}tenuM2mAteRxPwrMode;
|
||||
|
||||
/*!
|
||||
*@enum tenuM2mAteChannels
|
||||
*@brief Available channels for TX and RX
|
||||
*@brief Available channels for TX and RX in the 2.4GHz spectrum starting at 2412MHz with a 5MHz bandwidth.
|
||||
*/
|
||||
typedef enum {
|
||||
M2M_ATE_CHANNEL_1 = 0x01,
|
||||
/*!< Channel 1: 2412MHz
|
||||
*/
|
||||
M2M_ATE_CHANNEL_2 = 0x02,
|
||||
/*!< Channel 2: 2417MHz
|
||||
*/
|
||||
M2M_ATE_CHANNEL_3 = 0x03,
|
||||
/*!< Channel 3: 2422MHz
|
||||
*/
|
||||
M2M_ATE_CHANNEL_4 = 0x04,
|
||||
/*!< Channel 4: 2427MHz
|
||||
*/
|
||||
M2M_ATE_CHANNEL_5 = 0x05,
|
||||
/*!< Channel 5: 2432MHz
|
||||
*/
|
||||
M2M_ATE_CHANNEL_6 = 0x06,
|
||||
/*!< Channel 6: 2437MHz
|
||||
*/
|
||||
M2M_ATE_CHANNEL_7 = 0x07,
|
||||
/*!< Channel 7: 2442MHz
|
||||
*/
|
||||
M2M_ATE_CHANNEL_8 = 0x08,
|
||||
/*!< Channel 8: 2447MHz
|
||||
*/
|
||||
M2M_ATE_CHANNEL_9 = 0x09,
|
||||
/*!< Channel 9: 2452MHz
|
||||
*/
|
||||
M2M_ATE_CHANNEL_10 = 0x0A,
|
||||
/*!< Channel 10: 2462MHz
|
||||
*/
|
||||
M2M_ATE_CHANNEL_11 = 0x0B,
|
||||
/*!< Channel 11: 2467MHz
|
||||
*/
|
||||
M2M_ATE_CHANNEL_12 = 0x0C,
|
||||
/*!< Channel 12: 2472MHz
|
||||
*/
|
||||
M2M_ATE_CHANNEL_13 = 0x0D,
|
||||
/*!< Channel 13: 2472MHz
|
||||
*/
|
||||
M2M_ATE_CHANNEL_14 = 0x0E,
|
||||
/*!< Channel 14: 2484MHz
|
||||
*/
|
||||
}tenuM2mAteChannels;
|
||||
|
||||
/*!
|
||||
*@struct tstrM2mAteRxStatus
|
||||
*@brief Used to save statistics of RX case
|
||||
*@brief Used to save statistics for receive(RX) test case
|
||||
*/
|
||||
typedef struct {
|
||||
uint32 num_rx_pkts;
|
||||
/*!< Number of total RX packet
|
||||
/*!< Number of total RX packets
|
||||
*/
|
||||
uint32 num_err_pkts;
|
||||
/*!< Number of RX failed packets
|
||||
@ -257,33 +328,34 @@ typedef struct {
|
||||
|
||||
/*!
|
||||
*@struct tstrM2mAteRxStatus
|
||||
*@brief Used to save statistics of RX case
|
||||
*@brief Used to save receive test case configuration
|
||||
*@see tenuM2mAteRxPwrMode
|
||||
*/
|
||||
typedef struct {
|
||||
uint8 u8RxPwrMode;
|
||||
/*!< RX power mode review tenuM2mAteRxPwrMode
|
||||
/*!< RX power mode review \ref tenuM2mAteRxPwrMode
|
||||
*/
|
||||
} tstrM2mAteInit;
|
||||
|
||||
/*!
|
||||
*@struct tstrM2mAteTx
|
||||
*@brief Used as data source in case of enabling TX test case
|
||||
*@brief Used for the transmission(Tx) test configuration.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32 num_frames;
|
||||
/*!< Number of frames to be sent where maximum number allowed is 4294967295 ul, and ZERO means infinite number of frames
|
||||
*/
|
||||
uint32 data_rate;
|
||||
/*!< Rate to sent packets over to select rate use value of \ref tenuM2mAteTxIndexOfRates and pass it to \ref m2m_ate_get_tx_rate
|
||||
/*!< Rate to send packets, to select a rate use values from the enumeration \ref tenuM2mAteTxIndexOfRates and pass it to \ref m2m_ate_get_tx_rate
|
||||
*/
|
||||
uint8 channel_num;
|
||||
/*!< Channel number \ref tenuM2mAteChannels
|
||||
uint8 channel_num;
|
||||
/*!< Channel number as enumerated at \ref tenuM2mAteChannels
|
||||
*/
|
||||
uint8 duty_cycle;
|
||||
/*!< Duty cycle value between from 1 to 10, where maximum = 1, minimum = 10 \ref tenuM2mAteTxDutyCycle
|
||||
/*!< Duty cycle value between from 1 to 10, where maximum = 1, minimum = 10. As enumerated \ref tenuM2mAteTxDutyCycle
|
||||
*/
|
||||
uint16 frame_len;
|
||||
/*!< Use \ref M2M_ATE_MAX_FRAME_LENGTH (1024) as the maximum value while \ref M2M_ATE_MIN_FRAME_LENGTH (1) is the minimum value
|
||||
/*!< Use @ref M2M_ATE_MAX_FRAME_LENGTH (1024) as the maximum value while @ref M2M_ATE_MIN_FRAME_LENGTH (1) is the minimum value
|
||||
*/
|
||||
uint8 tx_gain_sel;
|
||||
/*!< TX gain mode selection value \ref tenuM2mAteTxGainSetting
|
||||
@ -295,13 +367,13 @@ typedef struct {
|
||||
/*!< This is 0 if PMU is not used otherwise it must be be 1 \ref tenuM2mAtePMUSetting
|
||||
*/
|
||||
uint8 phy_burst_tx;
|
||||
/*!< Source of Burst TX either PHY or MAC\ref tenuM2mAteTxSource
|
||||
/*!< Source of Burst TX either PHY or MAC \ref tenuM2mAteTxSource
|
||||
*/
|
||||
uint8 cw_tx;
|
||||
/*!< Mode of Burst TX either normal TX sequence or CW(Continuous Wave) TX sequence \ref tenuM2mAteTxMode
|
||||
/*!< Mode of Phy TX transmission either normal TX sequence or CW(Continuous Wave) TX sequence \ref tenuM2mAteTxMode
|
||||
*/
|
||||
uint32 xo_offset_x1000;
|
||||
/*!< Signed XO offset value in PPM (Part Per Million) multiplied by 1000.
|
||||
/*!< Signed XO offset value in Part Per Million(PPM) multiplied by 1000.
|
||||
*/
|
||||
uint8 use_efuse_xo_offset;
|
||||
/*!< Set to 0 to use the XO offset provided in xo_offset_x1000. Set to 1 to use XO offset programmed on WINC efuse.
|
||||
@ -313,7 +385,7 @@ typedef struct {
|
||||
|
||||
/*!
|
||||
*@struct tstrM2mAteRx
|
||||
*@brief Used as data source in case of enabling RX test case
|
||||
*@brief Used for the reception(Rx) test configuration.
|
||||
*/
|
||||
typedef struct {
|
||||
uint8 channel_num;
|
||||
@ -329,38 +401,46 @@ typedef struct {
|
||||
/*!< Set to 0 to use the XO offset provided in xo_offset_x1000. Set to 1 to use XO offset programmed on WINC efuse.
|
||||
*/
|
||||
uint8 self_mac_addr[6];
|
||||
/*!< Set to the self mac address required to be overriden.
|
||||
/*!< Set to the self mac address required to be overridden.
|
||||
*/
|
||||
uint8 peer_mac_addr[6];
|
||||
/*!< Set to the source mac address expected to filter frames from.
|
||||
*/
|
||||
uint8 mac_filter_en_da;
|
||||
/*!< Flag set to enable or disable reception with destination address as a filter.
|
||||
/*!< Flag set to enable or disable reception with destination address as a filter. Using the following flags \ref M2M_ATE_RX_ENABLE_DA
|
||||
\ref M2M_ATE_RX_DISABLE_DA
|
||||
*/
|
||||
uint8 mac_filter_en_sa;
|
||||
/*!< Flag set to enable or disable reception with source address as a filter.
|
||||
/*!< Flag set to enable or disable reception with source address as a filter.Using the following flags \ref M2M_ATE_RX_ENABLE_SA
|
||||
\ref M2M_ATE_RX_DISABLE_SA
|
||||
*/
|
||||
uint8 override_self_mac_addr;
|
||||
/*!< Flag set to enable or disable self mac address feature.
|
||||
/*!< Flag set to enable or disable self mac address feature. Using the following flags \ref M2M_ATE_DISABLE_SELF_MACADDR
|
||||
\ref M2M_ATE_SET_SELF_MACADDR
|
||||
*/
|
||||
} tstrM2mAteRx;
|
||||
|
||||
//@}
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
FUNCTION PROTOTYPES
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**@defgroup ATEFunction Function
|
||||
* @ingroup m2m_ate
|
||||
* @{
|
||||
*/
|
||||
/*!
|
||||
@fn \
|
||||
sint8 m2m_ate_init(void);
|
||||
|
||||
@brief
|
||||
This function used to download ATE firmware from flash and start it
|
||||
This function used to download the ATE firmware from flash and start it.
|
||||
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
@see
|
||||
m2m_ate_init_param
|
||||
*/
|
||||
sint8 m2m_ate_init(void);
|
||||
|
||||
@ -370,10 +450,14 @@ sint8 m2m_ate_init(void);
|
||||
sint8 m2m_ate_init(tstrM2mAteInit *pstrInit);
|
||||
|
||||
@brief
|
||||
This function used to download ATE firmware from flash and start it
|
||||
|
||||
This function is used to download and start the ATE firmware with an initialization value
|
||||
stating the rx mode power \ref tstrM2mAteInit.
|
||||
@param [in] tstrM2mAteInit *
|
||||
Pointer to a structure \ref tstrM2mAteInit, defining the initial RX mode value.
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
@see
|
||||
m2m_ate_init
|
||||
*/
|
||||
sint8 m2m_ate_init_param(tstrM2mAteInit *pstrInit);
|
||||
|
||||
@ -385,7 +469,7 @@ sint8 m2m_ate_init_param(tstrM2mAteInit *pstrInit);
|
||||
De-Initialization of ATE firmware mode
|
||||
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
*/
|
||||
sint8 m2m_ate_deinit(void);
|
||||
|
||||
@ -394,13 +478,13 @@ sint8 m2m_ate_deinit(void);
|
||||
sint8 m2m_ate_set_fw_state(uint8);
|
||||
|
||||
@brief
|
||||
This function used to change ATE firmware status from running to stopped or vice versa.
|
||||
This function is used to change the ATE firmware status from running to stopped or vice versa.
|
||||
|
||||
@param [in] u8State
|
||||
Required state of ATE firmware, one of \ref tenuM2mAteFwState enumeration values.
|
||||
Required state of the ATE firmware, one of \ref tenuM2mAteFwState enumeration values.
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
\sa
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
@see
|
||||
m2m_ate_init
|
||||
*/
|
||||
sint8 m2m_ate_set_fw_state(uint8);
|
||||
@ -410,11 +494,11 @@ sint8 m2m_ate_set_fw_state(uint8);
|
||||
sint8 m2m_ate_get_fw_state(uint8);
|
||||
|
||||
@brief
|
||||
This function used to return status of ATE firmware.
|
||||
This function is used to return the status of ATE firmware.
|
||||
|
||||
@return
|
||||
The function SHALL return status of ATE firmware, one of \ref tenuM2mAteFwState enumeration values.
|
||||
\sa
|
||||
The function SHALL return the status of ATE firmware, one of \ref tenuM2mAteFwState enumeration values.
|
||||
@see
|
||||
m2m_ate_init, m2m_ate_set_fw_state
|
||||
*/
|
||||
sint8 m2m_ate_get_fw_state(void);
|
||||
@ -424,13 +508,13 @@ sint8 m2m_ate_get_fw_state(void);
|
||||
uint32 m2m_ate_get_tx_rate(uint8);
|
||||
|
||||
@brief
|
||||
This function used to return value of TX rate required by application developer.
|
||||
This function is used to return value of TX rate required by application developer.
|
||||
|
||||
@param [in] u8Index
|
||||
Index of required rate , one of \ref tenuM2mAteTxIndexOfRates enumeration values.
|
||||
Index of the required rate , one of \ref tenuM2mAteTxIndexOfRates enumeration values.
|
||||
@return
|
||||
The function SHALL return 0 for in case of failure otherwise selected rate value.
|
||||
\sa
|
||||
The function SHALL return 0 in case of receiving invalid index, otherwise the selected rate value is returned.
|
||||
@see
|
||||
tenuM2mAteTxIndexOfRates
|
||||
*/
|
||||
uint32 m2m_ate_get_tx_rate(uint8);
|
||||
@ -440,11 +524,11 @@ uint32 m2m_ate_get_tx_rate(uint8);
|
||||
sint8 m2m_ate_get_tx_status(void);
|
||||
|
||||
@brief
|
||||
This function used to return status of TX test case either running or stopped.
|
||||
This function is used to return the status of TX test case either running or stopped.
|
||||
|
||||
@return
|
||||
The function SHALL return status of ATE firmware, 1 if TX is running otherwise 0.
|
||||
\sa
|
||||
The function SHALL return the status of ATE firmware, 1 if TX test case is running or 0 if TX test case has been stopped.
|
||||
@see
|
||||
m2m_ate_start_tx, m2m_ate_stop_tx
|
||||
*/
|
||||
sint8 m2m_ate_get_tx_status(void);
|
||||
@ -454,13 +538,13 @@ sint8 m2m_ate_get_tx_status(void);
|
||||
sint8 m2m_ate_start_tx(tstrM2mAteTx *)
|
||||
|
||||
@brief
|
||||
This function used to start TX test case.
|
||||
This function is used to start the TX test case.
|
||||
|
||||
@param [in] strM2mAteTx
|
||||
Type of \ref tstrM2mAteTx, with the values required to enable TX test case. You must use \ref m2m_ate_init first.
|
||||
Type of \ref tstrM2mAteTx, with the values required to enable TX test case. Application must use \ref m2m_ate_init first.
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
\sa
|
||||
@see
|
||||
m2m_ate_init, m2m_ate_stop_tx, m2m_ate_get_tx_status
|
||||
*/
|
||||
sint8 m2m_ate_start_tx(tstrM2mAteTx *);
|
||||
@ -470,11 +554,11 @@ sint8 m2m_ate_start_tx(tstrM2mAteTx *);
|
||||
sint8 m2m_ate_stop_tx(void)
|
||||
|
||||
@brief
|
||||
This function used to stop TX test case.
|
||||
This function is used to stop the TX test case.
|
||||
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
\sa
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
@see
|
||||
m2m_ate_init, m2m_ate_start_tx, m2m_ate_get_tx_status
|
||||
*/
|
||||
sint8 m2m_ate_stop_tx(void);
|
||||
@ -484,11 +568,11 @@ sint8 m2m_ate_stop_tx(void);
|
||||
sint8 m2m_ate_get_rx_status(uint8);
|
||||
|
||||
@brief
|
||||
This function used to return status of RX test case either running or stopped.
|
||||
This function is used to return the status of RX test case either running or stopped.
|
||||
|
||||
@return
|
||||
The function SHALL return status of ATE firmware, 1 if RX is running otherwise 0.
|
||||
\sa
|
||||
The function SHALL return status of ATE firmware, 1 if RX test case is running or 0 when the test case has been stopped.
|
||||
@see
|
||||
m2m_ate_start_rx, m2m_ate_stop_rx
|
||||
*/
|
||||
sint8 m2m_ate_get_rx_status(void);
|
||||
@ -498,13 +582,13 @@ sint8 m2m_ate_get_rx_status(void);
|
||||
sint8 m2m_ate_start_rx(tstrM2mAteRx *)
|
||||
|
||||
@brief
|
||||
This function used to start RX test case.
|
||||
This function is used to start RX test case.
|
||||
|
||||
@param [in] strM2mAteRx
|
||||
Type of \ref tstrM2mAteRx, with the values required to enable RX test case. You must use \ref m2m_ate_init first.
|
||||
Type of \ref tstrM2mAteRx, with the values required to enable RX test case. Application must use \ref m2m_ate_init first.
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
\sa
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
@see
|
||||
m2m_ate_init, m2m_ate_stop_rx, m2m_ate_get_rx_status
|
||||
*/
|
||||
sint8 m2m_ate_start_rx(tstrM2mAteRx *);
|
||||
@ -514,11 +598,11 @@ sint8 m2m_ate_start_rx(tstrM2mAteRx *);
|
||||
sint8 m2m_ate_stop_rx(void)
|
||||
|
||||
@brief
|
||||
This function used to stop RX test case.
|
||||
This function is used to stop RX test case.
|
||||
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
\sa
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
@see
|
||||
m2m_ate_init, m2m_ate_start_rx, m2m_ate_get_rx_status
|
||||
*/
|
||||
sint8 m2m_ate_stop_rx(void);
|
||||
@ -528,13 +612,13 @@ sint8 m2m_ate_stop_rx(void);
|
||||
sint8 m2m_ate_read_rx_status(tstrM2mAteRxStatus *)
|
||||
|
||||
@brief
|
||||
This function used to read RX statistics from ATE firmware.
|
||||
This function is used to read RX statistics from the ATE firmware.
|
||||
|
||||
@param [out] strM2mAteRxStatus
|
||||
Type of \ref tstrM2mAteRxStatus used to save statistics of RX test case. You must use \ref m2m_ate_start_rx first.
|
||||
Type of \ref tstrM2mAteRxStatus used to save statistics of RX test case. Application must use \ref m2m_ate_start_rx first.
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
\sa
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
@see
|
||||
m2m_ate_init, m2m_ate_start_rx
|
||||
*/
|
||||
sint8 m2m_ate_read_rx_status(tstrM2mAteRxStatus *);
|
||||
@ -544,12 +628,14 @@ sint8 m2m_ate_read_rx_status(tstrM2mAteRxStatus *);
|
||||
sint8 m2m_ate_set_dig_gain(double dGaindB)
|
||||
|
||||
@brief
|
||||
This function is used to set the digital gain
|
||||
This function is used to set the digital gain value to the HW registers in dB.
|
||||
|
||||
@param [in] double dGaindB
|
||||
The digital gain value required to be set.
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
@see
|
||||
m2m_ate_get_dig_gain, m2m_ate_get_pa_gain,m2m_ate_get_ppa_gain,m2m_ate_get_tot_gain
|
||||
*/
|
||||
sint8 m2m_ate_set_dig_gain(double dGaindB);
|
||||
|
||||
@ -558,26 +644,43 @@ sint8 m2m_ate_set_dig_gain(double dGaindB);
|
||||
sint8 m2m_ate_get_dig_gain(double * dGaindB)
|
||||
|
||||
@brief
|
||||
This function is used to get the digital gain
|
||||
This function is used to retrieve the digital gain value from the HW registers in dB.
|
||||
Digital gain is one of the values that are set to calculate the total tx gain value.
|
||||
|
||||
@param [out] double * dGaindB
|
||||
The retrieved digital gain value obtained from HW registers in dB.
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
@see
|
||||
m2m_ate_set_dig_gain, m2m_ate_get_pa_gain,m2m_ate_get_ppa_gain,m2m_ate_get_tot_gain
|
||||
*/
|
||||
sint8 m2m_ate_get_dig_gain(double * dGaindB);
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
void m2m_ate_set_pa_gain(uint8 gain_db)
|
||||
|
||||
@brief
|
||||
This function is used to set the PA gain (18/15/12/9/6/3/0 only)
|
||||
|
||||
@param [in] uint8 gain_db
|
||||
PA gain level allowed (18/15/12/9/6/3/0 only)
|
||||
|
||||
*/
|
||||
void m2m_ate_set_pa_gain(uint8 gain_db);
|
||||
/*!
|
||||
@fn \
|
||||
sint8 m2m_ate_get_pa_gain(double *paGaindB)
|
||||
|
||||
@brief
|
||||
This function is used to get the PA gain
|
||||
This function is used to get the Power Amplifier(PA) gain
|
||||
|
||||
@param [out] double *paGaindB
|
||||
The retrieved PA gain value obtained from HW registers in dB.
|
||||
The retrieved PA gain value obtained from HW registers in dB.
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
@see
|
||||
m2m_ate_set_dig_gain, m2m_ate_get_dig_gain,m2m_ate_get_ppa_gain,m2m_ate_get_tot_gain
|
||||
*/
|
||||
sint8 m2m_ate_get_pa_gain(double *paGaindB);
|
||||
|
||||
@ -586,12 +689,14 @@ sint8 m2m_ate_get_pa_gain(double *paGaindB);
|
||||
sint8 m2m_ate_get_ppa_gain(double * ppaGaindB)
|
||||
|
||||
@brief
|
||||
This function is used to get the PPA gain
|
||||
This function is used to get the Pre-Power Amplifier(PPA) gain
|
||||
|
||||
@param [out] uint32 * ppaGaindB
|
||||
The retrieved PPA gain value obtained from HW registers in dB.
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
@see
|
||||
m2m_ate_set_dig_gain, m2m_ate_get_dig_gain,m2m_ate_get_pa_gain,m2m_ate_get_tot_gain
|
||||
*/
|
||||
sint8 m2m_ate_get_ppa_gain(double * ppaGaindB);
|
||||
|
||||
@ -600,15 +705,17 @@ sint8 m2m_ate_get_ppa_gain(double * ppaGaindB);
|
||||
sint8 m2m_ate_get_tot_gain(double * totGaindB)
|
||||
|
||||
@brief
|
||||
This function is used to calculate the total gain
|
||||
This function is used to calculate the total tx gain value
|
||||
|
||||
@param [out] double * totGaindB
|
||||
The retrieved total gain value obtained from calculations made based on the digital gain, PA and PPA gain values.
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
@see
|
||||
m2m_ate_set_dig_gain, m2m_ate_get_dig_gain,m2m_ate_get_pa_gain,m2m_ate_get_ppa_gain
|
||||
*/
|
||||
sint8 m2m_ate_get_tot_gain(double * totGaindB);
|
||||
|
||||
//@}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief WINC Crypto Application Interface.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -81,6 +74,9 @@ typedef struct sha256ctxt{
|
||||
|
||||
@brief
|
||||
RSA Signature status: pass or fail.
|
||||
|
||||
@see
|
||||
m2m_crypto_rsa_sign_gen
|
||||
*/
|
||||
typedef enum{
|
||||
M2M_RSA_SIGN_OK,
|
||||
@ -91,14 +87,17 @@ typedef enum{
|
||||
@typedef \
|
||||
tpfAppCryproCb
|
||||
|
||||
@brief
|
||||
@brief Crypto Callback function receiving the crypto related messages
|
||||
@param [in] u8MsgType
|
||||
|
||||
Crypto command about which the notification is received.
|
||||
@param [in] pvResp
|
||||
A pointer to the result associated with the notification.
|
||||
@param [in] pvMsg
|
||||
A pointer to a buffer containing the notification parameters (if any). It should be
|
||||
Casted to the correct data type corresponding to the notification type.
|
||||
|
||||
|
||||
@see
|
||||
m2m_crypto_init
|
||||
tenuM2mCryptoCmd
|
||||
*/
|
||||
typedef void (*tpfAppCryproCb) (uint8 u8MsgType,void * pvResp, void * pvMsg);
|
||||
|
||||
@ -114,10 +113,15 @@ FUNCTION PROTOTYPES
|
||||
@fn \
|
||||
sint8 m2m_crypto_init();
|
||||
|
||||
@brief crypto initialization
|
||||
@brief crypto initialization.
|
||||
|
||||
@param[in] pfAppCryproCb
|
||||
|
||||
Pointer to the Crypto Callback function receiving the crypto related messages.
|
||||
@see
|
||||
tpfAppCryproCb
|
||||
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
|
||||
*/
|
||||
sint8 m2m_crypto_init(tpfAppCryproCb pfAppCryproCb);
|
||||
/*!
|
||||
@ -127,7 +131,9 @@ sint8 m2m_crypto_init(tpfAppCryproCb pfAppCryproCb);
|
||||
@brief SHA256 hash initialization
|
||||
|
||||
@param[in] psha256Ctxt
|
||||
Pointer to a sha256 context allocated by the caller.
|
||||
Pointer to a sha256 context allocated by the caller.
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
|
||||
*/
|
||||
sint8 m2m_crypto_sha256_hash_init(tstrM2mSha256Ctxt *psha256Ctxt);
|
||||
|
||||
@ -145,7 +151,14 @@ sint8 m2m_crypto_sha256_hash_init(tstrM2mSha256Ctxt *psha256Ctxt);
|
||||
Buffer holding the data submitted to the hash.
|
||||
|
||||
@param [in] u16DataLength
|
||||
Size of the data bufefr in bytes.
|
||||
Size of the data buffer in bytes.
|
||||
@pre SHA256 module should be initialized first through m2m_crypto_sha256_hash_init function.
|
||||
|
||||
@see m2m_crypto_sha256_hash_init
|
||||
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
|
||||
|
||||
*/
|
||||
sint8 m2m_crypto_sha256_hash_update(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Data, uint16 u16DataLength);
|
||||
|
||||
@ -161,12 +174,13 @@ sint8 m2m_crypto_sha256_hash_update(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Da
|
||||
|
||||
@param [in] pu8Sha256Digest
|
||||
Buffer allocated by the caller which will hold the resultant SHA256 Digest. It must be allocated no less than M2M_SHA256_DIGEST_LEN.
|
||||
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
|
||||
*/
|
||||
sint8 m2m_crypto_sha256_hash_finish(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Sha256Digest);
|
||||
|
||||
|
||||
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
sint8 m2m_rsa_sign_verify(uint8 *pu8N, uint16 u16NSize, uint8 *pu8E, uint16 u16ESize, uint8 *pu8SignedMsgHash, \
|
||||
@ -198,6 +212,9 @@ sint8 m2m_crypto_sha256_hash_finish(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Sh
|
||||
|
||||
@param[out] pu8RsaSignature
|
||||
Signature value to be verified.
|
||||
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
|
||||
*/
|
||||
sint8 m2m_crypto_rsa_sign_verify(uint8 *pu8N, uint16 u16NSize, uint8 *pu8E, uint16 u16ESize, uint8 *pu8SignedMsgHash,
|
||||
uint16 u16HashLength, uint8 *pu8RsaSignature);
|
||||
@ -233,7 +250,10 @@ sint8 m2m_crypto_rsa_sign_verify(uint8 *pu8N, uint16 u16NSize, uint8 *pu8E, uint
|
||||
The length of the hash digest.
|
||||
|
||||
@param[out] pu8RsaSignature
|
||||
Pointer to a user buffer allocated by teh caller shall hold the generated signature.
|
||||
Pointer to a user buffer allocated by the caller shall hold the generated signature.
|
||||
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
|
||||
*/
|
||||
sint8 m2m_crypto_rsa_sign_gen(uint8 *pu8N, uint16 u16NSize, uint8 *pu8d, uint16 u16dSize, uint8 *pu8SignedMsgHash,
|
||||
uint16 u16HashLength, uint8 *pu8RsaSignature);
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains M2M host interface APIs implementation.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -135,7 +128,7 @@ NMI_API sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16Ct
|
||||
uint8 *pu8DataBuf,uint16 u16DataSize, uint16 u16DataOffset);
|
||||
/*
|
||||
* @fn hif_receive
|
||||
* @brief Host interface interrupt serviece routine
|
||||
* @brief Host interface interrupt service routine
|
||||
* @param [in] u32Addr
|
||||
* Receive start address
|
||||
* @param [out] pu8Buf
|
||||
@ -172,6 +165,14 @@ NMI_API sint8 hif_register_cb(uint8 u8Grp,tpfHifCallBack fn);
|
||||
*/
|
||||
NMI_API sint8 hif_chip_sleep(void);
|
||||
/**
|
||||
* @fn NMI_API sint8 hif_chip_sleep_sc(void);
|
||||
* @brief
|
||||
To clear the chip count only but keep the chip awake
|
||||
* @return
|
||||
The function shall return ZERO for successful operation and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 hif_chip_sleep_sc(void);
|
||||
/**
|
||||
* @fn NMI_API sint8 hif_chip_wake(void);
|
||||
* @brief
|
||||
To Wakeup the chip.
|
||||
@ -226,6 +227,13 @@ NMI_API uint8 hif_get_sleep_mode(void);
|
||||
NMI_API sint8 hif_Resp_handler(uint8 *pu8Buffer, uint16 u16BufferSize);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @fn hif_yield(void)
|
||||
* @brief
|
||||
Yields control from interrupt event handler.
|
||||
*/
|
||||
NMI_API void hif_yield(void);
|
||||
|
||||
/**
|
||||
* @fn hif_handle_isr(void)
|
||||
* @brief
|
||||
|
||||
@ -4,41 +4,63 @@
|
||||
*
|
||||
* \brief WINC OTA Upgrade API Interface.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**@defgroup OTAAPI OTA
|
||||
@brief
|
||||
The WINC supports OTA (Over-The-Air) updates. Using the APIs described in this module,
|
||||
it is possible to request an ATWINC15x0 to update its firmware, or safely rollback to
|
||||
the previous firmware version.\n There are also APIs to download files and store them in
|
||||
the WINC's Flash (supported by ATWINC1510 only), which can be used for Host MCU OTA
|
||||
updates or accessing information stored remotely.
|
||||
@{
|
||||
@defgroup OTACALLBACKS Callbacks
|
||||
@brief
|
||||
Lists the different callbacks that can be used during OTA updates.\n
|
||||
Callbacks of type @ref tpfOtaNotifCb and @ref tpfOtaUpdateCb should be passed
|
||||
onto @ref m2m_ota_init at system initialization. Other callbacks are provided
|
||||
to handle the various steps of Host File Download.
|
||||
|
||||
@defgroup OTADEFINE Defines
|
||||
@brief
|
||||
Specifies the macros and defines used by the OTA APIs.
|
||||
|
||||
@defgroup OTATYPEDEF Enumerations and Typedefs
|
||||
@brief
|
||||
Specifies the enums and Data Structures used by the OTA APIs.
|
||||
|
||||
@defgroup OTAFUNCTIONS Functions
|
||||
@brief
|
||||
Lists the full set of available APIs to manage OTA updates and Host File Downloads.
|
||||
@}
|
||||
*/
|
||||
|
||||
#ifndef __M2M_OTA_H__
|
||||
#define __M2M_OTA_H__
|
||||
|
||||
@ -49,24 +71,28 @@ INCLUDES
|
||||
#include "common/include/nm_common.h"
|
||||
#include "driver/include/m2m_types.h"
|
||||
#include "driver/include/nmdrv.h"
|
||||
/**@addtogroup WlanEnums Enumerations and Typedefs
|
||||
* @ingroup m2m_wifi
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
MACROS
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
/**@addtogroup OTACALLBACKS
|
||||
*/
|
||||
/* @{ */
|
||||
|
||||
|
||||
/**@{*/
|
||||
/*!
|
||||
@typedef void (*tpfOtaNotifCb) (tstrOtaUpdateInfo *);
|
||||
@typedef void (*tpfOtaNotifCb) (tstrOtaUpdateInfo *pstrOtaUpdateInfo);
|
||||
|
||||
@brief A callback to get notification about an potential OTA update.
|
||||
@brief
|
||||
A callback to get notification about a potential OTA update.
|
||||
|
||||
@param[in] pstrOtaUpdateInfo
|
||||
A structure to provide notification payload.
|
||||
|
||||
@param[in] pstrOtaUpdateInfo A structure to provide notification payload.
|
||||
|
||||
@sa
|
||||
@sa
|
||||
tstrOtaUpdateInfo
|
||||
@warning
|
||||
The notification is not supported (Not implemented yet)
|
||||
|
||||
@warning
|
||||
The notification is not supported (Not implemented yet)
|
||||
*/
|
||||
typedef void (*tpfOtaNotifCb) (tstrOtaUpdateInfo * pstrOtaUpdateInfo);
|
||||
|
||||
@ -74,163 +100,240 @@ typedef void (*tpfOtaNotifCb) (tstrOtaUpdateInfo * pstrOtaUpdateInfo);
|
||||
/*!
|
||||
@typedef void (*tpfOtaUpdateCb) (uint8 u8OtaUpdateStatusType ,uint8 u8OtaUpdateStatus);
|
||||
|
||||
@brief
|
||||
A callback to get OTA status update, the callback provide the status type and its status the OTA callback provides the download status,
|
||||
the switch to the downloaded firmware status and roll-back status.
|
||||
@brief
|
||||
A callback to get OTA status update, the callback provides the status type and its status.\n
|
||||
The OTA callback provides the download status, the switch to the downloaded firmware status,
|
||||
roll-back status and Host File Download status.
|
||||
|
||||
@param[in] u8OtaUpdateStatusType
|
||||
Possible values are listed in @ref tenuOtaUpdateStatusType.
|
||||
|
||||
@param[in] u8OtaUpdateStatusType Possible values are listed in tenuOtaUpdateStatusType. Possible types are:
|
||||
- [DL_STATUS](@ref DL_STATUS)
|
||||
- [SW_STATUS](@ref SW_STATUS)
|
||||
- [RB_STATUS](@ref RB_STATUS)
|
||||
@param[in] u8OtaUpdateStatus
|
||||
Possible values are listed as enumerated by @ref tenuOtaUpdateStatus.
|
||||
|
||||
@param[in] u8OtaUpdateStatus Possible values are listed in tenuOtaUpdateStatus.
|
||||
@note
|
||||
Executes other callbacks passed to the OTA module.
|
||||
|
||||
@see
|
||||
tenuOtaUpdateStatusType
|
||||
tenuOtaUpdateStatus
|
||||
*/
|
||||
typedef void (*tpfOtaUpdateCb) (uint8 u8OtaUpdateStatusType ,uint8 u8OtaUpdateStatus);
|
||||
/**@}*/
|
||||
|
||||
/*!
|
||||
@typedef void (*tpfFileGetCb) (uint8 u8Status, uint8 u8Handler, uint32 u32Size);
|
||||
|
||||
@brief
|
||||
A callback to notify the application of the result of the download (success/fail),
|
||||
the generated handler ID and the size of the file which has just finished
|
||||
downloading (size expressed in bytes).
|
||||
|
||||
@param[in] u8Status
|
||||
Status of the operation (see @ref tenuOtaUpdateStatus).
|
||||
|
||||
@param[in] u8Handler
|
||||
Generated handler ID for the new file.
|
||||
|
||||
@param[in] u32Size
|
||||
Total size of the downloaded file (in bytes).
|
||||
|
||||
@warning
|
||||
The file handler passed onto this callback will be the valid file handler generated
|
||||
by the WINC when the download finished successfully. This handler will be required
|
||||
for all operations on the file like read and erase.
|
||||
*/
|
||||
typedef void (*tpfFileGetCb) (uint8 u8Status, uint8 u8Handler, uint32 u32Size);
|
||||
|
||||
/*!
|
||||
@typedef void (*tpfFileReadCb) (uint8 u8Status, void *pBuff, uint32 u32Size);
|
||||
|
||||
@brief
|
||||
A callback to handle a buffer of data after requesting a Host File read.
|
||||
The callback will provide the status of the read operation and if successful,
|
||||
a pointer to a valid placeholder containing the data read and the amount of
|
||||
data available. Such callback is required when using Host File read via the HIF.
|
||||
|
||||
@param[in] u8Status
|
||||
Status of the operation (see @ref tenuOtaUpdateStatus).
|
||||
|
||||
@param[in] pBuff
|
||||
Pointer to a placeholder where the data can be retrieved from.
|
||||
|
||||
@param[in] u32Size
|
||||
Amount of data available after reading (in bytes).
|
||||
|
||||
@warning
|
||||
After the callback is executed, pBuff will be freed.
|
||||
*/
|
||||
typedef void (*tpfFileReadCb) (uint8 u8Status, void *pBuff, uint32 u32Size);
|
||||
|
||||
/*!
|
||||
@typedef void (*tpfFileEraseCb) (uint8 u8Status);
|
||||
|
||||
@brief
|
||||
A callback executed when the file erase has been completed.
|
||||
|
||||
@param[in] u8Status
|
||||
Status of the operation (see @ref tenuOtaUpdateStatus).
|
||||
*/
|
||||
typedef void (*tpfFileEraseCb) (uint8 u8Status);
|
||||
/**@}*/ //OTACALLBACKS
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
FUNCTION PROTOTYPES
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
/** @addtogroup OTAFUNCTIONS
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @defgroup OtaInitFn m2m_ota_init
|
||||
* @ingroup WLANAPI
|
||||
* Synchronous initialization function for the OTA layer by registering the update callback.
|
||||
* The notification callback is not supported at the current version. Calling this API is a
|
||||
* MUST for all the OTA API's.
|
||||
|
||||
*/
|
||||
/**@{*/
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_init(tpfOtaUpdateCb pfOtaUpdateCb,tpfOtaNotifCb pfOtaNotifCb)
|
||||
|
||||
@brief
|
||||
Synchronous initialization function for the OTA layer by registering the update callback.\n
|
||||
The notification callback is not supported at the current version. Calling this API is a
|
||||
MUST for all the OTA API's.
|
||||
|
||||
@param [in] pfOtaUpdateCb
|
||||
OTA Update callback function
|
||||
|
||||
OTA Update callback function.
|
||||
|
||||
@param [in] pfOtaNotifCb
|
||||
OTA notify callback function
|
||||
OTA Notify callback function.
|
||||
|
||||
@return
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_init(tpfOtaUpdateCb pfOtaUpdateCb,tpfOtaNotifCb pfOtaNotifCb);
|
||||
/**@}*/
|
||||
|
||||
/** @defgroup OtaNotifStFn m2m_ota_notif_set_url
|
||||
* @ingroup WLANAPI
|
||||
* Set the OTA notification server URL, the functions need to be called before any check for update
|
||||
*/
|
||||
/**@{*/
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_notif_set_url(uint8 * u8Url);
|
||||
|
||||
@brief
|
||||
Set the OTA notification server URL, the functions need to be called before any check for update.\n
|
||||
This functionality is not supported by WINC firmware.
|
||||
|
||||
@param [in] u8Url
|
||||
Set the OTA notification server URL, the functions need to be called before any check for update.
|
||||
@warning
|
||||
Calling m2m_ota_init is required
|
||||
Notification Server is not supported in the current version (function is not implemented)
|
||||
@see
|
||||
m2m_ota_init
|
||||
@return
|
||||
|
||||
@pre
|
||||
Prior calling of @ref m2m_ota_init is required.
|
||||
|
||||
@warning
|
||||
Notification Server is not supported in the current version (function is not implemented).
|
||||
|
||||
@see
|
||||
m2m_ota_init
|
||||
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_notif_set_url(uint8 * u8Url);
|
||||
/**@}*/
|
||||
/** @defgroup OtaNotifCheckFn m2m_ota_notif_check_for_update
|
||||
* @ingroup WLANAPI
|
||||
* Synchronous function to check for the OTA update using the Notification Server
|
||||
* URL. Function is not implemented (not supported at the current version)
|
||||
*
|
||||
*/
|
||||
/**@{*/
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_notif_check_for_update(void);
|
||||
|
||||
@warning
|
||||
Function is not implemented (not supported at the current version)
|
||||
@brief
|
||||
Synchronous function to check for the OTA update using the Notification Server URL.\n
|
||||
Function is not implemented (not supported at the current version).
|
||||
|
||||
@sa
|
||||
@warning
|
||||
Function is not implemented (not supported at the current version).
|
||||
|
||||
@sa
|
||||
m2m_ota_init
|
||||
m2m_ota_notif_set_url
|
||||
@return
|
||||
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_notif_check_for_update(void);
|
||||
/**@}*/
|
||||
/** @defgroup OtaSched m2m_ota_notif_sched
|
||||
* @ingroup WLANAPI
|
||||
* Schedule OTA notification Server check for update request after specific number of days
|
||||
*/
|
||||
/**@{*/
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_notif_sched(uint32 u32Period);
|
||||
|
||||
@brief
|
||||
Schedule OTA notification Server check for update request after specific number of days.\n
|
||||
Function is not implemented (not supported at the current version).
|
||||
|
||||
@param [in] u32Period
|
||||
Period in days
|
||||
|
||||
@sa
|
||||
@warning
|
||||
Function is not implemented (not supported at the current version).
|
||||
|
||||
@sa
|
||||
m2m_ota_init
|
||||
m2m_ota_notif_check_for_update
|
||||
m2m_ota_notif_set_url
|
||||
@return
|
||||
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_notif_sched(uint32 u32Period);
|
||||
/**@}*/
|
||||
/** @defgroup OtaStartUpdatefn m2m_ota_start_update
|
||||
* @ingroup WLANAPI
|
||||
* Request OTA start update using the downloaded URL, the OTA module will download the OTA image and ensure integrity of the image,
|
||||
* and update the validity of the image in control structure. Switching to that image requires calling @ref m2m_ota_switch_firmware API.
|
||||
* As a prerequisite @ref m2m_ota_init should be called before using @ref m2m_ota_start().
|
||||
*/
|
||||
/**@{*/
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_start_update(uint8 * u8DownloadUrl);
|
||||
NMI_API sint8 m2m_ota_start_update(unsigned char * pcDownloadUrl);
|
||||
|
||||
@param [in] u8DownloadUrl
|
||||
The download firmware URL, you get it from device info according to the application server
|
||||
@brief
|
||||
Request OTA start update using the download URL, the OTA module will download the OTA image, ensure integrity of the image
|
||||
and update the validity of the image in the control structure. On completion, a callback of type @ref tpfOtaUpdateCb is called
|
||||
(callback previously provided via m2m_ota_init).
|
||||
|
||||
@param [in] pcDownloadUrl
|
||||
The download firmware URL, according to the application server.
|
||||
|
||||
@warning
|
||||
Calling this API does not guarantee OTA WINC image update, It depends on the connection with the download server and the validity of the image.
|
||||
If the API response is failure this may invalidate the roll-back image if it was previously valid, since the WINC does not have any internal memory
|
||||
except the flash roll-back image location to validate the downloaded image from
|
||||
Calling this API does not guarantee OTA WINC image update, it depends on the connection with the
|
||||
download server and the validity of the image.\n
|
||||
Calling this API invalidates any previous valid rollback image. When the OTA succeeds, the current
|
||||
image will become the rollback image after @ref m2m_ota_switch_firmware.
|
||||
|
||||
@pre
|
||||
@ref m2m_ota_init is a prerequisite and must have been called before using @ref m2m_ota_start_update().\n
|
||||
Switching to the newly downloaded image requires calling @ref m2m_ota_switch_firmware API.
|
||||
|
||||
@see
|
||||
m2m_ota_init
|
||||
tpfOtaUpdateCb
|
||||
|
||||
@return
|
||||
@sa
|
||||
@ref m2m_ota_init
|
||||
@ref m2m_ota_switch_firmware
|
||||
@ref tpfOtaUpdateCb
|
||||
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
|
||||
\section Example
|
||||
The example shows an example of how the OTA image update is carried out.
|
||||
|
||||
\section OTAExample Example
|
||||
This example shows how an OTA image update and switch is carried out.
|
||||
It demonstrates use of the following OTA APIs:
|
||||
@ref m2m_ota_init
|
||||
@ref tpfOtaUpdateCb
|
||||
@ref m2m_ota_start_update
|
||||
@ref m2m_ota_switch_firmware
|
||||
@ref m2m_ota_rollback
|
||||
|
||||
@code
|
||||
static void OtaUpdateCb(uint8 u8OtaUpdateStatusType ,uint8 u8OtaUpdateStatus)
|
||||
{
|
||||
if(u8OtaUpdateStatusType == DL_STATUS) {
|
||||
if(u8OtaUpdateStatus == OTA_STATUS_SUCSESS) {
|
||||
if(u8OtaUpdateStatus == OTA_STATUS_SUCCESS) {
|
||||
//switch to the upgraded firmware
|
||||
m2m_ota_switch_firmware();
|
||||
}
|
||||
}
|
||||
else if(u8OtaUpdateStatusType == SW_STATUS) {
|
||||
if(u8OtaUpdateStatus == OTA_STATUS_SUCSESS) {
|
||||
if(u8OtaUpdateStatus == OTA_STATUS_SUCCESS) {
|
||||
M2M_INFO("Now OTA successfully done");
|
||||
//start the host SW upgrade then system reset is required (Reinitialize the driver)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void wifi_event_cb(uint8 u8WiFiEvent, void * pvMsg)
|
||||
{
|
||||
case M2M_WIFI_REQ_DHCP_CONF:
|
||||
@ -242,99 +345,404 @@ void wifi_event_cb(uint8 u8WiFiEvent, void * pvMsg)
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
int main (void)
|
||||
{
|
||||
sint8 s8Ret;
|
||||
tstrWifiInitParam param;
|
||||
tstr1xAuthCredentials gstrCred1x = AUTH_CREDENTIALS;
|
||||
nm_bsp_init();
|
||||
|
||||
nm_bsp_init();
|
||||
|
||||
m2m_memset((uint8*)¶m, 0, sizeof(param));
|
||||
param.pfAppWifiCb = wifi_event_cb;
|
||||
|
||||
|
||||
//Initialize the WINC Driver
|
||||
ret = m2m_wifi_init(¶m);
|
||||
if (M2M_SUCCESS != ret)
|
||||
s8Ret = m2m_wifi_init(¶m);
|
||||
if (M2M_SUCCESS != s8Ret)
|
||||
{
|
||||
M2M_ERR("Driver Init Failed <%d>\n",ret);
|
||||
M2M_ERR("Driver Init Failed <%d>\n",s8Ret);
|
||||
while(1);
|
||||
}
|
||||
//Initialize the OTA module
|
||||
m2m_ota_init(OtaUpdateCb,NULL);
|
||||
|
||||
//connect to AP that provide connection to the OTA server
|
||||
m2m_wifi_default_connect();
|
||||
|
||||
while(1)
|
||||
{
|
||||
|
||||
//Handle the app state machine plus the WINC event handler
|
||||
//Handle the app state machine plus the WINC event handler
|
||||
while(m2m_wifi_handle_events(NULL) != M2M_SUCCESS) {
|
||||
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
@endcode
|
||||
|
||||
@endcode
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_start_update(uint8 * u8DownloadUrl);
|
||||
/**@}*/
|
||||
/** @defgroup OtaRollbackfn m2m_ota_rollback
|
||||
* @ingroup WLANAPI
|
||||
Request OTA Roll-back to the old (other) WINC image, the WINC firmware will check the validation of the Roll-back image
|
||||
and switch to it if it is valid.
|
||||
If the API response is success, system restart is required (re-initialize the driver with hardware rest) update the host driver version may
|
||||
be required if it is did not match the minimum version supported by the WINC firmware.
|
||||
NMI_API sint8 m2m_ota_start_update(unsigned char * pcDownloadUrl);
|
||||
|
||||
*/
|
||||
/**@{*/
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_rollback(void);
|
||||
NMI_API sint8 m2m_ota_rollback(void);
|
||||
|
||||
@sa
|
||||
@brief
|
||||
Request OTA Roll-back to the old (inactive) WINC image, the WINC firmware will check the validity of the Roll-back image
|
||||
and activate it if valid. On completion, a callback of type tpfOtaUpdateCb is called (application must previously have
|
||||
provided the callback via m2m_ota_init). If the callback indicates successful activation, the newly-activated image
|
||||
will start running after next system reset.
|
||||
|
||||
@warning
|
||||
If rollback requires a host driver update in order to maintain HIF compatibility (HIF
|
||||
major value change), then it is recommended to update the host driver prior to calling this
|
||||
API.\n
|
||||
In the event of system reset with incompatible driver/firmware, compatibility can be
|
||||
recovered by calling @ref m2m_ota_rollback or @ref m2m_ota_switch_firmware.
|
||||
|
||||
@sa
|
||||
m2m_ota_init
|
||||
m2m_ota_start_update
|
||||
m2m_ota_start_update
|
||||
|
||||
@return
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_rollback(void);
|
||||
/**@}*/
|
||||
/**@}*/
|
||||
/** @defgroup OtaSwitchFirmware m2m_ota_switch_firmware
|
||||
* @ingroup WLANAPI
|
||||
* Switch to the upgraded Firmware, that API will update the control structure working image to the upgraded image
|
||||
take effect will be on the next system restart
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_abort(void);
|
||||
|
||||
@brief
|
||||
Request the WINC to abort an OTA or Host File download in progress.\n
|
||||
If no download is in progress, the API will respond with failure.
|
||||
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
|
||||
*/
|
||||
/**@{*/
|
||||
NMI_API sint8 m2m_ota_abort(void);
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_switch_firmware(void);
|
||||
|
||||
@brief
|
||||
Request switch to the updated WINC image. The WINC firmware will check the validity of the
|
||||
inactive image and activate it if it is valid. On completion, a callback of type @ref tpfOtaUpdateCb
|
||||
is called (application must previously have provided the callback via @ref m2m_ota_init).
|
||||
If the callback indicates successful activation, the newly-activated image will start running
|
||||
after next system reset.
|
||||
|
||||
@warning
|
||||
It is important to note that if the API succeeds, system restart is required (re-initializing the driver with hardware reset) updating the host driver version may be required
|
||||
if it does not match the minimum driver version supported by the WINC's firmware.
|
||||
@sa
|
||||
If switch will necessitate a host driver update in order to maintain HIF compatibility (HIF
|
||||
major value change), then it is recommended to update the host driver prior to calling this
|
||||
API.\n
|
||||
In the event of system reset with incompatible driver/firmware, compatibility can be
|
||||
recovered by calling @ref m2m_ota_rollback or @ref m2m_ota_switch_firmware.
|
||||
|
||||
@sa
|
||||
m2m_ota_init
|
||||
m2m_ota_start_update
|
||||
|
||||
@return
|
||||
@return
|
||||
The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_switch_firmware(void);
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_get_firmware_version(void);
|
||||
NMI_API sint8 m2m_ota_host_file_get(unsigned char *pcDownloadUrl, tpfFileGetCb pfHFDGetCb);
|
||||
|
||||
@brief
|
||||
Get the OTA Firmware version.
|
||||
Download a file from a remote location and store it in WINC's Flash.
|
||||
|
||||
@param[in] pcDownloadUrl
|
||||
Url pointing to the remote file. HTTP/HTTPS only.
|
||||
|
||||
@param[in] pfHFDGetCb
|
||||
Pointer to a callback (see @ref tpfFileGetCb) to be executed when the download finishes.
|
||||
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
|
||||
@pre
|
||||
Requires @ref m2m_ota_init to be called before a download can start.
|
||||
|
||||
@warning
|
||||
This functionality is only supported from WINC release 19.6.1 onwards.
|
||||
The maximum file size that can be stored in WINC1510 is 508KB, the
|
||||
WINC1500 variant is not supported for Host File Download.\n
|
||||
Concurrent use of Host File Get and WINC OTA is not possible.\n
|
||||
Providing a callback is mandatory.
|
||||
|
||||
@sa
|
||||
m2m_ota_init
|
||||
tpfFileGetCb
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_get_firmware_version(tstrM2mRev *pstrRev);
|
||||
/**@}*/
|
||||
NMI_API sint8 m2m_ota_host_file_get(unsigned char *pcDownloadUrl, tpfFileGetCb pfHFDGetCb);
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_host_file_read_hif(uint8 u8Handler, uint32 u32Offset, uint32 u32Size, tpfFileReadCb pfHFDReadCb);
|
||||
|
||||
@brief
|
||||
Read a certain amount of bytes from a file previously stored in WINC's Flash using HIF transfer.
|
||||
|
||||
@param[in] u8Handler
|
||||
Handler of the file we are trying to read from. Must be valid.
|
||||
|
||||
@param[in] u32Offset
|
||||
Offset from start of the file to read from (in bytes).
|
||||
|
||||
@param[in] u32Size
|
||||
The amount of data to read (in bytes).
|
||||
|
||||
@param[in] pfHFDReadCb
|
||||
Callback (see @ref tpfFileReadCb) to be executed when the read operation completes.
|
||||
|
||||
@return
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
|
||||
@pre
|
||||
Requires @ref m2m_ota_init to be called before a read via HIF can be requested.
|
||||
|
||||
@warning
|
||||
There is a limitation on how much data can be transferred at a time using hif read, which is 128 bytes.
|
||||
The limitation described above can potentially reduce the speed of the read due to extra overhead, but
|
||||
using the HIF is non-blocking and therefore the Application can continue execution as normal, being
|
||||
interrupted only when data is available. Another advantage is that it does not require the WINC to be
|
||||
reset or put in download mode, as it is the case for reading the file via SPI (see @ref m2m_ota_host_file_read_spi).\n
|
||||
A valid file handler must be provided, this means that it needs to match the handler internally stored
|
||||
by the WINC and must not be @ref HFD_INVALID_HANDLER.\n
|
||||
Providing a callback is mandatory.
|
||||
|
||||
@note
|
||||
When calling this API while specifying a size > 128 bytes, the read will be limited to the first 128 bytes
|
||||
starting at the read offset. It it recommended that a read for sizes above 128 bytes is performed in
|
||||
multiple steps, using the callback to advance the offset and request another read of 128 bytes (or less) each time.
|
||||
|
||||
@sa
|
||||
m2m_ota_init
|
||||
m2m_ota_host_file_get
|
||||
tpfFileReadCb
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_host_file_read_hif(uint8 u8Handler, uint32 u32Offset, uint32 u32Size, tpfFileReadCb pfHFDReadCb);
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_host_file_read_spi(uint8 u8Handler, uint8 *pu8Buff, uint32 u32Offset, uint32 u32Size);
|
||||
|
||||
@brief
|
||||
Read a certain amount of bytes from a file in WINC's Flash using SPI transfer.
|
||||
|
||||
@param[in] u8Handler
|
||||
Handler of the file we are trying to read from. Must be valid.
|
||||
|
||||
@param[in] pu8Buff
|
||||
Pointer to a buffer to store the data being read. Must not be NULL.
|
||||
|
||||
@param[in] u32Offset
|
||||
Offset from start of the file to read from (in bytes).
|
||||
|
||||
@param[in] u32Size
|
||||
The amount of data to read (in Bytes).
|
||||
|
||||
@return
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
|
||||
@warning
|
||||
Reading of a file via SPI can be much faster than by reading it via the HIF. However, the read will
|
||||
be blocking and it will require the WINC to be put into download mode prior to the read, the download
|
||||
mode means that the WINC will act as Flash device and not as a Wifi device. So, before using
|
||||
m2m_ota_host_file_read_spi, the Application should call @ref m2m_wifi_download_mode before trying to
|
||||
read. After the read finishes, the WINC needs to be reset (see @ref m2m_wifi_reinit).\n
|
||||
A valid file handler must be provided, this means that it needs to match the handler internally stored
|
||||
by the WINC and must not be @ref HFD_INVALID_HANDLER.
|
||||
|
||||
@sa
|
||||
m2m_ota_init
|
||||
m2m_ota_host_file_get
|
||||
|
||||
\section Host File Download SPI Read Example
|
||||
The following is an example of how to perform a read file from the WINC via SPI.
|
||||
@code
|
||||
typedef struct {
|
||||
uint8 u8Handler;
|
||||
uint32 u32Offset;
|
||||
uint32 u32Size;
|
||||
uint8 au8Buff[200];
|
||||
}FileDescriptor;
|
||||
|
||||
tstrWifiInitParam gstrWifiParam;
|
||||
static FileDescriptor gstrAppFile;
|
||||
|
||||
char *acURL = "http://www.microchip.com/_images/ics/medium-ATWINC1500-MODULE-28.png";
|
||||
|
||||
static void ReadFileSPI(void);
|
||||
static void wifi_event_cb(uint8 u8WiFiEvent, void * pvMsg);
|
||||
static void FileGetCallback(uint8 u8Status, uint8 u8Handler, uint32 u32Size);
|
||||
static void OtaUpdateCb(uint8 u8OtaUpdateStatusType ,uint8 u8OtaUpdateStatus);
|
||||
|
||||
static void wifi_event_cb(uint8 u8WiFiEvent, void * pvMsg)
|
||||
{
|
||||
case M2M_WIFI_REQ_DHCP_CONF:
|
||||
{
|
||||
// After successfully connection, start the File Download
|
||||
gstrAppFile.u32Offset = 0;
|
||||
s8Ret = m2m_ota_host_file_get(acURL, FileGetCallback);
|
||||
if(s8Ret != M2M_SUCCESS)
|
||||
{
|
||||
M2M_ERR("File Download Failed!\n");
|
||||
}
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
static void OtaUpdateCb(uint8 u8OtaUpdateStatusType ,uint8 u8OtaUpdateStatus)
|
||||
{
|
||||
M2M_INFO("%d %d\n",u8OtaUpdateStatusType,u8OtaUpdateStatus);
|
||||
|
||||
if(u8OtaUpdateStatus == OTA_STATUS_SUCCESS)
|
||||
{
|
||||
if(u8OtaUpdateStatusType == HFD_STATUS)
|
||||
{
|
||||
// Read the file and process it
|
||||
ReadFileSPI();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void FileGetCallback(uint8 u8Status, uint8 u8Handler, uint32 u32Size)
|
||||
{
|
||||
if(OTA_STATUS_SUCCESS == u8Status)
|
||||
{
|
||||
gstrAppFile.u8Handler = u8Handler;
|
||||
gstrAppFile.u32Size = u32Size;
|
||||
// File Get Successful
|
||||
}
|
||||
else
|
||||
{
|
||||
M2M_ERR("File Get Failed!\n");
|
||||
// File Get Failed
|
||||
}
|
||||
}
|
||||
|
||||
static void ReadFileSPI(void)
|
||||
{
|
||||
sint8 s8Ret = M2M_ERR_FAIL;
|
||||
|
||||
if(WIFI_STATE_DEINIT != m2m_wifi_get_state())
|
||||
m2m_wifi_deinit(NULL);
|
||||
|
||||
s8Ret = m2m_wifi_download_mode();
|
||||
if(M2M_SUCCESS != s8Ret) goto EXIT;
|
||||
|
||||
// gstrAppFile.u32Offset can be changed to define a starting point for the read,
|
||||
// in which case the size of the requested read should be adjusted to accommodate for this.
|
||||
// This call assumes that m2m_ota_host_file_get was called earlier, in this example it is fine
|
||||
// since ReadFileSPI is only called from the within OtaUpdateCb
|
||||
// This example simply reads the first 200 bytes of the file.
|
||||
uint32 u32AmountToRead = 200;
|
||||
s8Ret = m2m_ota_host_file_read_spi(gstrAppFile.u8Handler, gstrAppFile.au8Buff, gstrAppFile.u32Offset, u32AmountToRead);
|
||||
|
||||
if(M2M_SUCCESS == s8Ret)
|
||||
M2M_INFO("\nFile Read completed, Offset: %lu, Size of Read: %lu.\n", gstrAppFile.u32Offset, u32AmountToRead);
|
||||
|
||||
// *** Do something with the contents of gstrAppFile.au8Buff ***
|
||||
|
||||
s8Ret = m2m_wifi_reinit(&gstrWifiParam);
|
||||
if(M2M_SUCCESS != s8Ret) goto EXIT;
|
||||
|
||||
// Initialize the OTA again and reconnect to the previously connected SSID
|
||||
m2m_ota_init(OtaUpdateCb, NULL);
|
||||
m2m_wifi_default_connect();
|
||||
|
||||
EXIT:
|
||||
return;
|
||||
}
|
||||
|
||||
void main(void)
|
||||
{
|
||||
nm_bsp_init();
|
||||
|
||||
m2m_memset((uint8*)&gstrWifiParam, 0, sizeof(gstrWifiParam));
|
||||
gstrWifiParam.pfAppWifiCb = wifi_event_cb;
|
||||
|
||||
// Initialize the WINC Driver
|
||||
sint8 s8Ret = m2m_wifi_init(&gstrWifiParam);
|
||||
if (M2M_SUCCESS != s8Ret)
|
||||
{
|
||||
M2M_ERR("Driver Init Failed <%d>\n",s8Ret);
|
||||
while(1);
|
||||
}
|
||||
|
||||
// Initialize the OTA module
|
||||
m2m_ota_init(OtaUpdateCb, NULL);
|
||||
|
||||
// *** Connect to a wifi network by calling m2m_wifi_connect() ***
|
||||
|
||||
while(1) m2m_wifi_handle_events(NULL);
|
||||
}
|
||||
@endcode
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_host_file_read_spi(uint8 u8Handler, uint8* pu8Buff, uint32 u32Offset, uint32 u32Size);
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_host_file_erase(uint8 u8Handler, tpfFileEraseCb pfHFDEraseCb);
|
||||
|
||||
@brief
|
||||
Erase any traces of file stored in WINC's Flash.
|
||||
|
||||
@param[in] u8Handler
|
||||
Handler of the file we are trying to erase. Must be valid.
|
||||
|
||||
@param[in] pfHFDEraseCb
|
||||
Pointer to callback (see @ref tpfFileEraseCb) to execute when the file erase is completed by the WINC.
|
||||
|
||||
@return
|
||||
The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
|
||||
@pre
|
||||
In order to execute the callback, @ref m2m_ota_init must be called before requesting the erase.
|
||||
|
||||
@note
|
||||
Providing a callback is optional.
|
||||
If the current handler is invalid at this point, it means one of the three:
|
||||
1. The file never existed;
|
||||
2. The file has already been already deleted;
|
||||
3. The request to get the file hasn't fully completed.
|
||||
\par
|
||||
For 1. and 2. there is no need to signal the WINC to erase the file in Flash.\n
|
||||
For 3. the Flash can't be erased while a file download is ongoing.
|
||||
|
||||
@warning
|
||||
A valid file handler must be provided, this means that it needs to match the handler internally stored
|
||||
by the WINC and must not be @ref HFD_INVALID_HANDLER.\n
|
||||
The handlers will be destroyed regardless of the call returning success or not.
|
||||
|
||||
@sa
|
||||
m2m_ota_init
|
||||
m2m_ota_host_file_get
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_host_file_erase(uint8 u8Handler, tpfFileEraseCb pfHFDEraseCb);
|
||||
|
||||
#if 0
|
||||
NMI_API sint8 m2m_ota_test(void);
|
||||
#endif
|
||||
/**@}*/ //OTAFUNCTIONS
|
||||
|
||||
/*!
|
||||
@ingroup VERSIONAPI
|
||||
@fn NMI_API sint8 m2m_ota_get_firmware_version(tstrM2mRev* pstrRev);
|
||||
@brief Get the OTA Firmware version.
|
||||
@details Get OTA Firmware version info from the inactive partition, as defined in the structure tstrM2mRev.
|
||||
@param [out] pstrRev
|
||||
Pointer to the structure tstrM2mRev that contains the firmware version parameters.
|
||||
@return The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_get_firmware_version(tstrM2mRev* pstrRev);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief WINC Peripherals Application Interface.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -295,7 +288,7 @@ NMI_API sint8 m2m_periph_gpio_get_val(uint8 u8GpioNum, uint8 * pu8GpioVal);
|
||||
NMI_API sint8 m2m_periph_gpio_pullup_ctrl(uint8 u8GpioNum, uint8 u8PullupEn);
|
||||
|
||||
@brief
|
||||
Set an NMC1500 GPIO pullup resisitor enable or disable.
|
||||
Set an NMC1500 GPIO pullup resistor enable or disable.
|
||||
|
||||
@param [in] u8GpioNum
|
||||
GPIO number. Allowed values are defined in tenuGpioNum.
|
||||
|
||||
185
src/winc1500/include/driver/include/m2m_ssl.h
Normal file
185
src/winc1500/include/driver/include/m2m_ssl.h
Normal file
@ -0,0 +1,185 @@
|
||||
/**
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief WINC Application Interface Internal Types.
|
||||
*
|
||||
* Copyright (c) 2017-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**@defgroup SSLAPI SSL
|
||||
@brief
|
||||
Provides a description of the SSL Layer.
|
||||
@{
|
||||
@defgroup SSLCallbacks Callbacks
|
||||
@brief
|
||||
Provides detail on the available callbacks for the SSL Layer.
|
||||
|
||||
@defgroup SSLEnums Enumerations and Typedefs
|
||||
@brief
|
||||
Specifies the enums and Data Structures used by the SSL APIs.
|
||||
|
||||
@defgroup SSLFUNCTIONS Functions
|
||||
@brief
|
||||
Provides detail on the available APIs for the SSL Layer.
|
||||
@}
|
||||
*/
|
||||
|
||||
#ifndef __M2M_SSL_H__
|
||||
#define __M2M_SSL_H__
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
INCLUDES
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
#include "common/include/nm_common.h"
|
||||
#include "driver/include/m2m_types.h"
|
||||
#include "driver/include/nmdrv.h"
|
||||
#include "driver/include/ecc_types.h"
|
||||
#include "socket/include/socket.h"
|
||||
|
||||
/*!
|
||||
@ingroup SSLCallbacks
|
||||
@typedef void (*tpfAppSSLCb)(uint8 u8MsgType, void* pvMsg);
|
||||
@brief A callback to get SSL notifications.
|
||||
@param[in] u8MsgType
|
||||
The type of the message received.
|
||||
@param[in] pvMsg
|
||||
A structure to provide notification payload.
|
||||
*/
|
||||
typedef void (*tpfAppSSLCb) (uint8 u8MsgType, void * pvMsg);
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
FUNCTION PROTOTYPES
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
/*!
|
||||
@ingroup SSLFUNCTIONS
|
||||
@fn NMI_API sint8 m2m_ssl_init(tpfAppSSLCb pfAppSSLCb);
|
||||
@brief Initializes the SSL layer.
|
||||
@param [in] pfAppSslCb
|
||||
Application SSL callback function.
|
||||
@return The function returns @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ssl_init(tpfAppSSLCb pfAppSSLCb);
|
||||
|
||||
/*!
|
||||
@ingroup SSLFUNCTIONS
|
||||
@fn NMI_API sint8 m2m_ssl_handshake_rsp(tstrEccReqInfo* strECCResp, uint8* pu8RspDataBuff, uint16 u16RspDataSz);
|
||||
@brief Sends ECC responses to the WINC
|
||||
@param [in] strECCResp
|
||||
ECC Response struct.
|
||||
@param [in] pu8RspDataBuff
|
||||
Pointer of the response data to be sent.
|
||||
@param [in] u16RspDataSz
|
||||
Response data size.
|
||||
@return The function returns @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ssl_handshake_rsp(tstrEccReqInfo* strECCResp, uint8* pu8RspDataBuff, uint16 u16RspDataSz);
|
||||
|
||||
/*!
|
||||
@ingroup SSLFUNCTIONS
|
||||
@fn NMI_API sint8 m2m_ssl_send_certs_to_winc(uint8* pu8Buffer, uint32 u32BufferSz);
|
||||
@brief Sends certificates to the WINC
|
||||
@param [in] pu8Buffer
|
||||
Pointer to the certificates.
|
||||
@param [in] u32BufferSz
|
||||
Size of the certificates.
|
||||
@return The function returns @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ssl_send_certs_to_winc(uint8* pu8Buffer, uint32 u32BufferSz);
|
||||
|
||||
/*!
|
||||
@ingroup SSLFUNCTIONS
|
||||
@fn NMI_API sint8 m2m_ssl_retrieve_cert(uint16* pu16CurveType, uint8* pu8Hash, uint8* pu8Sig, tstrECPoint* pu8Key);
|
||||
@brief Retrieve the certificate to be verified from the WINC
|
||||
@param [in] pu16CurveType
|
||||
Pointer to the certificate curve type.
|
||||
@param [in] pu8Hash
|
||||
Pointer to the certificate hash.
|
||||
@param [in] pu8Sig
|
||||
Pointer to the certificate signature.
|
||||
@param [in] pu8Key
|
||||
Pointer to the certificate Key.
|
||||
@return The function returns @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ssl_retrieve_cert(uint16* pu16CurveType, uint8* pu8Hash, uint8* pu8Sig, tstrECPoint* pu8Key);
|
||||
|
||||
/*!
|
||||
@ingroup SSLFUNCTIONS
|
||||
@fn NMI_API sint8 m2m_ssl_retrieve_hash(uint8* pu8Hash, uint16 u16HashSz);
|
||||
@brief Retrieve the certificate hash.
|
||||
@param [in] pu8Hash
|
||||
Pointer to the certificate hash.
|
||||
@param [in] u16HashSz
|
||||
Hash size.
|
||||
@return The function returns @ref M2M_SUCCESS for success and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ssl_retrieve_hash(uint8* pu8Hash, uint16 u16HashSz);
|
||||
|
||||
/*!
|
||||
@ingroup SSLFUNCTIONS
|
||||
@fn NMI_API void m2m_ssl_stop_processing_certs(void);
|
||||
@brief Allow ssl driver to tidy up in case application does not read all available certificates.
|
||||
@warning This API must only be called if some certificates are left unread.
|
||||
@return None.
|
||||
*/
|
||||
NMI_API void m2m_ssl_stop_processing_certs(void);
|
||||
|
||||
/*!
|
||||
@ingroup SSLFUNCTIONS
|
||||
@fn NMI_API void m2m_ssl_ecc_process_done(void);
|
||||
@brief Allow ssl driver to tidy up after application has finished processing ecc message.
|
||||
@warning This API must be called after receiving a SSL callback with message type @ref M2M_SSL_REQ_ECC.
|
||||
@return None.
|
||||
*/
|
||||
NMI_API void m2m_ssl_ecc_process_done(void);
|
||||
|
||||
/*!
|
||||
@ingroup SSLFUNCTIONS
|
||||
@fn NMI_API sint8 m2m_ssl_set_active_ciphersuites(uint32 u32SslCsBMP);
|
||||
@brief Sets the active ciphersuites.
|
||||
@details Override the default Active SSL ciphers in the SSL module with a certain combination selected by
|
||||
the caller in the form of a bitmap containing the required ciphers to be on.\n
|
||||
There is no need to call this function if the application will not change the default ciphersuites.
|
||||
@param [in] u32SslCsBMP
|
||||
Bitmap containing the desired ciphers to be enabled for the SSL module. The ciphersuites are defined in
|
||||
@ref SSLCipherSuiteID.
|
||||
The default ciphersuites are all ciphersuites supported by the firmware with the exception of ECC ciphersuites.
|
||||
The caller can override the default with any desired combination, except for combinations involving both RSA
|
||||
and ECC; if any RSA ciphersuite is enabled, then firmware will disable all ECC ciphersuites.
|
||||
If u32SslCsBMP does not contain any ciphersuites supported by firmware, then the current active list will not
|
||||
change.
|
||||
|
||||
@return
|
||||
- @ref SOCK_ERR_NO_ERROR
|
||||
- @ref SOCK_ERR_INVALID_ARG
|
||||
*/
|
||||
NMI_API sint8 m2m_ssl_set_active_ciphersuites(uint32 u32SslCsBMP);
|
||||
|
||||
#endif /* __M2M_SSL_H__ */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains NMC1500 ASIC specific internal APIs.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -67,9 +60,10 @@
|
||||
#define REV_B0 (0x2B0)
|
||||
#define REV_3A0 (0x3A0)
|
||||
#define GET_CHIPID() nmi_get_chipid()
|
||||
#define ISNMC1000(id) (((id & 0xfffff000) == 0x100000) ? 1 : 0)
|
||||
#define ISNMC1500(id) (((id & 0xfffff000) == 0x150000) ? 1 : 0)
|
||||
#define REV(id) ( ((id) & 0x00000fff ) )
|
||||
#define ISNMC1000(id) ((((id) & 0xfffff000) == 0x100000) ? 1 : 0)
|
||||
#define ISNMC1500(id) ((((id) & 0xfffff000) == 0x150000) ? 1 : 0)
|
||||
#define ISNMC3000(id) ((((id) & 0xfff00000) == 0x300000) ? 1 : 0)
|
||||
#define REV(id) (((id) & 0x00000fff ))
|
||||
#define EFUSED_MAC(value) (value & 0xffff0000)
|
||||
|
||||
#define rHAVE_SDIO_IRQ_GPIO_BIT (NBIT0)
|
||||
@ -80,6 +74,9 @@
|
||||
#define rHAVE_LEGACY_RF_SETTINGS (NBIT5)
|
||||
#define rHAVE_LOGS_DISABLED_BIT (NBIT6)
|
||||
#define rHAVE_ETHERNET_MODE_BIT (NBIT7)
|
||||
#define rHAVE_RESERVED1_BIT (NBIT8)
|
||||
#define rHAVE_RESERVED2_BIT (NBIT9)
|
||||
#define rHAVE_XO_XTALGM2_DIS_BIT (NBIT10)
|
||||
|
||||
typedef struct{
|
||||
uint32 u32Mac_efuse_mib;
|
||||
@ -88,61 +85,126 @@ typedef struct{
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/**
|
||||
* @fn nm_clkless_wake
|
||||
* @brief Wakeup the chip using clockless registers
|
||||
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
* @author Samer Sarhan
|
||||
#endif
|
||||
|
||||
/*
|
||||
* @fn cpu_halt
|
||||
* @brief
|
||||
*/
|
||||
sint8 cpu_halt(void);
|
||||
/*
|
||||
* @fn chip_sleep
|
||||
* @brief
|
||||
*/
|
||||
sint8 chip_sleep(void);
|
||||
/*
|
||||
* @fn chip_wake
|
||||
* @brief
|
||||
*/
|
||||
sint8 nm_clkless_wake(void);
|
||||
|
||||
sint8 chip_wake(void);
|
||||
|
||||
/*
|
||||
* @fn chip_idle
|
||||
* @brief
|
||||
*/
|
||||
void chip_idle(void);
|
||||
|
||||
void enable_rf_blocks(void);
|
||||
|
||||
/*
|
||||
* @fn enable_interrupts
|
||||
* @brief
|
||||
*/
|
||||
sint8 enable_interrupts(void);
|
||||
|
||||
/*
|
||||
* @fn cpu_start
|
||||
* @brief
|
||||
*/
|
||||
sint8 cpu_start(void);
|
||||
|
||||
/*
|
||||
* @fn nmi_get_chipid
|
||||
* @brief
|
||||
*/
|
||||
uint32 nmi_get_chipid(void);
|
||||
|
||||
/*
|
||||
* @fn nmi_get_rfrevid
|
||||
* @brief
|
||||
*/
|
||||
uint32 nmi_get_rfrevid(void);
|
||||
|
||||
/*
|
||||
* @fn restore_pmu_settings_after_global_reset
|
||||
* @brief
|
||||
*/
|
||||
void restore_pmu_settings_after_global_reset(void);
|
||||
|
||||
/*
|
||||
* @fn nmi_update_pll
|
||||
* @brief
|
||||
*/
|
||||
void nmi_update_pll(void);
|
||||
|
||||
/*
|
||||
* @fn nmi_set_sys_clk_src_to_xo
|
||||
* @brief
|
||||
*/
|
||||
void nmi_set_sys_clk_src_to_xo(void);
|
||||
|
||||
/*
|
||||
* @fn chip_reset
|
||||
* @brief
|
||||
*/
|
||||
sint8 chip_reset(void);
|
||||
|
||||
/*
|
||||
* @fn wait_for_bootrom
|
||||
* @brief
|
||||
*/
|
||||
sint8 wait_for_bootrom(uint8);
|
||||
|
||||
/*
|
||||
* @fn wait_for_firmware_start
|
||||
* @brief
|
||||
*/
|
||||
sint8 wait_for_firmware_start(uint8);
|
||||
|
||||
/*
|
||||
* @fn chip_deinit
|
||||
* @brief
|
||||
*/
|
||||
sint8 chip_deinit(void);
|
||||
|
||||
/*
|
||||
* @fn chip_reset_and_cpu_halt
|
||||
* @brief
|
||||
*/
|
||||
sint8 chip_reset_and_cpu_halt(void);
|
||||
|
||||
/*
|
||||
* @fn set_gpio_dir
|
||||
* @brief
|
||||
*/
|
||||
sint8 set_gpio_dir(uint8 gpio, uint8 dir);
|
||||
|
||||
/*
|
||||
* @fn set_gpio_val
|
||||
* @brief
|
||||
*/
|
||||
sint8 set_gpio_val(uint8 gpio, uint8 val);
|
||||
|
||||
/*
|
||||
* @fn get_gpio_val
|
||||
* @brief
|
||||
*/
|
||||
sint8 get_gpio_val(uint8 gpio, uint8* val);
|
||||
|
||||
/*
|
||||
* @fn pullup_ctrl
|
||||
* @brief
|
||||
*/
|
||||
sint8 pullup_ctrl(uint32 pinmask, uint8 enable);
|
||||
|
||||
/*
|
||||
* @fn nmi_get_otp_mac_address
|
||||
* @brief
|
||||
*/
|
||||
sint8 nmi_get_otp_mac_address(uint8 *pu8MacAddr, uint8 * pu8IsValid);
|
||||
|
||||
/*
|
||||
* @fn nmi_get_mac_address
|
||||
* @brief
|
||||
*/
|
||||
sint8 nmi_get_mac_address(uint8 *pu8MacAddr);
|
||||
|
||||
/*
|
||||
* @fn chip_apply_conf
|
||||
* @brief
|
||||
*/
|
||||
sint8 chip_apply_conf(uint32 u32conf);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /*_NMASIC_H_*/
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains NMC1000 bus APIs implementation.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -65,6 +58,14 @@ sint8 nm_bus_iface_init(void *);
|
||||
*/
|
||||
sint8 nm_bus_iface_deinit(void);
|
||||
|
||||
/**
|
||||
* @fn nm_bus_reset
|
||||
* @brief reset bus interface
|
||||
* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
* @version 1.0
|
||||
*/
|
||||
sint8 nm_bus_reset(void);
|
||||
|
||||
/**
|
||||
* @fn nm_bus_iface_reconfigure
|
||||
* @brief reconfigure bus interface
|
||||
@ -113,7 +114,7 @@ sint8 nm_write_reg(uint32 u32Addr, uint32 u32Val);
|
||||
* @param [in] u32Sz
|
||||
* Number of bytes to read. The buffer size must be >= u32Sz
|
||||
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
*/
|
||||
*/
|
||||
sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz);
|
||||
|
||||
/**
|
||||
@ -126,7 +127,7 @@ sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz);
|
||||
* @param [in] u32Sz
|
||||
* Number of bytes to write. The buffer size must be >= u32Sz
|
||||
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
*/
|
||||
*/
|
||||
sint8 nm_write_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz);
|
||||
|
||||
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains NMC1500 M2M driver APIs declarations.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -52,15 +45,27 @@ typedef struct {
|
||||
uint32 u32Chipid; /* HW revision which will be basically the chip ID */
|
||||
uint8 u8FirmwareMajor; /* Version Major Number which represents the official release base */
|
||||
uint8 u8FirmwareMinor; /* Version Minor Number which represents the engineering release base */
|
||||
uint8 u8FirmwarePatch; /* Version pathc Number which represents the pathces release base */
|
||||
uint8 u8FirmwarePatch; /* Version patch Number which represents the patches release base */
|
||||
uint8 u8DriverMajor; /* Version Major Number which represents the official release base */
|
||||
uint8 u8DriverMinor; /* Version Minor Number which represents the engineering release base */
|
||||
uint8 u8DriverPatch; /* Version Patch Number which represents the pathces release base */
|
||||
uint8 u8DriverPatch; /* Version Patch Number which represents the patches release base */
|
||||
uint8 BuildDate[sizeof(__DATE__)];
|
||||
uint8 BuildTime[sizeof(__TIME__)];
|
||||
uint8 _PAD8_;
|
||||
uint16 u16FirmwareSvnNum;
|
||||
uint16 _PAD16_[2];
|
||||
} tstrM2mRev;
|
||||
|
||||
/**
|
||||
* @struct tstrM2mBinaryHeader
|
||||
* @brief Structure holding compatibility version info for firmware binaries
|
||||
*/
|
||||
typedef struct {
|
||||
tstrM2mRev binVerInfo;
|
||||
uint32 flashOffset;
|
||||
uint32 payloadSize;
|
||||
} tstrM2mBinaryHeader;
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
@ -107,6 +112,28 @@ sint8 nm_drv_init_download_mode(void);
|
||||
*/
|
||||
sint8 nm_drv_init(void * arg);
|
||||
|
||||
/*
|
||||
* @fn nm_drv_init_hold
|
||||
* @brief First part of nm_drv_init, up to the point of initializing spi for flash access.
|
||||
* @see nm_drv_init
|
||||
* @return M2M_SUCCESS in case of success and Negative error code in case of failure
|
||||
* @param [in] req_serial_number
|
||||
* Parameter inherited from nm_drv_init
|
||||
* @return ZERO in case of success and Negative error code in case of failure
|
||||
*/
|
||||
sint8 nm_drv_init_hold(void);
|
||||
|
||||
/*
|
||||
* @fn nm_drv_init_start
|
||||
* @brief Second part of nm_drv_init, continuing from where nm_drv_init_hold left off.
|
||||
* @see nm_drv_init
|
||||
* @return M2M_SUCCESS in case of success and Negative error code in case of failure
|
||||
* @param [in] arg
|
||||
* Parameter inherited from nm_drv_init
|
||||
* @return ZERO in case of success and Negative error code in case of failure
|
||||
*/
|
||||
sint8 nm_drv_init_start(void * arg);
|
||||
|
||||
/**
|
||||
* @fn nm_drv_deinit
|
||||
* @brief Deinitialize NMC1000 driver
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains NMC1000 I2C protocol bus APIs implementation.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains NMC1000 SPI protocol bus APIs implementation.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -54,12 +47,18 @@
|
||||
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
*/
|
||||
sint8 nm_spi_init(void);
|
||||
/**
|
||||
* @fn nm_spi_reset
|
||||
* @brief reset the SPI
|
||||
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
*/
|
||||
sint8 nm_spi_reset(void);
|
||||
|
||||
/**
|
||||
* @fn nm_spi_deinit
|
||||
* @brief DeInitialize the SPI
|
||||
* @brief DeInitialize the SPI
|
||||
* @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
*/
|
||||
*/
|
||||
sint8 nm_spi_deinit(void);
|
||||
|
||||
/**
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains NMC1000 UART protocol bus APIs implementation.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
|
||||
@ -2,59 +2,65 @@
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief Programmer APIs.
|
||||
* \brief WINC Peripherals Application Interface.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __PROGRAMMER_H__
|
||||
#define __PROGRAMMER_H__
|
||||
|
||||
#ifndef IMAGE_DOWNLOADER_H_INCLUDED
|
||||
#define IMAGE_DOWNLOADER_H_INCLUDED
|
||||
|
||||
/**
|
||||
* Include
|
||||
*/
|
||||
#include "spi_flash/include/spi_flash_map.h"
|
||||
#include "spi_flash/include/spi_flash.h"
|
||||
#include "programmer/programmer_apis.h"
|
||||
|
||||
#define ROOT_CERT_SIZE M2M_TLS_FLASH_ROOTCERT_CACHE_SIZE
|
||||
|
||||
#define programmer_get_flash_size() (((spi_flash_get_size() * 1024) / 8) * 1024)
|
||||
#define programmer_write(pu8Buf, u32Offset, u32Sz) spi_flash_write(pu8Buf, u32Offset, u32Sz)
|
||||
#define programmer_erase(u32Offset, u32Sz) spi_flash_erase(u32Offset, u32Sz)
|
||||
#define programmer_eraseall() programmer_erase(0, programmer_get_flash_size())
|
||||
#define programmer_read(pu8Buf, u32Offset, u32Sz) spi_flash_read(pu8Buf, u32Offset, u32Sz)
|
||||
#define ROOT_CERT_SIZE M2M_TLS_ROOTCER_FLASH_SIZE
|
||||
|
||||
#define programmer_get_flash_size() (((spi_flash_get_size()*1024)/8)*1024)
|
||||
#define programmer_write(pu8Buf, u32Offset, u32Sz) spi_flash_write(pu8Buf, u32Offset, u32Sz)
|
||||
#define programmer_erase(u32Offset, u32Sz) spi_flash_erase(u32Offset, u32Sz)
|
||||
#define programmer_eraseall() programmer_erase(0, programmer_get_flash_size())
|
||||
#define programmer_read(pu8Buf, u32Offset, u32Sz) spi_flash_read(pu8Buf, u32Offset, u32Sz)
|
||||
|
||||
|
||||
#define programmer_write_root_cert(buff) programmer_write((uint8*)buff, M2M_TLS_ROOTCER_FLASH_OFFSET, M2M_TLS_ROOTCER_FLASH_SIZE)
|
||||
#define programmer_read_root_cert(buff) programmer_read((uint8*)buff, M2M_TLS_ROOTCER_FLASH_OFFSET, M2M_TLS_ROOTCER_FLASH_SIZE)
|
||||
#define programmer_erase_root_cert() programmer_erase(M2M_TLS_ROOTCER_FLASH_OFFSET, M2M_TLS_ROOTCER_FLASH_SIZE)
|
||||
|
||||
#define programmer_write_tls_cert_store(buff) programmer_write((uint8*)buff, M2M_TLS_SERVER_FLASH_OFFSET, M2M_TLS_SERVER_FLASH_SIZE)
|
||||
#define programmer_read_tls_cert_store(buff) programmer_read((uint8*)buff, M2M_TLS_SERVER_FLASH_OFFSET, M2M_TLS_SERVER_FLASH_SIZE)
|
||||
#define programmer_erase_tls_cert_store() programmer_erase(M2M_TLS_SERVER_FLASH_OFFSET, M2M_TLS_SERVER_FLASH_SIZE)
|
||||
|
||||
int burn_firmware(const char *path);
|
||||
int verify_firmware(const char *path);
|
||||
int dump_firmware(const char *path);
|
||||
#endif /* IMAGE_DOWNLOADER_H_INCLUDED */
|
||||
#endif /* __PROGRAMMER_H__ */
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief Programmer APIs.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -43,6 +36,7 @@
|
||||
#define FIRMWARE_PROGRAMMER_APIS_H_INCLUDED
|
||||
|
||||
#include "common/include/nm_common.h"
|
||||
#include "programmer/programmer.h"
|
||||
#include "spi_flash/include/spi_flash_map.h"
|
||||
|
||||
#define programmer_write_cert_image(buff) programmer_write((uint8*)buff, M2M_TLS_FLASH_ROOTCERT_CACHE_OFFSET, M2M_TLS_FLASH_ROOTCERT_CACHE_SIZE)
|
||||
@ -53,4 +47,5 @@
|
||||
#define programmer_read_firmware_image(buff,offSet,sz) programmer_read((uint8*)buff, offSet, sz)
|
||||
|
||||
#define programmer_erase_all() programmer_erase(0, programmer_get_flash_size())
|
||||
|
||||
#endif /* FIRMWARE_PROGRAMMER_APIS_H_INCLUDED */
|
||||
|
||||
@ -2,38 +2,31 @@
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief BSD alike socket interface internal types.
|
||||
* \brief BSD compatible socket interface internal types.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -62,6 +55,10 @@ INCLUDES
|
||||
MACROS
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
/*
|
||||
* HOSTNAME_MAX_SIZE is defined here and also in host_drv/socket/include/socket.h
|
||||
* The two definitions must match.
|
||||
*/
|
||||
#ifdef _FIRMWARE_
|
||||
#define HOSTNAME_MAX_SIZE (64)
|
||||
#endif
|
||||
@ -72,7 +69,7 @@ MACROS
|
||||
|
||||
#define SOCKET_CMD_INVALID 0x00
|
||||
/*!<
|
||||
Invlaid Socket command value.
|
||||
Invalid Socket command value.
|
||||
*/
|
||||
|
||||
|
||||
@ -108,7 +105,7 @@ MACROS
|
||||
|
||||
#define SOCKET_CMD_RECV 0x46
|
||||
/*!<
|
||||
Socket Recieve command value.
|
||||
Socket Receive command value.
|
||||
*/
|
||||
|
||||
|
||||
@ -120,7 +117,7 @@ MACROS
|
||||
|
||||
#define SOCKET_CMD_RECVFROM 0x48
|
||||
/*!<
|
||||
Socket RecieveFrom command value.
|
||||
Socket ReceiveFrom command value.
|
||||
*/
|
||||
|
||||
|
||||
@ -150,7 +147,7 @@ MACROS
|
||||
|
||||
#define SOCKET_CMD_SSL_RECV 0x4D
|
||||
/*!<
|
||||
SSL-Socket Recieve command value.
|
||||
SSL-Socket Receive command value.
|
||||
*/
|
||||
|
||||
|
||||
@ -172,11 +169,31 @@ MACROS
|
||||
|
||||
|
||||
#define SOCKET_CMD_SSL_SET_SOCK_OPT 0x51
|
||||
/*!<
|
||||
*/
|
||||
|
||||
|
||||
#define SOCKET_CMD_PING 0x52
|
||||
/*!<
|
||||
*/
|
||||
|
||||
|
||||
#define SOCKET_CMD_SSL_SET_CS_LIST 0x53
|
||||
/*!<
|
||||
Recommend instead using @ref M2M_SSL_REQ_SET_CS_LIST and
|
||||
associated response @ref M2M_SSL_RESP_SET_CS_LIST
|
||||
*/
|
||||
|
||||
|
||||
#define SOCKET_CMD_SSL_BIND 0x54
|
||||
/*!<
|
||||
*/
|
||||
|
||||
|
||||
#define SOCKET_CMD_SSL_EXP_CHECK 0x55
|
||||
/*!<
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#define PING_ERR_SUCCESS 0
|
||||
@ -221,9 +238,9 @@ typedef struct{
|
||||
*/
|
||||
typedef struct{
|
||||
tstrSockAddr strAddr;
|
||||
SOCKET sock;
|
||||
uint8 u8Void;
|
||||
uint16 u16SessionID;
|
||||
SOCKET sock;
|
||||
uint8 u8Void;
|
||||
uint16 u16SessionID;
|
||||
}tstrBindCmd;
|
||||
|
||||
|
||||
@ -260,7 +277,7 @@ typedef struct{
|
||||
*/
|
||||
typedef struct{
|
||||
SOCKET sock;
|
||||
sint8 s8Status;
|
||||
sint8 s8Status;
|
||||
uint16 u16SessionID;
|
||||
}tstrListenReply;
|
||||
|
||||
@ -272,7 +289,11 @@ typedef struct{
|
||||
tstrSockAddr strAddr;
|
||||
SOCKET sListenSock;
|
||||
SOCKET sConnectedSock;
|
||||
uint16 u16Void;
|
||||
uint16 u16AppDataOffset;
|
||||
/*!<
|
||||
In further packet send requests the host interface should put the user application
|
||||
data at this offset in the allocated shared data packet.
|
||||
*/
|
||||
}tstrAcceptReply;
|
||||
|
||||
|
||||
@ -350,7 +371,7 @@ typedef struct{
|
||||
@brief
|
||||
*/
|
||||
typedef struct{
|
||||
tstrSockAddr strRemoteAddr;
|
||||
tstrSockAddr strRemoteAddr;
|
||||
sint16 s16RecvStatus;
|
||||
uint16 u16DataOffset;
|
||||
SOCKET sock;
|
||||
@ -410,9 +431,21 @@ typedef struct{
|
||||
}tstrPingReply;
|
||||
|
||||
|
||||
/*!
|
||||
@struct\
|
||||
tstrSslCertExpSettings
|
||||
|
||||
@brief SSL Certificate Expiry Validation Settings
|
||||
|
||||
@sa tenuSslCertExpSettings
|
||||
*/
|
||||
typedef struct{
|
||||
uint32 u32CsBMP;
|
||||
}tstrSslSetActiveCsList;
|
||||
uint32 u32CertExpValidationOpt;
|
||||
/*!<
|
||||
See @tenuSslCertExpSettings for possible values.
|
||||
*/
|
||||
}tstrSslCertExpSettings;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -2,38 +2,31 @@
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief BSD alike socket interface internal types.
|
||||
* \brief BSD compatible socket interface internal types.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
|
||||
87
src/winc1500/include/spi_flash/include/flexible_flash.h
Normal file
87
src/winc1500/include/spi_flash/include/flexible_flash.h
Normal file
@ -0,0 +1,87 @@
|
||||
/**
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief WINC1500 SPI Flash.
|
||||
*
|
||||
* Copyright (c) 2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __FLEXIBLE_FLASH_H__
|
||||
#define __FLEXIBLE_FLASH_H__
|
||||
|
||||
typedef struct {
|
||||
uint32 magic;
|
||||
uint32 max_size;
|
||||
}tstrFlashLUTHeader;
|
||||
|
||||
// NOTE: Don't use enums for id/status here,
|
||||
// they need to be 16 bit but the enums end up as
|
||||
// 32 bit even if the __packed__ attribute is used
|
||||
typedef struct {
|
||||
uint16 id;
|
||||
uint8 sector;
|
||||
uint8 size;
|
||||
uint32 reserved;
|
||||
}tstrFlashLUTEntry;
|
||||
|
||||
#define FLASHMAP_MAGIC_VALUE 0x1ABCDEF9
|
||||
#define FLASHMAP_MAX_ENTRIES 32
|
||||
|
||||
// + 8 is for the number of entries value (uint32) and CRC (uint32)
|
||||
// * 2 is for the new lookup table to apply
|
||||
// + 48 is for the progress monitor
|
||||
#define FLASHMAP_MAX_SIZE (sizeof(tstrFlashLUTHeader) + (((sizeof(tstrFlashLUTEntry) * FLASHMAP_MAX_ENTRIES) + 8) * 2) + 48)
|
||||
|
||||
|
||||
/** @defgroup SPiFlashRead spi_flexible_flash_find_section
|
||||
* @ingroup SPIFLASHAPI
|
||||
*/
|
||||
/**@{*/
|
||||
/*!
|
||||
* @fn sint8 spi_flexible_flash_find_section(uint16 u16EntryIDToLookFor, uint32 *pu32StartOffset, uint32 *pu32Size);
|
||||
* @brief Read the Flash Map to extract the host file starting offset.\n
|
||||
* @param [in] u16EntryIDToLookFor
|
||||
* The ID of the location in Flash we are looking for. See @ref tenuFlashLUTEntryID.
|
||||
* @param [in] pu32StartOffset
|
||||
* Pointer to the variable where the Flash section start address should be stored.
|
||||
* @param [in] pu32Size
|
||||
* Pointer to the variable where the Flash section size should be stored.
|
||||
* @warning
|
||||
* In case there is a running WINC firmware, it is required to pause the firmware
|
||||
* first before any trial to access SPI flash to avoid any racing between host and
|
||||
* running firmware on bus. @ref m2m_wifi_download_mode can be used to pause the firmware.
|
||||
* @sa m2m_wifi_download_mode
|
||||
* m2m_wifi_init_hold
|
||||
* @return The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
|
||||
|
||||
*/
|
||||
sint8 spi_flexible_flash_find_section(uint16 u16EntryIDToLookFor, uint32 *pu32StartOffset, uint32 *pu32Size);
|
||||
/**@}*/
|
||||
|
||||
#endif /* __FLEXIBLE_FLASH_H__ */
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief WINC1500 SPI Flash.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -112,7 +105,10 @@
|
||||
#include "bus_wrapper/include/nm_bus_wrapper.h"
|
||||
#include "driver/include/nmbus.h"
|
||||
#include "driver/include/nmasic.h"
|
||||
#include "spi_flash/include/spi_flash_map.h"
|
||||
|
||||
#define FLASH_SECTOR_SZ (4 * 1024UL)
|
||||
/*!<Sector Size in Flash Memory
|
||||
*/
|
||||
|
||||
/**
|
||||
* @fn spi_flash_enable
|
||||
@ -220,4 +216,5 @@ sint8 spi_flash_write(uint8* pu8Buf, uint32 u32Offset, uint32 u32Sz);
|
||||
*/
|
||||
sint8 spi_flash_erase(uint32 u32Offset, uint32 u32Sz);
|
||||
/**@}*/
|
||||
|
||||
#endif //__SPI_FLASH_H__
|
||||
|
||||
@ -2,50 +2,53 @@
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief SPI Flash Memory Mapping.
|
||||
* \brief WINC1500 SPI Flash.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef SPI_FLASH_MAP_H_INCLUDED
|
||||
#define SPI_FLASH_MAP_H_INCLUDED
|
||||
/**
|
||||
* @file spi_flash_map.h
|
||||
* @brief This module contains spi flash CONTENT
|
||||
* @author M.S.M
|
||||
* @date 17 SEPT 2013
|
||||
* @version 1.0
|
||||
*/
|
||||
#ifndef __SPI_FLASH_MAP_H__
|
||||
#define __SPI_FLASH_MAP_H__
|
||||
|
||||
#define FLASH_MAP_VER_0 (0)
|
||||
#define FLAAH_MAP_VER_1 (1)
|
||||
#define FLASH_MAP_VER_1 (1)
|
||||
#define FLASH_MAP_VER_2 (2)
|
||||
#define FLASH_MAP_VER_3 (3)
|
||||
#define FLASH_MAP_VER_4 (4)
|
||||
|
||||
#define FLASH_MAP_VERSION FLAAH_MAP_VER_1
|
||||
#define FLASH_MAP_VERSION FLASH_MAP_VER_4
|
||||
|
||||
//#define DOWNLOAD_ROLLBACK
|
||||
//#define OTA_GEN
|
||||
@ -81,7 +84,7 @@
|
||||
|
||||
/*
|
||||
* Detailed Sizes and locations for Flash Memory:
|
||||
* ____________________ ___________ ___________________________ _______________________________________________
|
||||
* ____________________ ___________ ____________________________________________________________________________
|
||||
* | Starting Address | Size | Location's Name | Description |
|
||||
* |____________________|___________|___________________________|_______________________________________________|
|
||||
* | 0 K | 4 K | Boot Firmware | Firmware to select which version to run |
|
||||
@ -90,14 +93,15 @@
|
||||
* | | | PLL Size = 1K | PLL |
|
||||
* | | | GAIN Size = 3K | Gain configuration |
|
||||
* | 16 K | 4 K | CERTIFICATE | X.509 Certificate storage |
|
||||
* | 20 K | 4 K | Scratch Section | Empty Section |
|
||||
* | 24 K | 4 K | Reserved TLS Server | Reserved |
|
||||
* | 20 K | 8 K | TLS Server | TLS Server Private Key and certificates |
|
||||
* | 28 K | 8 K | HTTP Files | Files used with Provisioning Mode |
|
||||
* | 36 K | 4 K | Connection Parameters | Parameters for success connection to AP |
|
||||
* | 40 K | 236 K | Main Firmware/program | Main Firmware to run WiFi Chip |
|
||||
* | 276 K | 236 K | OTA Firmware | OTA firmware |
|
||||
* | 512 K Total flash size |
|
||||
* |____________________|___________|___________________________|_______________________________________________|
|
||||
* | 512 K | 512 K | Host File Storage | WINC1510 (8Mb of Flash) only |
|
||||
* |------------------------------------------------------------------------------------------------------------|
|
||||
* | Total flash size is 512 K for WINC1500 and 1024 K for WINC1510 |
|
||||
* |____________________________________________________________________________________________________________|
|
||||
*
|
||||
*
|
||||
* *Keys for Comments with each MACRO:
|
||||
@ -109,54 +113,49 @@
|
||||
* Boot Firmware: which used to select which firmware to run
|
||||
*
|
||||
*/
|
||||
#define M2M_BOOT_FIRMWARE_STARTING_ADDR (FLASH_START_ADDR)
|
||||
#define M2M_BOOT_FIRMWARE_FLASH_SZ (FLASH_SECTOR_SZ)
|
||||
#define M2M_BOOT_FIRMWARE_STARTING_ADDR (FLASH_START_ADDR)
|
||||
#define M2M_BOOT_FIRMWARE_FLASH_SZ (FLASH_SECTOR_SZ)
|
||||
|
||||
/*
|
||||
* Control Section: which used by Boot firmware
|
||||
*
|
||||
*/
|
||||
#define M2M_CONTROL_FLASH_OFFSET (M2M_BOOT_FIRMWARE_STARTING_ADDR + M2M_BOOT_FIRMWARE_FLASH_SZ)
|
||||
#define M2M_CONTROL_FLASH_BKP_OFFSET (M2M_CONTROL_FLASH_OFFSET + FLASH_SECTOR_SZ)
|
||||
#define M2M_CONTROL_FLASH_SEC_SZ (FLASH_SECTOR_SZ)
|
||||
#define M2M_CONTROL_FLASH_TOTAL_SZ (FLASH_SECTOR_SZ * 2)
|
||||
#define M2M_CONTROL_FLASH_OFFSET (M2M_BOOT_FIRMWARE_STARTING_ADDR + M2M_BOOT_FIRMWARE_FLASH_SZ)
|
||||
#define M2M_CONTROL_FLASH_BKP_OFFSET (M2M_CONTROL_FLASH_OFFSET + FLASH_SECTOR_SZ)
|
||||
#define M2M_CONTROL_FLASH_SEC_SZ (FLASH_SECTOR_SZ)
|
||||
#define M2M_CONTROL_FLASH_TOTAL_SZ (FLASH_SECTOR_SZ * 2)
|
||||
|
||||
/*
|
||||
* LUT for PLL and TX Gain settings:
|
||||
*
|
||||
*/
|
||||
#define M2M_PLL_FLASH_OFFSET (M2M_CONTROL_FLASH_OFFSET + M2M_CONTROL_FLASH_TOTAL_SZ)
|
||||
#define M2M_PLL_FLASH_SZ (1024 * 1)
|
||||
#define M2M_GAIN_FLASH_OFFSET (M2M_PLL_FLASH_OFFSET + M2M_PLL_FLASH_SZ)
|
||||
#define M2M_GAIN_FLASH_SZ (M2M_CONFIG_SECT_TOTAL_SZ - M2M_PLL_FLASH_SZ)
|
||||
#define M2M_CONFIG_SECT_TOTAL_SZ (FLASH_SECTOR_SZ)
|
||||
#define M2M_PLL_FLASH_OFFSET (M2M_CONTROL_FLASH_OFFSET + M2M_CONTROL_FLASH_TOTAL_SZ)
|
||||
#define M2M_PLL_FLASH_SZ (1024 * 1)
|
||||
#define M2M_GAIN_FLASH_OFFSET (M2M_PLL_FLASH_OFFSET + M2M_PLL_FLASH_SZ)
|
||||
#define M2M_GAIN_FLASH_SZ (M2M_CONFIG_SECT_TOTAL_SZ - M2M_PLL_FLASH_SZ)
|
||||
#define M2M_CONFIG_SECT_TOTAL_SZ (FLASH_SECTOR_SZ)
|
||||
|
||||
/*
|
||||
* Certificate:
|
||||
*
|
||||
*/
|
||||
#define M2M_TLS_FLASH_ROOTCERT_CACHE_OFFSET (M2M_PLL_FLASH_OFFSET + M2M_CONFIG_SECT_TOTAL_SZ)
|
||||
#define M2M_TLS_FLASH_ROOTCERT_CACHE_SIZE (FLASH_SECTOR_SZ * 1)
|
||||
#define M2M_TLS_ROOTCER_FLASH_OFFSET (M2M_PLL_FLASH_OFFSET + M2M_CONFIG_SECT_TOTAL_SZ)
|
||||
#define M2M_TLS_ROOTCER_FLASH_SIZE (FLASH_SECTOR_SZ * 1)
|
||||
|
||||
/*
|
||||
* Scratch:
|
||||
* TLS Server Key Files
|
||||
*
|
||||
*/
|
||||
#define M2M_TLS_FLASH_SESSION_CACHE_OFFSET (M2M_TLS_FLASH_ROOTCERT_CACHE_OFFSET + M2M_TLS_FLASH_ROOTCERT_CACHE_SIZE)
|
||||
#define M2M_TLS_FLASH_SESSION_CACHE_SIZE (FLASH_SECTOR_SZ * 1)
|
||||
#define M2M_TLS_SERVER_FLASH_OFFSET (M2M_TLS_ROOTCER_FLASH_OFFSET + M2M_TLS_ROOTCER_FLASH_SIZE)
|
||||
#define M2M_TLS_SERVER_FLASH_SIZE (FLASH_SECTOR_SZ * 2)
|
||||
|
||||
/*
|
||||
* reserved section
|
||||
*
|
||||
*/
|
||||
#define M2M_RESERVED_FLASH_OFFSET (M2M_TLS_FLASH_SESSION_CACHE_OFFSET + M2M_TLS_FLASH_SESSION_CACHE_SIZE)
|
||||
#define M2M_RESERVED_FLASH_SZ (FLASH_SECTOR_SZ * 1)
|
||||
/*
|
||||
* HTTP Files
|
||||
*
|
||||
*/
|
||||
#define M2M_HTTP_MEM_FLASH_OFFSET (M2M_RESERVED_FLASH_OFFSET + M2M_RESERVED_FLASH_SZ)
|
||||
#define M2M_HTTP_MEM_FLASH_OFFSET (M2M_TLS_SERVER_FLASH_OFFSET + M2M_TLS_SERVER_FLASH_SIZE)
|
||||
#define M2M_HTTP_MEM_FLASH_SZ (FLASH_SECTOR_SZ * 2)
|
||||
|
||||
/*
|
||||
* Saved Connection Parameters:
|
||||
*
|
||||
@ -169,9 +168,17 @@
|
||||
* Common section size
|
||||
*/
|
||||
|
||||
#define M2M_COMMON_DATA_SEC (M2M_BOOT_FIRMWARE_FLASH_SZ + M2M_CONTROL_FLASH_TOTAL_SZ + M2M_CONFIG_SECT_TOTAL_SZ + \
|
||||
M2M_TLS_FLASH_ROOTCERT_CACHE_SIZE + M2M_TLS_FLASH_SESSION_CACHE_SIZE + \
|
||||
M2M_HTTP_MEM_FLASH_SZ + M2M_CACHED_CONNS_FLASH_SZ + M2M_RESERVED_FLASH_SZ)
|
||||
#define M2M_COMMON_DATA_SEC \
|
||||
(\
|
||||
M2M_BOOT_FIRMWARE_FLASH_SZ + \
|
||||
M2M_CONTROL_FLASH_TOTAL_SZ + \
|
||||
M2M_CONFIG_SECT_TOTAL_SZ + \
|
||||
M2M_TLS_ROOTCER_FLASH_SIZE + \
|
||||
M2M_TLS_SERVER_FLASH_SIZE + \
|
||||
M2M_HTTP_MEM_FLASH_SZ + \
|
||||
M2M_CACHED_CONNS_FLASH_SZ \
|
||||
)
|
||||
|
||||
/*
|
||||
*
|
||||
* OTA image1 Offset
|
||||
@ -183,48 +190,64 @@
|
||||
*
|
||||
*/
|
||||
#if (defined _FIRMWARE_)||(defined OTA_GEN)
|
||||
#define M2M_FIRMWARE_FLASH_OFFSET (0UL)
|
||||
#define M2M_FIRMWARE_FLASH_OFFSET (0UL)
|
||||
#else
|
||||
#if (defined DOWNLOAD_ROLLBACK)
|
||||
#define M2M_FIRMWARE_FLASH_OFFSET (M2M_OTA_IMAGE2_OFFSET)
|
||||
#define M2M_FIRMWARE_FLASH_OFFSET (M2M_OTA_IMAGE2_OFFSET)
|
||||
#else
|
||||
#define M2M_FIRMWARE_FLASH_OFFSET (M2M_OTA_IMAGE1_OFFSET)
|
||||
#define M2M_FIRMWARE_FLASH_OFFSET (M2M_OTA_IMAGE1_OFFSET)
|
||||
#endif
|
||||
#endif
|
||||
/*
|
||||
*
|
||||
* Firmware
|
||||
*/
|
||||
#define M2M_FIRMWARE_FLASH_SZ (236*1024UL)
|
||||
#define M2M_FIRMWARE_FLASH_SZ (236 * 1024UL)
|
||||
/**
|
||||
*
|
||||
* OTA image Size
|
||||
*/
|
||||
#define OTA_IMAGE_SIZE (M2M_FIRMWARE_FLASH_SZ)
|
||||
#define OTA_IMAGE_SIZE (M2M_FIRMWARE_FLASH_SZ)
|
||||
/**
|
||||
*
|
||||
* Flash Total size
|
||||
*/
|
||||
#define FLASH_IMAGE1_CONTENT_SZ (M2M_COMMON_DATA_SEC + OTA_IMAGE_SIZE)
|
||||
#define FLASH_IMAGE1_CONTENT_SZ (M2M_COMMON_DATA_SEC + OTA_IMAGE_SIZE)
|
||||
|
||||
/**
|
||||
*
|
||||
* OTA image 2 offset
|
||||
*/
|
||||
#define M2M_OTA_IMAGE2_OFFSET (FLASH_IMAGE1_CONTENT_SZ)
|
||||
#define M2M_OTA_IMAGE2_OFFSET (FLASH_IMAGE1_CONTENT_SZ)
|
||||
|
||||
/*
|
||||
* App(Cortus App 4M): App. which runs over firmware
|
||||
*
|
||||
*/
|
||||
#define M2M_APP_4M_MEM_FLASH_SZ (FLASH_SECTOR_SZ * 10)
|
||||
#define M2M_APP_4M_MEM_FLASH_OFFSET (FLASH_4M_TOTAL_SZ - M2M_APP_4M_MEM_FLASH_SZ)
|
||||
|
||||
#ifdef CORTUS_APP
|
||||
#define M2M_APP_4M_MEM_FLASH_SZ (FLASH_SECTOR_SZ * 16)
|
||||
#define M2M_APP_4M_MEM_FLASH_OFFSET (FLASH_4M_TOTAL_SZ - M2M_APP_4M_MEM_FLASH_SZ)
|
||||
#define M2M_APP_8M_MEM_FLASH_OFFSET (M2M_OTA_IMAGE2_OFFSET + OTA_IMAGE_SIZE)
|
||||
#define M2M_APP_8M_MEM_FLASH_SZ (FLASH_SECTOR_SZ * 32)
|
||||
#define M2M_APP_OTA_MEM_FLASH_OFFSET (M2M_APP_8M_MEM_FLASH_OFFSET + M2M_APP_8M_MEM_FLASH_SZ)
|
||||
#define M2M_HFD_8M_MEM_FLASH_OFFSET (M2M_APP_8M_MEM_FLASH_OFFSET + M2M_APP_8M_MEM_FLASH_SZ)
|
||||
#else
|
||||
#define M2M_HFD_8M_MEM_FLASH_OFFSET (M2M_OTA_IMAGE2_OFFSET + OTA_IMAGE_SIZE)
|
||||
#endif
|
||||
/* Check if total size of content
|
||||
* don't exceed total size of memory allowed
|
||||
**/
|
||||
#if (M2M_COMMON_DATA_SEC + (OTA_IMAGE_SIZE *2)> FLASH_4M_TOTAL_SZ)
|
||||
#error "Excced 4M Flash Size"
|
||||
#error "Exceeds 4M Flash Size"
|
||||
#endif /* (FLASH_CONTENT_SZ > FLASH_TOTAL_SZ) */
|
||||
|
||||
#endif /* SPI_FLASH_MAP_H_INCLUDED */
|
||||
/**
|
||||
* Magic value to differentiate between old HTTP flash section format and newer formats.
|
||||
* The lowest byte is ignored when checking the value as it contains the
|
||||
* version number (it should always be 00 here, image_builder will set this value in flash).
|
||||
**/
|
||||
#define HTTP_FLASH_SECTION_MAGIC 0xB00B1500
|
||||
#define HTTP_FLASH_SECTION_VERSION 2
|
||||
|
||||
|
||||
#endif /* __SPI_FLASH_MAP_H__ */
|
||||
|
||||
72
src/winc1500/src/flexible_flash.c
Normal file
72
src/winc1500/src/flexible_flash.c
Normal file
@ -0,0 +1,72 @@
|
||||
/**
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief WINC1500 SPI Flash.
|
||||
*
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include "driver/include/m2m_types.h"
|
||||
#include "spi_flash/include/spi_flash.h"
|
||||
#include "spi_flash/include/flexible_flash.h"
|
||||
|
||||
#define FLASH_MAP_TABLE_ADDR (FLASH_SECTOR_SZ+sizeof(tstrOtaControlSec)+8)
|
||||
#define N_ENTRIES_MAX 32
|
||||
|
||||
sint8 spi_flexible_flash_find_section(uint16 u16EntryIDToLookFor, uint32 *pu32StartOffset, uint32 *pu32Size)
|
||||
{
|
||||
sint8 s8Ret = M2M_ERR_INVALID_ARG;
|
||||
if((NULL == pu32StartOffset) || (NULL == pu32Size)) goto EXIT;
|
||||
|
||||
uint8 au8buff[8];
|
||||
uint8 u8CurrEntry = 0;
|
||||
s8Ret = spi_flash_read(&au8buff[0], FLASH_MAP_TABLE_ADDR, 4);
|
||||
if(M2M_SUCCESS != s8Ret) goto EXIT;
|
||||
|
||||
uint8 u8nEntries = au8buff[0]; // Max number is 32, reading one byte will suffice
|
||||
if(u8nEntries > N_ENTRIES_MAX)
|
||||
{
|
||||
s8Ret = M2M_ERR_FAIL;
|
||||
goto EXIT;
|
||||
}
|
||||
|
||||
while(u8nEntries > u8CurrEntry)
|
||||
{
|
||||
s8Ret = spi_flash_read(&au8buff[0], FLASH_MAP_TABLE_ADDR + 4 + (u8CurrEntry*8), 8);
|
||||
u8CurrEntry++;
|
||||
if(M2M_SUCCESS != s8Ret) break;
|
||||
uint16 u16EntryID = (au8buff[1] << 8) | au8buff[0];
|
||||
if(u16EntryID != u16EntryIDToLookFor) continue;
|
||||
*pu32StartOffset = au8buff[2] * FLASH_SECTOR_SZ;
|
||||
*pu32Size = au8buff[3] * FLASH_SECTOR_SZ;
|
||||
break;
|
||||
}
|
||||
EXIT:
|
||||
return s8Ret;
|
||||
}
|
||||
@ -2,38 +2,31 @@
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief NMC1500 Peripherials Application Interface.
|
||||
* \brief WINC1500 Peripherials Application Interface.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -104,6 +97,7 @@ volatile static uint32 gaAteFwTxRates[M2M_ATE_MAX_NUM_OF_RATES] =
|
||||
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87 /*N-Rats*/
|
||||
};
|
||||
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
STATIC FUNCTIONS
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
@ -366,7 +360,6 @@ sint8 m2m_ate_start_tx(tstrM2mAteTx * strM2mAteTx)
|
||||
(strM2mAteTx->duty_cycle > M2M_ATE_TX_DUTY_MIN_VALUE /*10*/ ) ||
|
||||
(strM2mAteTx->dpd_ctrl < M2M_ATE_TX_DPD_DYNAMIC) ||
|
||||
(strM2mAteTx->dpd_ctrl > M2M_ATE_TX_DPD_ENABLED) ||
|
||||
(strM2mAteTx->use_pmu < M2M_ATE_PMU_DISBLE) ||
|
||||
(strM2mAteTx->use_pmu > M2M_ATE_PMU_ENABLE) ||
|
||||
(strM2mAteTx->phy_burst_tx < M2M_ATE_TX_SRC_MAC) ||
|
||||
(strM2mAteTx->phy_burst_tx > M2M_ATE_TX_SRC_PHY) ||
|
||||
@ -392,6 +385,7 @@ sint8 m2m_ate_start_tx(tstrM2mAteTx * strM2mAteTx)
|
||||
goto __EXIT;
|
||||
}
|
||||
|
||||
|
||||
s8Ret += nm_write_reg(rBurstTx_NMI_USE_PMU, strM2mAteTx->use_pmu);
|
||||
s8Ret += nm_write_reg(rBurstTx_NMI_TX_PHY_CONT, strM2mAteTx->phy_burst_tx);
|
||||
s8Ret += nm_write_reg(rBurstTx_NMI_NUM_TX_FRAMES, strM2mAteTx->num_frames);
|
||||
@ -506,7 +500,6 @@ sint8 m2m_ate_start_rx(tstrM2mAteRx * strM2mAteRxStr)
|
||||
|
||||
if( (strM2mAteRxStr->channel_num < M2M_ATE_CHANNEL_1) ||
|
||||
(strM2mAteRxStr->channel_num > M2M_ATE_CHANNEL_14)||
|
||||
(strM2mAteRxStr->use_pmu < M2M_ATE_PMU_DISBLE) ||
|
||||
(strM2mAteRxStr->use_pmu > M2M_ATE_PMU_ENABLE)
|
||||
)
|
||||
{
|
||||
@ -674,6 +667,35 @@ sint8 m2m_ate_get_dig_gain(double * dGaindB)
|
||||
return M2M_SUCCESS;
|
||||
}
|
||||
/*!
|
||||
@fn \
|
||||
void m2m_ate_set_pa_gain(uint8 gain_db)
|
||||
|
||||
@brief
|
||||
This function is used to set the PA gain (18/15/12/9/6/3/0 only)
|
||||
|
||||
@param [in] uint8 gain_db
|
||||
PA gain level allowed (18/15/12/9/6/3/0 only)
|
||||
|
||||
*/
|
||||
void m2m_ate_set_pa_gain(uint8 gain_db)
|
||||
{
|
||||
uint32 PA_1e9c;
|
||||
uint8 aGain[] = {
|
||||
/* "0 dB" */ 0x00,
|
||||
/* "3 dB" */ 0x01,
|
||||
/* "6 dB" */ 0x03,
|
||||
/* "9 dB" */ 0x07,
|
||||
/* "12 dB" */ 0x0f,
|
||||
/* "15 dB" */ 0x1f,
|
||||
/* "18 dB" */ 0x3f };
|
||||
/* The variable PA gain is valid only for High power mode */
|
||||
PA_1e9c = nm_read_reg(0x1e9c);
|
||||
/* TX bank 0. */
|
||||
PA_1e9c &= ~(0x3ful << 8);
|
||||
PA_1e9c |= (((uint32)aGain[gain_db/3] & 0x3f) << 8);
|
||||
nm_write_reg(0x1e9c, PA_1e9c);
|
||||
}
|
||||
/*!
|
||||
@fn \
|
||||
sint8 m2m_ate_get_pa_gain(double *paGaindB)
|
||||
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief WINC Crypto module.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -758,7 +751,7 @@ static void m2m_crypto_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
|
||||
}
|
||||
|
||||
}
|
||||
else if(u8OpCode == M2M_CRYPTO_RESP_SHA256_FINSIH)
|
||||
else if(u8OpCode == M2M_CRYPTO_RESP_SHA256_FINISH)
|
||||
{
|
||||
tstrCyptoResp strResp;
|
||||
if (hif_receive(u32Addr + sizeof(tstrM2mSha256Ctxt), (uint8*) &strResp,sizeof(tstrCyptoResp), 0) == M2M_SUCCESS)
|
||||
@ -851,7 +844,7 @@ sint8 m2m_crypto_sha256_hash_init(tstrM2mSha256Ctxt *psha256Ctxt)
|
||||
Buffer holding the data submitted to the hash.
|
||||
|
||||
@param [in] u16DataLength
|
||||
Size of the data bufefr in bytes.
|
||||
Size of the data buffer in bytes.
|
||||
*/
|
||||
sint8 m2m_crypto_sha256_hash_update(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Data, uint16 u16DataLength)
|
||||
{
|
||||
@ -883,7 +876,7 @@ sint8 m2m_crypto_sha256_hash_finish(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Sh
|
||||
if((!gstrCryptoCtxt.u8CryptoBusy) && (psha256Ctxt != NULL) && (pu8Sha256Digest != NULL))
|
||||
{
|
||||
gstrCryptoCtxt.pu8Digest = pu8Sha256Digest;
|
||||
ret = hif_send(M2M_REQ_GROUP_CRYPTO,M2M_CRYPTO_REQ_SHA256_FINSIH|M2M_REQ_DATA_PKT,(uint8*)psha256Ctxt,sizeof(tstrM2mSha256Ctxt),NULL,0,0);
|
||||
ret = hif_send(M2M_REQ_GROUP_CRYPTO,M2M_CRYPTO_REQ_SHA256_FINISH|M2M_REQ_DATA_PKT,(uint8*)psha256Ctxt,sizeof(tstrM2mSha256Ctxt),NULL,0,0);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
@ -980,7 +973,7 @@ sint8 m2m_crypto_rsa_sign_verify(uint8 *pu8N, uint16 u16NSize, uint8 *pu8E, uint
|
||||
The length of the hash digest.
|
||||
|
||||
@param[out] pu8RsaSignature
|
||||
Pointer to a user buffer allocated by teh caller shall hold the generated signature.
|
||||
Pointer to a user buffer allocated by the caller shall hold the generated signature.
|
||||
*/
|
||||
sint8 m2m_crypto_rsa_sign_gen(uint8 *pu8N, uint16 u16NSize, uint8 *pu8d, uint16 u16dSize, uint8 *pu8SignedMsgHash,
|
||||
uint16 u16HashLength, uint8 *pu8RsaSignature)
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains M2M host interface APIs implementation.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -63,45 +56,55 @@
|
||||
#define WIFI_HOST_RCV_CTRL_1 (0x1084)
|
||||
#define WIFI_HOST_RCV_CTRL_2 (0x1078)
|
||||
#define WIFI_HOST_RCV_CTRL_3 (0x106c)
|
||||
#define WAKE_VALUE (0x5678)
|
||||
#define SLEEP_VALUE (0x4321)
|
||||
#define WAKE_REG (0x1074)
|
||||
#define WIFI_HOST_RCV_CTRL_4 (0x150400)
|
||||
#define WIFI_HOST_RCV_CTRL_5 (0x1088)
|
||||
|
||||
typedef struct {
|
||||
uint8 u8ChipMode;
|
||||
uint8 u8ChipSleep;
|
||||
uint8 u8HifRXDone;
|
||||
uint8 u8Interrupt;
|
||||
uint8 u8Yield;
|
||||
uint32 u32RxAddr;
|
||||
uint32 u32RxSize;
|
||||
tpfHifCallBack pfWifiCb;
|
||||
tpfHifCallBack pfIpCb;
|
||||
tpfHifCallBack pfOtaCb;
|
||||
tpfHifCallBack pfSigmaCb;
|
||||
tpfHifCallBack pfHifCb;
|
||||
tpfHifCallBack pfCryptoCb;
|
||||
tpfHifCallBack pfSslCb;
|
||||
}tstrHifContext;
|
||||
|
||||
volatile tstrHifContext gstrHifCxt;
|
||||
|
||||
static volatile uint8 gu8ChipMode = 0;
|
||||
static volatile uint8 gu8ChipSleep = 0;
|
||||
static volatile uint8 gu8HifSizeDone = 0;
|
||||
static volatile uint8 gu8Interrupt = 0;
|
||||
|
||||
tpfHifCallBack pfWifiCb = NULL; /*!< pointer to Wi-Fi call back function */
|
||||
tpfHifCallBack pfIpCb = NULL; /*!< pointer to Socket call back function */
|
||||
tpfHifCallBack pfOtaCb = NULL; /*!< pointer to OTA call back function */
|
||||
tpfHifCallBack pfSigmaCb = NULL;
|
||||
tpfHifCallBack pfHifCb = NULL;
|
||||
tpfHifCallBack pfCryptoCb = NULL;
|
||||
#ifdef ETH_MODE
|
||||
extern void os_hook_isr(void);
|
||||
#endif
|
||||
|
||||
static void isr(void)
|
||||
{
|
||||
gu8Interrupt++;
|
||||
gstrHifCxt.u8Interrupt++;
|
||||
#ifdef NM_LEVEL_INTERRUPT
|
||||
nm_bsp_interrupt_ctrl(0);
|
||||
#endif
|
||||
#ifdef ETH_MODE
|
||||
os_hook_isr();
|
||||
#endif
|
||||
}
|
||||
static sint8 hif_set_rx_done(void)
|
||||
{
|
||||
uint32 reg;
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
|
||||
gstrHifCxt.u8HifRXDone = 0;
|
||||
#ifdef NM_EDGE_INTERRUPT
|
||||
nm_bsp_interrupt_ctrl(1);
|
||||
#endif
|
||||
|
||||
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_0,®);
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
//reg &= ~(1<<0);
|
||||
|
||||
/* Set RX Done */
|
||||
reg |= (1<<1);
|
||||
reg |= NBIT1;
|
||||
ret = nm_write_reg(WIFI_HOST_RCV_CTRL_0,reg);
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
#ifdef NM_LEVEL_INTERRUPT
|
||||
@ -109,7 +112,6 @@ static sint8 hif_set_rx_done(void)
|
||||
#endif
|
||||
ERR1:
|
||||
return ret;
|
||||
|
||||
}
|
||||
/**
|
||||
* @fn static void m2m_hif_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
|
||||
@ -140,20 +142,23 @@ static void m2m_hif_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
|
||||
sint8 hif_chip_wake(void)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
if(gu8ChipSleep == 0)
|
||||
if(gstrHifCxt.u8HifRXDone)
|
||||
{
|
||||
if((gu8ChipMode == M2M_PS_DEEP_AUTOMATIC)||(gu8ChipMode == M2M_PS_MANUAL))
|
||||
/*chip already wake for the rx not done no need to send wake request*/
|
||||
return ret;
|
||||
}
|
||||
if(gstrHifCxt.u8ChipSleep == 0)
|
||||
{
|
||||
if(gstrHifCxt.u8ChipMode != M2M_NO_PS)
|
||||
{
|
||||
ret = nm_clkless_wake();
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
ret = nm_write_reg(WAKE_REG, WAKE_VALUE);
|
||||
ret = chip_wake();
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
}
|
||||
else
|
||||
{
|
||||
}
|
||||
}
|
||||
gu8ChipSleep++;
|
||||
gstrHifCxt.u8ChipSleep++;
|
||||
ERR1:
|
||||
return ret;
|
||||
}
|
||||
@ -173,7 +178,7 @@ ERR1:
|
||||
|
||||
void hif_set_sleep_mode(uint8 u8Pstype)
|
||||
{
|
||||
gu8ChipMode = u8Pstype;
|
||||
gstrHifCxt.u8ChipMode = u8Pstype;
|
||||
}
|
||||
/*!
|
||||
@fn \
|
||||
@ -188,7 +193,22 @@ void hif_set_sleep_mode(uint8 u8Pstype)
|
||||
|
||||
uint8 hif_get_sleep_mode(void)
|
||||
{
|
||||
return gu8ChipMode;
|
||||
return gstrHifCxt.u8ChipMode;
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn NMI_API sint8 hif_chip_sleep_sc(void);
|
||||
* @brief To clear the chip sleep but keep the chip sleep
|
||||
* @return The function shall return ZERO for successful operation and a negative value otherwise.
|
||||
*/
|
||||
|
||||
sint8 hif_chip_sleep_sc(void)
|
||||
{
|
||||
if(gstrHifCxt.u8ChipSleep >= 1)
|
||||
{
|
||||
gstrHifCxt.u8ChipSleep--;
|
||||
}
|
||||
return M2M_SUCCESS;
|
||||
}
|
||||
/**
|
||||
* @fn NMI_API sint8 hif_chip_sleep(void);
|
||||
@ -200,26 +220,17 @@ sint8 hif_chip_sleep(void)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
|
||||
if(gu8ChipSleep >= 1)
|
||||
if(gstrHifCxt.u8ChipSleep >= 1)
|
||||
{
|
||||
gu8ChipSleep--;
|
||||
gstrHifCxt.u8ChipSleep--;
|
||||
}
|
||||
|
||||
if(gu8ChipSleep == 0)
|
||||
if(gstrHifCxt.u8ChipSleep == 0)
|
||||
{
|
||||
if((gu8ChipMode == M2M_PS_DEEP_AUTOMATIC)||(gu8ChipMode == M2M_PS_MANUAL))
|
||||
if(gstrHifCxt.u8ChipMode != M2M_NO_PS)
|
||||
{
|
||||
uint32 reg = 0;
|
||||
ret = nm_write_reg(WAKE_REG, SLEEP_VALUE);
|
||||
ret = chip_sleep();
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
/* Clear bit 1 */
|
||||
ret = nm_read_reg_with_ret(0x1, ®);
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
if(reg&0x2)
|
||||
{
|
||||
reg &=~(1 << 1);
|
||||
ret = nm_write_reg(0x1, reg);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -238,22 +249,14 @@ ERR1:
|
||||
|
||||
sint8 hif_init(void * arg)
|
||||
{
|
||||
pfWifiCb = NULL;
|
||||
pfIpCb = NULL;
|
||||
|
||||
gu8ChipSleep = 0;
|
||||
gu8ChipMode = M2M_NO_PS;
|
||||
|
||||
gu8Interrupt = 0;
|
||||
m2m_memset((uint8*)&gstrHifCxt,0,sizeof(tstrHifContext));
|
||||
nm_bsp_register_isr(isr);
|
||||
|
||||
hif_register_cb(M2M_REQ_GROUP_HIF,m2m_hif_cb);
|
||||
|
||||
return M2M_SUCCESS;
|
||||
}
|
||||
/**
|
||||
* @fn NMI_API sint8 hif_deinit(void * arg);
|
||||
* @brief To Deinitialize HIF layer.
|
||||
* @brief To De-initialize HIF layer.
|
||||
* @param [in] arg
|
||||
* Pointer to the arguments.
|
||||
* @return The function shall return ZERO for successful operation and a negative value otherwise.
|
||||
@ -261,31 +264,8 @@ sint8 hif_init(void * arg)
|
||||
sint8 hif_deinit(void * arg)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
#if 0
|
||||
uint32 reg = 0, cnt=0;
|
||||
while (reg != M2M_DISABLE_PS)
|
||||
{
|
||||
nm_bsp_sleep(1);
|
||||
reg = nm_read_reg(STATE_REG);
|
||||
if(++cnt > 1000)
|
||||
{
|
||||
M2M_DBG("failed to stop power save\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
ret = hif_chip_wake();
|
||||
|
||||
gu8ChipMode = 0;
|
||||
gu8ChipSleep = 0;
|
||||
gu8HifSizeDone = 0;
|
||||
gu8Interrupt = 0;
|
||||
|
||||
pfWifiCb = NULL;
|
||||
pfIpCb = NULL;
|
||||
pfOtaCb = NULL;
|
||||
pfHifCb = NULL;
|
||||
|
||||
m2m_memset((uint8*)&gstrHifCxt,0,sizeof(tstrHifContext));
|
||||
return ret;
|
||||
}
|
||||
/**
|
||||
@ -314,7 +294,7 @@ sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSiz
|
||||
uint8 *pu8DataBuf,uint16 u16DataSize, uint16 u16DataOffset)
|
||||
{
|
||||
sint8 ret = M2M_ERR_SEND;
|
||||
volatile tstrHifHdr strHif;
|
||||
tstrHifHdr strHif;
|
||||
|
||||
strHif.u8Opcode = u8Opcode&(~NBIT7);
|
||||
strHif.u8Gid = u8Gid;
|
||||
@ -327,12 +307,16 @@ sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSiz
|
||||
{
|
||||
strHif.u16Length += u16CtrlBufSize;
|
||||
}
|
||||
if (strHif.u16Length <= M2M_HIF_MAX_PACKET_SIZE)
|
||||
{
|
||||
ret = hif_chip_wake();
|
||||
if(ret == M2M_SUCCESS)
|
||||
{
|
||||
volatile uint32 reg, dma_addr = 0;
|
||||
volatile uint16 cnt = 0;
|
||||
|
||||
//#define OPTIMIZE_BUS
|
||||
/*please define in firmware also*/
|
||||
#ifndef OPTIMIZE_BUS
|
||||
reg = 0UL;
|
||||
reg |= (uint32)u8Gid;
|
||||
reg |= ((uint32)u8Opcode<<8);
|
||||
@ -340,31 +324,47 @@ sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSiz
|
||||
ret = nm_write_reg(NMI_STATE_REG,reg);
|
||||
if(M2M_SUCCESS != ret) goto ERR1;
|
||||
|
||||
|
||||
reg = 0;
|
||||
reg |= (1<<1);
|
||||
reg = 0UL;
|
||||
reg |= NBIT1;
|
||||
ret = nm_write_reg(WIFI_HOST_RCV_CTRL_2, reg);
|
||||
if(M2M_SUCCESS != ret) goto ERR1;
|
||||
#else
|
||||
reg = 0UL;
|
||||
reg |= NBIT1;
|
||||
reg |= ((u8Opcode & NBIT7) ? (NBIT2):(0)); /*Data = 1 or config*/
|
||||
reg |= (u8Gid == M2M_REQ_GROUP_IP) ? (NBIT3):(0); /*IP = 1 or non IP*/
|
||||
reg |= ((uint32)strHif.u16Length << 4); /*length of pkt max = 4096*/
|
||||
ret = nm_write_reg(WIFI_HOST_RCV_CTRL_2, reg);
|
||||
if(M2M_SUCCESS != ret) goto ERR1;
|
||||
#endif
|
||||
dma_addr = 0;
|
||||
|
||||
//nm_bsp_interrupt_ctrl(0);
|
||||
|
||||
|
||||
for(cnt = 0; cnt < 1000; cnt ++)
|
||||
{
|
||||
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_2,(uint32 *)®);
|
||||
if(ret != M2M_SUCCESS) break;
|
||||
if (!(reg & 0x2))
|
||||
/*
|
||||
* If it takes too long to get a response, the slow down to
|
||||
* avoid back-to-back register read operations.
|
||||
*/
|
||||
if(cnt >= 500) {
|
||||
if(cnt < 501) {
|
||||
M2M_INFO("Slowing down...\n");
|
||||
}
|
||||
nm_bsp_sleep(1);
|
||||
}
|
||||
if (!(reg & NBIT1))
|
||||
{
|
||||
ret = nm_read_reg_with_ret(0x150400,(uint32 *)&dma_addr);
|
||||
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_4,(uint32 *)&dma_addr);
|
||||
if(ret != M2M_SUCCESS) {
|
||||
/*in case of read error clear the dma address and return error*/
|
||||
/*in case of read error clear the DMA address and return error*/
|
||||
dma_addr = 0;
|
||||
goto ERR1;
|
||||
}
|
||||
/*in case of success break */
|
||||
break;
|
||||
}
|
||||
}
|
||||
//nm_bsp_interrupt_ctrl(1);
|
||||
|
||||
if (dma_addr != 0)
|
||||
{
|
||||
@ -372,17 +372,11 @@ sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSiz
|
||||
u32CurrAddr = dma_addr;
|
||||
strHif.u16Length=NM_BSP_B_L_16(strHif.u16Length);
|
||||
ret = nm_write_block(u32CurrAddr, (uint8*)&strHif, M2M_HIF_HDR_OFFSET);
|
||||
#ifdef CONF_WINC_USE_I2C
|
||||
nm_bsp_sleep(1);
|
||||
#endif
|
||||
if(M2M_SUCCESS != ret) goto ERR1;
|
||||
u32CurrAddr += M2M_HIF_HDR_OFFSET;
|
||||
if(pu8CtrlBuf != NULL)
|
||||
{
|
||||
ret = nm_write_block(u32CurrAddr, pu8CtrlBuf, u16CtrlBufSize);
|
||||
#ifdef CONF_WINC_USE_I2C
|
||||
nm_bsp_sleep(1);
|
||||
#endif
|
||||
if(M2M_SUCCESS != ret) goto ERR1;
|
||||
u32CurrAddr += u16CtrlBufSize;
|
||||
}
|
||||
@ -390,34 +384,43 @@ sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSiz
|
||||
{
|
||||
u32CurrAddr += (u16DataOffset - u16CtrlBufSize);
|
||||
ret = nm_write_block(u32CurrAddr, pu8DataBuf, u16DataSize);
|
||||
#ifdef CONF_WINC_USE_I2C
|
||||
nm_bsp_sleep(1);
|
||||
#endif
|
||||
if(M2M_SUCCESS != ret) goto ERR1;
|
||||
u32CurrAddr += u16DataSize;
|
||||
}
|
||||
|
||||
reg = dma_addr << 2;
|
||||
reg |= (1 << 1);
|
||||
reg |= NBIT1;
|
||||
ret = nm_write_reg(WIFI_HOST_RCV_CTRL_3, reg);
|
||||
if(M2M_SUCCESS != ret) goto ERR1;
|
||||
}
|
||||
else
|
||||
{
|
||||
M2M_DBG("Failed to alloc rx size\r");
|
||||
ret = M2M_ERR_MEM_ALLOC;
|
||||
goto ERR1;
|
||||
ret = hif_chip_sleep();
|
||||
M2M_DBG("Failed to alloc rx size %d\r",ret);
|
||||
ret = M2M_ERR_MEM_ALLOC;
|
||||
goto ERR2;
|
||||
}
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
M2M_ERR("(HIF)Fail to wakup the chip\n");
|
||||
goto ERR1;
|
||||
M2M_ERR("(HIF)Failed to wakeup the chip\n");
|
||||
goto ERR2;
|
||||
}
|
||||
}
|
||||
ret = hif_chip_sleep();
|
||||
|
||||
else
|
||||
{
|
||||
M2M_ERR("HIF message length (%d) exceeds max length (%d)\n",strHif.u16Length, M2M_HIF_MAX_PACKET_SIZE);
|
||||
ret = M2M_ERR_SEND;
|
||||
goto ERR2;
|
||||
}
|
||||
/*actual sleep ret = M2M_SUCCESS*/
|
||||
ret = hif_chip_sleep();
|
||||
return ret;
|
||||
ERR1:
|
||||
/*reset the count but no actual sleep as it already bus error*/
|
||||
hif_chip_sleep_sc();
|
||||
ERR2:
|
||||
/*logical error*/
|
||||
return ret;
|
||||
}
|
||||
/**
|
||||
@ -430,130 +433,145 @@ ERR1:
|
||||
*/
|
||||
static sint8 hif_isr(void)
|
||||
{
|
||||
sint8 ret = M2M_ERR_BUS_FAIL;
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
uint32 reg;
|
||||
volatile tstrHifHdr strHif;
|
||||
|
||||
ret = hif_chip_wake();
|
||||
if(ret == M2M_SUCCESS)
|
||||
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_0, ®);
|
||||
if(M2M_SUCCESS == ret)
|
||||
{
|
||||
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_0, ®);
|
||||
if(M2M_SUCCESS == ret)
|
||||
if(reg & 0x1) /* New interrupt has been received */
|
||||
{
|
||||
if(reg & 0x1) /* New interrupt has been received */
|
||||
{
|
||||
uint16 size;
|
||||
uint16 size;
|
||||
|
||||
nm_bsp_interrupt_ctrl(0);
|
||||
/*Clearing RX interrupt*/
|
||||
reg &= ~(1<<0);
|
||||
ret = nm_write_reg(WIFI_HOST_RCV_CTRL_0,reg);
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
gu8HifSizeDone = 0;
|
||||
size = (uint16)((reg >> 2) & 0xfff);
|
||||
if (size > 0) {
|
||||
uint32 address = 0;
|
||||
/**
|
||||
start bus transfer
|
||||
**/
|
||||
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_1, &address);
|
||||
if(M2M_SUCCESS != ret)
|
||||
/*Clearing RX interrupt*/
|
||||
reg &= ~NBIT0;
|
||||
ret = nm_write_reg(WIFI_HOST_RCV_CTRL_0,reg);
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
gstrHifCxt.u8HifRXDone = 1;
|
||||
size = (uint16)((reg >> 2) & 0xfff);
|
||||
if (size > 0) {
|
||||
uint32 address = 0;
|
||||
/**
|
||||
start bus transfer
|
||||
**/
|
||||
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_1, &address);
|
||||
if(M2M_SUCCESS != ret)
|
||||
{
|
||||
M2M_ERR("(hif) WIFI_HOST_RCV_CTRL_1 bus fail\n");
|
||||
goto ERR1;
|
||||
}
|
||||
gstrHifCxt.u32RxAddr = address;
|
||||
gstrHifCxt.u32RxSize = size;
|
||||
ret = nm_read_block(address, (uint8*)&strHif, sizeof(tstrHifHdr));
|
||||
strHif.u16Length = NM_BSP_B_L_16(strHif.u16Length);
|
||||
if(M2M_SUCCESS != ret)
|
||||
{
|
||||
M2M_ERR("(hif) address bus fail\n");
|
||||
goto ERR1;
|
||||
}
|
||||
if(strHif.u16Length != size)
|
||||
{
|
||||
if((size - strHif.u16Length) > 4)
|
||||
{
|
||||
M2M_ERR("(hif) WIFI_HOST_RCV_CTRL_1 bus fail\n");
|
||||
nm_bsp_interrupt_ctrl(1);
|
||||
goto ERR1;
|
||||
}
|
||||
ret = nm_read_block(address, (uint8*)&strHif, sizeof(tstrHifHdr));
|
||||
strHif.u16Length = NM_BSP_B_L_16(strHif.u16Length);
|
||||
if(M2M_SUCCESS != ret)
|
||||
{
|
||||
M2M_ERR("(hif) address bus fail\n");
|
||||
nm_bsp_interrupt_ctrl(1);
|
||||
goto ERR1;
|
||||
}
|
||||
if(strHif.u16Length != size)
|
||||
{
|
||||
if((size - strHif.u16Length) > 4)
|
||||
{
|
||||
M2M_ERR("(hif) Corrupted packet Size = %u <L = %u, G = %u, OP = %02X>\n",
|
||||
size, strHif.u16Length, strHif.u8Gid, strHif.u8Opcode);
|
||||
nm_bsp_interrupt_ctrl(1);
|
||||
ret = M2M_ERR_BUS_FAIL;
|
||||
goto ERR1;
|
||||
}
|
||||
}
|
||||
|
||||
if(M2M_REQ_GROUP_WIFI == strHif.u8Gid)
|
||||
{
|
||||
if(pfWifiCb)
|
||||
pfWifiCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
|
||||
|
||||
}
|
||||
else if(M2M_REQ_GROUP_IP == strHif.u8Gid)
|
||||
{
|
||||
if(pfIpCb)
|
||||
pfIpCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
|
||||
}
|
||||
else if(M2M_REQ_GROUP_OTA == strHif.u8Gid)
|
||||
{
|
||||
if(pfOtaCb)
|
||||
pfOtaCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
|
||||
}
|
||||
else if(M2M_REQ_GROUP_CRYPTO == strHif.u8Gid)
|
||||
{
|
||||
if(pfCryptoCb)
|
||||
pfCryptoCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
|
||||
}
|
||||
else if(M2M_REQ_GROUP_SIGMA == strHif.u8Gid)
|
||||
{
|
||||
if(pfSigmaCb)
|
||||
pfSigmaCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
|
||||
}
|
||||
else
|
||||
{
|
||||
M2M_ERR("(hif) invalid group ID\n");
|
||||
M2M_ERR("(hif) Corrupted packet Size = %u <L = %u, G = %u, OP = %02X>\n",
|
||||
size, strHif.u16Length, strHif.u8Gid, strHif.u8Opcode);
|
||||
ret = M2M_ERR_BUS_FAIL;
|
||||
goto ERR1;
|
||||
}
|
||||
#ifndef ENABLE_UNO_BOARD
|
||||
if(!gu8HifSizeDone)
|
||||
{
|
||||
M2M_ERR("(hif) host app didn't set RX Done\n");
|
||||
ret = hif_set_rx_done();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
if(M2M_REQ_GROUP_WIFI == strHif.u8Gid)
|
||||
{
|
||||
if(gstrHifCxt.pfWifiCb)
|
||||
gstrHifCxt.pfWifiCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
|
||||
else
|
||||
M2M_ERR("WIFI callback is not registered\n");
|
||||
}
|
||||
else if(M2M_REQ_GROUP_IP == strHif.u8Gid)
|
||||
{
|
||||
if(gstrHifCxt.pfIpCb)
|
||||
gstrHifCxt.pfIpCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
|
||||
else
|
||||
M2M_ERR("Socket callback is not registered\n");
|
||||
}
|
||||
else if(M2M_REQ_GROUP_OTA == strHif.u8Gid)
|
||||
{
|
||||
if(gstrHifCxt.pfOtaCb)
|
||||
gstrHifCxt.pfOtaCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
|
||||
else
|
||||
M2M_ERR("Ota callback is not registered\n");
|
||||
}
|
||||
else if(M2M_REQ_GROUP_CRYPTO == strHif.u8Gid)
|
||||
{
|
||||
if(gstrHifCxt.pfCryptoCb)
|
||||
gstrHifCxt.pfCryptoCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
|
||||
else
|
||||
M2M_ERR("Crypto callback is not registered\n");
|
||||
}
|
||||
else if(M2M_REQ_GROUP_SIGMA == strHif.u8Gid)
|
||||
{
|
||||
if(gstrHifCxt.pfSigmaCb)
|
||||
gstrHifCxt.pfSigmaCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
|
||||
else
|
||||
M2M_ERR("Sigma callback is not registered\n");
|
||||
}
|
||||
else if(M2M_REQ_GROUP_SSL == strHif.u8Gid)
|
||||
{
|
||||
if(gstrHifCxt.pfSslCb)
|
||||
gstrHifCxt.pfSslCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
|
||||
else
|
||||
M2M_ERR("SSL callback is not registered\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = M2M_ERR_RCV;
|
||||
M2M_ERR("(hif) Wrong Size\n");
|
||||
M2M_ERR("(hif) invalid group ID\n");
|
||||
ret = M2M_ERR_BUS_FAIL;
|
||||
goto ERR1;
|
||||
}
|
||||
if(gstrHifCxt.u8HifRXDone)
|
||||
{
|
||||
M2M_ERR("(hif) host app didn't set RX Done <%u><%X>\n", strHif.u8Gid, strHif.u8Opcode);
|
||||
ret = hif_set_rx_done();
|
||||
if(ret != M2M_SUCCESS) goto ERR1;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
#ifndef WIN32
|
||||
M2M_ERR("(hif) False interrupt %lx",reg);
|
||||
#endif
|
||||
M2M_ERR("(hif) Wrong Size\n");
|
||||
ret = M2M_ERR_RCV;
|
||||
goto ERR1;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
M2M_ERR("(hif) Fail to Read interrupt reg\n");
|
||||
#ifndef WIN32
|
||||
M2M_ERR("(hif) False interrupt %lx",reg);
|
||||
goto ERR1;
|
||||
#else
|
||||
#endif
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
M2M_ERR("(hif) FAIL to wakeup the chip\n");
|
||||
M2M_ERR("(hif) Failed to Read interrupt reg\n");
|
||||
goto ERR1;
|
||||
}
|
||||
|
||||
ret = hif_chip_sleep();
|
||||
ERR1:
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn hif_yield(void)
|
||||
* @brief
|
||||
Yields control from interrupt event handler.
|
||||
*/
|
||||
void hif_yield(void)
|
||||
{
|
||||
gstrHifCxt.u8Yield = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn hif_handle_isr(void)
|
||||
* @brief Handle interrupt received from NMC1500 firmware.
|
||||
@ -562,21 +580,43 @@ ERR1:
|
||||
|
||||
sint8 hif_handle_isr(void)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
|
||||
gstrHifCxt.u8Yield = 0;
|
||||
while(gstrHifCxt.u8Interrupt && !gstrHifCxt.u8Yield)
|
||||
{
|
||||
/* Atomic decrement u8Interrupt since it takes multiple instructions to load, decrement and store,
|
||||
* during which the ISR could fire again.
|
||||
* If LEVEL interrupt is used instead of EDGE then the atomicity isn't needed since the interrupt
|
||||
* is turned off in the ISR and back on again only after the interrupt has been serviced in hif_isr(). */
|
||||
|
||||
while (gu8Interrupt) {
|
||||
/*must be at that place because of the race of interrupt increment and that decrement*/
|
||||
/*when the interrupt enabled*/
|
||||
gu8Interrupt--;
|
||||
#ifndef NM_LEVEL_INTERRUPT
|
||||
nm_bsp_interrupt_ctrl(0);
|
||||
#endif
|
||||
|
||||
gstrHifCxt.u8Interrupt--;
|
||||
|
||||
#ifndef NM_LEVEL_INTERRUPT
|
||||
nm_bsp_interrupt_ctrl(1);
|
||||
#endif
|
||||
|
||||
uint8 retries = 5;
|
||||
while(1)
|
||||
{
|
||||
ret = hif_isr();
|
||||
if(ret == M2M_SUCCESS) {
|
||||
/*we will try forever untill we get that interrupt*/
|
||||
/*we will try forever until we get that interrupt*/
|
||||
/*Fail return errors here due to bus errors (reading expected values)*/
|
||||
break;
|
||||
} else {
|
||||
M2M_ERR("(HIF) Fail to handle interrupt %d try Again..\n",ret);
|
||||
retries--;
|
||||
if(!retries)
|
||||
{
|
||||
M2M_ERR("(HIF) Failed to handle interrupt %d, aborting due to too many retries\n", ret);
|
||||
break;
|
||||
}
|
||||
else
|
||||
M2M_ERR("(HIF) Failed to handle interrupt %d try again... (%u)\n", ret, retries);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -585,7 +625,7 @@ sint8 hif_handle_isr(void)
|
||||
}
|
||||
/*
|
||||
* @fn hif_receive
|
||||
* @brief Host interface interrupt serviece routine
|
||||
* @brief Host interface interrupt service routine
|
||||
* @param [in] u32Addr
|
||||
* Receive start address
|
||||
* @param [out] pu8Buf
|
||||
@ -598,16 +638,11 @@ sint8 hif_handle_isr(void)
|
||||
*/
|
||||
sint8 hif_receive(uint32 u32Addr, uint8 *pu8Buf, uint16 u16Sz, uint8 isDone)
|
||||
{
|
||||
uint32 address, reg;
|
||||
uint16 size;
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
|
||||
if(u32Addr == 0 ||pu8Buf == NULL || u16Sz == 0)
|
||||
if((u32Addr == 0)||(pu8Buf == NULL) || (u16Sz == 0))
|
||||
{
|
||||
if(isDone)
|
||||
{
|
||||
gu8HifSizeDone = 1;
|
||||
|
||||
{
|
||||
/* set RX done */
|
||||
ret = hif_set_rx_done();
|
||||
}
|
||||
@ -619,25 +654,16 @@ sint8 hif_receive(uint32 u32Addr, uint8 *pu8Buf, uint16 u16Sz, uint8 isDone)
|
||||
goto ERR1;
|
||||
}
|
||||
|
||||
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_0,®);
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
|
||||
|
||||
size = (uint16)((reg >> 2) & 0xfff);
|
||||
ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_1,&address);
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
|
||||
|
||||
if(u16Sz > size)
|
||||
if(u16Sz > gstrHifCxt.u32RxSize)
|
||||
{
|
||||
ret = M2M_ERR_FAIL;
|
||||
M2M_ERR("APP Requested Size is larger than the recived buffer size <%d><%d>\n",u16Sz, size);
|
||||
M2M_ERR("APP Requested Size is larger than the received buffer size <%u><%lu>\n",u16Sz, gstrHifCxt.u32RxSize);
|
||||
goto ERR1;
|
||||
}
|
||||
if((u32Addr < address)||((u32Addr + u16Sz)>(address+size)))
|
||||
if((u32Addr < gstrHifCxt.u32RxAddr)||((u32Addr + u16Sz)>(gstrHifCxt.u32RxAddr + gstrHifCxt.u32RxSize)))
|
||||
{
|
||||
ret = M2M_ERR_FAIL;
|
||||
M2M_ERR("APP Requested Address beyond the recived buffer address and length\n");
|
||||
M2M_ERR("APP Requested Address beyond the received buffer address and length\n");
|
||||
goto ERR1;
|
||||
}
|
||||
|
||||
@ -646,23 +672,19 @@ sint8 hif_receive(uint32 u32Addr, uint8 *pu8Buf, uint16 u16Sz, uint8 isDone)
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
|
||||
/* check if this is the last packet */
|
||||
if((((address + size) - (u32Addr + u16Sz)) <= 0) || isDone)
|
||||
if((((gstrHifCxt.u32RxAddr + gstrHifCxt.u32RxSize) - (u32Addr + u16Sz)) <= 0) || isDone)
|
||||
{
|
||||
gu8HifSizeDone = 1;
|
||||
|
||||
/* set RX done */
|
||||
ret = hif_set_rx_done();
|
||||
}
|
||||
|
||||
|
||||
|
||||
ERR1:
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn hif_register_cb
|
||||
* @brief To set Callback function for every compantent Component
|
||||
* @brief To set Callback function for every component
|
||||
* @param [in] u8Grp
|
||||
* Group to which the Callback function should be set.
|
||||
* @param [in] fn
|
||||
@ -676,22 +698,25 @@ sint8 hif_register_cb(uint8 u8Grp,tpfHifCallBack fn)
|
||||
switch(u8Grp)
|
||||
{
|
||||
case M2M_REQ_GROUP_IP:
|
||||
pfIpCb = fn;
|
||||
gstrHifCxt.pfIpCb = fn;
|
||||
break;
|
||||
case M2M_REQ_GROUP_WIFI:
|
||||
pfWifiCb = fn;
|
||||
gstrHifCxt.pfWifiCb = fn;
|
||||
break;
|
||||
case M2M_REQ_GROUP_OTA:
|
||||
pfOtaCb = fn;
|
||||
gstrHifCxt.pfOtaCb = fn;
|
||||
break;
|
||||
case M2M_REQ_GROUP_HIF:
|
||||
pfHifCb = fn;
|
||||
gstrHifCxt.pfHifCb = fn;
|
||||
break;
|
||||
case M2M_REQ_GROUP_CRYPTO:
|
||||
pfCryptoCb = fn;
|
||||
gstrHifCxt.pfCryptoCb = fn;
|
||||
break;
|
||||
case M2M_REQ_GROUP_SIGMA:
|
||||
pfSigmaCb = fn;
|
||||
gstrHifCxt.pfSigmaCb = fn;
|
||||
break;
|
||||
case M2M_REQ_GROUP_SSL:
|
||||
gstrHifCxt.pfSslCb = fn;
|
||||
break;
|
||||
default:
|
||||
M2M_ERR("GRp ? %d\n",u8Grp);
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief NMC1500 IoT OTA Interface.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -44,48 +37,58 @@
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
INCLUDES
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
#include <stdbool.h>
|
||||
#include "common/include/nm_common.h"
|
||||
#include "driver/include/m2m_types.h"
|
||||
#include "driver/include/m2m_ota.h"
|
||||
#include "driver/include/m2m_hif.h"
|
||||
#include "spi_flash/include/spi_flash.h"
|
||||
#include "driver/include/m2m_wifi.h"
|
||||
#include "spi_flash/include/flexible_flash.h"
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
MACROS
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
DATA TYPES
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
static tpfOtaUpdateCb gpfOtaUpdateCb = NULL;
|
||||
static tpfOtaNotifCb gpfOtaNotifCb = NULL;
|
||||
static tpfFileGetCb gpfHFDGetCb = NULL;
|
||||
static tpfFileReadCb gpfHFDReadCb = NULL;
|
||||
static tpfFileEraseCb gpfHFDEraseCb = NULL;
|
||||
|
||||
typedef struct {
|
||||
uint32 u32Offset;
|
||||
uint32 u32Size;
|
||||
}FileBlockDescriptor;
|
||||
|
||||
static FileBlockDescriptor FileBlock;
|
||||
|
||||
static uint8 gu8CurrFileHandlerID = HFD_INVALID_HANDLER;
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
FUNCTION PROTOTYPES
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
/**
|
||||
* @fn m2m_wifi_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr, uint8 grp)
|
||||
* @brief WiFi call back function
|
||||
* @fn m2m_ota_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
|
||||
* @brief OTA call back function
|
||||
* @param [in] u8OpCode
|
||||
* HIF Opcode type.
|
||||
* @param [in] u16DataSize
|
||||
* HIF data length.
|
||||
* @param [in] u32Addr
|
||||
* HIF address.
|
||||
* @param [in] grp
|
||||
* HIF group type.
|
||||
* @author
|
||||
* @date
|
||||
* @version 1.0
|
||||
*/
|
||||
static void m2m_ota_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
sint8 s8Ret = M2M_SUCCESS;
|
||||
if(u8OpCode == M2M_OTA_RESP_NOTIF_UPDATE_INFO)
|
||||
{
|
||||
tstrOtaUpdateInfo strOtaUpdateInfo;
|
||||
m2m_memset((uint8*)&strOtaUpdateInfo,0,sizeof(tstrOtaUpdateInfo));
|
||||
ret = hif_receive(u32Addr,(uint8*)&strOtaUpdateInfo,sizeof(tstrOtaUpdateInfo),0);
|
||||
if(ret == M2M_SUCCESS)
|
||||
s8Ret = hif_receive(u32Addr,(uint8*)&strOtaUpdateInfo,sizeof(tstrOtaUpdateInfo),0);
|
||||
if(s8Ret == M2M_SUCCESS)
|
||||
{
|
||||
if(gpfOtaNotifCb)
|
||||
gpfOtaNotifCb(&strOtaUpdateInfo);
|
||||
@ -95,18 +98,67 @@ static void m2m_ota_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
|
||||
{
|
||||
tstrOtaUpdateStatusResp strOtaUpdateStatusResp;
|
||||
m2m_memset((uint8*)&strOtaUpdateStatusResp,0,sizeof(tstrOtaUpdateStatusResp));
|
||||
ret = hif_receive(u32Addr, (uint8*) &strOtaUpdateStatusResp,sizeof(tstrOtaUpdateStatusResp), 0);
|
||||
if(ret == M2M_SUCCESS)
|
||||
s8Ret = hif_receive(u32Addr, (uint8*) &strOtaUpdateStatusResp,sizeof(tstrOtaUpdateStatusResp), 0);
|
||||
if(s8Ret == M2M_SUCCESS)
|
||||
{
|
||||
if(gpfOtaUpdateCb)
|
||||
gpfOtaUpdateCb(strOtaUpdateStatusResp.u8OtaUpdateStatusType,strOtaUpdateStatusResp.u8OtaUpdateStatus);
|
||||
}
|
||||
}
|
||||
else if (u8OpCode == M2M_OTA_RESP_HOST_FILE_STATUS)
|
||||
{
|
||||
tstrOtaHostFileGetStatusResp strOtaHostFileGetStatusResp = {0};
|
||||
s8Ret = hif_receive(u32Addr, (uint8*)&strOtaHostFileGetStatusResp, sizeof(tstrOtaHostFileGetStatusResp), 1);
|
||||
if(M2M_SUCCESS == s8Ret)
|
||||
{
|
||||
if(strOtaHostFileGetStatusResp.u8OtaFileGetStatus == OTA_STATUS_SUCCESS) {
|
||||
gu8CurrFileHandlerID = strOtaHostFileGetStatusResp.u8CFHandler;
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (u8OpCode == M2M_OTA_RESP_HOST_FILE_DOWNLOAD)
|
||||
{
|
||||
tstrOtaHostFileGetStatusResp strOtaHostFileGetStatusResp = {0};
|
||||
s8Ret = hif_receive(u32Addr, (uint8*)&strOtaHostFileGetStatusResp, sizeof(tstrOtaHostFileGetStatusResp), 1);
|
||||
if(M2M_SUCCESS == s8Ret)
|
||||
{
|
||||
if(strOtaHostFileGetStatusResp.u8OtaFileGetStatus == OTA_STATUS_SUCCESS) {
|
||||
gu8CurrFileHandlerID = strOtaHostFileGetStatusResp.u8CFHandler;
|
||||
M2M_INFO("Generated HostFileHandlerID is %u\n", gu8CurrFileHandlerID);
|
||||
}
|
||||
|
||||
if(gpfHFDGetCb) {
|
||||
gpfHFDGetCb(strOtaHostFileGetStatusResp.u8OtaFileGetStatus, gu8CurrFileHandlerID, strOtaHostFileGetStatusResp.u32OtaFileSize);
|
||||
gpfHFDGetCb = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (u8OpCode == M2M_OTA_RESP_HOST_FILE_READ)
|
||||
{
|
||||
tstrOtaHostFileReadStatusResp strOtaHostFileReadStatusResp;
|
||||
m2m_memset((uint8*)&strOtaHostFileReadStatusResp, 0, sizeof(tstrOtaHostFileReadStatusResp));
|
||||
s8Ret = hif_receive(u32Addr, (uint8*)&strOtaHostFileReadStatusResp, sizeof(tstrOtaHostFileReadStatusResp), 1);
|
||||
if(M2M_SUCCESS == s8Ret)
|
||||
if(gpfHFDReadCb)
|
||||
gpfHFDReadCb(strOtaHostFileReadStatusResp.u8OtaFileReadStatus, strOtaHostFileReadStatusResp.pFileBuf, strOtaHostFileReadStatusResp.FileBlockSz);
|
||||
}
|
||||
else if (u8OpCode == M2M_OTA_RESP_HOST_FILE_ERASE)
|
||||
{
|
||||
tstrOtaHostFileEraseStatusResp strOtaHostFileEraseStatusResp = {0};
|
||||
s8Ret = hif_receive(u32Addr, (uint8*)&strOtaHostFileEraseStatusResp, sizeof(tstrOtaHostFileEraseStatusResp), 1);
|
||||
if(M2M_SUCCESS == s8Ret)
|
||||
{
|
||||
if(gpfHFDEraseCb)
|
||||
{
|
||||
gpfHFDEraseCb(strOtaHostFileEraseStatusResp.u8OtaFileEraseStatus);
|
||||
gpfHFDEraseCb = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
M2M_ERR("Invaild OTA resp %d ?\n",u8OpCode);
|
||||
M2M_ERR("Invalid OTA resp %d ?\n",u8OpCode);
|
||||
}
|
||||
|
||||
}
|
||||
/*!
|
||||
@fn \
|
||||
@ -119,7 +171,7 @@ static void m2m_ota_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
|
||||
OTA Update callback function
|
||||
|
||||
@param [in] pfOtaNotifCb
|
||||
OTA notify callback function
|
||||
OTA Notify callback function
|
||||
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
@ -131,15 +183,16 @@ NMI_API sint8 m2m_ota_init(tpfOtaUpdateCb pfOtaUpdateCb, tpfOtaNotifCb pfOtaNot
|
||||
if(pfOtaUpdateCb){
|
||||
gpfOtaUpdateCb = pfOtaUpdateCb;
|
||||
}else{
|
||||
M2M_ERR("Invaild Ota update cb\n");
|
||||
M2M_ERR("Invalid Ota update cb\n");
|
||||
}
|
||||
if(pfOtaNotifCb){
|
||||
gpfOtaNotifCb = pfOtaNotifCb;
|
||||
}else{
|
||||
M2M_ERR("Invaild Ota notify cb\n");
|
||||
M2M_ERR("Invalid Ota notify cb\n");
|
||||
}
|
||||
|
||||
hif_register_cb(M2M_REQ_GROUP_OTA,m2m_ota_cb);
|
||||
ret = hif_send(M2M_REQ_GROUP_OTA, M2M_OTA_REQ_HOST_FILE_STATUS, NULL, 0, NULL, 0, 0);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@ -160,10 +213,10 @@ NMI_API sint8 m2m_ota_notif_set_url(uint8 * u8Url)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
uint16 u16UrlSize = m2m_strlen(u8Url) + 1;
|
||||
/*Todo: we may change it to data pkt but we need to give it higer priority
|
||||
but the priorty is not implemnted yet in data pkt
|
||||
/*Todo: we may change it to data pkt but we need to give it higher priority
|
||||
but the priority is not implemented yet in data pkt
|
||||
*/
|
||||
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_START_UPDATE,u8Url,u16UrlSize,NULL,0,0);
|
||||
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_NOTIF_SET_URL,u8Url,u16UrlSize,NULL,0,0);
|
||||
return ret;
|
||||
|
||||
}
|
||||
@ -207,30 +260,29 @@ NMI_API sint8 m2m_ota_notif_sched(uint32 u32Period)
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_start_update(uint8 * u8DownloadUrl);
|
||||
NMI_API sint8 m2m_ota_start_update(unsigned char * pcDownloadUrl);
|
||||
|
||||
@brief
|
||||
Request OTA start update using the downloaded url
|
||||
|
||||
@param [in] u8DownloadUrl
|
||||
@param [in] pcDownloadUrl
|
||||
The download firmware url, you get it from device info
|
||||
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_start_update(uint8 * u8DownloadUrl)
|
||||
NMI_API sint8 m2m_ota_start_update(unsigned char * pcDownloadUrl)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
uint16 u16DurlSize = m2m_strlen(u8DownloadUrl) + 1;
|
||||
/*Todo: we may change it to data pkt but we need to give it higer priority
|
||||
but the priorty is not implemnted yet in data pkt
|
||||
uint16 u16DurlSize = m2m_strlen(pcDownloadUrl) + 1;
|
||||
/*Todo: we may change it to data pkt but we need to give it higher priority
|
||||
but the priority is not implemented yet in data pkt
|
||||
*/
|
||||
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_START_UPDATE,u8DownloadUrl,u16DurlSize,NULL,0,0);
|
||||
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_START_FW_UPDATE,pcDownloadUrl,u16DurlSize,NULL,0,0);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_rollback(void);
|
||||
@ -244,7 +296,24 @@ NMI_API sint8 m2m_ota_start_update(uint8 * u8DownloadUrl)
|
||||
NMI_API sint8 m2m_ota_rollback(void)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_ROLLBACK,NULL,0,NULL,0,0);
|
||||
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_ROLLBACK_FW,NULL,0,NULL,0,0);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_abort(void);
|
||||
|
||||
@brief
|
||||
Request OTA Abort
|
||||
|
||||
@return
|
||||
The function SHALL return 0 for success and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_abort(void)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_ABORT,NULL,0,NULL,0,0);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -265,6 +334,7 @@ NMI_API sint8 m2m_ota_switch_firmware(void)
|
||||
ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_SWITCH_FIRMWARE,NULL,0,NULL,0,0);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API sint8 m2m_ota_get_firmware_version(tstrM2mRev * pstrRev);
|
||||
@ -338,3 +408,192 @@ NMI_API sint8 m2m_ota_test(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API m2m_ota_host_file_get(unsigned char *pcDownloadUrl, tpfFileGetCb pfHFDGetCb);
|
||||
|
||||
@brief
|
||||
Download a file from a remote location and store it in the WINC's Flash.
|
||||
|
||||
@param[in] pcDownloadUrl
|
||||
Url pointing to the remote file. HTTP/HTTPS only.
|
||||
|
||||
@param[in] pfHFDGetCb
|
||||
Pointer to a callback to be executed when the download finishes.
|
||||
|
||||
@return
|
||||
Status of the get operation
|
||||
|
||||
@warning 1. Providing a callback is mandatory.
|
||||
2. This functionality is only supported from WINC release 19.6.0 onwards.
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_host_file_get(unsigned char *pcDownloadUrl, tpfFileGetCb pfHFDGetCb)
|
||||
{
|
||||
sint8 s8Ret = M2M_ERR_FAIL;
|
||||
uint16 u16DUrlSize = m2m_strlen(pcDownloadUrl);
|
||||
|
||||
if((NULL == pfHFDGetCb) || (0 == u16DUrlSize))
|
||||
{
|
||||
M2M_ERR("Invalid parameters.\n");
|
||||
goto EXIT;
|
||||
}
|
||||
|
||||
if('\0' != pcDownloadUrl[u16DUrlSize])
|
||||
pcDownloadUrl[u16DUrlSize] = '\0';
|
||||
else
|
||||
u16DUrlSize++;
|
||||
|
||||
M2M_INFO("GetHostFile - URL: %s, urlSize: %u\n", pcDownloadUrl, u16DUrlSize);
|
||||
|
||||
s8Ret = hif_send(M2M_REQ_GROUP_OTA, M2M_OTA_REQ_HOST_FILE_DOWNLOAD, pcDownloadUrl, u16DUrlSize, NULL, 0, 0);
|
||||
if(s8Ret == M2M_SUCCESS)
|
||||
{
|
||||
gpfHFDGetCb = pfHFDGetCb;
|
||||
gu8CurrFileHandlerID = HFD_INVALID_HANDLER;
|
||||
}
|
||||
|
||||
EXIT:
|
||||
return s8Ret;
|
||||
}
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API m2m_ota_host_file_read_hif(uint8 u8Handler, uint32 u32Offset, uint32 u32Size, tpfFileReadCb pfHFDReadCb);
|
||||
@brief
|
||||
Read a certain amount of bytes from a file in WINC's Flash using HIF transfer.
|
||||
|
||||
@param[in] u8Handler
|
||||
ID of the file we are trying to read from. Must be valid.
|
||||
|
||||
@param[in] u32Offset
|
||||
Offset from start of the file to read from (in bytes).
|
||||
|
||||
@param[in] u32Size
|
||||
The amount of data to read (in bytes).
|
||||
|
||||
@param[in] pfHFDReadCb
|
||||
Callback to be executed when the read operation completes.
|
||||
|
||||
@return
|
||||
Status of the read operation
|
||||
|
||||
@warning 1. Providing a callback is mandatory.
|
||||
2. This functionality is only supported from WINC release 19.6.0 onwards.
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_host_file_read_hif(uint8 u8Handler, uint32 u32Offset, uint32 u32Size, tpfFileReadCb pfHFDReadCb)
|
||||
{
|
||||
sint8 s8Ret = M2M_ERR_INVALID_ARG;
|
||||
FileBlock.u32Offset = u32Offset;
|
||||
FileBlock.u32Size = u32Size;
|
||||
|
||||
if((u8Handler != gu8CurrFileHandlerID) || (HFD_INVALID_HANDLER == gu8CurrFileHandlerID) || (NULL == pfHFDReadCb)) goto EXIT;
|
||||
s8Ret = hif_send(M2M_REQ_GROUP_OTA, M2M_OTA_REQ_HOST_FILE_READ, (uint8 *) &FileBlock, sizeof(FileBlockDescriptor), NULL, 0, 0);
|
||||
|
||||
if(M2M_SUCCESS == s8Ret)
|
||||
gpfHFDReadCb = pfHFDReadCb;
|
||||
EXIT:
|
||||
return s8Ret;
|
||||
}
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API m2m_ota_host_file_read_spi(uint8 u8Handler, uint8 *pu8Buff, uint32 u32Offset, uint32 u32Size);
|
||||
@brief
|
||||
Read a certain amount of bytes from a file in WINC's Flash using SPI transfer.
|
||||
|
||||
@param[in] u8Handler
|
||||
ID of the file we are trying to read from. Must be valid.
|
||||
|
||||
@param[in] pu8Buff
|
||||
Pointer to a buffer to store the data being read. Must be valid.
|
||||
|
||||
@param[in] u32Offset
|
||||
Offset from start of the file to read from (in bytes).
|
||||
|
||||
@param[in] u32Size
|
||||
The amount of data to read (in Bytes).
|
||||
|
||||
@return
|
||||
Status of the read operation
|
||||
|
||||
@warning 1. Before using m2m_ota_host_file_read_spi, the WINC needs to be put in a special
|
||||
mode to allow for a safe access to the Flash. This can be done by calling
|
||||
@ref m2m_wifi_download_mode or @ref m2m_wifi_reinit_hold before trying to read.
|
||||
|
||||
2. This functionality is only supported from WINC release 19.6.0 onwards.
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_host_file_read_spi(uint8 u8Handler, uint8 *pu8Buff, uint32 u32Offset, uint32 u32Size)
|
||||
{
|
||||
static uint32 u32FlashHFDStart = 0;
|
||||
static uint32 u32FlashHFDSize = 0;
|
||||
sint8 s8Ret = M2M_ERR_INVALID_ARG;
|
||||
if((u8Handler != gu8CurrFileHandlerID) || (HFD_INVALID_HANDLER == gu8CurrFileHandlerID) || (NULL == pu8Buff)) goto EXIT;
|
||||
|
||||
if(WIFI_STATE_INIT != m2m_wifi_get_state())
|
||||
{
|
||||
s8Ret = M2M_ERR_FAIL;
|
||||
M2M_ERR("WINC is not in an appropriate state for this operation!\n");
|
||||
goto EXIT;
|
||||
}
|
||||
|
||||
if((u32FlashHFDStart == 0) || (u32FlashHFDSize == 0))
|
||||
{
|
||||
s8Ret = spi_flexible_flash_find_section(ENTRY_ID_HOSTFILE, &u32FlashHFDStart, &u32FlashHFDSize);
|
||||
if(M2M_SUCCESS != s8Ret) goto EXIT;
|
||||
}
|
||||
|
||||
if((u32Offset >= u32FlashHFDSize) ||
|
||||
(u32Size > u32FlashHFDSize) ||
|
||||
((u32Offset + u32Size) >= u32FlashHFDSize))
|
||||
{
|
||||
s8Ret = M2M_ERR_FAIL;
|
||||
goto EXIT;
|
||||
}
|
||||
|
||||
s8Ret = spi_flash_read(pu8Buff, u32FlashHFDStart + FLASH_SECTOR_SZ + u32Offset, u32Size);
|
||||
|
||||
if(M2M_SUCCESS != s8Ret)
|
||||
M2M_ERR("Unable to read SPI Flash\n");
|
||||
|
||||
EXIT:
|
||||
return s8Ret;
|
||||
}
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
NMI_API m2m_ota_host_file_erase(uint8 u8Handler, tpfFileEraseCb pfHFDEraseCb);
|
||||
@brief
|
||||
Erase any traces of an existing file, this means from host driver and WINC firmware.
|
||||
|
||||
@param[in] u8Handler
|
||||
ID of the file we are trying to erase. Must be valid.
|
||||
|
||||
@param[in] pfHFDEraseCb
|
||||
Pointer to callback to execute when the file erase in the WINC completes.
|
||||
|
||||
@return
|
||||
Status of the erase operation
|
||||
|
||||
@note Providing a callback is optional.
|
||||
If the current handler is invalid at this point, it means one of the three:
|
||||
1. The file never existed;
|
||||
2. The file has already been already deleted;
|
||||
3. The request to get the file hasn't fully completed.
|
||||
For 1. and 2. there is no need to signal the WINC to erase the file in Flash.
|
||||
For 3. the Flash can't be erased while a file download is ongoing.
|
||||
|
||||
@warning This functionality is only supported from WINC release 19.6.0 onwards.
|
||||
*/
|
||||
NMI_API sint8 m2m_ota_host_file_erase(uint8 u8Handler, tpfFileEraseCb pfHFDEraseCb)
|
||||
{
|
||||
sint8 s8Ret = M2M_ERR_INVALID;
|
||||
if((u8Handler != gu8CurrFileHandlerID) || (HFD_INVALID_HANDLER == gu8CurrFileHandlerID)) goto EXIT;
|
||||
|
||||
gu8CurrFileHandlerID = HFD_INVALID_HANDLER;
|
||||
gpfHFDReadCb = NULL;
|
||||
gpfHFDEraseCb = pfHFDEraseCb;
|
||||
|
||||
s8Ret = hif_send(M2M_REQ_GROUP_OTA, M2M_OTA_REQ_HOST_FILE_ERASE, NULL, 0, NULL, 0, 0);
|
||||
EXIT:
|
||||
return s8Ret;
|
||||
}
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief NMC1500 Peripherials Application Interface.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -48,6 +41,8 @@ INCLUDES
|
||||
#include "driver/include/nmasic.h"
|
||||
#include "driver/include/m2m_hif.h"
|
||||
|
||||
#ifdef CONF_PERIPH
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
MACROS
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
@ -129,25 +124,21 @@ sint8 m2m_periph_gpio_get_val(uint8 u8GpioNum, uint8 * pu8GpioVal)
|
||||
|
||||
sint8 m2m_periph_gpio_pullup_ctrl(uint8 u8GpioNum, uint8 u8PullupEn)
|
||||
{
|
||||
/* TBD */
|
||||
return M2M_SUCCESS;
|
||||
}
|
||||
|
||||
sint8 m2m_periph_i2c_master_init(tstrI2cMasterInitParam * param)
|
||||
{
|
||||
/* TBD */
|
||||
return M2M_SUCCESS;
|
||||
}
|
||||
|
||||
sint8 m2m_periph_i2c_master_write(uint8 u8SlaveAddr, uint8 * pu8Buf, uint16 u16BufLen, uint8 flags)
|
||||
{
|
||||
/* TBD */
|
||||
return M2M_SUCCESS;
|
||||
}
|
||||
|
||||
sint8 m2m_periph_i2c_master_read(uint8 u8SlaveAddr, uint8 * pu8Buf, uint16 u16BufLen, uint16 * pu16ReadLen, uint8 flags)
|
||||
{
|
||||
/* TBD */
|
||||
return M2M_SUCCESS;
|
||||
}
|
||||
|
||||
@ -156,3 +147,4 @@ sint8 m2m_periph_pullup_ctrl(uint32 pinmask, uint8 enable)
|
||||
{
|
||||
return pullup_ctrl(pinmask, enable);
|
||||
}
|
||||
#endif /* CONF_PERIPH */
|
||||
|
||||
409
src/winc1500/src/m2m_ssl.c
Normal file
409
src/winc1500/src/m2m_ssl.c
Normal file
@ -0,0 +1,409 @@
|
||||
/**
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief This module contains M2M Wi-Fi SSL APIs implementation.
|
||||
*
|
||||
* Copyright (c) 2017-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
INCLUDES
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
#include "driver/include/m2m_ssl.h"
|
||||
#include "driver/include/m2m_hif.h"
|
||||
#include "driver/include/nmasic.h"
|
||||
#define min(a,b) \
|
||||
({ __typeof__ (a) _a = (a); \
|
||||
__typeof__ (b) _b = (b); \
|
||||
_a < _b ? _a : _b; })
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
MACROS
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
DATA TYPES
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
static tpfAppSSLCb gpfAppSSLCb = NULL;
|
||||
static uint32 gu32HIFAddr = 0;
|
||||
static tenuTlsFlashStatus genuStatus = TLS_FLASH_ERR_UNKNOWN;
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
FUNCTION PROTOTYPES
|
||||
*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
|
||||
|
||||
/*!
|
||||
@fn \ m2m_ssl_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
|
||||
@brief SSL callback function
|
||||
@param [in] u8OpCode
|
||||
HIF Opcode type.
|
||||
@param [in] u16DataSize
|
||||
HIF data length.
|
||||
@param [in] u32Addr
|
||||
HIF address.
|
||||
*/
|
||||
static void m2m_ssl_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
|
||||
{
|
||||
sint8 s8tmp = M2M_SUCCESS;
|
||||
switch(u8OpCode)
|
||||
{
|
||||
case M2M_SSL_REQ_ECC:
|
||||
{
|
||||
tstrEccReqInfo strEccREQ;
|
||||
s8tmp = hif_receive(u32Addr, (uint8*)&strEccREQ, sizeof(tstrEccReqInfo), 0);
|
||||
if(s8tmp == M2M_SUCCESS)
|
||||
{
|
||||
if (gpfAppSSLCb)
|
||||
{
|
||||
gu32HIFAddr = u32Addr + sizeof(tstrEccReqInfo);
|
||||
gpfAppSSLCb(M2M_SSL_REQ_ECC, &strEccREQ);
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
case M2M_SSL_RESP_SET_CS_LIST:
|
||||
{
|
||||
tstrSslSetActiveCsList strCsList;
|
||||
s8tmp = hif_receive(u32Addr, (uint8*)&strCsList, sizeof(tstrSslSetActiveCsList), 0);
|
||||
if(s8tmp == M2M_SUCCESS)
|
||||
{
|
||||
if (gpfAppSSLCb)
|
||||
gpfAppSSLCb(M2M_SSL_RESP_SET_CS_LIST, &strCsList);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case M2M_SSL_RESP_WRITE_OWN_CERTS:
|
||||
{
|
||||
tstrTlsSrvChunkHdr strTlsSrvChunkRsp;
|
||||
uint8 bCallApp = 1;
|
||||
|
||||
s8tmp = hif_receive(u32Addr, (uint8*)&strTlsSrvChunkRsp, sizeof(tstrTlsSrvChunkHdr), 0);
|
||||
if(s8tmp == M2M_SUCCESS)
|
||||
{
|
||||
uint16 offset = strTlsSrvChunkRsp.u16Offset32;
|
||||
uint16 chunk_size = strTlsSrvChunkRsp.u16Size32;
|
||||
uint16 total_size = strTlsSrvChunkRsp.u16TotalSize32;
|
||||
tenuTlsFlashStatus status = (tenuTlsFlashStatus)(strTlsSrvChunkRsp.u16Sig);
|
||||
|
||||
/* If first chunk, reset status. */
|
||||
if (offset == 0)
|
||||
genuStatus = TLS_FLASH_OK_NO_CHANGE;
|
||||
/* Only send status to app when processing last chunk. */
|
||||
if (offset + chunk_size != total_size)
|
||||
bCallApp = 0;
|
||||
|
||||
switch (status)
|
||||
{
|
||||
case TLS_FLASH_OK:
|
||||
// Good flash write. Update status if no errors yet.
|
||||
if (genuStatus == TLS_FLASH_OK_NO_CHANGE)
|
||||
genuStatus = status;
|
||||
break;
|
||||
case TLS_FLASH_OK_NO_CHANGE:
|
||||
// No change, don't update status.
|
||||
break;
|
||||
case TLS_FLASH_ERR_CORRUPT:
|
||||
// Corrupt. Always update status.
|
||||
genuStatus = status;
|
||||
break;
|
||||
case TLS_FLASH_ERR_NO_CHANGE:
|
||||
// Failed flash write. Update status if no more serious error.
|
||||
if ((genuStatus != TLS_FLASH_ERR_CORRUPT) && (genuStatus != TLS_FLASH_ERR_UNKNOWN))
|
||||
genuStatus = status;
|
||||
break;
|
||||
default:
|
||||
// Don't expect any other case. Ensure we don't mask a previous corrupt error.
|
||||
if (genuStatus != TLS_FLASH_ERR_CORRUPT)
|
||||
genuStatus = TLS_FLASH_ERR_UNKNOWN;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (bCallApp && gpfAppSSLCb)
|
||||
gpfAppSSLCb(M2M_SSL_RESP_WRITE_OWN_CERTS, &genuStatus);
|
||||
}
|
||||
break;
|
||||
}
|
||||
if(s8tmp != M2M_SUCCESS)
|
||||
{
|
||||
M2M_ERR("Error receiving SSL from the HIF\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*!
|
||||
@fn \ m2m_ssl_handshake_rsp(tstrEccReqInfo* strECCResp, uint8* pu8RspDataBuff, uint16 u16RspDataSz)
|
||||
@brief Sends ECC responses to the WINC
|
||||
@param [in] strECCResp
|
||||
ECC Response struct.
|
||||
@param [in] pu8RspDataBuffe
|
||||
Pointer of the response data to be sent.
|
||||
@param [in] u16RspDataSz
|
||||
Response data size.
|
||||
@return The function SHALL return 0 for success and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ssl_handshake_rsp(tstrEccReqInfo* strECCResp, uint8* pu8RspDataBuff, uint16 u16RspDataSz)
|
||||
{
|
||||
sint8 s8Ret = M2M_SUCCESS;
|
||||
|
||||
s8Ret = hif_send(M2M_REQ_GROUP_SSL, (M2M_SSL_RESP_ECC | M2M_REQ_DATA_PKT), (uint8*)strECCResp, sizeof(tstrEccReqInfo), pu8RspDataBuff, u16RspDataSz, sizeof(tstrEccReqInfo));
|
||||
|
||||
return s8Ret;
|
||||
}
|
||||
|
||||
/*!
|
||||
@fn \ m2m_ssl_send_certs_to_winc(uint8* sector_buffer, uint32 sector_size)
|
||||
@brief Sends certificates to the WINC
|
||||
@param [in] pu8Buffer
|
||||
Pointer to the certificates.
|
||||
@param [in] u32BufferSz
|
||||
Size of the certificates.
|
||||
@return The function SHALL return 0 for success and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ssl_send_certs_to_winc(uint8* pu8Buffer, uint32 u32BufferSz)
|
||||
{
|
||||
sint8 s8Ret = M2M_SUCCESS;
|
||||
#define TXLIMIT (256 * 6)
|
||||
|
||||
if(u32BufferSz <= TXLIMIT)
|
||||
{
|
||||
// set chunk header for one chunk
|
||||
tstrTlsSrvChunkHdr *pchkhdr = (tstrTlsSrvChunkHdr *)pu8Buffer;
|
||||
pchkhdr->u16Sig = TLS_CERTS_CHUNKED_SIG_VALUE;
|
||||
pchkhdr->u16TotalSize32 = (u32BufferSz + 3) >> 2;
|
||||
pchkhdr->u16Offset32 = 0;
|
||||
pchkhdr->u16Size32 = (u32BufferSz + 3) >> 2;
|
||||
s8Ret = hif_send(M2M_REQ_GROUP_SSL, (M2M_SSL_REQ_WRITE_OWN_CERTS | M2M_REQ_DATA_PKT), NULL, 0, pu8Buffer, u32BufferSz, 0);
|
||||
M2M_INFO("Transferred %lu bytes of cert data NON-CHUNKED\n", u32BufferSz);
|
||||
}
|
||||
else
|
||||
{
|
||||
// chunk it
|
||||
// We are sneaking in a header - tstrTlsSrvChunkHdr
|
||||
#define CHUNKHDRSZ (sizeof(tstrTlsSrvChunkHdr))
|
||||
#define CHUNKSZ (TXLIMIT - 256) // divisible by 4
|
||||
uint8 saveblob[CHUNKHDRSZ];
|
||||
uint32 ofs = 0;
|
||||
uint32 thischunksz = 0;
|
||||
|
||||
// first is special - over writing our header
|
||||
m2m_memcpy(saveblob, &pu8Buffer[ofs], CHUNKHDRSZ);
|
||||
thischunksz = min(CHUNKSZ,u32BufferSz-ofs); // no need to round up to quad words this time
|
||||
|
||||
tstrTlsSrvChunkHdr* pchkhdr = (tstrTlsSrvChunkHdr*)&pu8Buffer[ofs];
|
||||
pchkhdr->u16Sig = TLS_CERTS_CHUNKED_SIG_VALUE;
|
||||
pchkhdr->u16TotalSize32 = ((u32BufferSz + 3) >> 2);
|
||||
pchkhdr->u16Offset32 = ((ofs + 3) >> 2);
|
||||
pchkhdr->u16Size32 = ((thischunksz + 3) >> 2);
|
||||
s8Ret = hif_send(M2M_REQ_GROUP_SSL, (M2M_SSL_REQ_WRITE_OWN_CERTS | M2M_REQ_DATA_PKT), NULL, 0, &pu8Buffer[ofs], thischunksz, 0);
|
||||
M2M_INFO("Transferred %lu bytes of cert data CHUNKED to offset %lu total %lu\n", thischunksz, ofs, u32BufferSz);
|
||||
m2m_memcpy(&pu8Buffer[ofs], saveblob, CHUNKHDRSZ);
|
||||
ofs += thischunksz;
|
||||
|
||||
while (ofs < u32BufferSz)
|
||||
{
|
||||
// Subsequent chunks write header before and send a little more
|
||||
m2m_memcpy(saveblob, &pu8Buffer[ofs-CHUNKHDRSZ], CHUNKHDRSZ);
|
||||
thischunksz = min(CHUNKSZ,u32BufferSz-ofs);
|
||||
thischunksz = (thischunksz + 3) & 0xFFFFFFFC; // needs to round up to quad word length
|
||||
pchkhdr = (tstrTlsSrvChunkHdr*)&pu8Buffer[ofs - CHUNKHDRSZ];
|
||||
pchkhdr->u16Sig = TLS_CERTS_CHUNKED_SIG_VALUE;
|
||||
pchkhdr->u16TotalSize32 = ((u32BufferSz + 3) >> 2);
|
||||
pchkhdr->u16Offset32 = ((ofs + 3) >> 2);
|
||||
pchkhdr->u16Size32 = ((thischunksz + 3) >> 2);
|
||||
s8Ret = hif_send(M2M_REQ_GROUP_SSL, (M2M_SSL_REQ_WRITE_OWN_CERTS | M2M_REQ_DATA_PKT), NULL, 0, &pu8Buffer[ofs - CHUNKHDRSZ], thischunksz + CHUNKHDRSZ, 0);
|
||||
M2M_INFO("Transferred %lu bytes of cert data CHUNKED to offset %lu total %lu\n", thischunksz, ofs, u32BufferSz);
|
||||
m2m_memcpy(&pu8Buffer[ofs - CHUNKHDRSZ], saveblob, CHUNKHDRSZ);
|
||||
ofs += thischunksz;
|
||||
}
|
||||
}
|
||||
|
||||
return s8Ret;
|
||||
}
|
||||
|
||||
/*!
|
||||
@fn \ m2m_ssl_retrieve_cert(uint32 u32ReadAddr, uint16* pu16CurveType, uint8* pu8Hash, uint8* pu8Sig, tstrECPoint* pu8Key)
|
||||
@brief Retrieve the certificate to be verified from the WINC
|
||||
@param [in] pu16CurveType
|
||||
Pointer to the certificate curve type.
|
||||
@param [in] pu8Hash
|
||||
Pointer to the certificate hash.
|
||||
@param [in] pu8Sig
|
||||
Pointer to the certificate signature.
|
||||
@param [in] pu8Key
|
||||
Pointer to the certificate Key.
|
||||
@return The function SHALL return 0 for success and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ssl_retrieve_cert(uint16* pu16CurveType, uint8* pu8Hash, uint8* pu8Sig, tstrECPoint* pu8Key)
|
||||
{
|
||||
uint8 bSetRxDone = 1;
|
||||
uint16 u16HashSz, u16SigSz, u16KeySz;
|
||||
sint8 s8Ret = M2M_SUCCESS;
|
||||
|
||||
if(gu32HIFAddr == 0) return M2M_ERR_FAIL;
|
||||
|
||||
if(hif_receive(gu32HIFAddr, (uint8*)pu16CurveType, 2, 0) != M2M_SUCCESS) goto __ERR;
|
||||
gu32HIFAddr += 2;
|
||||
|
||||
if(hif_receive(gu32HIFAddr, (uint8*)&u16KeySz, 2, 0) != M2M_SUCCESS) goto __ERR;
|
||||
gu32HIFAddr += 2;
|
||||
|
||||
if(hif_receive(gu32HIFAddr, (uint8*)&u16HashSz, 2, 0) != M2M_SUCCESS) goto __ERR;
|
||||
gu32HIFAddr += 2;
|
||||
|
||||
if(hif_receive(gu32HIFAddr, (uint8*)&u16SigSz, 2, 0) != M2M_SUCCESS) goto __ERR;
|
||||
gu32HIFAddr += 2;
|
||||
|
||||
(*pu16CurveType)= _htons((*pu16CurveType));
|
||||
pu8Key->u16Size = _htons(u16KeySz);
|
||||
u16HashSz = _htons(u16HashSz);
|
||||
u16SigSz = _htons(u16SigSz);
|
||||
|
||||
if(hif_receive(gu32HIFAddr, pu8Key->X, pu8Key->u16Size * 2, 0) != M2M_SUCCESS) goto __ERR;
|
||||
gu32HIFAddr += (pu8Key->u16Size * 2);
|
||||
|
||||
if(hif_receive(gu32HIFAddr, pu8Hash, u16HashSz, 0) != M2M_SUCCESS) goto __ERR;
|
||||
gu32HIFAddr += u16HashSz;
|
||||
|
||||
if(hif_receive(gu32HIFAddr, pu8Sig, u16SigSz, 0) != M2M_SUCCESS) goto __ERR;
|
||||
gu32HIFAddr += u16SigSz;
|
||||
|
||||
bSetRxDone = 0;
|
||||
|
||||
__ERR:
|
||||
if(bSetRxDone)
|
||||
{
|
||||
s8Ret = M2M_ERR_FAIL;
|
||||
hif_receive(0, NULL, 0, 1);
|
||||
}
|
||||
return s8Ret;
|
||||
}
|
||||
|
||||
/*!
|
||||
@fn \ m2m_ssl_retrieve_hash(uint32 u32ReadAddr, uint8* pu8Hash, uint16 u16HashSz)
|
||||
@brief Retrieve the certificate hash
|
||||
@param [in] pu8Hash
|
||||
Pointer to the certificate hash.
|
||||
@param [in] u16HashSz
|
||||
Hash size.
|
||||
@return The function SHALL return 0 for success and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ssl_retrieve_hash(uint8* pu8Hash, uint16 u16HashSz)
|
||||
{
|
||||
uint8 bSetRxDone = 1;
|
||||
sint8 s8Ret = M2M_SUCCESS;
|
||||
|
||||
if(gu32HIFAddr == 0) return M2M_ERR_FAIL;
|
||||
|
||||
if(hif_receive(gu32HIFAddr, pu8Hash, u16HashSz, 0) != M2M_SUCCESS) goto __ERR;
|
||||
|
||||
bSetRxDone = 0;
|
||||
|
||||
__ERR:
|
||||
if(bSetRxDone)
|
||||
{
|
||||
s8Ret = M2M_ERR_FAIL;
|
||||
hif_receive(0, NULL, 0, 1);
|
||||
}
|
||||
return s8Ret;
|
||||
}
|
||||
|
||||
/*!
|
||||
@fn \ m2m_ssl_stop_processing_certs(void)
|
||||
@brief Stops receiving from the HIF
|
||||
*/
|
||||
NMI_API void m2m_ssl_stop_processing_certs(void)
|
||||
{
|
||||
hif_receive(0, NULL, 0, 1);
|
||||
}
|
||||
|
||||
/*!
|
||||
@fn \ m2m_ssl_ecc_process_done(void)
|
||||
@brief Stops receiving from the HIF
|
||||
*/
|
||||
NMI_API void m2m_ssl_ecc_process_done(void)
|
||||
{
|
||||
gu32HIFAddr = 0;
|
||||
}
|
||||
|
||||
/*!
|
||||
@fn \
|
||||
m2m_ssl_set_active_ciphersuites(uint32 u32SslCsBMP);
|
||||
Override the default Active SSL ciphers in the SSL module with a certain combination selected by the caller in the form of
|
||||
a bitmap containing the required ciphers to be on.
|
||||
There is no need to call this function if the application will not change the default ciphersuites.
|
||||
|
||||
@param [in] u32SslCsBMP
|
||||
Bitmap containing the desired ciphers to be enabled for the SSL module. The ciphersuites are defined in
|
||||
@ref SSLCipherSuiteID.
|
||||
The default ciphersuites are all ciphersuites supported by the firmware with the exception of ECC ciphersuites.
|
||||
The caller can override the default with any desired combination, except for combinations involving both RSA
|
||||
and ECC; if any RSA ciphersuite is enabled, then firmware will disable all ECC ciphersuites.
|
||||
If u32SslCsBMP does not contain any ciphersuites supported by firmware, then the current active list will not
|
||||
be changed.
|
||||
|
||||
@return
|
||||
- [SOCK_ERR_NO_ERROR](@ref SOCK_ERR_NO_ERROR)
|
||||
- [SOCK_ERR_INVALID_ARG](@ref SOCK_ERR_INVALID_ARG)
|
||||
*/
|
||||
sint8 m2m_ssl_set_active_ciphersuites(uint32 u32SslCsBMP)
|
||||
{
|
||||
sint8 s8Ret = M2M_SUCCESS;
|
||||
tstrSslSetActiveCsList strCsList;
|
||||
|
||||
strCsList.u32CsBMP = u32SslCsBMP;
|
||||
s8Ret = hif_send(M2M_REQ_GROUP_SSL, M2M_SSL_REQ_SET_CS_LIST, (uint8*)&strCsList, sizeof(tstrSslSetActiveCsList), NULL, 0, 0);
|
||||
|
||||
return s8Ret;
|
||||
}
|
||||
|
||||
/*!
|
||||
@fn \ m2m_ssl_init(tpfAppSslCb pfAppSslCb);
|
||||
@brief Initializes the SSL layer.
|
||||
@param [in] pfAppSslCb
|
||||
Application SSL callback function.
|
||||
@return The function SHALL return 0 for success and a negative value otherwise.
|
||||
*/
|
||||
NMI_API sint8 m2m_ssl_init(tpfAppSSLCb pfAppSSLCb)
|
||||
{
|
||||
sint8 s8Ret = M2M_SUCCESS;
|
||||
|
||||
gpfAppSSLCb = pfAppSSLCb;
|
||||
gu32HIFAddr = 0;
|
||||
genuStatus = TLS_FLASH_ERR_UNKNOWN;
|
||||
|
||||
s8Ret = hif_register_cb(M2M_REQ_GROUP_SSL,m2m_ssl_cb);
|
||||
if (s8Ret != M2M_SUCCESS)
|
||||
{
|
||||
M2M_ERR("hif_register_cb() failed with ret=%d", s8Ret);
|
||||
}
|
||||
return s8Ret;
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains common APIs declarations.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -93,7 +86,7 @@ uint8 m2m_strncmp(uint8 *pcS1, uint8 *pcS2, uint16 u16Len)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Finds the occurance of pcStr in pcIn.
|
||||
/* Finds the occurrence of pcStr in pcIn.
|
||||
If pcStr is part of pcIn it returns a valid pointer to the start of pcStr within pcIn.
|
||||
Otherwise a NULL Pointer is returned.
|
||||
*/
|
||||
|
||||
@ -4,41 +4,33 @@
|
||||
*
|
||||
* \brief This module contains NMC1500 ASIC specific internal APIs.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include STM32_HAL_H
|
||||
#include "common/include/nm_common.h"
|
||||
#include "driver/include/nmbus.h"
|
||||
@ -52,17 +44,23 @@
|
||||
#define NMI_INTR_ENABLE (NMI_INTR_REG_BASE)
|
||||
#define GET_UINT32(X,Y) (X[0+Y] + ((uint32)X[1+Y]<<8) + ((uint32)X[2+Y]<<16) +((uint32)X[3+Y]<<24))
|
||||
|
||||
#define TIMEOUT (2000)
|
||||
#define M2M_DISABLE_PS (0xd0ul)
|
||||
/*SPI and I2C only*/
|
||||
#define CORT_HOST_COMM (0x10)
|
||||
#define HOST_CORT_COMM (0x0b)
|
||||
#define WAKE_CLK_REG (0x1)
|
||||
#define CLOCKS_EN_REG (0xf)
|
||||
|
||||
static uint32 clk_status_reg_adr = 0xf; /* Assume initially it is B0 chip */
|
||||
|
||||
|
||||
#define TIMEOUT (0x2000ul)
|
||||
#define WAKUP_TRAILS_TIMEOUT (4)
|
||||
|
||||
sint8 chip_apply_conf(uint32 u32Conf)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
uint32 val32 = u32Conf;
|
||||
|
||||
#ifdef __ENABLE_PMU__
|
||||
#if (defined __ENABLE_PMU__) || (defined CONF_WINC_INT_PMU)
|
||||
val32 |= rHAVE_USE_PMU_BIT;
|
||||
#endif
|
||||
#ifdef __ENABLE_SLEEP_CLK_SRC_RTC__
|
||||
@ -79,6 +77,11 @@ sint8 chip_apply_conf(uint32 u32Conf)
|
||||
#ifdef __DISABLE_FIRMWARE_LOGS__
|
||||
val32 |= rHAVE_LOGS_DISABLED_BIT;
|
||||
#endif
|
||||
#if defined CONF_WINC_XO_XTALGM2_DIS
|
||||
val32 |= rHAVE_XO_XTALGM2_DIS_BIT;
|
||||
#endif
|
||||
|
||||
val32 |= rHAVE_RESERVED1_BIT;
|
||||
do {
|
||||
nm_write_reg(rNMI_GP_REG_1, val32);
|
||||
if(val32 != 0) {
|
||||
@ -95,179 +98,68 @@ sint8 chip_apply_conf(uint32 u32Conf)
|
||||
|
||||
return M2M_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn nm_clkless_wake
|
||||
* @brief Wakeup the chip using clockless registers
|
||||
* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
* @author Samer Sarhan
|
||||
* @date 06 June 2014
|
||||
* @version 1.0
|
||||
*/
|
||||
sint8 nm_clkless_wake(void)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
uint32 reg, clk_status_reg,trials = 0;
|
||||
/* wait 1ms, spi data read */
|
||||
nm_bsp_sleep(1);
|
||||
ret = nm_read_reg_with_ret(0x1, ®);
|
||||
if(ret != M2M_SUCCESS) {
|
||||
M2M_ERR("Bus error (1). Wake up failed\n");
|
||||
goto _WAKE_EXIT;
|
||||
}
|
||||
/*
|
||||
* At this point, I am not sure whether it is B0 or A0
|
||||
* If B0, then clks_enabled bit exists in register 0xf
|
||||
* If A0, then clks_enabled bit exists in register 0xe
|
||||
*/
|
||||
do
|
||||
{
|
||||
/* Set bit 1 */
|
||||
nm_write_reg(0x1, reg | (1 << 1));
|
||||
/* wait 1ms, spi data read */
|
||||
nm_bsp_sleep(1);
|
||||
// Check the clock status
|
||||
ret = nm_read_reg_with_ret(clk_status_reg_adr, &clk_status_reg);
|
||||
if( (ret != M2M_SUCCESS) || ((ret == M2M_SUCCESS) && (clk_status_reg == 0)) ) {
|
||||
/* Register 0xf did not exist in A0.
|
||||
* If register 0xf fails to read or if it reads 0,
|
||||
* then the chip is A0.
|
||||
*/
|
||||
clk_status_reg_adr = 0xe;
|
||||
/* wait 1ms, spi data read */
|
||||
nm_bsp_sleep(1);
|
||||
ret = nm_read_reg_with_ret(clk_status_reg_adr, &clk_status_reg);
|
||||
|
||||
/* Aelmeleh 24-08-2015*/
|
||||
/* Check for C3000 rev. D0 value */
|
||||
if( (ret != M2M_SUCCESS) || ((ret == M2M_SUCCESS) && (clk_status_reg == 0)) ) {
|
||||
|
||||
clk_status_reg_adr = 0x13;
|
||||
/* wait 1ms, spi data read */
|
||||
nm_bsp_sleep(1);
|
||||
ret = nm_read_reg_with_ret(clk_status_reg_adr, &clk_status_reg);
|
||||
|
||||
if(ret != M2M_SUCCESS) {
|
||||
M2M_ERR("Bus error (2). Wake up failed\n");
|
||||
goto _WAKE_EXIT;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// in case of clocks off, wait 2ms, and check it again.
|
||||
// if still off, wait for another 2ms, for a total wait of 6ms.
|
||||
// If still off, redo the wake up sequence
|
||||
while( ((clk_status_reg & 0x4) == 0) && (((++trials) %3) == 0))
|
||||
{
|
||||
/* Wait for the chip to stabilize*/
|
||||
nm_bsp_sleep(2);
|
||||
|
||||
// Make sure chip is awake. This is an extra step that can be removed
|
||||
// later to avoid the bus access overhead
|
||||
nm_read_reg_with_ret(clk_status_reg_adr, &clk_status_reg);
|
||||
|
||||
if((clk_status_reg & 0x4) == 0)
|
||||
{
|
||||
M2M_ERR("clocks still OFF. Wake up failed\n");
|
||||
}
|
||||
}
|
||||
// in case of failure, Reset the wakeup bit to introduce a new edge on the next loop
|
||||
if((clk_status_reg & 0x4) == 0)
|
||||
{
|
||||
// Reset bit 0
|
||||
nm_write_reg(0x1, reg | (1 << 1));
|
||||
}
|
||||
} while((clk_status_reg & 0x4) == 0);
|
||||
|
||||
_WAKE_EXIT:
|
||||
return ret;
|
||||
}
|
||||
void chip_idle(void)
|
||||
{
|
||||
uint32 reg =0;
|
||||
nm_read_reg_with_ret(0x1, ®);
|
||||
if(reg&0x2)
|
||||
uint32 reg = 0;
|
||||
nm_read_reg_with_ret(WAKE_CLK_REG, ®);
|
||||
if(reg & NBIT1)
|
||||
{
|
||||
reg &=~(1 << 1);
|
||||
nm_write_reg(0x1, reg);
|
||||
reg &=~ NBIT1;
|
||||
nm_write_reg(WAKE_CLK_REG, reg);
|
||||
}
|
||||
}
|
||||
|
||||
void enable_rf_blocks(void)
|
||||
{
|
||||
nm_write_reg(0x6, 0xdb);
|
||||
nm_write_reg(0x7, 0x6);
|
||||
nm_bsp_sleep(10);
|
||||
nm_write_reg(0x1480, 0);
|
||||
nm_write_reg(0x1484, 0);
|
||||
nm_bsp_sleep(10);
|
||||
|
||||
nm_write_reg(0x6, 0x0);
|
||||
nm_write_reg(0x7, 0x0);
|
||||
}
|
||||
|
||||
sint8 enable_interrupts(void)
|
||||
{
|
||||
uint32 reg;
|
||||
sint8 ret;
|
||||
uint32 reg = 0;
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
/**
|
||||
interrupt pin mux select
|
||||
**/
|
||||
ret = nm_read_reg_with_ret(NMI_PIN_MUX_0, ®);
|
||||
if (M2M_SUCCESS != ret) {
|
||||
return M2M_ERR_BUS_FAIL;
|
||||
}
|
||||
if (M2M_SUCCESS != ret) goto ERR1;
|
||||
|
||||
reg |= ((uint32) 1 << 8);
|
||||
ret = nm_write_reg(NMI_PIN_MUX_0, reg);
|
||||
if (M2M_SUCCESS != ret) {
|
||||
return M2M_ERR_BUS_FAIL;
|
||||
}
|
||||
if (M2M_SUCCESS != ret) goto ERR1;
|
||||
|
||||
/**
|
||||
interrupt enable
|
||||
**/
|
||||
ret = nm_read_reg_with_ret(NMI_INTR_ENABLE, ®);
|
||||
if (M2M_SUCCESS != ret) {
|
||||
return M2M_ERR_BUS_FAIL;
|
||||
}
|
||||
if (M2M_SUCCESS != ret) goto ERR1;
|
||||
|
||||
reg |= ((uint32) 1 << 16);
|
||||
ret = nm_write_reg(NMI_INTR_ENABLE, reg);
|
||||
if (M2M_SUCCESS != ret) {
|
||||
return M2M_ERR_BUS_FAIL;
|
||||
}
|
||||
return M2M_SUCCESS;
|
||||
if (M2M_SUCCESS != ret) goto ERR1;
|
||||
ERR1:
|
||||
return ret;
|
||||
}
|
||||
|
||||
sint8 cpu_start(void) {
|
||||
uint32 reg;
|
||||
uint32 reg = 0;
|
||||
sint8 ret;
|
||||
|
||||
/**
|
||||
reset regs
|
||||
*/
|
||||
nm_write_reg(BOOTROM_REG,0);
|
||||
nm_write_reg(NMI_STATE_REG,0);
|
||||
nm_write_reg(NMI_REV_REG,0);
|
||||
|
||||
ret = nm_write_reg(BOOTROM_REG,0);
|
||||
ret += nm_write_reg(NMI_STATE_REG,0);
|
||||
ret += nm_write_reg(NMI_REV_REG,0);
|
||||
/**
|
||||
Go...
|
||||
**/
|
||||
ret = nm_read_reg_with_ret(0x1118, ®);
|
||||
if (M2M_SUCCESS != ret) {
|
||||
ret = M2M_ERR_BUS_FAIL;
|
||||
M2M_ERR("[nmi start]: fail read reg 0x1118 ...\n");
|
||||
}
|
||||
ret += nm_read_reg_with_ret(0x1118, ®);
|
||||
reg |= (1 << 0);
|
||||
ret = nm_write_reg(0x1118, reg);
|
||||
ret = nm_write_reg(0x150014, 0x1);
|
||||
ret += nm_write_reg(0x1118, reg);
|
||||
ret += nm_read_reg_with_ret(NMI_GLB_RESET_0, ®);
|
||||
if ((reg & (1ul << 10)) == (1ul << 10)) {
|
||||
reg &= ~(1ul << 10);
|
||||
ret += nm_write_reg(NMI_GLB_RESET_0, reg);
|
||||
}
|
||||
|
||||
reg |= (1ul << 10);
|
||||
ret += nm_write_reg(NMI_GLB_RESET_0, reg);
|
||||
nm_bsp_sleep(1); /* TODO: Why bus error if this delay is not here. */
|
||||
nm_bsp_sleep(1);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -277,7 +169,7 @@ uint32 nmi_get_chipid(void)
|
||||
|
||||
if (chipid == 0) {
|
||||
uint32 rfrevid;
|
||||
|
||||
|
||||
if((nm_read_reg_with_ret(0x1000, &chipid)) != M2M_SUCCESS) {
|
||||
chipid = 0;
|
||||
return 0;
|
||||
@ -302,12 +194,12 @@ uint32 nmi_get_chipid(void)
|
||||
} else /* if(rfrevid == 5) */ { /* 1002B2 */
|
||||
chipid = 0x1002b2;
|
||||
}
|
||||
} else if(chipid == 0x1000F0) {
|
||||
}else if(chipid == 0x1000F0) {
|
||||
if((nm_read_reg_with_ret(0x3B0000, &chipid)) != M2M_SUCCESS) {
|
||||
chipid = 0;
|
||||
return 0;
|
||||
}
|
||||
} else {
|
||||
}else {
|
||||
|
||||
}
|
||||
//#define PROBE_FLASH
|
||||
@ -379,79 +271,143 @@ void nmi_set_sys_clk_src_to_xo(void)
|
||||
/* Do PLL update */
|
||||
nmi_update_pll();
|
||||
}
|
||||
static uint8 check_3000_id(void)
|
||||
sint8 chip_sleep(void)
|
||||
{
|
||||
return ((nmi_get_chipid() & (0xf00000)) == 0x300000);
|
||||
}
|
||||
uint32 reg;
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
|
||||
while(1)
|
||||
{
|
||||
ret = nm_read_reg_with_ret(CORT_HOST_COMM,®);
|
||||
if(ret != M2M_SUCCESS) goto ERR1;
|
||||
if((reg & NBIT0) == 0) break;
|
||||
}
|
||||
|
||||
/* Clear bit 1 */
|
||||
ret = nm_read_reg_with_ret(WAKE_CLK_REG, ®);
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
if(reg & NBIT1)
|
||||
{
|
||||
reg &=~NBIT1;
|
||||
ret = nm_write_reg(WAKE_CLK_REG, reg);
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
}
|
||||
|
||||
ret = nm_read_reg_with_ret(HOST_CORT_COMM, ®);
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
if(reg & NBIT0)
|
||||
{
|
||||
reg &= ~NBIT0;
|
||||
ret = nm_write_reg(HOST_CORT_COMM, reg);
|
||||
if(ret != M2M_SUCCESS)goto ERR1;
|
||||
}
|
||||
|
||||
ERR1:
|
||||
return ret;
|
||||
}
|
||||
sint8 chip_wake(void)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
ret = nm_clkless_wake();
|
||||
if(ret != M2M_SUCCESS) return ret;
|
||||
if(!check_3000_id())
|
||||
{
|
||||
enable_rf_blocks();
|
||||
}
|
||||
|
||||
uint32 reg = 0, clk_status_reg = 0,trials = 0;
|
||||
|
||||
ret = nm_read_reg_with_ret(HOST_CORT_COMM, ®);
|
||||
if(ret != M2M_SUCCESS)goto _WAKE_EXIT;
|
||||
|
||||
if(!(reg & NBIT0))
|
||||
{
|
||||
/*USE bit 0 to indicate host wakeup*/
|
||||
ret = nm_write_reg(HOST_CORT_COMM, reg|NBIT0);
|
||||
if(ret != M2M_SUCCESS)goto _WAKE_EXIT;
|
||||
}
|
||||
|
||||
ret = nm_read_reg_with_ret(WAKE_CLK_REG, ®);
|
||||
if(ret != M2M_SUCCESS)goto _WAKE_EXIT;
|
||||
/* Set bit 1 */
|
||||
if(!(reg & NBIT1))
|
||||
{
|
||||
ret = nm_write_reg(WAKE_CLK_REG, reg | NBIT1);
|
||||
if(ret != M2M_SUCCESS) goto _WAKE_EXIT;
|
||||
}
|
||||
|
||||
do
|
||||
{
|
||||
ret = nm_read_reg_with_ret(CLOCKS_EN_REG, &clk_status_reg);
|
||||
if(ret != M2M_SUCCESS) {
|
||||
M2M_ERR("Bus error (5).%d %lx\n",ret,clk_status_reg);
|
||||
goto _WAKE_EXIT;
|
||||
}
|
||||
if(clk_status_reg & NBIT2) {
|
||||
break;
|
||||
}
|
||||
nm_bsp_sleep(2);
|
||||
trials++;
|
||||
if(trials > WAKUP_TRAILS_TIMEOUT)
|
||||
{
|
||||
M2M_ERR("Failed to wake up the chip\n");
|
||||
ret = M2M_ERR_TIME_OUT;
|
||||
goto _WAKE_EXIT;
|
||||
}
|
||||
}while(1);
|
||||
|
||||
/*workaround sometimes spi fail to read clock regs after reading/writing clockless registers*/
|
||||
nm_bus_reset();
|
||||
|
||||
_WAKE_EXIT:
|
||||
return ret;
|
||||
}
|
||||
sint8 cpu_halt(void)
|
||||
{
|
||||
sint8 ret;
|
||||
uint32 reg = 0;
|
||||
ret = nm_read_reg_with_ret(0x1118, ®);
|
||||
reg |= (1 << 0);
|
||||
ret += nm_write_reg(0x1118, reg);
|
||||
ret += nm_read_reg_with_ret(NMI_GLB_RESET_0, ®);
|
||||
if ((reg & (1ul << 10)) == (1ul << 10)) {
|
||||
reg &= ~(1ul << 10);
|
||||
ret += nm_write_reg(NMI_GLB_RESET_0, reg);
|
||||
ret += nm_read_reg_with_ret(NMI_GLB_RESET_0, ®);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
sint8 chip_reset_and_cpu_halt(void)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
uint32 reg = 0;
|
||||
|
||||
/*Wakeup needed only for I2C interface*/
|
||||
ret = chip_wake();
|
||||
if(ret != M2M_SUCCESS) {
|
||||
return ret;
|
||||
}
|
||||
if(!check_3000_id())
|
||||
{
|
||||
chip_reset();
|
||||
ret = nm_read_reg_with_ret(0x1118, ®);
|
||||
if (M2M_SUCCESS != ret) {
|
||||
ret = M2M_ERR_BUS_FAIL;
|
||||
M2M_ERR("[nmi start]: fail read reg 0x1118 ...\n");
|
||||
}
|
||||
reg |= (1 << 0);
|
||||
ret = nm_write_reg(0x1118, reg);
|
||||
ret += nm_read_reg_with_ret(NMI_GLB_RESET_0, ®);
|
||||
if ((reg & (1ul << 10)) == (1ul << 10)) {
|
||||
reg &= ~(1ul << 10);
|
||||
ret += nm_write_reg(NMI_GLB_RESET_0, reg);
|
||||
ret += nm_read_reg_with_ret(NMI_GLB_RESET_0, ®);
|
||||
}
|
||||
nm_write_reg(BOOTROM_REG,0);
|
||||
nm_write_reg(NMI_STATE_REG,0);
|
||||
nm_write_reg(NMI_REV_REG,0);
|
||||
nm_write_reg(NMI_PIN_MUX_0, 0x11111000);
|
||||
}
|
||||
if(ret != M2M_SUCCESS) goto ERR1;
|
||||
/*Reset and CPU halt need for no wait board only*/
|
||||
ret = chip_reset();
|
||||
if(ret != M2M_SUCCESS) goto ERR1;
|
||||
ret = cpu_halt();
|
||||
if(ret != M2M_SUCCESS) goto ERR1;
|
||||
ERR1:
|
||||
return ret;
|
||||
}
|
||||
sint8 chip_reset(void)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
#ifndef CONF_WINC_USE_UART
|
||||
nmi_set_sys_clk_src_to_xo();
|
||||
#endif
|
||||
ret += nm_write_reg(NMI_GLB_RESET_0, 0);
|
||||
ret = nm_write_reg(NMI_GLB_RESET_0, 0);
|
||||
nm_bsp_sleep(50);
|
||||
#ifndef CONF_WINC_USE_UART
|
||||
restore_pmu_settings_after_global_reset();
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
sint8 wait_for_bootrom(uint8 arg)
|
||||
{
|
||||
uint32 u32GpReg1 = 0;
|
||||
uint32 reg = 0, cnt = 0;
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
uint32 reg = 0, cnt = 0;
|
||||
uint32 u32GpReg1 = 0;
|
||||
uint32 u32DriverVerInfo = M2M_MAKE_VERSION_INFO(M2M_RELEASE_VERSION_MAJOR_NO,\
|
||||
M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO,\
|
||||
M2M_MIN_REQ_DRV_VERSION_MAJOR_NO, M2M_MIN_REQ_DRV_VERSION_MINOR_NO,\
|
||||
M2M_MIN_REQ_DRV_VERSION_PATCH_NO);
|
||||
|
||||
|
||||
reg = 0;
|
||||
uint32_t timeout = 1000;
|
||||
uint32_t start = HAL_GetTick();
|
||||
while (1) {
|
||||
while(1) {
|
||||
reg = nm_read_reg(0x1014); /* wait for efuse loading done */
|
||||
if (reg & 0x80000000) {
|
||||
break;
|
||||
@ -492,19 +448,19 @@ sint8 wait_for_bootrom(uint8 arg)
|
||||
nm_write_reg(NMI_STATE_REG, 0);
|
||||
}else if(M2M_WIFI_MODE_ETHERNET == arg){
|
||||
u32GpReg1 = rHAVE_ETHERNET_MODE_BIT;
|
||||
nm_write_reg(NMI_STATE_REG, u32DriverVerInfo);
|
||||
} else {
|
||||
/*bypass this step*/
|
||||
nm_write_reg(NMI_STATE_REG, u32DriverVerInfo);
|
||||
}
|
||||
|
||||
if(REV(nmi_get_chipid()) == REV_3A0)
|
||||
{
|
||||
if(REV(nmi_get_chipid()) >= REV_3A0){
|
||||
chip_apply_conf(u32GpReg1 | rHAVE_USE_PMU_BIT);
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
chip_apply_conf(u32GpReg1);
|
||||
}
|
||||
|
||||
M2M_INFO("DriverVerInfo: 0x%08lx\n",u32DriverVerInfo);
|
||||
|
||||
nm_write_reg(BOOTROM_REG,M2M_START_FIRMWARE);
|
||||
|
||||
#ifdef __ROM_TEST__
|
||||
@ -533,7 +489,6 @@ sint8 wait_for_firmware_start(uint8 arg)
|
||||
|
||||
while (checkValue != reg)
|
||||
{
|
||||
|
||||
nm_bsp_sleep(2); /* TODO: Why bus error if this delay is not here. */
|
||||
M2M_DBG("%x %x %x\n",(unsigned int)nm_read_reg(0x108c),(unsigned int)nm_read_reg(0x108c),(unsigned int)nm_read_reg(0x14A0));
|
||||
reg = nm_read_reg(regAddress);
|
||||
@ -556,7 +511,6 @@ sint8 chip_deinit(void)
|
||||
{
|
||||
uint32 reg = 0;
|
||||
sint8 ret;
|
||||
uint8 timeout = 10;
|
||||
|
||||
/**
|
||||
stop the firmware, need a re-download
|
||||
@ -564,36 +518,21 @@ sint8 chip_deinit(void)
|
||||
ret = nm_read_reg_with_ret(NMI_GLB_RESET_0, ®);
|
||||
if (ret != M2M_SUCCESS) {
|
||||
M2M_ERR("failed to de-initialize\n");
|
||||
goto ERR1;
|
||||
}
|
||||
reg &= ~(1 << 10);
|
||||
ret = nm_write_reg(NMI_GLB_RESET_0, reg);
|
||||
|
||||
if (ret != M2M_SUCCESS) {
|
||||
M2M_ERR("Error while writing reg\n");
|
||||
return ret;
|
||||
M2M_ERR("failed to de-initialize\n");
|
||||
goto ERR1;
|
||||
}
|
||||
|
||||
do {
|
||||
ret = nm_read_reg_with_ret(NMI_GLB_RESET_0, ®);
|
||||
if (ret != M2M_SUCCESS) {
|
||||
M2M_ERR("Error while reading reg\n");
|
||||
return ret;
|
||||
}
|
||||
/*Workaround to ensure that the chip is actually reset*/
|
||||
if ((reg & (1 << 10))) {
|
||||
M2M_DBG("Bit 10 not reset retry %d\n", timeout);
|
||||
reg &= ~(1 << 10);
|
||||
ret = nm_write_reg(NMI_GLB_RESET_0, reg);
|
||||
timeout--;
|
||||
} else {
|
||||
break;
|
||||
}
|
||||
|
||||
} while (timeout);
|
||||
|
||||
ERR1:
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef CONF_PERIPH
|
||||
|
||||
sint8 set_gpio_dir(uint8 gpio, uint8 dir)
|
||||
{
|
||||
uint32 val32;
|
||||
@ -669,6 +608,7 @@ sint8 pullup_ctrl(uint32 pinmask, uint8 enable)
|
||||
_EXIT:
|
||||
return s8Ret;
|
||||
}
|
||||
#endif /* CONF_PERIPH */
|
||||
|
||||
sint8 nmi_get_otp_mac_address(uint8 *pu8MacAddr, uint8 * pu8IsValid)
|
||||
{
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains NMC1000 bus APIs implementation.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -59,7 +52,6 @@ sint8 nm_bus_iface_init(void *pvInitVal)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
ret = nm_bus_init(pvInitVal);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -79,6 +71,26 @@ sint8 nm_bus_iface_deinit(void)
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn nm_bus_reset
|
||||
* @brief reset bus interface
|
||||
* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
* @version 1.0
|
||||
*/
|
||||
sint8 nm_bus_reset(void)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
#ifdef CONF_WINC_USE_UART
|
||||
#elif defined (CONF_WINC_USE_SPI)
|
||||
return nm_spi_reset();
|
||||
#elif defined (CONF_WINC_USE_I2C)
|
||||
#else
|
||||
#error "Please define bus usage"
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @fn nm_bus_iface_reconfigure
|
||||
* @brief reconfigure bus interface
|
||||
@ -114,7 +126,7 @@ uint32 nm_read_reg(uint32 u32Addr)
|
||||
#elif defined (CONF_WINC_USE_I2C)
|
||||
return nm_i2c_read_reg(u32Addr);
|
||||
#else
|
||||
#error "Plesae define bus usage"
|
||||
#error "Please define bus usage"
|
||||
#endif
|
||||
|
||||
}
|
||||
@ -140,7 +152,7 @@ sint8 nm_read_reg_with_ret(uint32 u32Addr, uint32* pu32RetVal)
|
||||
#elif defined (CONF_WINC_USE_I2C)
|
||||
return nm_i2c_read_reg_with_ret(u32Addr,pu32RetVal);
|
||||
#else
|
||||
#error "Plesae define bus usage"
|
||||
#error "Please define bus usage"
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -165,7 +177,7 @@ sint8 nm_write_reg(uint32 u32Addr, uint32 u32Val)
|
||||
#elif defined (CONF_WINC_USE_I2C)
|
||||
return nm_i2c_write_reg(u32Addr,u32Val);
|
||||
#else
|
||||
#error "Plesae define bus usage"
|
||||
#error "Please define bus usage"
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -178,7 +190,7 @@ static sint8 p_nm_read_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
|
||||
#elif defined (CONF_WINC_USE_I2C)
|
||||
return nm_i2c_read_block(u32Addr,puBuf,u16Sz);
|
||||
#else
|
||||
#error "Plesae define bus usage"
|
||||
#error "Please define bus usage"
|
||||
#endif
|
||||
|
||||
}
|
||||
@ -195,7 +207,7 @@ static sint8 p_nm_read_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
|
||||
* @author M. Abdelmawla
|
||||
* @date 11 July 2012
|
||||
* @version 1.0
|
||||
*/
|
||||
*/
|
||||
sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
|
||||
{
|
||||
uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz - MAX_TRX_CFG_SZ;
|
||||
@ -206,7 +218,7 @@ sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
|
||||
{
|
||||
if(u32Sz <= u16MaxTrxSz)
|
||||
{
|
||||
s8Ret += p_nm_read_block(u32Addr, &puBuf[off], (uint16)u32Sz);
|
||||
s8Ret += p_nm_read_block(u32Addr, &puBuf[off], (uint16)u32Sz);
|
||||
break;
|
||||
}
|
||||
else
|
||||
@ -231,7 +243,7 @@ static sint8 p_nm_write_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
|
||||
#elif defined (CONF_WINC_USE_I2C)
|
||||
return nm_i2c_write_block(u32Addr,puBuf,u16Sz);
|
||||
#else
|
||||
#error "Plesae define bus usage"
|
||||
#error "Please define bus usage"
|
||||
#endif
|
||||
|
||||
}
|
||||
@ -248,7 +260,7 @@ static sint8 p_nm_write_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
|
||||
* @author M. Abdelmawla
|
||||
* @date 11 July 2012
|
||||
* @version 1.0
|
||||
*/
|
||||
*/
|
||||
sint8 nm_write_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
|
||||
{
|
||||
uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz - MAX_TRX_CFG_SZ;
|
||||
@ -259,7 +271,7 @@ sint8 nm_write_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
|
||||
{
|
||||
if(u32Sz <= u16MaxTrxSz)
|
||||
{
|
||||
s8Ret += p_nm_write_block(u32Addr, &puBuf[off], (uint16)u32Sz);
|
||||
s8Ret += p_nm_write_block(u32Addr, &puBuf[off], (uint16)u32Sz);
|
||||
break;
|
||||
}
|
||||
else
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains NMC1000 M2M driver APIs implementation.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -78,9 +71,10 @@ sint8 nm_get_firmware_info(tstrM2mRev* M2mRev)
|
||||
M2mRev->u8FirmwareMinor = M2M_GET_FW_MINOR(reg);
|
||||
M2mRev->u8FirmwarePatch = M2M_GET_FW_PATCH(reg);
|
||||
M2mRev->u32Chipid = nmi_get_chipid();
|
||||
M2mRev->u16FirmwareSvnNum = 0;
|
||||
|
||||
curr_firm_ver = M2M_MAKE_VERSION(M2mRev->u8FirmwareMajor, M2mRev->u8FirmwareMinor,M2mRev->u8FirmwarePatch);
|
||||
curr_drv_ver = M2M_MAKE_VERSION(M2M_DRIVER_VERSION_MAJOR_NO, M2M_DRIVER_VERSION_MINOR_NO, M2M_DRIVER_VERSION_PATCH_NO);
|
||||
curr_drv_ver = M2M_MAKE_VERSION(M2M_RELEASE_VERSION_MAJOR_NO, M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO);
|
||||
min_req_drv_ver = M2M_MAKE_VERSION(M2mRev->u8DriverMajor, M2mRev->u8DriverMinor,M2mRev->u8DriverPatch);
|
||||
if(curr_drv_ver < min_req_drv_ver) {
|
||||
/*The current driver version should be larger or equal
|
||||
@ -125,7 +119,7 @@ sint8 nm_get_firmware_full_info(tstrM2mRev* pstrRev)
|
||||
if(ret == M2M_SUCCESS)
|
||||
{
|
||||
curr_firm_ver = M2M_MAKE_VERSION(pstrRev->u8FirmwareMajor, pstrRev->u8FirmwareMinor,pstrRev->u8FirmwarePatch);
|
||||
curr_drv_ver = M2M_MAKE_VERSION(M2M_DRIVER_VERSION_MAJOR_NO, M2M_DRIVER_VERSION_MINOR_NO, M2M_DRIVER_VERSION_PATCH_NO);
|
||||
curr_drv_ver = M2M_MAKE_VERSION(M2M_RELEASE_VERSION_MAJOR_NO, M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO);
|
||||
min_req_drv_ver = M2M_MAKE_VERSION(pstrRev->u8DriverMajor, pstrRev->u8DriverMinor,pstrRev->u8DriverPatch);
|
||||
if((curr_firm_ver == 0)||(min_req_drv_ver == 0)||(min_req_drv_ver == 0)){
|
||||
ret = M2M_ERR_FAIL;
|
||||
@ -189,7 +183,7 @@ sint8 nm_get_ota_firmware_info(tstrM2mRev* pstrRev)
|
||||
if(ret == M2M_SUCCESS)
|
||||
{
|
||||
curr_firm_ver = M2M_MAKE_VERSION(pstrRev->u8FirmwareMajor, pstrRev->u8FirmwareMinor,pstrRev->u8FirmwarePatch);
|
||||
curr_drv_ver = M2M_MAKE_VERSION(M2M_DRIVER_VERSION_MAJOR_NO, M2M_DRIVER_VERSION_MINOR_NO, M2M_DRIVER_VERSION_PATCH_NO);
|
||||
curr_drv_ver = M2M_MAKE_VERSION(M2M_RELEASE_VERSION_MAJOR_NO, M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO);
|
||||
min_req_drv_ver = M2M_MAKE_VERSION(pstrRev->u8DriverMajor, pstrRev->u8DriverMinor,pstrRev->u8DriverPatch);
|
||||
if((curr_firm_ver == 0)||(min_req_drv_ver == 0)||(min_req_drv_ver == 0)){
|
||||
ret = M2M_ERR_FAIL;
|
||||
@ -206,7 +200,7 @@ sint8 nm_get_ota_firmware_info(tstrM2mRev* pstrRev)
|
||||
}
|
||||
}
|
||||
}else{
|
||||
ret = M2M_ERR_FAIL;
|
||||
ret = M2M_ERR_INVALID;
|
||||
}
|
||||
}
|
||||
}else{
|
||||
@ -232,7 +226,7 @@ EXIT:
|
||||
* @date 10 Oct 2014
|
||||
* @version 1.0
|
||||
*/
|
||||
sint8 nm_drv_init_download_mode()
|
||||
sint8 nm_drv_init_download_mode(void)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
|
||||
@ -243,11 +237,13 @@ sint8 nm_drv_init_download_mode()
|
||||
}
|
||||
|
||||
/**
|
||||
reset the chip and halt the cpu in case of no wait efuse is set.
|
||||
TODO:reset the chip and halt the cpu in case of no wait efuse is set (add the no wait effuse check)
|
||||
*/
|
||||
chip_reset_and_cpu_halt();
|
||||
|
||||
|
||||
if(!ISNMC3000(GET_CHIPID()))
|
||||
{
|
||||
/*Execute that function only for 1500A/B, no room in 3000, but it may be needed in 3400 no wait*/
|
||||
chip_reset_and_cpu_halt();
|
||||
}
|
||||
|
||||
#ifdef CONF_WINC_USE_SPI
|
||||
/* Must do this after global reset to set SPI data packet size. */
|
||||
@ -263,29 +259,9 @@ ERR1:
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* @fn nm_drv_init
|
||||
* @brief Initialize NMC1000 driver
|
||||
* @return M2M_SUCCESS in case of success and Negative error code in case of failure
|
||||
* @param [in] arg
|
||||
* Generic argument
|
||||
* @author M. Abdelmawla
|
||||
* @date 15 July 2012
|
||||
* @version 1.0
|
||||
*/
|
||||
sint8 nm_drv_init(void * arg)
|
||||
sint8 nm_drv_init_hold(void)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
uint8 u8Mode;
|
||||
|
||||
if(NULL != arg) {
|
||||
u8Mode = *((uint8 *)arg);
|
||||
if((u8Mode < M2M_WIFI_MODE_NORMAL)||(u8Mode >= M2M_WIFI_MODE_MAX)) {
|
||||
u8Mode = M2M_WIFI_MODE_NORMAL;
|
||||
}
|
||||
} else {
|
||||
u8Mode = M2M_WIFI_MODE_NORMAL;
|
||||
}
|
||||
|
||||
ret = nm_bus_iface_init(NULL);
|
||||
if (M2M_SUCCESS != ret) {
|
||||
@ -297,10 +273,9 @@ sint8 nm_drv_init(void * arg)
|
||||
return;
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef NO_HW_CHIP_EN
|
||||
ret = chip_wake();
|
||||
nm_bsp_sleep(10);
|
||||
|
||||
if (M2M_SUCCESS != ret) {
|
||||
M2M_ERR("[nmi start]: fail chip_wakeup\n");
|
||||
goto ERR2;
|
||||
@ -318,15 +293,28 @@ sint8 nm_drv_init(void * arg)
|
||||
/* Must do this after global reset to set SPI data packet size. */
|
||||
nm_spi_init();
|
||||
#endif
|
||||
#ifdef NO_HW_CHIP_EN
|
||||
/*return power save to default value*/
|
||||
chip_idle();
|
||||
|
||||
ret = cpu_start();
|
||||
if (M2M_SUCCESS != ret) {
|
||||
goto ERR2;
|
||||
}
|
||||
return ret;
|
||||
#ifdef NO_HW_CHIP_EN
|
||||
ERR2:
|
||||
nm_bus_iface_deinit();
|
||||
#endif
|
||||
ERR1:
|
||||
return ret;
|
||||
}
|
||||
|
||||
sint8 nm_drv_init_start(void * arg)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
uint8 u8Mode = M2M_WIFI_MODE_NORMAL;
|
||||
|
||||
if(NULL != arg) {
|
||||
u8Mode = *((uint8 *)arg);
|
||||
if((u8Mode < M2M_WIFI_MODE_NORMAL)||(u8Mode >= M2M_WIFI_MODE_MAX)) {
|
||||
u8Mode = M2M_WIFI_MODE_NORMAL;
|
||||
}
|
||||
}
|
||||
|
||||
ret = wait_for_bootrom(u8Mode);
|
||||
if (M2M_SUCCESS != ret) {
|
||||
goto ERR2;
|
||||
@ -348,14 +336,39 @@ sint8 nm_drv_init(void * arg)
|
||||
M2M_ERR("failed to enable interrupts..\n");
|
||||
goto ERR2;
|
||||
}
|
||||
|
||||
|
||||
return ret;
|
||||
ERR2:
|
||||
nm_bus_iface_deinit();
|
||||
#ifdef CONF_WINC_USE_SPI
|
||||
nm_spi_deinit();
|
||||
#endif
|
||||
ERR1:
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* @fn nm_drv_init
|
||||
* @brief Initialize NMC1000 driver
|
||||
* @return M2M_SUCCESS in case of success and Negative error code in case of failure
|
||||
* @param [in] arg
|
||||
* Generic argument
|
||||
* @author M. Abdelmawla
|
||||
* @date 15 July 2012
|
||||
* @version 1.0
|
||||
*/
|
||||
sint8 nm_drv_init(void * arg)
|
||||
{
|
||||
sint8 ret = M2M_SUCCESS;
|
||||
|
||||
ret = nm_drv_init_hold();
|
||||
|
||||
if(ret == M2M_SUCCESS)
|
||||
ret = nm_drv_init_start(arg);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* @fn nm_drv_deinit
|
||||
* @brief Deinitialize NMC1000 driver
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains NMC1000 I2C protocol bus APIs implementation.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains NMC1000 SPI protocol bus APIs implementation.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -62,6 +55,7 @@
|
||||
#define NMI_SPI_TX_MODE (NMI_SPI_REG_BASE+0x20)
|
||||
#define NMI_SPI_PROTOCOL_CONFIG (NMI_SPI_REG_BASE+0x24)
|
||||
#define NMI_SPI_INTR_CTL (NMI_SPI_REG_BASE+0x2c)
|
||||
#define NMI_SPI_MISC_CTRL (NMI_SPI_REG_BASE+0x48)
|
||||
|
||||
#define NMI_SPI_PROTOCOL_OFFSET (NMI_SPI_PROTOCOL_CONFIG-NMI_SPI_REG_BASE)
|
||||
|
||||
@ -84,6 +78,8 @@
|
||||
#define N_RESET -1
|
||||
#define N_RETRY -2
|
||||
|
||||
#define SPI_RESP_RETRY_COUNT (10)
|
||||
#define SPI_RETRY_COUNT (10)
|
||||
#define DATA_PKT_SZ_256 256
|
||||
#define DATA_PKT_SZ_512 512
|
||||
#define DATA_PKT_SZ_1K 1024
|
||||
@ -110,7 +106,16 @@ static sint8 nmi_spi_write(uint8* b, uint16 sz)
|
||||
spi.u16Sz = sz;
|
||||
return nm_bus_ioctl(NM_BUS_IOCTL_RW, &spi);
|
||||
}
|
||||
|
||||
#ifndef USE_OLD_SPI_SW
|
||||
static sint8 nmi_spi_rw(uint8 *bin,uint8* bout,uint16 sz)
|
||||
{
|
||||
tstrNmSpiRw spi;
|
||||
spi.pu8InBuf = bin;
|
||||
spi.pu8OutBuf = bout;
|
||||
spi.u16Sz = sz;
|
||||
return nm_bus_ioctl(NM_BUS_IOCTL_RW, &spi);
|
||||
}
|
||||
#endif
|
||||
/********************************************
|
||||
|
||||
Crc7
|
||||
@ -171,6 +176,25 @@ static uint8 crc7(uint8 crc, const uint8 *buffer, uint32 len)
|
||||
|
||||
********************************************/
|
||||
|
||||
#define CMD_DMA_WRITE 0xc1
|
||||
#define CMD_DMA_READ 0xc2
|
||||
#define CMD_INTERNAL_WRITE 0xc3
|
||||
#define CMD_INTERNAL_READ 0xc4
|
||||
#define CMD_TERMINATE 0xc5
|
||||
#define CMD_REPEAT 0xc6
|
||||
#define CMD_DMA_EXT_WRITE 0xc7
|
||||
#define CMD_DMA_EXT_READ 0xc8
|
||||
#define CMD_SINGLE_WRITE 0xc9
|
||||
#define CMD_SINGLE_READ 0xca
|
||||
#define CMD_RESET 0xcf
|
||||
|
||||
#define DATA_PKT_SZ_256 256
|
||||
#define DATA_PKT_SZ_512 512
|
||||
#define DATA_PKT_SZ_1K 1024
|
||||
#define DATA_PKT_SZ_4K (4 * 1024)
|
||||
#define DATA_PKT_SZ_8K (8 * 1024)
|
||||
#define DATA_PKT_SZ DATA_PKT_SZ_8K
|
||||
|
||||
static sint8 spi_cmd(uint8 cmd, uint32 adr, uint32 u32data, uint32 sz,uint8 clockless)
|
||||
{
|
||||
uint8 bc[9];
|
||||
@ -269,6 +293,34 @@ static sint8 spi_cmd(uint8 cmd, uint32 adr, uint32 u32data, uint32 sz,uint8 cloc
|
||||
return result;
|
||||
}
|
||||
|
||||
static sint8 spi_data_rsp(uint8 cmd)
|
||||
{
|
||||
uint8 len;
|
||||
uint8 rsp[3];
|
||||
sint8 result = N_OK;
|
||||
|
||||
if (!gu8Crc_off)
|
||||
len = 2;
|
||||
else
|
||||
len = 3;
|
||||
|
||||
if (M2M_SUCCESS != nmi_spi_read(&rsp[0], len)) {
|
||||
M2M_ERR("[nmi spi]: Failed bus error...\n");
|
||||
result = N_FAIL;
|
||||
goto _fail_;
|
||||
}
|
||||
|
||||
if((rsp[len-1] != 0)||(rsp[len-2] != 0xC3))
|
||||
{
|
||||
M2M_ERR("[nmi spi]: Failed data response read, %x %x %x\n",rsp[0],rsp[1],rsp[2]);
|
||||
result = N_FAIL;
|
||||
goto _fail_;
|
||||
}
|
||||
_fail_:
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static sint8 spi_cmd_rsp(uint8 cmd)
|
||||
{
|
||||
uint8 rsp;
|
||||
@ -288,7 +340,7 @@ static sint8 spi_cmd_rsp(uint8 cmd)
|
||||
}
|
||||
|
||||
/* wait for response */
|
||||
s8RetryCnt = 10;
|
||||
s8RetryCnt = SPI_RESP_RETRY_COUNT;
|
||||
do
|
||||
{
|
||||
if (M2M_SUCCESS != nmi_spi_read(&rsp, 1)) {
|
||||
@ -302,7 +354,7 @@ static sint8 spi_cmd_rsp(uint8 cmd)
|
||||
State response
|
||||
**/
|
||||
/* wait for response */
|
||||
s8RetryCnt = 10;
|
||||
s8RetryCnt = SPI_RESP_RETRY_COUNT;
|
||||
do
|
||||
{
|
||||
if (M2M_SUCCESS != nmi_spi_read(&rsp, 1)) {
|
||||
@ -316,7 +368,372 @@ _fail_:
|
||||
|
||||
return result;
|
||||
}
|
||||
#ifndef USE_OLD_SPI_SW
|
||||
static int spi_cmd_complete(uint8_t cmd, uint32_t adr, uint8_t *b, uint32_t sz, uint8_t clockless)
|
||||
{
|
||||
uint8_t wb[32], rb[32];
|
||||
uint8_t wix, rix;
|
||||
uint32_t len2;
|
||||
uint8_t rsp;
|
||||
int len = 0;
|
||||
int result = N_OK;
|
||||
|
||||
wb[0] = cmd;
|
||||
switch (cmd) {
|
||||
case CMD_SINGLE_READ: /* single word (4 bytes) read */
|
||||
wb[1] = (uint8_t)(adr >> 16);
|
||||
wb[2] = (uint8_t)(adr >> 8);
|
||||
wb[3] = (uint8_t)adr;
|
||||
len = 5;
|
||||
break;
|
||||
case CMD_INTERNAL_READ: /* internal register read */
|
||||
wb[1] = (uint8_t)(adr >> 8);
|
||||
if(clockless == 1) wb[1] |= (1 << 7);
|
||||
wb[2] = (uint8_t)adr;
|
||||
wb[3] = 0x00;
|
||||
len = 5;
|
||||
break;
|
||||
case CMD_TERMINATE: /* termination */
|
||||
wb[1] = 0x00;
|
||||
wb[2] = 0x00;
|
||||
wb[3] = 0x00;
|
||||
len = 5;
|
||||
break;
|
||||
case CMD_REPEAT: /* repeat */
|
||||
wb[1] = 0x00;
|
||||
wb[2] = 0x00;
|
||||
wb[3] = 0x00;
|
||||
len = 5;
|
||||
break;
|
||||
case CMD_RESET: /* reset */
|
||||
wb[1] = 0xff;
|
||||
wb[2] = 0xff;
|
||||
wb[3] = 0xff;
|
||||
len = 5;
|
||||
break;
|
||||
case CMD_DMA_WRITE: /* dma write */
|
||||
case CMD_DMA_READ: /* dma read */
|
||||
wb[1] = (uint8_t)(adr >> 16);
|
||||
wb[2] = (uint8_t)(adr >> 8);
|
||||
wb[3] = (uint8_t)adr;
|
||||
wb[4] = (uint8_t)(sz >> 8);
|
||||
wb[5] = (uint8_t)(sz);
|
||||
len = 7;
|
||||
break;
|
||||
case CMD_DMA_EXT_WRITE: /* dma extended write */
|
||||
case CMD_DMA_EXT_READ: /* dma extended read */
|
||||
wb[1] = (uint8_t)(adr >> 16);
|
||||
wb[2] = (uint8_t)(adr >> 8);
|
||||
wb[3] = (uint8_t)adr;
|
||||
wb[4] = (uint8_t)(sz >> 16);
|
||||
wb[5] = (uint8_t)(sz >> 8);
|
||||
wb[6] = (uint8_t)(sz);
|
||||
len = 8;
|
||||
break;
|
||||
case CMD_INTERNAL_WRITE: /* internal register write */
|
||||
wb[1] = (uint8_t)(adr >> 8);
|
||||
if(clockless == 1) wb[1] |= (1 << 7);
|
||||
wb[2] = (uint8_t)(adr);
|
||||
wb[3] = b[3];
|
||||
wb[4] = b[2];
|
||||
wb[5] = b[1];
|
||||
wb[6] = b[0];
|
||||
len = 8;
|
||||
break;
|
||||
case CMD_SINGLE_WRITE: /* single word write */
|
||||
wb[1] = (uint8_t)(adr >> 16);
|
||||
wb[2] = (uint8_t)(adr >> 8);
|
||||
wb[3] = (uint8_t)(adr);
|
||||
wb[4] = b[3];
|
||||
wb[5] = b[2];
|
||||
wb[6] = b[1];
|
||||
wb[7] = b[0];
|
||||
len = 9;
|
||||
break;
|
||||
default:
|
||||
result = N_FAIL;
|
||||
break;
|
||||
}
|
||||
|
||||
if (result != N_OK) {
|
||||
return result;
|
||||
}
|
||||
|
||||
if (!gu8Crc_off) {
|
||||
wb[len-1] = (crc7(0x7f, (const uint8_t *)&wb[0], len-1)) << 1;
|
||||
} else {
|
||||
len -=1;
|
||||
}
|
||||
|
||||
#define NUM_SKIP_BYTES (1)
|
||||
#define NUM_RSP_BYTES (2)
|
||||
#define NUM_DATA_HDR_BYTES (1)
|
||||
#define NUM_DATA_BYTES (4)
|
||||
#define NUM_CRC_BYTES (2)
|
||||
#define NUM_DUMMY_BYTES (3)
|
||||
|
||||
if ((cmd == CMD_RESET) ||
|
||||
(cmd == CMD_TERMINATE) ||
|
||||
(cmd == CMD_REPEAT)) {
|
||||
len2 = len + (NUM_SKIP_BYTES + NUM_RSP_BYTES + NUM_DUMMY_BYTES);
|
||||
} else if ((cmd == CMD_INTERNAL_READ) || (cmd == CMD_SINGLE_READ)) {
|
||||
if (!gu8Crc_off) {
|
||||
len2 = len + (NUM_RSP_BYTES + NUM_DATA_HDR_BYTES + NUM_DATA_BYTES
|
||||
+ NUM_CRC_BYTES + NUM_DUMMY_BYTES);
|
||||
} else {
|
||||
len2 = len + (NUM_RSP_BYTES + NUM_DATA_HDR_BYTES + NUM_DATA_BYTES
|
||||
+ NUM_DUMMY_BYTES);
|
||||
}
|
||||
} else {
|
||||
len2 = len + (NUM_RSP_BYTES + NUM_DUMMY_BYTES);
|
||||
}
|
||||
#undef NUM_DUMMY_BYTES
|
||||
|
||||
if(len2 > (sizeof(wb)/sizeof(wb[0]))) {
|
||||
M2M_ERR("[nmi spi]: spi buffer size too small (%d) (%d)\n",
|
||||
len2, (sizeof(wb)/sizeof(wb[0])));
|
||||
result = N_FAIL;
|
||||
return result;
|
||||
}
|
||||
/* zero spi write buffers. */
|
||||
for(wix = len; wix< len2; wix++) {
|
||||
wb[wix] = 0;
|
||||
}
|
||||
rix = len;
|
||||
|
||||
if (nmi_spi_rw(wb, rb, len2) != M2M_SUCCESS) {
|
||||
M2M_ERR("[nmi spi]: Failed cmd write, bus error...\n");
|
||||
result = N_FAIL;
|
||||
return result;
|
||||
}
|
||||
|
||||
#if 0
|
||||
{
|
||||
int jj;
|
||||
printk("--- cnd = %x, len=%d, len2=%d\n", cmd, len, len2);
|
||||
for(jj=0; jj<sizeof(wb)/sizeof(wb[0]); jj++) {
|
||||
|
||||
if(jj >= len2) break;
|
||||
if(((jj+1)%16) != 0) {
|
||||
if((jj%16) == 0) {
|
||||
printk("wb[%02x]: %02x ", jj, wb[jj]);
|
||||
} else {
|
||||
printk("%02x ", wb[jj]);
|
||||
}
|
||||
} else {
|
||||
printk("%02x\n", wb[jj]);
|
||||
}
|
||||
}
|
||||
printk("\n");
|
||||
|
||||
for(jj=0; jj<sizeof(rb)/sizeof(rb[0]); jj++) {
|
||||
|
||||
if(jj >= len2) break;
|
||||
if(((jj+1)%16) != 0) {
|
||||
if((jj%16) == 0) {
|
||||
printk("rb[%02x]: %02x ", jj, rb[jj]);
|
||||
} else {
|
||||
printk("%02x ", rb[jj]);
|
||||
}
|
||||
} else {
|
||||
printk("%02x\n", rb[jj]);
|
||||
}
|
||||
}
|
||||
printk("\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
Command/Control response
|
||||
**/
|
||||
if ((cmd == CMD_RESET) ||
|
||||
(cmd == CMD_TERMINATE) ||
|
||||
(cmd == CMD_REPEAT)) {
|
||||
rix++; /* skip 1 byte */
|
||||
}
|
||||
|
||||
rsp = rb[rix++];
|
||||
|
||||
|
||||
if (rsp != cmd) {
|
||||
M2M_ERR("[nmi spi]: Failed cmd response, cmd (%02x), resp (%02x)\n", cmd, rsp);
|
||||
result = N_FAIL;
|
||||
return result;
|
||||
}
|
||||
|
||||
/**
|
||||
State response
|
||||
**/
|
||||
rsp = rb[rix++];
|
||||
if (rsp != 0x00) {
|
||||
M2M_ERR("[nmi spi]: Failed cmd state response state (%02x)\n", rsp);
|
||||
result = N_FAIL;
|
||||
return result;
|
||||
}
|
||||
|
||||
if ((cmd == CMD_INTERNAL_READ) || (cmd == CMD_SINGLE_READ)
|
||||
|| (cmd == CMD_DMA_READ) || (cmd == CMD_DMA_EXT_READ)) {
|
||||
int retry;
|
||||
//uint16_t crc1, crc2;
|
||||
uint8_t crc[2];
|
||||
/**
|
||||
Data Response header
|
||||
**/
|
||||
retry = SPI_RESP_RETRY_COUNT;
|
||||
do {
|
||||
/* ensure there is room in buffer later to read data and crc */
|
||||
if(rix < len2) {
|
||||
rsp = rb[rix++];
|
||||
} else {
|
||||
retry = 0;
|
||||
break;
|
||||
}
|
||||
if (((rsp >> 4) & 0xf) == 0xf)
|
||||
break;
|
||||
} while (retry--);
|
||||
|
||||
if (retry <= 0) {
|
||||
M2M_ERR("[nmi spi]: Error, data read response (%02x)\n", rsp);
|
||||
result = N_RESET;
|
||||
return result;
|
||||
}
|
||||
|
||||
if ((cmd == CMD_INTERNAL_READ) || (cmd == CMD_SINGLE_READ)) {
|
||||
/**
|
||||
Read bytes
|
||||
**/
|
||||
if((rix+3) < len2) {
|
||||
b[0] = rb[rix++];
|
||||
b[1] = rb[rix++];
|
||||
b[2] = rb[rix++];
|
||||
b[3] = rb[rix++];
|
||||
} else {
|
||||
M2M_ERR("[nmi spi]: buffer overrun when reading data.\n");
|
||||
result = N_FAIL;
|
||||
return result;
|
||||
}
|
||||
|
||||
if (!gu8Crc_off) {
|
||||
/**
|
||||
Read Crc
|
||||
**/
|
||||
if((rix+1) < len2) {
|
||||
crc[0] = rb[rix++];
|
||||
crc[1] = rb[rix++];
|
||||
} else {
|
||||
M2M_ERR("[nmi spi]: buffer overrun when reading crc.\n");
|
||||
result = N_FAIL;
|
||||
return result;
|
||||
}
|
||||
}
|
||||
} else if((cmd == CMD_DMA_READ) || (cmd == CMD_DMA_EXT_READ)) {
|
||||
int ix;
|
||||
|
||||
/* some data may be read in response to dummy bytes. */
|
||||
for(ix=0; (rix < len2) && (ix < sz);) {
|
||||
b[ix++] = rb[rix++];
|
||||
}
|
||||
#if 0
|
||||
if(ix) M2M_INFO("ttt %d %d\n", sz, ix);
|
||||
#endif
|
||||
sz -= ix;
|
||||
|
||||
if(sz > 0) {
|
||||
int nbytes;
|
||||
|
||||
if (sz <= (DATA_PKT_SZ-ix)) {
|
||||
nbytes = sz;
|
||||
} else {
|
||||
nbytes = DATA_PKT_SZ-ix;
|
||||
}
|
||||
|
||||
/**
|
||||
Read bytes
|
||||
**/
|
||||
if (nmi_spi_read(&b[ix], nbytes) != M2M_SUCCESS) {
|
||||
M2M_ERR("[nmi spi]: Failed data block read, bus error...\n");
|
||||
result = N_FAIL;
|
||||
goto _error_;
|
||||
}
|
||||
|
||||
/**
|
||||
Read Crc
|
||||
**/
|
||||
if (!gu8Crc_off) {
|
||||
if (nmi_spi_read(crc, 2) != M2M_SUCCESS) {
|
||||
M2M_ERR("[nmi spi]: Failed data block crc read, bus error...\n");
|
||||
result = N_FAIL;
|
||||
goto _error_;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
ix += nbytes;
|
||||
sz -= nbytes;
|
||||
}
|
||||
|
||||
/* if any data in left unread, then read the rest using normal DMA code.*/
|
||||
while(sz > 0) {
|
||||
int nbytes;
|
||||
|
||||
if (sz <= DATA_PKT_SZ) {
|
||||
nbytes = sz;
|
||||
} else {
|
||||
nbytes = DATA_PKT_SZ;
|
||||
}
|
||||
|
||||
/**
|
||||
read data response only on the next DMA cycles not
|
||||
the first DMA since data response header is already
|
||||
handled above for the first DMA.
|
||||
**/
|
||||
/**
|
||||
Data Response header
|
||||
**/
|
||||
retry = SPI_RESP_RETRY_COUNT;
|
||||
do {
|
||||
if (nmi_spi_read(&rsp, 1) != M2M_SUCCESS) {
|
||||
M2M_ERR("[nmi spi]: Failed data response read, bus error...\n");
|
||||
result = N_FAIL;
|
||||
break;
|
||||
}
|
||||
if (((rsp >> 4) & 0xf) == 0xf)
|
||||
break;
|
||||
} while (retry--);
|
||||
|
||||
if (result == N_FAIL)
|
||||
break;
|
||||
|
||||
|
||||
/**
|
||||
Read bytes
|
||||
**/
|
||||
if (nmi_spi_read(&b[ix], nbytes) != M2M_SUCCESS) {
|
||||
M2M_ERR("[nmi spi]: Failed data block read, bus error...\n");
|
||||
result = N_FAIL;
|
||||
break;
|
||||
}
|
||||
|
||||
/**
|
||||
Read Crc
|
||||
**/
|
||||
if (!gu8Crc_off) {
|
||||
if (nmi_spi_read(crc, 2) != M2M_SUCCESS) {
|
||||
M2M_ERR("[nmi spi]: Failed data block crc read, bus error...\n");
|
||||
result = N_FAIL;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
ix += nbytes;
|
||||
sz -= nbytes;
|
||||
}
|
||||
}
|
||||
}
|
||||
_error_:
|
||||
return result;
|
||||
}
|
||||
#endif
|
||||
static sint8 spi_data_read(uint8 *b, uint16 sz,uint8 clockless)
|
||||
{
|
||||
sint16 retry, ix, nbytes;
|
||||
@ -335,9 +752,9 @@ static sint8 spi_data_read(uint8 *b, uint16 sz,uint8 clockless)
|
||||
nbytes = DATA_PKT_SZ;
|
||||
|
||||
/**
|
||||
Data Respnose header
|
||||
Data Response header
|
||||
**/
|
||||
retry = 10;
|
||||
retry = SPI_RESP_RETRY_COUNT;
|
||||
do {
|
||||
if (M2M_SUCCESS != nmi_spi_read(&rsp, 1)) {
|
||||
M2M_ERR("[nmi spi]: Failed data response read, bus error...\n");
|
||||
@ -468,9 +885,12 @@ static sint8 spi_data_write(uint8 *b, uint16 sz)
|
||||
|
||||
static sint8 spi_write_reg(uint32 addr, uint32 u32data)
|
||||
{
|
||||
uint8 retry = SPI_RETRY_COUNT;
|
||||
sint8 result = N_OK;
|
||||
uint8 cmd = CMD_SINGLE_WRITE;
|
||||
uint8 clockless = 0;
|
||||
|
||||
_RETRY_:
|
||||
if (addr <= 0x30)
|
||||
{
|
||||
/**
|
||||
@ -489,56 +909,71 @@ static sint8 spi_write_reg(uint32 addr, uint32 u32data)
|
||||
result = spi_cmd(cmd, addr, u32data, 4, clockless);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi]: Failed cmd, write reg (%08x)...\n", (unsigned int)addr);
|
||||
return N_FAIL;
|
||||
goto _FAIL_;
|
||||
}
|
||||
|
||||
result = spi_cmd_rsp(cmd);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi]: Failed cmd response, write reg (%08x)...\n", (unsigned int)addr);
|
||||
spi_cmd(CMD_RESET, 0, 0, 0, 0);
|
||||
return N_FAIL;
|
||||
goto _FAIL_;
|
||||
}
|
||||
|
||||
return N_OK;
|
||||
#else
|
||||
|
||||
result = spi_cmd_complete(cmd, addr, (uint8*)&u32data, 4, clockless);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR( "[nmi spi]: Failed cmd, write reg (%08x)...\n", addr);
|
||||
goto _FAIL_;
|
||||
}
|
||||
|
||||
#endif
|
||||
_FAIL_:
|
||||
if(result != N_OK)
|
||||
{
|
||||
nm_bsp_sleep(1);
|
||||
spi_cmd(CMD_RESET, 0, 0, 0, 0);
|
||||
spi_cmd_rsp(CMD_RESET);
|
||||
M2M_ERR("Reset and retry %d %lx %lx\n",retry,addr,u32data);
|
||||
nm_bsp_sleep(1);
|
||||
retry--;
|
||||
if(retry) goto _RETRY_;
|
||||
}
|
||||
|
||||
return result;
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
static sint8 nm_spi_write(uint32 addr, uint8 *buf, uint16 size)
|
||||
{
|
||||
sint8 result;
|
||||
uint8 retry = SPI_RETRY_COUNT;
|
||||
uint8 cmd = CMD_DMA_EXT_WRITE;
|
||||
|
||||
|
||||
_RETRY_:
|
||||
/**
|
||||
Command
|
||||
**/
|
||||
#if defined USE_OLD_SPI_SW
|
||||
//Workaround hardware problem with single byte transfers over SPI bus
|
||||
if (size == 1)
|
||||
size = 2;
|
||||
|
||||
result = spi_cmd(cmd, addr, 0, size,0);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi]: Failed cmd, write block (%08x)...\n", (unsigned int)addr);
|
||||
return N_FAIL;
|
||||
goto _FAIL_;
|
||||
}
|
||||
|
||||
result = spi_cmd_rsp(cmd);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi ]: Failed cmd response, write block (%08x)...\n", (unsigned int)addr);
|
||||
spi_cmd(CMD_RESET, 0, 0, 0, 0);
|
||||
return N_FAIL;
|
||||
goto _FAIL_;
|
||||
}
|
||||
#else
|
||||
result = spi_cmd_complete(cmd, addr, NULL, size, 0);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR( "[nmi spi]: Failed cmd, write block (%08x)...\n", addr);
|
||||
return N_FAIL;
|
||||
goto _FAIL_;
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -548,19 +983,43 @@ static sint8 nm_spi_write(uint32 addr, uint8 *buf, uint16 size)
|
||||
result = spi_data_write(buf, size);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi]: Failed block data write...\n");
|
||||
goto _FAIL_;
|
||||
}
|
||||
/**
|
||||
Data RESP
|
||||
**/
|
||||
result = spi_data_rsp(cmd);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi]: Failed block data write...\n");
|
||||
goto _FAIL_;
|
||||
}
|
||||
|
||||
_FAIL_:
|
||||
if(result != N_OK)
|
||||
{
|
||||
nm_bsp_sleep(1);
|
||||
spi_cmd(CMD_RESET, 0, 0, 0, 0);
|
||||
spi_cmd_rsp(CMD_RESET);
|
||||
M2M_ERR("Reset and retry %d %lx %d\n",retry,addr,size);
|
||||
nm_bsp_sleep(1);
|
||||
retry--;
|
||||
if(retry) goto _RETRY_;
|
||||
}
|
||||
|
||||
return N_OK;
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static sint8 spi_read_reg(uint32 addr, uint32 *u32data)
|
||||
{
|
||||
uint8 retry = SPI_RETRY_COUNT;
|
||||
sint8 result = N_OK;
|
||||
uint8 cmd = CMD_SINGLE_READ;
|
||||
uint8 tmp[4];
|
||||
uint8 clockless = 0;
|
||||
|
||||
_RETRY_:
|
||||
|
||||
if (addr <= 0xff)
|
||||
{
|
||||
/**
|
||||
@ -579,28 +1038,26 @@ static sint8 spi_read_reg(uint32 addr, uint32 *u32data)
|
||||
result = spi_cmd(cmd, addr, 0, 4, clockless);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi]: Failed cmd, read reg (%08x)...\n", (unsigned int)addr);
|
||||
return N_FAIL;
|
||||
goto _FAIL_;
|
||||
}
|
||||
|
||||
result = spi_cmd_rsp(cmd);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi]: Failed cmd response, read reg (%08x)...\n", (unsigned int)addr);
|
||||
spi_cmd(CMD_RESET, 0, 0, 0, 0);
|
||||
return N_FAIL;
|
||||
goto _FAIL_;
|
||||
}
|
||||
|
||||
/* to avoid endianess issues */
|
||||
/* to avoid endianness issues */
|
||||
result = spi_data_read(&tmp[0], 4, clockless);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi]: Failed data read...\n");
|
||||
spi_cmd(CMD_RESET, 0, 0, 0, 0);
|
||||
return N_FAIL;
|
||||
goto _FAIL_;
|
||||
}
|
||||
#else
|
||||
result = spi_cmd_complete(cmd, addr, (uint8*)&tmp[0], 4, clockless);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR( "[nmi spi]: Failed cmd, read reg (%08x)...\n", addr);
|
||||
return N_FAIL;
|
||||
goto _FAIL_;
|
||||
}
|
||||
|
||||
#endif
|
||||
@ -609,51 +1066,93 @@ static sint8 spi_read_reg(uint32 addr, uint32 *u32data)
|
||||
((uint32)tmp[1] << 8) |
|
||||
((uint32)tmp[2] << 16) |
|
||||
((uint32)tmp[3] << 24);
|
||||
|
||||
return N_OK;
|
||||
|
||||
_FAIL_:
|
||||
if(result != N_OK)
|
||||
{
|
||||
|
||||
nm_bsp_sleep(1);
|
||||
spi_cmd(CMD_RESET, 0, 0, 0, 0);
|
||||
spi_cmd_rsp(CMD_RESET);
|
||||
M2M_ERR("Reset and retry %d %lx\n",retry,addr);
|
||||
nm_bsp_sleep(1);
|
||||
retry--;
|
||||
if(retry) goto _RETRY_;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static sint8 nm_spi_read(uint32 addr, uint8 *buf, uint16 size)
|
||||
{
|
||||
uint8 cmd = CMD_DMA_EXT_READ;
|
||||
sint8 result;
|
||||
uint8 retry = SPI_RETRY_COUNT;
|
||||
#if defined USE_OLD_SPI_SW
|
||||
uint8 tmp[2];
|
||||
uint8 single_byte_workaround = 0;
|
||||
#endif
|
||||
|
||||
_RETRY_:
|
||||
|
||||
/**
|
||||
Command
|
||||
**/
|
||||
#if defined USE_OLD_SPI_SW
|
||||
if (size == 1)
|
||||
{
|
||||
//Workaround hardware problem with single byte transfers over SPI bus
|
||||
size = 2;
|
||||
single_byte_workaround = 1;
|
||||
}
|
||||
result = spi_cmd(cmd, addr, 0, size,0);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi]: Failed cmd, read block (%08x)...\n", (unsigned int)addr);
|
||||
return N_FAIL;
|
||||
goto _FAIL_;
|
||||
}
|
||||
|
||||
result = spi_cmd_rsp(cmd);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi]: Failed cmd response, read block (%08x)...\n", (unsigned int)addr);
|
||||
spi_cmd(CMD_RESET, 0, 0, 0, 0);
|
||||
return N_FAIL;
|
||||
goto _FAIL_;
|
||||
}
|
||||
|
||||
/**
|
||||
Data
|
||||
**/
|
||||
result = spi_data_read(buf, size,0);
|
||||
if (single_byte_workaround)
|
||||
{
|
||||
result = spi_data_read(tmp, size,0);
|
||||
buf[0] = tmp[0];
|
||||
}
|
||||
else
|
||||
result = spi_data_read(buf, size,0);
|
||||
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi]: Failed block data read...\n");
|
||||
spi_cmd(CMD_RESET, 0, 0, 0, 0);
|
||||
return N_FAIL;
|
||||
goto _FAIL_;
|
||||
}
|
||||
#else
|
||||
result = spi_cmd_complete(cmd, addr, buf, size, 0);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi]: Failed cmd, read block (%08x)...\n", addr);
|
||||
return N_FAIL;
|
||||
}
|
||||
result = spi_cmd_complete(cmd, addr, buf, size, 0);
|
||||
if (result != N_OK) {
|
||||
M2M_ERR("[nmi spi]: Failed cmd, read block (%08x)...\n", addr);
|
||||
goto _FAIL_;
|
||||
}
|
||||
#endif
|
||||
|
||||
return N_OK;
|
||||
_FAIL_:
|
||||
if(result != N_OK)
|
||||
{
|
||||
nm_bsp_sleep(1);
|
||||
spi_cmd(CMD_RESET, 0, 0, 0, 0);
|
||||
spi_cmd_rsp(CMD_RESET);
|
||||
M2M_ERR("Reset and retry %d %lx %d\n",retry,addr,size);
|
||||
nm_bsp_sleep(1);
|
||||
retry--;
|
||||
if(retry) goto _RETRY_;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/********************************************
|
||||
@ -682,6 +1181,13 @@ static void spi_init_pkt_sz(void)
|
||||
nm_spi_write_reg(SPI_BASE+0x24, val32);
|
||||
}
|
||||
|
||||
sint8 nm_spi_reset(void)
|
||||
{
|
||||
spi_cmd(CMD_RESET, 0, 0, 0, 0);
|
||||
spi_cmd_rsp(CMD_RESET);
|
||||
return M2M_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
* @fn nm_spi_init
|
||||
* @brief Initialize the SPI
|
||||
@ -693,7 +1199,8 @@ static void spi_init_pkt_sz(void)
|
||||
sint8 nm_spi_init(void)
|
||||
{
|
||||
uint32 chipid;
|
||||
uint32 reg =0;
|
||||
uint32 reg = 0;
|
||||
|
||||
|
||||
/**
|
||||
configure protocol
|
||||
@ -706,9 +1213,9 @@ sint8 nm_spi_init(void)
|
||||
/* Read failed. Try with CRC off. This might happen when module
|
||||
is removed but chip isn't reset*/
|
||||
gu8Crc_off = 1;
|
||||
M2M_ERR("[nmi spi]: Failed internal read protocol with CRC on, retyring with CRC off...\n");
|
||||
M2M_ERR("[nmi spi]: Failed internal read protocol with CRC on, retrying with CRC off...\n");
|
||||
if (!spi_read_reg(NMI_SPI_PROTOCOL_CONFIG, ®)){
|
||||
// Reaad failed with both CRC on and off, something went bad
|
||||
// Read failed with both CRC on and off, something went bad
|
||||
M2M_ERR( "[nmi spi]: Failed internal read protocol...\n");
|
||||
return 0;
|
||||
}
|
||||
@ -742,12 +1249,12 @@ sint8 nm_spi_init(void)
|
||||
|
||||
/*
|
||||
* @fn nm_spi_init
|
||||
* @brief DeInitialize the SPI
|
||||
* @brief DeInitialize the SPI
|
||||
* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
|
||||
* @author Samer Sarhan
|
||||
* @date 27 Feb 2015
|
||||
* @version 1.0
|
||||
*/
|
||||
*/
|
||||
sint8 nm_spi_deinit(void)
|
||||
{
|
||||
gu8Crc_off = 0;
|
||||
|
||||
@ -4,36 +4,29 @@
|
||||
*
|
||||
* \brief This module contains NMC1000 UART protocol bus APIs implementation.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -70,11 +63,12 @@ sint8 nm_uart_sync_cmd(void)
|
||||
sint8 s8Ret = -1;
|
||||
uint8 b [HDR_SZ+1];
|
||||
uint8 rsz;
|
||||
uint8 onchip = 0;
|
||||
uint8 retries = 1;
|
||||
|
||||
/*read reg*/
|
||||
while (retries--)
|
||||
{
|
||||
b[0] = 0x12;
|
||||
|
||||
rsz = 1;
|
||||
strUart.pu8Buf = b;
|
||||
strUart.u16Sz = 1;
|
||||
@ -82,32 +76,43 @@ sint8 nm_uart_sync_cmd(void)
|
||||
if(M2M_SUCCESS == nm_bus_ioctl(NM_BUS_IOCTL_W, &strUart))
|
||||
{
|
||||
strUart.u16Sz = rsz;
|
||||
if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_R, &strUart))
|
||||
{
|
||||
s8Ret = M2M_ERR_BUS_FAIL;
|
||||
}
|
||||
}
|
||||
else
|
||||
b[0] = 0;
|
||||
|
||||
// Pull all chars from buffer, we only care about the last
|
||||
while (M2M_SUCCESS == nm_bus_ioctl(NM_BUS_IOCTL_R, &strUart))
|
||||
{
|
||||
M2M_ERR("failed to send cfg bytes\n");
|
||||
s8Ret = M2M_ERR_BUS_FAIL;
|
||||
strUart.u16Sz = rsz;
|
||||
}
|
||||
|
||||
if (b[0] == 0x5a)
|
||||
{
|
||||
s8Ret = 0;
|
||||
onchip = 1;
|
||||
s8Ret = 1; // found on-chip (no bridge)
|
||||
M2M_INFO("Built-in WINC1500 UART Found\n");
|
||||
}
|
||||
else if(b[0] == 0x5b)
|
||||
{
|
||||
s8Ret = 0;
|
||||
onchip = 0;
|
||||
s8Ret = 0; // found off-chip (std serial bridge)
|
||||
M2M_INFO("WINC1500 Serial Bridge Found\n");
|
||||
}
|
||||
/*TODO: this should be the way we read the register since the cortus is little endian*/
|
||||
/**pu32RetVal = b[0] | ((uint32)b[1] << 8) | ((uint32)b[2] << 16) | ((uint32)b[3] << 24);*/
|
||||
if(s8Ret == M2M_SUCCESS)
|
||||
s8Ret = (sint8)onchip;
|
||||
else if (b[0] == 0x5c)
|
||||
{
|
||||
s8Ret = 0; // found of-chip (at cmd app serial bridge)
|
||||
M2M_INFO("WINC1500 Serial Bridge Found + AT CMD app Found\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
else
|
||||
{
|
||||
M2M_ERR("failed to send cfg bytes\n");
|
||||
s8Ret = M2M_ERR_BUS_FAIL;
|
||||
}
|
||||
}
|
||||
|
||||
return s8Ret;
|
||||
}
|
||||
sint8 nm_uart_read_reg_with_ret(uint32 u32Addr, uint32* pu32RetVal)
|
||||
@ -175,9 +180,6 @@ sint8 nm_uart_sync_cmd(void)
|
||||
M2M_ERR("failed to send cfg bytes\n");
|
||||
s8Ret = M2M_ERR_BUS_FAIL;
|
||||
}
|
||||
/*TODO: this should be the way we read the register since the cortus is little endian*/
|
||||
/**pu32RetVal = b[0] | ((uint32)b[1] << 8) | ((uint32)b[2] << 16) | ((uint32)b[3] << 24);*/
|
||||
|
||||
*pu32RetVal = ((uint32)b[0] << 24) | ((uint32)b[1] << 16) | ((uint32)b[2] << 8) | b[3];
|
||||
|
||||
return s8Ret;
|
||||
|
||||
@ -1,3 +1,13 @@
|
||||
/*
|
||||
* This file is part of the OpenMV project.
|
||||
*
|
||||
* Copyright (c) 2013-2019 Ibrahim Abdelkader <iabdalkader@openmv.io>
|
||||
* Copyright (c) 2013-2019 Kwabena W. Agyeman <kwagyeman@openmv.io>
|
||||
*
|
||||
* This work is licensed under the MIT license, see the file LICENSE for details.
|
||||
*
|
||||
* Framebuffer functions.
|
||||
*/
|
||||
#include <ff_wrapper.h>
|
||||
#include <stdio.h>
|
||||
#include "fb_alloc.h"
|
||||
|
||||
@ -2,38 +2,31 @@
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief BSD alike socket interface.
|
||||
* \brief BSD compatible socket interface.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
@ -76,6 +69,7 @@ MACROS
|
||||
#define SSL_FLAGS_3_RESERVD NBIT3
|
||||
#define SSL_FLAGS_CACHE_SESSION NBIT4
|
||||
#define SSL_FLAGS_NO_TX_COPY NBIT5
|
||||
#define SSL_FLAGS_CHECK_SNI NBIT6
|
||||
|
||||
/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
|
||||
PRIVATE DATA TYPES
|
||||
@ -161,6 +155,7 @@ NMI_API void Socket_ReadSocketData(SOCKET sock, tstrSocketRecvMsg *pstrRecv,uint
|
||||
u8SetRxDone = 0;
|
||||
u16Read = gastrSockets[sock].u16UserBufferSize;
|
||||
}
|
||||
|
||||
if(hif_receive(u32Address, gastrSockets[sock].pu8UserBuffer, u16Read, u8SetRxDone) == M2M_SUCCESS)
|
||||
{
|
||||
pstrRecv->pu8Buffer = gastrSockets[sock].pu8UserBuffer;
|
||||
@ -172,6 +167,16 @@ NMI_API void Socket_ReadSocketData(SOCKET sock, tstrSocketRecvMsg *pstrRecv,uint
|
||||
|
||||
u16ReadCount -= u16Read;
|
||||
u32Address += u16Read;
|
||||
|
||||
if((!gastrSockets[sock].bIsUsed) && (u16ReadCount))
|
||||
{
|
||||
M2M_DBG("Application Closed Socket While Rx Is not Complete\n");
|
||||
if(hif_receive(0, NULL, 0, 1) == M2M_SUCCESS)
|
||||
M2M_DBG("hif_receive Success\n");
|
||||
else
|
||||
M2M_DBG("hif_receive Fail\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -202,8 +207,8 @@ Date
|
||||
17 July 2012
|
||||
*********************************************************************/
|
||||
static void m2m_ip_cb(uint8 u8OpCode, uint16 u16BufferSize,uint32 u32Address)
|
||||
{
|
||||
if(u8OpCode == SOCKET_CMD_BIND)
|
||||
{
|
||||
if((u8OpCode == SOCKET_CMD_BIND) || (u8OpCode == SOCKET_CMD_SSL_BIND))
|
||||
{
|
||||
tstrBindReply strBindReply;
|
||||
tstrSocketBindMsg strBind;
|
||||
@ -234,8 +239,9 @@ static void m2m_ip_cb(uint8 u8OpCode, uint16 u16BufferSize,uint32 u32Address)
|
||||
{
|
||||
if(strAcceptReply.sConnectedSock >= 0)
|
||||
{
|
||||
gastrSockets[strAcceptReply.sConnectedSock].u8SSLFlags = 0;
|
||||
gastrSockets[strAcceptReply.sConnectedSock].bIsUsed = 1;
|
||||
gastrSockets[strAcceptReply.sConnectedSock].u8SSLFlags = gastrSockets[strAcceptReply.sListenSock].u8SSLFlags;
|
||||
gastrSockets[strAcceptReply.sConnectedSock].bIsUsed = 1;
|
||||
gastrSockets[strAcceptReply.sConnectedSock].u16DataOffset = strAcceptReply.u16AppDataOffset - M2M_HIF_HDR_OFFSET;
|
||||
|
||||
/* The session ID is used to distinguish different socket connections
|
||||
by comparing the assigned session ID to the one reported by the firmware*/
|
||||
@ -275,7 +281,6 @@ static void m2m_ip_cb(uint8 u8OpCode, uint16 u16BufferSize,uint32 u32Address)
|
||||
tstrDnsReply strDnsReply;
|
||||
if(hif_receive(u32Address, (uint8*)&strDnsReply, sizeof(tstrDnsReply), 0) == M2M_SUCCESS)
|
||||
{
|
||||
strDnsReply.u32HostIP = strDnsReply.u32HostIP;
|
||||
if(gpfAppResolveCb)
|
||||
gpfAppResolveCb((uint8*)strDnsReply.acHostName, strDnsReply.u32HostIP);
|
||||
}
|
||||
@ -330,6 +335,8 @@ static void m2m_ip_cb(uint8 u8OpCode, uint16 u16BufferSize,uint32 u32Address)
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Don't tidy up here. Application must call close().
|
||||
*/
|
||||
strRecvMsg.s16BufferSize = s16RecvStatus;
|
||||
strRecvMsg.pu8Buffer = NULL;
|
||||
if(gpfAppSocketCb)
|
||||
@ -340,7 +347,12 @@ static void m2m_ip_cb(uint8 u8OpCode, uint16 u16BufferSize,uint32 u32Address)
|
||||
{
|
||||
M2M_DBG("Discard recv callback %d %d \r\n",u16SessionID , gastrSockets[sock].u16SessionID);
|
||||
if(u16ReadSize < u16BufferSize)
|
||||
hif_receive(0, NULL, 0, 1);
|
||||
{
|
||||
if(hif_receive(0, NULL, 0, 1) == M2M_SUCCESS)
|
||||
M2M_DBG("hif_receive Success\n");
|
||||
else
|
||||
M2M_DBG("hif_receive Fail\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -408,12 +420,12 @@ Date
|
||||
*********************************************************************/
|
||||
void socketInit(void)
|
||||
{
|
||||
if(gbSocketInit==0)
|
||||
if(gbSocketInit == 0)
|
||||
{
|
||||
m2m_memset((uint8*)gastrSockets, 0, MAX_SOCKET * sizeof(tstrSocket));
|
||||
hif_register_cb(M2M_REQ_GROUP_IP,m2m_ip_cb);
|
||||
gbSocketInit=1;
|
||||
gu16SessionID = 0;
|
||||
gbSocketInit = 1;
|
||||
gu16SessionID = 0;
|
||||
}
|
||||
}
|
||||
/*********************************************************************
|
||||
@ -438,9 +450,9 @@ void socketDeinit(void)
|
||||
{
|
||||
m2m_memset((uint8*)gastrSockets, 0, MAX_SOCKET * sizeof(tstrSocket));
|
||||
hif_register_cb(M2M_REQ_GROUP_IP, NULL);
|
||||
gpfAppSocketCb = NULL;
|
||||
gpfAppResolveCb = NULL;
|
||||
gbSocketInit = 0;
|
||||
gpfAppSocketCb = NULL;
|
||||
gpfAppResolveCb = NULL;
|
||||
gbSocketInit = 0;
|
||||
}
|
||||
/*********************************************************************
|
||||
Function
|
||||
@ -454,7 +466,7 @@ Return
|
||||
Author
|
||||
Ahmed Ezzat
|
||||
|
||||
Versio
|
||||
Version
|
||||
1.0
|
||||
|
||||
Date
|
||||
@ -488,54 +500,66 @@ Date
|
||||
*********************************************************************/
|
||||
SOCKET WINC1500_EXPORT(socket)(uint16 u16Domain, uint8 u8Type, uint8 u8Flags)
|
||||
{
|
||||
SOCKET sock = -1;
|
||||
uint8 u8Count,u8SocketCount = MAX_SOCKET;
|
||||
volatile tstrSocket *pstrSock;
|
||||
|
||||
SOCKET sock = -1;
|
||||
uint8 u8SockID;
|
||||
uint8 u8Count;
|
||||
volatile tstrSocket *pstrSock;
|
||||
static volatile uint8 u8NextTcpSock = 0;
|
||||
static volatile uint8 u8NextUdpSock = 0;
|
||||
|
||||
/* The only supported family is the AF_INET for UDP and TCP transport layer protocols. */
|
||||
if(u16Domain == AF_INET)
|
||||
{
|
||||
if(u8Type == SOCK_STREAM)
|
||||
{
|
||||
u8SocketCount = TCP_SOCK_MAX;
|
||||
u8Count = 0;
|
||||
for(u8Count = 0; u8Count < TCP_SOCK_MAX; u8Count ++)
|
||||
{
|
||||
u8SockID = u8NextTcpSock;
|
||||
pstrSock = &gastrSockets[u8NextTcpSock];
|
||||
u8NextTcpSock = (u8NextTcpSock + 1) % TCP_SOCK_MAX;
|
||||
if(!pstrSock->bIsUsed)
|
||||
{
|
||||
sock = (SOCKET)u8SockID;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else if(u8Type == SOCK_DGRAM)
|
||||
{
|
||||
/*--- UDP SOCKET ---*/
|
||||
u8SocketCount = MAX_SOCKET;
|
||||
u8Count = TCP_SOCK_MAX;
|
||||
}
|
||||
else
|
||||
return sock;
|
||||
|
||||
for(;u8Count < u8SocketCount; u8Count ++)
|
||||
{
|
||||
pstrSock = &gastrSockets[u8Count];
|
||||
if(pstrSock->bIsUsed == 0)
|
||||
volatile tstrSocket *pastrUDPSockets = &gastrSockets[TCP_SOCK_MAX];
|
||||
for(u8Count = 0; u8Count < UDP_SOCK_MAX; u8Count ++)
|
||||
{
|
||||
m2m_memset((uint8*)pstrSock, 0, sizeof(tstrSocket));
|
||||
|
||||
pstrSock->bIsUsed = 1;
|
||||
|
||||
/* The session ID is used to distinguish different socket connections
|
||||
by comparing the assigned session ID to the one reported by the firmware*/
|
||||
++gu16SessionID;
|
||||
if(gu16SessionID == 0)
|
||||
++gu16SessionID;
|
||||
|
||||
pstrSock->u16SessionID = gu16SessionID;
|
||||
M2M_DBG("1 Socket %d session ID = %d\r\n",u8Count, gu16SessionID );
|
||||
sock = (SOCKET)u8Count;
|
||||
|
||||
if(u8Flags & SOCKET_FLAGS_SSL)
|
||||
u8SockID = u8NextUdpSock;
|
||||
pstrSock = &pastrUDPSockets[u8NextUdpSock];
|
||||
u8NextUdpSock = (u8NextUdpSock + 1) % UDP_SOCK_MAX;
|
||||
if(!pstrSock->bIsUsed)
|
||||
{
|
||||
tstrSSLSocketCreateCmd strSSLCreate;
|
||||
strSSLCreate.sslSock = sock;
|
||||
pstrSock->u8SSLFlags = SSL_FLAGS_ACTIVE | SSL_FLAGS_NO_TX_COPY;
|
||||
SOCKET_REQUEST(SOCKET_CMD_SSL_CREATE, (uint8*)&strSSLCreate, sizeof(tstrSSLSocketCreateCmd), 0, 0, 0);
|
||||
sock = (SOCKET)(u8SockID + TCP_SOCK_MAX);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if(sock >= 0)
|
||||
{
|
||||
m2m_memset((uint8*)pstrSock, 0, sizeof(tstrSocket));
|
||||
pstrSock->bIsUsed = 1;
|
||||
|
||||
/* The session ID is used to distinguish different socket connections
|
||||
by comparing the assigned session ID to the one reported by the firmware*/
|
||||
++gu16SessionID;
|
||||
if(gu16SessionID == 0)
|
||||
++gu16SessionID;
|
||||
|
||||
pstrSock->u16SessionID = gu16SessionID;
|
||||
M2M_INFO("Socket %d session ID = %d\r\n",sock, gu16SessionID );
|
||||
|
||||
if(u8Flags & SOCKET_FLAGS_SSL)
|
||||
{
|
||||
tstrSSLSocketCreateCmd strSSLCreate;
|
||||
strSSLCreate.sslSock = sock;
|
||||
pstrSock->u8SSLFlags = SSL_FLAGS_ACTIVE | SSL_FLAGS_NO_TX_COPY;
|
||||
SOCKET_REQUEST(SOCKET_CMD_SSL_CREATE, (uint8*)&strSSLCreate, sizeof(tstrSSLSocketCreateCmd), 0, 0, 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -566,18 +590,19 @@ sint8 WINC1500_EXPORT(bind)(SOCKET sock, struct sockaddr *pstrAddr, uint8 u8Addr
|
||||
if((pstrAddr != NULL) && (sock >= 0) && (gastrSockets[sock].bIsUsed == 1) && (u8AddrLen != 0))
|
||||
{
|
||||
tstrBindCmd strBind;
|
||||
uint8 u8CMD = SOCKET_CMD_BIND;
|
||||
if(gastrSockets[sock].u8SSLFlags & SSL_FLAGS_ACTIVE)
|
||||
{
|
||||
u8CMD = SOCKET_CMD_SSL_BIND;
|
||||
}
|
||||
|
||||
/* Build the bind request. */
|
||||
strBind.sock = sock;
|
||||
m2m_memcpy((uint8 *)&strBind.strAddr, (uint8 *)pstrAddr, sizeof(tstrSockAddr));
|
||||
|
||||
strBind.strAddr.u16Family = strBind.strAddr.u16Family;
|
||||
strBind.strAddr.u16Port = strBind.strAddr.u16Port;
|
||||
strBind.strAddr.u32IPAddr = strBind.strAddr.u32IPAddr;
|
||||
strBind.u16SessionID = gastrSockets[sock].u16SessionID;
|
||||
|
||||
/* Send the request. */
|
||||
s8Ret = SOCKET_REQUEST(SOCKET_CMD_BIND, (uint8*)&strBind,sizeof(tstrBindCmd) , NULL , 0, 0);
|
||||
s8Ret = SOCKET_REQUEST(u8CMD, (uint8*)&strBind,sizeof(tstrBindCmd) , NULL , 0, 0);
|
||||
if(s8Ret != SOCK_ERR_NO_ERROR)
|
||||
{
|
||||
s8Ret = SOCK_ERR_INVALID;
|
||||
@ -878,6 +903,7 @@ Date
|
||||
sint8 WINC1500_EXPORT(close)(SOCKET sock)
|
||||
{
|
||||
sint8 s8Ret = SOCK_ERR_INVALID_ARG;
|
||||
M2M_INFO("Sock to delete <%d>\n", sock);
|
||||
if(sock >= 0 && (gastrSockets[sock].bIsUsed == 1))
|
||||
{
|
||||
uint8 u8Cmd = SOCKET_CMD_CLOSE;
|
||||
@ -885,9 +911,6 @@ sint8 WINC1500_EXPORT(close)(SOCKET sock)
|
||||
strclose.sock = sock;
|
||||
strclose.u16SessionID = gastrSockets[sock].u16SessionID;
|
||||
|
||||
gastrSockets[sock].bIsUsed = 0;
|
||||
gastrSockets[sock].u16SessionID =0;
|
||||
|
||||
if(gastrSockets[sock].u8SSLFlags & SSL_FLAGS_ACTIVE)
|
||||
{
|
||||
u8Cmd = SOCKET_CMD_SSL_CLOSE;
|
||||
@ -1042,11 +1065,7 @@ sint8 WINC1500_EXPORT(gethostbyname)(uint8 * pcHostName)
|
||||
uint8 u8HostNameSize = (uint8)m2m_strlen(pcHostName);
|
||||
if(u8HostNameSize <= HOSTNAME_MAX_SIZE)
|
||||
{
|
||||
s8Err = SOCKET_REQUEST(SOCKET_CMD_DNS_RESOLVE|M2M_REQ_DATA_PKT, (uint8*)pcHostName, u8HostNameSize + 1, NULL,0, 0);
|
||||
if(s8Err != SOCK_ERR_NO_ERROR)
|
||||
{
|
||||
s8Err = SOCK_ERR_INVALID;
|
||||
}
|
||||
s8Err = SOCKET_REQUEST(SOCKET_CMD_DNS_RESOLVE, (uint8*)pcHostName, u8HostNameSize + 1, NULL,0, 0);
|
||||
}
|
||||
return s8Err;
|
||||
}
|
||||
@ -1101,6 +1120,19 @@ static sint8 sslSetSockOpt(SOCKET sock, uint8 u8Opt, const void *pvOptVal, uint
|
||||
}
|
||||
s8Ret = SOCK_ERR_NO_ERROR;
|
||||
}
|
||||
else if(u8Opt == SO_SSL_ENABLE_SNI_VALIDATION)
|
||||
{
|
||||
int optVal = *((int*)pvOptVal);
|
||||
if(optVal)
|
||||
{
|
||||
gastrSockets[sock].u8SSLFlags |= SSL_FLAGS_CHECK_SNI;
|
||||
}
|
||||
else
|
||||
{
|
||||
gastrSockets[sock].u8SSLFlags &= ~SSL_FLAGS_CHECK_SNI;
|
||||
}
|
||||
s8Ret = SOCK_ERR_NO_ERROR;
|
||||
}
|
||||
else if(u8Opt == SO_SSL_SNI)
|
||||
{
|
||||
if(u16OptLen < HOSTNAME_MAX_SIZE)
|
||||
@ -1245,10 +1277,10 @@ sint8 m2m_ping_req(uint32 u32DstIP, uint8 u8TTL, tpfPingCb fpPingCb)
|
||||
}
|
||||
/*********************************************************************
|
||||
Function
|
||||
sslSetActiveCipherSuites
|
||||
sslEnableCertExpirationCheck
|
||||
|
||||
Description
|
||||
Send Ping request.
|
||||
Enable/Disable TLS Certificate Expiration Check.
|
||||
|
||||
Return
|
||||
|
||||
@ -1259,17 +1291,34 @@ Version
|
||||
1.0
|
||||
|
||||
Date
|
||||
4 June 2015
|
||||
*********************************************************************/
|
||||
sint8 sslSetActiveCipherSuites(uint32 u32SslCsBMP)
|
||||
{
|
||||
sint8 s8Ret = SOCK_ERR_INVALID_ARG;
|
||||
if(u32SslCsBMP != 0)
|
||||
{
|
||||
tstrSslSetActiveCsList strCsList;
|
||||
|
||||
strCsList.u32CsBMP = u32SslCsBMP;
|
||||
s8Ret = SOCKET_REQUEST(SOCKET_CMD_SSL_SET_CS_LIST, (uint8*)&strCsList, sizeof(tstrSslSetActiveCsList), NULL, 0, 0);
|
||||
}
|
||||
return s8Ret;
|
||||
*********************************************************************/
|
||||
sint8 WINC1500_EXPORT(sslEnableCertExpirationCheck)(tenuSslCertExpSettings enuValidationSetting)
|
||||
{
|
||||
tstrSslCertExpSettings strSettings;
|
||||
strSettings.u32CertExpValidationOpt = (uint32)enuValidationSetting;
|
||||
return SOCKET_REQUEST(SOCKET_CMD_SSL_EXP_CHECK, (uint8*)&strSettings, sizeof(tstrSslCertExpSettings), NULL, 0, 0);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
Function
|
||||
IsSocketReady
|
||||
|
||||
Description
|
||||
|
||||
Return
|
||||
None.
|
||||
|
||||
Author
|
||||
|
||||
|
||||
Version
|
||||
1.0
|
||||
|
||||
Date
|
||||
24 Apr 2018
|
||||
*********************************************************************/
|
||||
uint8 IsSocketReady(void)
|
||||
{
|
||||
return gbSocketInit;
|
||||
}
|
||||
|
||||
@ -4,43 +4,50 @@
|
||||
*
|
||||
* \brief WINC1500 SPI Flash.
|
||||
*
|
||||
* Copyright (c) 2015 Atmel Corporation. All rights reserved.
|
||||
* Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifdef PROFILING
|
||||
#include "windows.h"
|
||||
#endif
|
||||
#include "spi_flash/include/spi_flash.h"
|
||||
#define DUMMY_REGISTER (0x1084)
|
||||
|
||||
#define TIMEOUT (-1) /*MS*/
|
||||
|
||||
//#define DISABLE_UNSED_FLASH_FUNCTIONS
|
||||
|
||||
#define FLASH_BLOCK_SIZE (32UL * 1024)
|
||||
/*!<Block Size in Flash Memory
|
||||
*/
|
||||
#define FLASH_PAGE_SZ (256)
|
||||
/*!<Page Size in Flash Memory */
|
||||
|
||||
#define HOST_SHARE_MEM_BASE (0xd0000UL)
|
||||
#define CORTUS_SHARE_MEM_BASE (0x60000000UL)
|
||||
#define NMI_SPI_FLASH_ADDR (0x111c)
|
||||
@ -70,6 +77,9 @@ SPI Flash DMA
|
||||
* @param[OUT] val
|
||||
value of status reg
|
||||
* @return Status of execution
|
||||
* @note Compatible with MX25L6465E
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
static sint8 spi_flash_read_status_reg(uint8 * val)
|
||||
{
|
||||
@ -101,6 +111,9 @@ static sint8 spi_flash_read_status_reg(uint8 * val)
|
||||
* @fn spi_flash_read_security_reg
|
||||
* @brief Read security register
|
||||
* @return Security register value
|
||||
* @note Compatible with MX25L6465E
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
static uint8 spi_flash_read_security_reg(void)
|
||||
{
|
||||
@ -129,6 +142,9 @@ static uint8 spi_flash_read_security_reg(void)
|
||||
/**
|
||||
* @fn spi_flash_gang_unblock
|
||||
* @brief Unblock all flash area
|
||||
* @note Compatible with MX25L6465E
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
static sint8 spi_flash_gang_unblock(void)
|
||||
{
|
||||
@ -156,6 +172,9 @@ static sint8 spi_flash_gang_unblock(void)
|
||||
/**
|
||||
* @fn spi_flash_clear_security_flags
|
||||
* @brief Clear all security flags
|
||||
* @note Compatible with MX25L6465E
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
static sint8 spi_flash_clear_security_flags(void)
|
||||
{
|
||||
@ -191,6 +210,9 @@ static sint8 spi_flash_clear_security_flags(void)
|
||||
* @param[IN] u32Sz
|
||||
* Data size
|
||||
* @return Status of execution
|
||||
* @note Compatible with MX25L6465E and should be working with other types
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
static sint8 spi_flash_load_to_cortus_mem(uint32 u32MemAdr, uint32 u32FlashAdr, uint32 u32Sz)
|
||||
{
|
||||
@ -205,7 +227,7 @@ static sint8 spi_flash_load_to_cortus_mem(uint32 u32MemAdr, uint32 u32FlashAdr,
|
||||
cmd[4] = 0xA5;
|
||||
|
||||
ret += nm_write_reg(SPI_FLASH_DATA_CNT, u32Sz);
|
||||
ret += nm_write_reg(SPI_FLASH_BUF1, cmd[0]|(cmd[1]<<8)|(cmd[2]<<16)|(cmd[3]<<24));
|
||||
ret += nm_write_reg(SPI_FLASH_BUF1, cmd[0]|(((uint32)cmd[1])<<8)|(((uint32)cmd[2])<<16)|(((uint32)cmd[3])<<24));
|
||||
ret += nm_write_reg(SPI_FLASH_BUF2, cmd[4]);
|
||||
ret += nm_write_reg(SPI_FLASH_BUF_DIR, 0x1f);
|
||||
ret += nm_write_reg(SPI_FLASH_DMA_ADDR, u32MemAdr);
|
||||
@ -226,6 +248,9 @@ static sint8 spi_flash_load_to_cortus_mem(uint32 u32MemAdr, uint32 u32FlashAdr,
|
||||
* @param[IN] u32FlashAdr
|
||||
* Any memory address within the sector
|
||||
* @return Status of execution
|
||||
* @note Compatible with MX25L6465E and should be working with other types
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
static sint8 spi_flash_sector_erase(uint32 u32FlashAdr)
|
||||
{
|
||||
@ -239,7 +264,7 @@ static sint8 spi_flash_sector_erase(uint32 u32FlashAdr)
|
||||
cmd[3] = (uint8)(u32FlashAdr);
|
||||
|
||||
ret += nm_write_reg(SPI_FLASH_DATA_CNT, 0);
|
||||
ret += nm_write_reg(SPI_FLASH_BUF1, cmd[0]|(cmd[1]<<8)|(cmd[2]<<16)|(cmd[3]<<24));
|
||||
ret += nm_write_reg(SPI_FLASH_BUF1, cmd[0]|(((uint32)cmd[1])<<8)|(((uint32)cmd[2])<<16)|(((uint32)cmd[3])<<24));
|
||||
ret += nm_write_reg(SPI_FLASH_BUF_DIR, 0x0f);
|
||||
ret += nm_write_reg(SPI_FLASH_DMA_ADDR, 0);
|
||||
ret += nm_write_reg(SPI_FLASH_CMD_CNT, 4 | (1<<7));
|
||||
@ -257,6 +282,9 @@ static sint8 spi_flash_sector_erase(uint32 u32FlashAdr)
|
||||
* @fn spi_flash_write_enable
|
||||
* @brief Send write enable command to SPI flash
|
||||
* @return Status of execution
|
||||
* @note Compatible with MX25L6465E and should be working with other types
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
static sint8 spi_flash_write_enable(void)
|
||||
{
|
||||
@ -284,6 +312,9 @@ static sint8 spi_flash_write_enable(void)
|
||||
/**
|
||||
* @fn spi_flash_write_disable
|
||||
* @brief Send write disable command to SPI flash
|
||||
* @note Compatible with MX25L6465E and should be working with other types
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
static sint8 spi_flash_write_disable(void)
|
||||
{
|
||||
@ -316,6 +347,9 @@ static sint8 spi_flash_write_disable(void)
|
||||
* Address to write to at the SPI flash
|
||||
* @param[IN] u32Sz
|
||||
* Data size
|
||||
* @note Compatible with MX25L6465E and should be working with other types
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
static sint8 spi_flash_page_program(uint32 u32MemAdr, uint32 u32FlashAdr, uint32 u32Sz)
|
||||
{
|
||||
@ -329,7 +363,7 @@ static sint8 spi_flash_page_program(uint32 u32MemAdr, uint32 u32FlashAdr, uint32
|
||||
cmd[3] = (uint8)(u32FlashAdr);
|
||||
|
||||
ret += nm_write_reg(SPI_FLASH_DATA_CNT, 0);
|
||||
ret += nm_write_reg(SPI_FLASH_BUF1, cmd[0]|(cmd[1]<<8)|(cmd[2]<<16)|(cmd[3]<<24));
|
||||
ret += nm_write_reg(SPI_FLASH_BUF1, cmd[0]|(((uint32)cmd[1])<<8)|(((uint32)cmd[2])<<16)|(((uint32)cmd[3])<<24));
|
||||
ret += nm_write_reg(SPI_FLASH_BUF_DIR, 0x0f);
|
||||
ret += nm_write_reg(SPI_FLASH_DMA_ADDR, u32MemAdr);
|
||||
ret += nm_write_reg(SPI_FLASH_CMD_CNT, 4 | (1<<7) | ((u32Sz & 0xfffff) << 8));
|
||||
@ -352,6 +386,9 @@ static sint8 spi_flash_page_program(uint32 u32MemAdr, uint32 u32FlashAdr, uint32
|
||||
* Address to read from at the SPI flash
|
||||
* @param[IN] u32Sz
|
||||
* Data size
|
||||
* @note Data size must be < 64KB (limitation imposed by the bus wrapper)
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
static sint8 spi_flash_read_internal(uint8 *pu8Buf, uint32 u32Addr, uint32 u32Sz)
|
||||
{
|
||||
@ -374,6 +411,8 @@ ERR:
|
||||
* @param[IN] u32Sz
|
||||
* Data size
|
||||
* @return Status of execution
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
static sint8 spi_flash_pp(uint32 u32Offset, uint8 *pu8Buf, uint16 u16Sz)
|
||||
{
|
||||
@ -398,6 +437,8 @@ ERR:
|
||||
* @fn spi_flash_rdid
|
||||
* @brief Read SPI Flash ID
|
||||
* @return SPI FLash ID
|
||||
* @author M.S.M
|
||||
* @version 1.0
|
||||
*/
|
||||
static uint32 spi_flash_rdid(void)
|
||||
{
|
||||
@ -432,6 +473,8 @@ static uint32 spi_flash_rdid(void)
|
||||
/**
|
||||
* @fn spi_flash_unlock
|
||||
* @brief Unlock SPI Flash
|
||||
* @author M.S.M
|
||||
* @version 1.0
|
||||
*/
|
||||
#if 0
|
||||
static void spi_flash_unlock(void)
|
||||
@ -480,6 +523,8 @@ static void spi_flash_leave_low_power_mode(void) {
|
||||
/**
|
||||
* @fn spi_flash_enable
|
||||
* @brief Enable spi flash operations
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
sint8 spi_flash_enable(uint8 enable)
|
||||
{
|
||||
@ -520,6 +565,8 @@ ERR1:
|
||||
* Data size
|
||||
* @return Status of execution
|
||||
* @note Data size is limited by the SPI flash size only
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
sint8 spi_flash_read(uint8 *pu8Buf, uint32 u32offset, uint32 u32Sz)
|
||||
{
|
||||
@ -544,7 +591,7 @@ ERR:
|
||||
|
||||
/**
|
||||
* @fn spi_flash_write
|
||||
* @brief Proram SPI flash
|
||||
* @brief Program SPI flash
|
||||
* @param[IN] pu8Buf
|
||||
* Pointer to data buffer
|
||||
* @param[IN] u32Offset
|
||||
@ -552,6 +599,8 @@ ERR:
|
||||
* @param[IN] u32Sz
|
||||
* Data size
|
||||
* @return Status of execution
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
sint8 spi_flash_write(uint8* pu8Buf, uint32 u32Offset, uint32 u32Sz)
|
||||
{
|
||||
@ -627,6 +676,8 @@ ERR:
|
||||
* Data size
|
||||
* @return Status of execution
|
||||
* @note Data size is limited by the SPI flash size only
|
||||
* @author M. Abdelmawla
|
||||
* @version 1.0
|
||||
*/
|
||||
sint8 spi_flash_erase(uint32 u32Offset, uint32 u32Sz)
|
||||
{
|
||||
@ -663,13 +714,15 @@ ERR:
|
||||
* @fn spi_flash_get_size
|
||||
* @brief Get size of SPI Flash
|
||||
* @return Size of Flash
|
||||
* @author M.S.M
|
||||
* @version 1.0
|
||||
*/
|
||||
uint32 spi_flash_get_size(void)
|
||||
{
|
||||
uint32 u32FlashId = 0, u32FlashPwr = 0;
|
||||
static uint32 gu32InernalFlashSize= 0;
|
||||
static uint32 gu32InternalFlashSize= 0;
|
||||
|
||||
if(!gu32InernalFlashSize)
|
||||
if(!gu32InternalFlashSize)
|
||||
{
|
||||
u32FlashId = spi_flash_rdid();//spi_flash_probe();
|
||||
if(u32FlashId != 0xffffffff)
|
||||
@ -677,14 +730,14 @@ uint32 spi_flash_get_size(void)
|
||||
/*flash size is the third byte from the FLASH RDID*/
|
||||
u32FlashPwr = ((u32FlashId>>16)&0xff) - 0x11; /*2MBIT is the min*/
|
||||
/*That number power 2 to get the flash size*/
|
||||
gu32InernalFlashSize = 1<<u32FlashPwr;
|
||||
M2M_INFO("Flash Size %lu Mb\n",gu32InernalFlashSize);
|
||||
gu32InternalFlashSize = 1<<u32FlashPwr;
|
||||
M2M_INFO("Flash Size %lu Mb\n",gu32InternalFlashSize);
|
||||
}
|
||||
else
|
||||
{
|
||||
M2M_ERR("Cann't Detect Flash size\n");
|
||||
M2M_ERR("Can't detect Flash size\n");
|
||||
}
|
||||
}
|
||||
|
||||
return gu32InernalFlashSize;
|
||||
return gu32InternalFlashSize;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user