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Merge pull request #2752 from kwagyeman/kwabena/remove_rev_y_stuff
drivers/sensors: Remove OV5640 REV_Y special case.
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commit
8c8417d68f
@ -48,10 +48,6 @@
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#define OMV_OV5640_CLK_FREQ (12500000)
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#define OMV_OV5640_CLK_FREQ (12500000)
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#define OMV_OV5640_PLL_CTRL2 (0x7E)
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#define OMV_OV5640_PLL_CTRL2 (0x7E)
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#define OMV_OV5640_PLL_CTRL3 (0x13)
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#define OMV_OV5640_PLL_CTRL3 (0x13)
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#define OMV_OV5640_REV_Y_CHECK (0)
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#define OMV_OV5640_REV_Y_FREQ (12500000)
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#define OMV_OV5640_REV_Y_CTRL2 (0x7E)
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#define OMV_OV5640_REV_Y_CTRL3 (0x13)
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#define OMV_HM01B0_ENABLE (1)
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#define OMV_HM01B0_ENABLE (1)
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#define OMV_HM0360_ENABLE (1)
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#define OMV_HM0360_ENABLE (1)
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@ -48,9 +48,6 @@
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#define OMV_OV5640_AF_ENABLE (1)
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#define OMV_OV5640_AF_ENABLE (1)
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#define OMV_OV5640_PLL_CTRL2 (0x64)
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#define OMV_OV5640_PLL_CTRL2 (0x64)
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#define OMV_OV5640_PLL_CTRL3 (0x13)
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#define OMV_OV5640_PLL_CTRL3 (0x13)
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#define OMV_OV5640_REV_Y_CHECK (1)
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#define OMV_OV5640_REV_Y_CTRL2 (0x54)
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#define OMV_OV5640_REV_Y_CTRL3 (0x13)
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#define OMV_OV7725_ENABLE (1)
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#define OMV_OV7725_ENABLE (1)
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#define OMV_OV7725_PLL_CONFIG (0x41) // x4
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#define OMV_OV7725_PLL_CONFIG (0x41) // x4
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@ -34,9 +34,6 @@
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#define OMV_OV5640_AF_ENABLE (1)
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#define OMV_OV5640_AF_ENABLE (1)
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#define OMV_OV5640_PLL_CTRL2 (0x64)
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#define OMV_OV5640_PLL_CTRL2 (0x64)
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#define OMV_OV5640_PLL_CTRL3 (0x13)
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#define OMV_OV5640_PLL_CTRL3 (0x13)
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#define OMV_OV5640_REV_Y_CHECK (1)
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#define OMV_OV5640_REV_Y_CTRL2 (0x54)
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#define OMV_OV5640_REV_Y_CTRL3 (0x13)
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#define OMV_OV7725_ENABLE (1)
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#define OMV_OV7725_ENABLE (1)
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#define OMV_OV7725_PLL_CONFIG (0x41) // x4
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#define OMV_OV7725_PLL_CONFIG (0x41) // x4
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@ -32,9 +32,6 @@
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#define OMV_OV5640_AF_ENABLE (1)
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#define OMV_OV5640_AF_ENABLE (1)
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#define OMV_OV5640_PLL_CTRL2 (0x64)
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#define OMV_OV5640_PLL_CTRL2 (0x64)
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#define OMV_OV5640_PLL_CTRL3 (0x13)
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#define OMV_OV5640_PLL_CTRL3 (0x13)
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#define OMV_OV5640_REV_Y_CHECK (1)
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#define OMV_OV5640_REV_Y_CTRL2 (0x54)
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#define OMV_OV5640_REV_Y_CTRL3 (0x13)
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// FIR drivers configuration.
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// FIR drivers configuration.
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#define OMV_FIR_MLX90621_ENABLE (1)
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#define OMV_FIR_MLX90621_ENABLE (1)
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@ -42,9 +42,6 @@
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#define OMV_OV5640_AF_ENABLE (1)
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#define OMV_OV5640_AF_ENABLE (1)
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#define OMV_OV5640_PLL_CTRL2 (0x64)
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#define OMV_OV5640_PLL_CTRL2 (0x64)
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#define OMV_OV5640_PLL_CTRL3 (0x13)
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#define OMV_OV5640_PLL_CTRL3 (0x13)
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#define OMV_OV5640_REV_Y_CHECK (1)
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#define OMV_OV5640_REV_Y_CTRL2 (0x54)
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#define OMV_OV5640_REV_Y_CTRL3 (0x13)
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#define OMV_MT9V0XX_ENABLE (1)
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#define OMV_MT9V0XX_ENABLE (1)
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#define OMV_LEPTON_ENABLE (1)
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#define OMV_LEPTON_ENABLE (1)
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@ -29,9 +29,6 @@
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#define OMV_OV5640_AF_ENABLE (1)
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#define OMV_OV5640_AF_ENABLE (1)
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#define OMV_OV5640_PLL_CTRL2 (0x64)
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#define OMV_OV5640_PLL_CTRL2 (0x64)
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#define OMV_OV5640_PLL_CTRL3 (0x13)
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#define OMV_OV5640_PLL_CTRL3 (0x13)
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#define OMV_OV5640_REV_Y_CHECK (0)
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#define OMV_OV5640_REV_Y_CTRL2 (0x54)
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#define OMV_OV5640_REV_Y_CTRL3 (0x13)
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#define OMV_OV7725_ENABLE (1)
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#define OMV_OV7725_ENABLE (1)
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#define OMV_OV7725_PLL_CONFIG (0x41) // x4
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#define OMV_OV7725_PLL_CONFIG (0x41) // x4
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@ -543,13 +543,6 @@ int omv_csi_probe(omv_i2c_t *i2c) {
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return OMV_CSI_ERROR_ISC_INIT_FAILED;
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return OMV_CSI_ERROR_ISC_INIT_FAILED;
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}
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}
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// Special case for OV5640.
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#if (OMV_OV5640_REV_Y_CHECK == 1)
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if (csi->chip_id == OV5640_ID && HAL_GetREVID() < 0x2003) {
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csi->clk_hz = OMV_OV5640_REV_Y_FREQ;
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}
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#endif
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// Sensors can change the clock's frequency or disable it
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// Sensors can change the clock's frequency or disable it
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// (with clk_hz=0). This is allowed only if the clock is
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// (with clk_hz=0). This is allowed only if the clock is
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// not shared (dev_count == 1) or if this is a main sensor.
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// not shared (dev_count == 1) or if this is a main sensor.
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@ -678,20 +678,6 @@ static int reset(omv_csi_t *csi) {
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int addr = (default_regs[i][0] << 8) | (default_regs[i][1] << 0);
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int addr = (default_regs[i][0] << 8) | (default_regs[i][1] << 0);
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int data = default_regs[i][2];
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int data = default_regs[i][2];
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#if (OMV_OV5640_REV_Y_CHECK == 1)
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// Rev V (480 MHz / 20) -> 24 MHz PCLK / 3 * 100 = 800 MHz / 10 = 80 MHz PCLK.
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// Rev Y (400 MHz / 16) -> 25 MHz PCLK / 3 * 84 = 700 MHz / 10 = 70 MHz PCLK.
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if (HAL_GetREVID() < 0x2003) {
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// Is this REV Y?
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if (addr == SC_PLL_CONTRL2) {
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data = OMV_OV5640_REV_Y_CTRL2;
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}
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if (addr == SC_PLL_CONTRL3) {
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data = OMV_OV5640_REV_Y_CTRL3;
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}
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}
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#endif
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ret |= omv_i2c_writeb2(csi->i2c, csi->slv_addr, addr, data);
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ret |= omv_i2c_writeb2(csi->i2c, csi->slv_addr, addr, data);
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}
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}
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@ -22,9 +22,6 @@ extern int ov2640_init(omv_csi_t *csi);
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#ifndef OMV_OV5640_CLK_FREQ
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#ifndef OMV_OV5640_CLK_FREQ
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#define OMV_OV5640_CLK_FREQ (24000000)
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#define OMV_OV5640_CLK_FREQ (24000000)
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#endif
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#endif
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#ifndef OMV_OV5640_REV_Y_FREQ
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#define OMV_OV5640_REV_Y_FREQ (25000000)
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#endif
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extern int ov5640_init(omv_csi_t *csi);
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extern int ov5640_init(omv_csi_t *csi);
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#ifndef OMV_OV7670_CLK_FREQ
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#ifndef OMV_OV7670_CLK_FREQ
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