lib: Use common alignment macros.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
This commit is contained in:
iabdalkader 2025-07-16 10:12:16 +02:00
parent a9d6567a18
commit 8df82bdc00
3 changed files with 16 additions and 15 deletions

View File

@ -241,12 +241,12 @@ void rectangle_united(rectangle_t *dst, rectangle_t *src) {
/////////////////
void image_alloc(image_t *img, size_t size) {
// Round the size up to ensure that the allocation is a multiple of the alignment in bytes.
// This ensures after address alignment that the data can be modified without affecting other cache lines.
size = ((size + OMV_ALLOC_ALIGNMENT - 1) / OMV_ALLOC_ALIGNMENT) * OMV_ALLOC_ALIGNMENT;
img->_raw = m_malloc(size + OMV_ALLOC_ALIGNMENT - 1);
// Offset the data pointer to ensure it is aligned.
img->data = (void *) (((uintptr_t) img->_raw + OMV_ALLOC_ALIGNMENT - 1) & ~(OMV_ALLOC_ALIGNMENT - 1));
// Align the memory size to cache line.
size = OMV_ALIGN_TO(size, OMV_CACHE_LINE_SIZE);
// Allocate extra to align the pointer.
img->_raw = m_malloc(size + OMV_CACHE_LINE_SIZE - 1);
// Align the memory address to cache line.
img->data = (void *) OMV_ALIGN_TO(img->_raw, OMV_CACHE_LINE_SIZE);
}
void image_alloc0(image_t *img, size_t size) {

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@ -33,6 +33,7 @@
#include <string.h>
#include <stdint.h>
#include "imlib_config.h"
#include "omv_common.h"
#include STM32_HAL_H
#include "py/runtime.h"
@ -48,8 +49,7 @@
#include "ll_aton_caches_interface.h"
#include "ll_aton_reloc_network.h"
#define AI_RELOC_ALIGNMENT (32 - 1)
#define AI_RELOC_ALIGN(x) (((x) + (AI_RELOC_ALIGNMENT)) & ~(AI_RELOC_ALIGNMENT))
#define AI_RELOC_ALIGNMENT (32)
typedef struct ml_backend_state {
void *exec_ram_addr;
@ -133,19 +133,19 @@ int ml_backend_init_model(py_ml_model_obj_t *model) {
}
// Allocate executable memory.
state->exec_ram_size = AI_RELOC_ALIGN(rt.rt_ram_xip);
state->exec_ram_size = OMV_ALIGN_TO(rt.rt_ram_xip, AI_RELOC_ALIGNMENT);
state->exec_ram_addr = m_new(uint8_t, state->exec_ram_size + AI_RELOC_ALIGNMENT);
// Allocate external memory.
state->ext_ram_size = AI_RELOC_ALIGN(rt.ext_ram_sz);
state->ext_ram_size = OMV_ALIGN_TO(rt.ext_ram_sz, AI_RELOC_ALIGNMENT);
state->ext_ram_addr = m_new(uint8_t, state->ext_ram_size + AI_RELOC_ALIGNMENT);
// Create and install the relocatable model.
ll_aton_reloc_config config = {
.ext_ram_size = state->ext_ram_size,
.ext_ram_addr = AI_RELOC_ALIGN((uintptr_t) state->ext_ram_addr),
.ext_ram_addr = OMV_ALIGN_TO(state->ext_ram_addr, AI_RELOC_ALIGNMENT),
.exec_ram_size = state->exec_ram_size,
.exec_ram_addr = AI_RELOC_ALIGN((uintptr_t) state->exec_ram_addr),
.exec_ram_addr = OMV_ALIGN_TO(state->exec_ram_addr, AI_RELOC_ALIGNMENT),
.ext_param_addr = (uintptr_t) NULL,
// For COPY mode - XIP region is expected, else only RW region is requested.
// In the case where the HW epoch blob is embedded in the binary image, this

View File

@ -35,6 +35,8 @@
#include <stdint.h>
#include "imlib_config.h"
#include "omv_common.h"
#include "tensorflow/lite/micro/micro_op_resolver.h"
#include "tensorflow/lite/micro/micro_mutable_op_resolver.h"
#include "tensorflow/lite/micro/cortex_m_generic/debug_log_callback.h"
@ -52,8 +54,7 @@ extern "C" {
using namespace tflite;
#define TF_ARENA_EXTRA (512)
#define TF_ARENA_ALIGN (16 - 1)
#define TF_ARENA_ROUND(x) (((x) + TF_ARENA_ALIGN) & ~(TF_ARENA_ALIGN))
#define TF_ARENA_ALIGN (16)
typedef MicroMutableOpResolver<113> MicroOpsResolver;
typedef struct ml_backend_state {
@ -238,7 +239,7 @@ int ml_backend_init_model(py_ml_model_obj_t *model) {
mp_raise_msg(&mp_type_ValueError, MP_ERROR_TEXT("Failed to allocate tensors"));
}
// Round up the optimal arena size to a multiple of the alignment.
arena_size = TF_ARENA_ROUND(interpreter.arena_used_bytes()) + TF_ARENA_EXTRA;
arena_size = OMV_ALIGN_TO(interpreter.arena_used_bytes(), TF_ARENA_ALIGN) + TF_ARENA_EXTRA;
m_free(arena_memory);
// Allocate the persistent model state and interpreter.