boards/OPENMV_N6: Enable SPI LCD/TV Displays.

Triple buffering does not work at the moment.
This commit is contained in:
Kwabena W. Agyeman 2025-07-06 19:08:20 -07:00
parent 73d5e5d2c1
commit 90f48cdfe7
4 changed files with 35 additions and 2 deletions

View File

@ -216,6 +216,17 @@
// Physical SPI buses.
// SPI bus 2
#define OMV_SPI2_ID (2)
#define OMV_SPI2_SCLK_PIN (&omv_pin_A12_SPI2)
#define OMV_SPI2_MISO_PIN (&omv_pin_D11_SPI2)
#define OMV_SPI2_MOSI_PIN (&omv_pin_D7_SPI2)
#define OMV_SPI2_SSEL_PIN (&omv_pin_A11_SPI2)
#define OMV_SPI2_DMA_TX_CHANNEL (GPDMA1_Channel11)
#define OMV_SPI2_DMA_TX_REQUEST (GPDMA1_REQUEST_SPI2_TX)
#define OMV_SPI2_DMA_RX_CHANNEL (GPDMA1_Channel12)
#define OMV_SPI2_DMA_RX_REQUEST (GPDMA1_REQUEST_SPI2_RX)
// SPI bus 5
#define OMV_SPI5_ID (5)
#define OMV_SPI5_SCLK_PIN (&omv_pin_E15_SPI5)
@ -229,6 +240,18 @@
#define OMV_SPI_DMA_LIST_PORTS (DMA_LINK_ALLOCATED_PORT0)
#define OMV_SPI_DMA_XFER_PORTS (DMA_SRC_ALLOCATED_PORT0 | DMA_DEST_ALLOCATED_PORT1)
// SPI LCD Interface
#define OMV_SPI_DISPLAY_CONTROLLER (OMV_SPI2_ID)
#define OMV_SPI_DISPLAY_MOSI_PIN (&omv_pin_D7_SPI2)
#define OMV_SPI_DISPLAY_MISO_PIN (&omv_pin_D11_SPI2)
#define OMV_SPI_DISPLAY_SCLK_PIN (&omv_pin_A12_SPI2)
#define OMV_SPI_DISPLAY_SSEL_PIN (&omv_pin_A11_SPI2)
#define OMV_SPI_DISPLAY_RS_PIN (&omv_pin_D13_GPIO)
#define OMV_SPI_DISPLAY_RST_PIN (&omv_pin_G13_GPIO)
#define OMV_SPI_DISPLAY_BL_PIN (&omv_pin_G0_GPIO)
// TODO #define OMV_SPI_DISPLAY_TRIPLE_BUFFER (1)
// CSI SPI bus
#define OMV_CSI_SPI_ID (OMV_SPI5_ID)

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@ -31,6 +31,8 @@ MICROPY_PY_CSI_NG = 1
MICROPY_PY_FIR = 1
MICROPY_PY_IMU = 1
MICROPY_PY_ULAB = 1
MICROPY_PY_DISPLAY = 1
MICROPY_PY_TV = 1
MICROPY_PY_AUDIO = 1
MICROPY_PY_LWIP = 1
MICROPY_PY_SSL = 1

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@ -1,3 +1,11 @@
OMV_GPIO_DEFINE(A, 12, AF5, SPI2) // SPI_DISPLAY_SCLK
OMV_GPIO_DEFINE(D, 11, AF5, SPI2) // SPI_DISPLAY_MISO
OMV_GPIO_DEFINE(D, 7, AF5, SPI2) // SPI_DISPLAY_MOSI
OMV_GPIO_DEFINE(A, 11, AF5, SPI2) // SPI_DISPLAY_SSEL
OMV_GPIO_DEFINE(D, 13, NONE, GPIO) // SPI_DISPLAY_RS
OMV_GPIO_DEFINE(G, 13, NONE, GPIO) // SPI_DISPLAY_RST
OMV_GPIO_DEFINE(G, 0, NONE, GPIO) // SPI_DISPLAY_BL
OMV_GPIO_DEFINE(E, 15, AF5, SPI5) // SCLK
OMV_GPIO_DEFINE(D, 4, AF5, SPI5) // MISO
OMV_GPIO_DEFINE(A, 4, AF5, SPI5) // MOSI

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@ -668,7 +668,7 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi) {
if (hspi->Init.Direction == SPI_DIRECTION_2LINES || hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY) {
omv_gpio_config(spi_pins.miso_pin, OMV_GPIO_MODE_ALT, OMV_GPIO_PULL_NONE, OMV_GPIO_SPEED_HIGH, -1);
}
#if defined(STM32H7)
#if defined(STM32H7) || defined(STM32N6)
if (hspi->Init.Direction == SPI_DIRECTION_2LINES || hspi->Init.Direction == SPI_DIRECTION_2LINES_TXONLY) {
#else
if (hspi->Init.Direction == SPI_DIRECTION_2LINES || hspi->Init.Direction == SPI_DIRECTION_1LINE) {
@ -774,7 +774,7 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi) {
if (hspi->Init.Direction == SPI_DIRECTION_2LINES || hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY) {
omv_gpio_deinit(spi_pins.miso_pin);
}
#if defined(STM32H7)
#if defined(STM32H7) || defined(STM32N6)
if (hspi->Init.Direction == SPI_DIRECTION_2LINES || hspi->Init.Direction == SPI_DIRECTION_2LINES_TXONLY) {
#else
if (hspi->Init.Direction == SPI_DIRECTION_2LINES || hspi->Init.Direction == SPI_DIRECTION_1LINE) {