Merge pull request #1209 from openmv/dma_memory

Add DMA regions in each domain.
This commit is contained in:
Ibrahim Abd Elkader 2021-03-07 23:27:20 +02:00 committed by GitHub
commit 95783c0f49
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GPG Key ID: 4AEE18F83AFDEB23
9 changed files with 201 additions and 69 deletions

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@ -166,9 +166,20 @@
#define OMV_FLASH_EXT_ORIGIN 0x90000000 #define OMV_FLASH_EXT_ORIGIN 0x90000000
#define OMV_FLASH_EXT_LENGTH 16M #define OMV_FLASH_EXT_LENGTH 16M
// Use the MPU to set an uncacheable memory region. // Domain 1 DMA buffers region.
#define OMV_DMA_REGION_BASE (OMV_AXI_SRAM_ORIGIN+(496*1024)) #define OMV_DMA_MEMORY_D1 AXI_SRAM
#define OMV_DMA_REGION_SIZE MPU_REGION_SIZE_16KB #define OMV_DMA_REGION_D1_BASE (OMV_AXI_SRAM_ORIGIN+(496*1024))
#define OMV_DMA_REGION_D1_SIZE MPU_REGION_SIZE_16KB
// Domain 2 DMA buffers region.
//#define OMV_DMA_MEMORY_D2 SRAM3
//#define OMV_DMA_REGION_D2_BASE (OMV_SRAM3_ORIGIN+(0*1024))
//#define OMV_DMA_REGION_D2_SIZE MPU_REGION_SIZE_32KB
// Domain 3 DMA buffers region.
//#define OMV_DMA_MEMORY_D3 SRAM4
//#define OMV_DMA_REGION_D3_BASE (OMV_SRAM4_ORIGIN+(0*1024))
//#define OMV_DMA_REGION_D3_SIZE MPU_REGION_SIZE_64KB
// Image sensor I2C // Image sensor I2C
#define ISC_I2C (I2C3) #define ISC_I2C (I2C3)

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@ -149,7 +149,7 @@
#define OMV_HEAP_SIZE (244K) #define OMV_HEAP_SIZE (244K)
#define OMV_LINE_BUF_SIZE (3 * 1024) // Image line buffer round(640 * 2BPP * 2 buffers). #define OMV_LINE_BUF_SIZE (3 * 1024) // Image line buffer round(640 * 2BPP * 2 buffers).
#define OMV_MSC_BUF_SIZE (12K) // USB MSC bot data #define OMV_MSC_BUF_SIZE (2K) // USB MSC bot data
#define OMV_VFS_BUF_SIZE (1K) // VFS sturct + FATFS file buffer (624 bytes) #define OMV_VFS_BUF_SIZE (1K) // VFS sturct + FATFS file buffer (624 bytes)
#define OMV_JPEG_BUF_SIZE (32 * 1024) // IDE JPEG buffer (header + data). #define OMV_JPEG_BUF_SIZE (32 * 1024) // IDE JPEG buffer (header + data).
@ -170,9 +170,20 @@
#define OMV_AXI_SRAM_ORIGIN 0x24000000 #define OMV_AXI_SRAM_ORIGIN 0x24000000
#define OMV_AXI_SRAM_LENGTH 512K #define OMV_AXI_SRAM_LENGTH 512K
// Use the MPU to set an uncacheable memory region. // Domain 1 DMA buffers region.
#define OMV_DMA_REGION_BASE (OMV_AXI_SRAM_ORIGIN+(496*1024)) #define OMV_DMA_MEMORY_D1 AXI_SRAM
#define OMV_DMA_REGION_SIZE MPU_REGION_SIZE_16KB #define OMV_DMA_REGION_D1_BASE (OMV_AXI_SRAM_ORIGIN+(496*1024))
#define OMV_DMA_REGION_D1_SIZE MPU_REGION_SIZE_16KB
// Domain 2 DMA buffers region.
//#define OMV_DMA_MEMORY_D2 SRAM3
//#define OMV_DMA_REGION_D2_BASE (OMV_SRAM3_ORIGIN+(0*1024))
//#define OMV_DMA_REGION_D2_SIZE MPU_REGION_SIZE_32KB
// Domain 3 DMA buffers region.
//#define OMV_DMA_MEMORY_D3 SRAM4
//#define OMV_DMA_REGION_D3_BASE (OMV_SRAM4_ORIGIN+(0*1024))
//#define OMV_DMA_REGION_D3_SIZE MPU_REGION_SIZE_64KB
// Image sensor I2C // Image sensor I2C
#define ISC_I2C (I2C1) #define ISC_I2C (I2C1)

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@ -142,13 +142,13 @@
#define OMV_FFS_MEMORY DTCM // Flash filesystem cache memory #define OMV_FFS_MEMORY DTCM // Flash filesystem cache memory
#define OMV_MAIN_MEMORY SRAM1 // data, bss and heap #define OMV_MAIN_MEMORY SRAM1 // data, bss and heap
#define OMV_STACK_MEMORY ITCM // stack memory #define OMV_STACK_MEMORY ITCM // stack memory
#define OMV_DMA_MEMORY AXI_SRAM // DMA buffers memory. #define OMV_DMA_MEMORY AXI_SRAM // Misc DMA buffers memory.
#define OMV_FB_MEMORY DRAM // Framebuffer, fb_alloc #define OMV_FB_MEMORY DRAM // Framebuffer, fb_alloc
#define OMV_JPEG_MEMORY DRAM // JPEG buffer memory buffer. #define OMV_JPEG_MEMORY DRAM // JPEG buffer memory buffer.
#define OMV_JPEG_MEMORY_OFFSET (31M) // JPEG buffer is placed after FB/fballoc memory. #define OMV_JPEG_MEMORY_OFFSET (31M) // JPEG buffer is placed after FB/fballoc memory.
#define OMV_VOSPI_MEMORY SRAM4 // VoSPI buffer memory. #define OMV_VOSPI_MEMORY SRAM4 // VoSPI buffer memory.
#define OMV_FB_OVERLAY_MEMORY AXI_SRAM // _fballoc_overlay memory. #define OMV_FB_OVERLAY_MEMORY AXI_SRAM // Fast fb_alloc memory.
#define OMV_FB_OVERLAY_MEMORY_OFFSET (480*1024) // _fballoc_overlay #define OMV_FB_OVERLAY_MEMORY_OFFSET (496*1024) // Fast fb_alloc memory size.
#define OMV_FB_SIZE (20M) // FB memory: header + VGA/GS image #define OMV_FB_SIZE (20M) // FB memory: header + VGA/GS image
#define OMV_FB_ALLOC_SIZE (11M) // minimum fb alloc size #define OMV_FB_ALLOC_SIZE (11M) // minimum fb alloc size
@ -157,7 +157,7 @@
#define OMV_SDRAM_SIZE (32 * 1024 * 1024) // This needs to be here for UVC firmware. #define OMV_SDRAM_SIZE (32 * 1024 * 1024) // This needs to be here for UVC firmware.
#define OMV_LINE_BUF_SIZE (11 * 1024) // Image line buffer round(2592 * 2BPP * 2 buffers). #define OMV_LINE_BUF_SIZE (11 * 1024) // Image line buffer round(2592 * 2BPP * 2 buffers).
#define OMV_MSC_BUF_SIZE (12K) // USB MSC bot data #define OMV_MSC_BUF_SIZE (2K) // USB MSC bot data
#define OMV_VFS_BUF_SIZE (1K) // VFS sturct + FATFS file buffer (624 bytes) #define OMV_VFS_BUF_SIZE (1K) // VFS sturct + FATFS file buffer (624 bytes)
#define OMV_JPEG_BUF_SIZE (1024*1024) // IDE JPEG buffer (header + data). #define OMV_JPEG_BUF_SIZE (1024*1024) // IDE JPEG buffer (header + data).
@ -181,9 +181,20 @@
#define OMV_DRAM_LENGTH 32M #define OMV_DRAM_LENGTH 32M
#define OMV_FB_OVERLAY_MEMORY_ORIGIN OMV_AXI_SRAM_ORIGIN #define OMV_FB_OVERLAY_MEMORY_ORIGIN OMV_AXI_SRAM_ORIGIN
// Use the MPU to set an uncacheable memory region. // Domain 1 DMA buffers region.
#define OMV_DMA_REGION_BASE (OMV_AXI_SRAM_ORIGIN+OMV_FB_OVERLAY_MEMORY_OFFSET) #define OMV_DMA_MEMORY_D1 AXI_SRAM
#define OMV_DMA_REGION_SIZE MPU_REGION_SIZE_32KB #define OMV_DMA_REGION_D1_BASE (OMV_AXI_SRAM_ORIGIN+(496*1024))
#define OMV_DMA_REGION_D1_SIZE MPU_REGION_SIZE_16KB
// Domain 2 DMA buffers region.
#define OMV_DMA_MEMORY_D2 SRAM3
#define OMV_DMA_REGION_D2_BASE (OMV_SRAM3_ORIGIN+(0*1024))
#define OMV_DMA_REGION_D2_SIZE MPU_REGION_SIZE_32KB
// Domain 3 DMA buffers region.
#define OMV_DMA_MEMORY_D3 SRAM4
#define OMV_DMA_REGION_D3_BASE (OMV_SRAM4_ORIGIN+(0*1024))
#define OMV_DMA_REGION_D3_SIZE MPU_REGION_SIZE_64KB
// Image sensor I2C // Image sensor I2C
#define ISC_I2C (I2C1) #define ISC_I2C (I2C1)

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@ -144,8 +144,8 @@
#define OMV_JPEG_MEMORY DRAM // JPEG buffer memory buffer. #define OMV_JPEG_MEMORY DRAM // JPEG buffer memory buffer.
#define OMV_JPEG_MEMORY_OFFSET (63M) // JPEG buffer is placed after FB/fballoc memory. #define OMV_JPEG_MEMORY_OFFSET (63M) // JPEG buffer is placed after FB/fballoc memory.
#define OMV_VOSPI_MEMORY SRAM4 // VoSPI buffer memory. #define OMV_VOSPI_MEMORY SRAM4 // VoSPI buffer memory.
#define OMV_FB_OVERLAY_MEMORY AXI_SRAM // _fballoc_overlay memory. #define OMV_FB_OVERLAY_MEMORY AXI_SRAM // Fast fb_alloc memory.
#define OMV_FB_OVERLAY_MEMORY_OFFSET (480*1024) // _fballoc_overlay #define OMV_FB_OVERLAY_MEMORY_OFFSET (496*1024) // Fast fb_alloc memory size.
#define OMV_FB_SIZE (32M) // FB memory: header + VGA/GS image #define OMV_FB_SIZE (32M) // FB memory: header + VGA/GS image
#define OMV_FB_ALLOC_SIZE (31M) // minimum fb alloc size #define OMV_FB_ALLOC_SIZE (31M) // minimum fb alloc size
@ -154,7 +154,7 @@
#define OMV_SDRAM_SIZE (64 * 1024 * 1024) // This needs to be here for UVC firmware. #define OMV_SDRAM_SIZE (64 * 1024 * 1024) // This needs to be here for UVC firmware.
#define OMV_LINE_BUF_SIZE (11 * 1024) // Image line buffer round(2592 * 2BPP * 2 buffers). #define OMV_LINE_BUF_SIZE (11 * 1024) // Image line buffer round(2592 * 2BPP * 2 buffers).
#define OMV_MSC_BUF_SIZE (12K) // USB MSC bot data #define OMV_MSC_BUF_SIZE (2K) // USB MSC bot data
#define OMV_VFS_BUF_SIZE (1K) // VFS sturct + FATFS file buffer (624 bytes) #define OMV_VFS_BUF_SIZE (1K) // VFS sturct + FATFS file buffer (624 bytes)
#define OMV_JPEG_BUF_SIZE (1024*1024) // IDE JPEG buffer (header + data). #define OMV_JPEG_BUF_SIZE (1024*1024) // IDE JPEG buffer (header + data).
@ -178,9 +178,20 @@
#define OMV_DRAM_LENGTH 64M #define OMV_DRAM_LENGTH 64M
#define OMV_FB_OVERLAY_MEMORY_ORIGIN OMV_AXI_SRAM_ORIGIN #define OMV_FB_OVERLAY_MEMORY_ORIGIN OMV_AXI_SRAM_ORIGIN
// Use the MPU to set an uncacheable memory region. // Domain 1 DMA buffers region.
#define OMV_DMA_REGION_BASE (OMV_AXI_SRAM_ORIGIN+OMV_FB_OVERLAY_MEMORY_OFFSET) #define OMV_DMA_MEMORY_D1 AXI_SRAM
#define OMV_DMA_REGION_SIZE MPU_REGION_SIZE_32KB #define OMV_DMA_REGION_D1_BASE (OMV_AXI_SRAM_ORIGIN+(496*1024))
#define OMV_DMA_REGION_D1_SIZE MPU_REGION_SIZE_16KB
// Domain 2 DMA buffers region.
#define OMV_DMA_MEMORY_D2 SRAM3
#define OMV_DMA_REGION_D2_BASE (OMV_SRAM3_ORIGIN+(0*1024))
#define OMV_DMA_REGION_D2_SIZE MPU_REGION_SIZE_32KB
// Domain 3 DMA buffers region.
#define OMV_DMA_MEMORY_D3 SRAM4
#define OMV_DMA_REGION_D3_BASE (OMV_SRAM4_ORIGIN+(0*1024))
#define OMV_DMA_REGION_D3_SIZE MPU_REGION_SIZE_64KB
// Image sensor I2C // Image sensor I2C
#define ISC_I2C (I2C1) #define ISC_I2C (I2C1)

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@ -145,19 +145,19 @@
#define OMV_JPEG_MEMORY DRAM // JPEG buffer memory buffer. #define OMV_JPEG_MEMORY DRAM // JPEG buffer memory buffer.
#define OMV_JPEG_MEMORY_OFFSET (7M) // JPEG buffer is placed after FB/fballoc memory. #define OMV_JPEG_MEMORY_OFFSET (7M) // JPEG buffer is placed after FB/fballoc memory.
#define OMV_VOSPI_MEMORY SRAM4 // VoSPI buffer memory. #define OMV_VOSPI_MEMORY SRAM4 // VoSPI buffer memory.
#define OMV_FB_OVERLAY_MEMORY AXI_SRAM // _fballoc_overlay memory. #define OMV_FB_OVERLAY_MEMORY AXI_SRAM // Fast fb_alloc memory.
#define OMV_FB_OVERLAY_MEMORY_OFFSET (480*1024) // _fballoc_overlay #define OMV_FB_OVERLAY_MEMORY_OFFSET (480*1024) // Fast fb_alloc memory size.
#define OMV_CYW43_MEMORY FLASH_EXT // CYW43 firmware in external flash mmap'd flash. #define OMV_CYW43_MEMORY FLASH_EXT // CYW43 firmware in external flash mmap'd flash.
#define OMV_CYW43_MEMORY_OFFSET (0x90F00000)// Last Mbyte. #define OMV_CYW43_MEMORY_OFFSET (0x90F00000)// Last Mbyte.
#define OMV_FB_SIZE (4M) // FB memory: header + VGA/GS image #define OMV_FB_SIZE (4M) // FB memory: header + VGA/GS image
#define OMV_FB_ALLOC_SIZE (3M) // minimum fb alloc size #define OMV_FB_ALLOC_SIZE (3M) // minimum fb alloc size
#define OMV_STACK_SIZE (32K) #define OMV_STACK_SIZE (32K)
#define OMV_HEAP_SIZE (180K) #define OMV_HEAP_SIZE (164K)
#define OMV_SDRAM_SIZE (8 * 1024 * 1024) // This needs to be here for UVC firmware. #define OMV_SDRAM_SIZE (8 * 1024 * 1024) // This needs to be here for UVC firmware.
#define OMV_LINE_BUF_SIZE (11 * 1024) // Image line buffer round(2592 * 2BPP * 2 buffers). #define OMV_LINE_BUF_SIZE (11 * 1024) // Image line buffer round(2592 * 2BPP * 2 buffers).
#define OMV_MSC_BUF_SIZE (12K) // USB MSC bot data #define OMV_MSC_BUF_SIZE (2K) // USB MSC bot data
#define OMV_VFS_BUF_SIZE (1K) // VFS sturct + FATFS file buffer (624 bytes) #define OMV_VFS_BUF_SIZE (1K) // VFS sturct + FATFS file buffer (624 bytes)
#define OMV_JPEG_BUF_SIZE (1024*1024) // IDE JPEG buffer (header + data). #define OMV_JPEG_BUF_SIZE (1024*1024) // IDE JPEG buffer (header + data).
@ -168,7 +168,9 @@
#define OMV_DTCM_ORIGIN 0x20000000 // Note accessible by CPU and MDMA only. #define OMV_DTCM_ORIGIN 0x20000000 // Note accessible by CPU and MDMA only.
#define OMV_DTCM_LENGTH 128K #define OMV_DTCM_LENGTH 128K
#define OMV_SRAM1_ORIGIN 0x30000000 #define OMV_SRAM1_ORIGIN 0x30000000
#define OMV_SRAM1_LENGTH 288K #define OMV_SRAM1_LENGTH 272K // SRAM1 + SRAM2 + 1/2 SRAM3
#define OMV_SRAM3_ORIGIN 0x30044000
#define OMV_SRAM3_LENGTH 16K
#define OMV_SRAM4_ORIGIN 0x38000000 #define OMV_SRAM4_ORIGIN 0x38000000
#define OMV_SRAM4_LENGTH 64K #define OMV_SRAM4_LENGTH 64K
#define OMV_AXI_SRAM_ORIGIN 0x24000000 #define OMV_AXI_SRAM_ORIGIN 0x24000000
@ -179,9 +181,20 @@
#define OMV_FLASH_EXT_LENGTH 16M #define OMV_FLASH_EXT_LENGTH 16M
#define OMV_FB_OVERLAY_MEMORY_ORIGIN OMV_AXI_SRAM_ORIGIN #define OMV_FB_OVERLAY_MEMORY_ORIGIN OMV_AXI_SRAM_ORIGIN
// Use the MPU to set an uncacheable memory region. // Domain 1 DMA buffers region.
#define OMV_DMA_REGION_BASE (OMV_AXI_SRAM_ORIGIN+OMV_FB_OVERLAY_MEMORY_OFFSET) #define OMV_DMA_MEMORY_D1 AXI_SRAM
#define OMV_DMA_REGION_SIZE MPU_REGION_SIZE_32KB #define OMV_DMA_REGION_D1_BASE (OMV_AXI_SRAM_ORIGIN+(480*1024))
#define OMV_DMA_REGION_D1_SIZE MPU_REGION_SIZE_32KB
// Domain 2 DMA buffers region.
#define OMV_DMA_MEMORY_D2 SRAM3
#define OMV_DMA_REGION_D2_BASE (OMV_SRAM3_ORIGIN+(0*1024))
#define OMV_DMA_REGION_D2_SIZE MPU_REGION_SIZE_16KB
// Domain 3 DMA buffers region.
#define OMV_DMA_MEMORY_D3 SRAM4
#define OMV_DMA_REGION_D3_BASE (OMV_SRAM4_ORIGIN+(0*1024))
#define OMV_DMA_REGION_D3_SIZE MPU_REGION_SIZE_64KB
// Image sensor I2C // Image sensor I2C
#define ISC_I2C (I2C3) #define ISC_I2C (I2C3)

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@ -48,7 +48,7 @@ static volatile uint32_t xfer_status = 0;
#define PDM_BUFFER_SIZE (16384) #define PDM_BUFFER_SIZE (16384)
// BDMA can only access D3 SRAM4 memory. // BDMA can only access D3 SRAM4 memory.
uint8_t OMV_ATTR_SECTION(OMV_ATTR_ALIGNED(PDM_BUFFER[PDM_BUFFER_SIZE], 32), ".d3_sram_buffer"); uint8_t OMV_ATTR_SECTION(OMV_ATTR_ALIGNED(PDM_BUFFER[PDM_BUFFER_SIZE], 32), ".d3_dma_buffer");
// Pendsv dispatch callback. // Pendsv dispatch callback.
static void audio_pendsv_callback(void); static void audio_pendsv_callback(void);

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@ -17,7 +17,7 @@ ENTRY(Reset_Handler)
/* Specify the memory areas */ /* Specify the memory areas */
MEMORY MEMORY
{ {
DTCM (xrw) : ORIGIN = OMV_DTCM_ORIGIN, LENGTH = OMV_DTCM_LENGTH DTCM (xrw) : ORIGIN = OMV_DTCM_ORIGIN, LENGTH = OMV_DTCM_LENGTH
#if defined(OMV_ITCM_ORIGIN) #if defined(OMV_ITCM_ORIGIN)
ITCM (xrw) : ORIGIN = OMV_ITCM_ORIGIN, LENGTH = OMV_ITCM_LENGTH ITCM (xrw) : ORIGIN = OMV_ITCM_ORIGIN, LENGTH = OMV_ITCM_LENGTH
#endif #endif
@ -120,50 +120,73 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
} >OMV_FB_MEMORY } >OMV_FB_MEMORY
/* Misc DMA buffers kept in uncachable region */ #if defined(OMV_FB_OVERLAY_MEMORY)
.fb_overlay_memory (NOLOAD) :
{
. = ALIGN(4);
_fballoc_overlay_start = .;
. = . + OMV_FB_OVERLAY_MEMORY_OFFSET;
_fballoc_overlay = .;
_fballoc_overlay_end = .;
} >OMV_FB_OVERLAY_MEMORY
#endif
/* Misc DMA buffers section */
.dma_memory (NOLOAD) : .dma_memory (NOLOAD) :
{ {
#if defined(OMV_FB_OVERLAY_MEMORY) . = ALIGN(16);
. = ALIGN(4) + OMV_FB_OVERLAY_MEMORY_OFFSET;
_fballoc_overlay = .;
#endif
. = ALIGN(4);
_line_buf = .; // Image line buffer. _line_buf = .; // Image line buffer.
. = . + OMV_LINE_BUF_SIZE; . = . + OMV_LINE_BUF_SIZE;
. = ALIGN(4); . = ALIGN(16);
_msc_buf = .; // USB MSC bot data (2K) _msc_buf = .; // USB MSC bot data (2K)
. = . + OMV_MSC_BUF_SIZE; . = . + OMV_MSC_BUF_SIZE;
. = ALIGN(4); . = ALIGN(16);
_vfs_buf = .; // VFS sturct + FATFS file buffer (around 624 bytes) _vfs_buf = .; // VFS sturct + FATFS file buffer (around 624 bytes)
. = . + OMV_VFS_BUF_SIZE; . = . + OMV_VFS_BUF_SIZE;
#if !defined(OMV_FFS_MEMORY) #if !defined(OMV_FFS_MEMORY)
. = ALIGN(4); . = ALIGN(16);
_ffs_cache = .; // Flash filesystem cache _ffs_cache = .; // Flash filesystem cache
. = . + OMV_FFS_BUF_SIZE; . = . + OMV_FFS_BUF_SIZE;
#endif #endif
#if !defined(OMV_JPEG_MEMORY) #if !defined(OMV_JPEG_MEMORY)
. = ALIGN(4); . = ALIGN(16);
_jpeg_buf = .; // IDE JPEG buffer _jpeg_buf = .; // IDE JPEG buffer
. = . + OMV_JPEG_BUF_SIZE; . = . + OMV_JPEG_BUF_SIZE;
#endif #endif
. = ALIGN(4); . = ALIGN(16);
*(.dma_buffer) *(.dma_buffer)
} >OMV_DMA_MEMORY } >OMV_DMA_MEMORY
#if defined(OMV_SRAM4_ORIGIN) /* Domain 1 DMA buffers. */
/* D3 SRAM4 memory */ #if defined(OMV_DMA_MEMORY_D1)
.d3_sram (NOLOAD) : .d1_dma_memory (NOLOAD) :
{ {
. = ALIGN(4); . = ALIGN(16);
*(.d3_sram_buffer) *(.d1_dma_buffer)
} >SRAM4 } >OMV_DMA_MEMORY_D1
#endif
/* Domain 2 DMA buffers. */
#if defined(OMV_DMA_MEMORY_D2)
.d2_dma_memory (NOLOAD) :
{
. = ALIGN(16);
*(.d2_dma_buffer)
} >OMV_DMA_MEMORY_D2
#endif
/* Domain 3 DMA buffers. */
#if defined(OMV_DMA_MEMORY_D3)
.d3_dma_memory (NOLOAD) :
{
. = ALIGN(16);
*(.d3_dma_buffer)
} >OMV_DMA_MEMORY_D3
#endif #endif
/* Initialized data sections */ /* Initialized data sections */
@ -187,6 +210,7 @@ SECTIONS
{ {
. = ALIGN(4); . = ALIGN(4);
_sbss = .; // Used by the startup to initialize the .bss secion _sbss = .; // Used by the startup to initialize the .bss secion
. = ALIGN(4);
*(.bss*) *(.bss*)
. = ALIGN(4); . = ALIGN(4);
*(COMMON) *(COMMON)

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@ -43,29 +43,48 @@ void HAL_MspInit(void)
/* Set the system clock */ /* Set the system clock */
SystemClock_Config(); SystemClock_Config();
#if defined(OMV_DMA_REGION_BASE) #if defined(OMV_DMA_REGION_D1_BASE)\
|| defined(OMV_DMA_REGION_D2_BASE)\
|| defined(OMV_DMA_REGION_D3_BASE)
__DSB(); __ISB(); __DSB(); __ISB();
HAL_MPU_Disable(); HAL_MPU_Disable();
/* Configure the MPU attributes to disable caching DMA buffers */ /* Configure the MPU attributes to disable caching DMA buffers */
MPU_Region_InitTypeDef MPU_InitStruct; MPU_Region_InitTypeDef MPU_InitStruct;
MPU_InitStruct.Enable = MPU_REGION_ENABLE; MPU_InitStruct.Enable = MPU_REGION_ENABLE;
MPU_InitStruct.BaseAddress = OMV_DMA_REGION_BASE;
MPU_InitStruct.Size = OMV_DMA_REGION_SIZE;
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
MPU_InitStruct.Number = MPU_REGION_NUMBER15;
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
MPU_InitStruct.SubRegionDisable = 0x00; MPU_InitStruct.SubRegionDisable = 0x00;
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
#if defined(OMV_DMA_REGION_D1_BASE)
MPU_InitStruct.Number = MPU_REGION_NUMBER15;
MPU_InitStruct.BaseAddress = OMV_DMA_REGION_D1_BASE;
MPU_InitStruct.Size = OMV_DMA_REGION_D1_SIZE;
HAL_MPU_ConfigRegion(&MPU_InitStruct); HAL_MPU_ConfigRegion(&MPU_InitStruct);
#endif // defined(OMV_DMA_REGION_D1_BASE)
#if defined(OMV_DMA_REGION_D2_BASE)
MPU_InitStruct.Number = MPU_REGION_NUMBER14;
MPU_InitStruct.BaseAddress = OMV_DMA_REGION_D2_BASE;
MPU_InitStruct.Size = OMV_DMA_REGION_D2_SIZE;
HAL_MPU_ConfigRegion(&MPU_InitStruct);
#endif // defined(OMV_DMA_REGION_D2_BASE)
#if defined(OMV_DMA_REGION_D3_BASE)
MPU_InitStruct.Number = MPU_REGION_NUMBER13;
MPU_InitStruct.BaseAddress = OMV_DMA_REGION_D3_BASE;
MPU_InitStruct.Size = OMV_DMA_REGION_D3_SIZE;
HAL_MPU_ConfigRegion(&MPU_InitStruct);
#endif // defined(OMV_DMA_REGION_D3_BASE)
/* Enable the MPU */ /* Enable the MPU */
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT); HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
__DSB(); __ISB(); __DSB(); __ISB();
#endif #endif // defined(OMV_DMA_REGION_D1_BASE || OMV_DMA_REGION_D2_BASE || OMV_DMA_REGION_D3_BASE)
/* Enable I/D cache */ /* Enable I/D cache */
#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_H7) #if defined(MCU_SERIES_F7) || defined(MCU_SERIES_H7)

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@ -101,43 +101,75 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
} >OMV_FB_MEMORY } >OMV_FB_MEMORY
/* Misc DMA buffers kept in uncachable region */ #if defined(OMV_FB_OVERLAY_MEMORY)
.fb_overlay_memory (NOLOAD) :
{
. = ALIGN(4);
_fballoc_overlay_start = .;
. = . + OMV_FB_OVERLAY_MEMORY_OFFSET;
_fballoc_overlay = .;
_fballoc_overlay_end = .;
} >OMV_FB_OVERLAY_MEMORY
#endif
/* Misc DMA buffers section */
.dma_memory (NOLOAD) : .dma_memory (NOLOAD) :
{ {
#if defined(OMV_FB_OVERLAY_MEMORY) . = ALIGN(16);
. = ALIGN(4) + OMV_FB_OVERLAY_MEMORY_OFFSET;
_fballoc_overlay = .;
#endif
. = ALIGN(4);
_line_buf = .; // Image line buffer. _line_buf = .; // Image line buffer.
. = . + OMV_LINE_BUF_SIZE; . = . + OMV_LINE_BUF_SIZE;
. = ALIGN(4); . = ALIGN(16);
_msc_buf = .; // USB MSC bot data (2K) _msc_buf = .; // USB MSC bot data (2K)
. = . + OMV_MSC_BUF_SIZE; . = . + OMV_MSC_BUF_SIZE;
. = ALIGN(4); . = ALIGN(16);
_vfs_buf = .; // VFS sturct + FATFS file buffer (around 624 bytes) _vfs_buf = .; // VFS sturct + FATFS file buffer (around 624 bytes)
. = . + OMV_VFS_BUF_SIZE; . = . + OMV_VFS_BUF_SIZE;
#if !defined(OMV_FFS_MEMORY) #if !defined(OMV_FFS_MEMORY)
. = ALIGN(4); . = ALIGN(16);
_ffs_cache = .; // Flash filesystem cache _ffs_cache = .; // Flash filesystem cache
. = . + OMV_FFS_BUF_SIZE; . = . + OMV_FFS_BUF_SIZE;
#endif #endif
#if !defined(OMV_JPEG_MEMORY) #if !defined(OMV_JPEG_MEMORY)
. = ALIGN(4); . = ALIGN(16);
_jpeg_buf = .; // IDE JPEG buffer _jpeg_buf = .; // IDE JPEG buffer
. = . + OMV_JPEG_BUF_SIZE; . = . + OMV_JPEG_BUF_SIZE;
#endif #endif
. = ALIGN(4); . = ALIGN(16);
*(.dma_buffer) *(.dma_buffer)
} >OMV_DMA_MEMORY } >OMV_DMA_MEMORY
/* Domain 1 DMA buffers. */
#if defined(OMV_DMA_MEMORY_D1)
.d1_dma_memory (NOLOAD) :
{
. = ALIGN(16);
*(.d1_dma_buffer)
} >OMV_DMA_MEMORY_D1
#endif
/* Domain 2 DMA buffers. */
#if defined(OMV_DMA_MEMORY_D2)
.d2_dma_memory (NOLOAD) :
{
. = ALIGN(16);
*(.d2_dma_buffer)
} >OMV_DMA_MEMORY_D2
#endif
/* Domain 3 DMA buffers. */
#if defined(OMV_DMA_MEMORY_D3)
.d3_dma_memory (NOLOAD) :
{
. = ALIGN(16);
*(.d3_dma_buffer)
} >OMV_DMA_MEMORY_D3
#endif
/* Initialized data sections */ /* Initialized data sections */
.data : .data :
{ {
@ -181,11 +213,11 @@ SECTIONS
/* Make sure there is enough ram for the stack */ /* Make sure there is enough ram for the stack */
._stack (NOLOAD) : ._stack (NOLOAD) :
{ {
. = ALIGN(4); . = ALIGN(8);
_sstack = .; _sstack = .;
. = . + _stack_size; . = . + _stack_size;
. = ALIGN(4); . = ALIGN(8);
_estack = .; _estack = .;
} >OMV_STACK_MEMORY } >OMV_STACK_MEMORY