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Merge pull request #829 from kwagyeman/kwabena/stop_disabling_interrupts
Remove disabling interrupts
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commit
981b3bbe0a
@ -74,12 +74,9 @@ int cambus_deinit(I2C_HandleTypeDef *i2c)
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int cambus_scan(I2C_HandleTypeDef *i2c)
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{
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for (uint8_t addr=0x09; addr<=0x77; addr++) {
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__disable_irq();
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if (HAL_I2C_IsDeviceReady(i2c, addr << 1, 10, I2C_TIMEOUT) == HAL_OK) {
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__enable_irq();
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return (addr << 1);
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}
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__enable_irq();
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}
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return 0;
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@ -97,12 +94,10 @@ int cambus_readb(I2C_HandleTypeDef *i2c, uint8_t slv_addr, uint8_t reg_addr, uin
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{
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int ret = 0;
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__disable_irq();
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if((HAL_I2C_Master_Transmit(i2c, slv_addr, ®_addr, 1, I2C_TIMEOUT) != HAL_OK)
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|| (HAL_I2C_Master_Receive (i2c, slv_addr, reg_data, 1, I2C_TIMEOUT) != HAL_OK)) {
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ret = -1;
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}
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__enable_irq();
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return ret;
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}
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@ -111,47 +106,39 @@ int cambus_writeb(I2C_HandleTypeDef *i2c, uint8_t slv_addr, uint8_t reg_addr, ui
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int ret=0;
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uint8_t buf[] = {reg_addr, reg_data};
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__disable_irq();
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if(HAL_I2C_Master_Transmit(i2c, slv_addr, buf, 2, I2C_TIMEOUT) != HAL_OK) {
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ret = -1;
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}
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__enable_irq();
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return ret;
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}
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int cambus_readb2(I2C_HandleTypeDef *i2c, uint8_t slv_addr, uint16_t reg_addr, uint8_t *reg_data)
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{
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int ret=0;
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__disable_irq();
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if (HAL_I2C_Mem_Read(i2c, slv_addr, reg_addr,
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I2C_MEMADD_SIZE_16BIT, reg_data, 1, I2C_TIMEOUT) != HAL_OK) {
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ret = -1;
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}
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__enable_irq();
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return ret;
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}
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int cambus_writeb2(I2C_HandleTypeDef *i2c, uint8_t slv_addr, uint16_t reg_addr, uint8_t reg_data)
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{
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int ret=0;
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__disable_irq();
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if (HAL_I2C_Mem_Write(i2c, slv_addr, reg_addr,
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I2C_MEMADD_SIZE_16BIT, ®_data, 1, I2C_TIMEOUT) != HAL_OK) {
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ret = -1;
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}
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__enable_irq();
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return ret;
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}
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int cambus_readw(I2C_HandleTypeDef *i2c, uint8_t slv_addr, uint8_t reg_addr, uint16_t *reg_data)
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{
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int ret=0;
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__disable_irq();
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if (HAL_I2C_Mem_Read(i2c, slv_addr, reg_addr,
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I2C_MEMADD_SIZE_8BIT, (uint8_t*) reg_data, 2, I2C_TIMEOUT) != HAL_OK) {
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ret = -1;
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}
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__enable_irq();
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*reg_data = (*reg_data >> 8) | (*reg_data << 8);
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return ret;
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}
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@ -160,24 +147,20 @@ int cambus_writew(I2C_HandleTypeDef *i2c, uint8_t slv_addr, uint8_t reg_addr, ui
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{
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int ret=0;
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reg_data = (reg_data >> 8) | (reg_data << 8);
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__disable_irq();
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if (HAL_I2C_Mem_Write(i2c, slv_addr, reg_addr,
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I2C_MEMADD_SIZE_8BIT, (uint8_t*) ®_data, 2, I2C_TIMEOUT) != HAL_OK) {
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ret = -1;
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}
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__enable_irq();
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return ret;
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}
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int cambus_readw2(I2C_HandleTypeDef *i2c, uint8_t slv_addr, uint16_t reg_addr, uint16_t *reg_data)
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{
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int ret=0;
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__disable_irq();
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if (HAL_I2C_Mem_Read(i2c, slv_addr, reg_addr,
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I2C_MEMADD_SIZE_16BIT, (uint8_t*) reg_data, 2, I2C_TIMEOUT) != HAL_OK) {
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ret = -1;
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}
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__enable_irq();
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*reg_data = (*reg_data >> 8) | (*reg_data << 8);
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return ret;
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}
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@ -186,12 +169,10 @@ int cambus_writew2(I2C_HandleTypeDef *i2c, uint8_t slv_addr, uint16_t reg_addr,
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{
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int ret=0;
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reg_data = (reg_data >> 8) | (reg_data << 8);
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__disable_irq();
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if (HAL_I2C_Mem_Write(i2c, slv_addr, reg_addr,
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I2C_MEMADD_SIZE_16BIT, (uint8_t*) ®_data, 2, I2C_TIMEOUT) != HAL_OK) {
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ret = -1;
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}
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__enable_irq();
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return ret;
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}
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@ -48,7 +48,6 @@
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#include "conf_winc.h"
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#include "py/nlr.h"
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#include "py/runtime.h"
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#include "irq.h"
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#include "pin.h"
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#include "genhdr/pins.h"
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#include "extint.h"
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@ -92,30 +91,22 @@ static sint8 nm_i2c_write_special(uint8 *wb1, uint16 sz1, uint8 *wb2, uint16 sz2
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#endif
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#ifdef CONF_WINC_USE_SPI
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static sint8 spi_rw(uint8 *tx_buf, uint8 *rx_buf, uint16 u16Sz)
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{
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uint32_t basepri;
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sint8 result = M2M_SUCCESS;
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// Allow systick to run.
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basepri = raise_irq_pri(IRQ_PRI_UART);
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sint8 result = M2M_SUCCESS;
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WINC_CS_LOW();
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if (tx_buf != 0) {
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if (HAL_SPI_Transmit(&SPI_HANDLE, tx_buf, u16Sz, WINC_SPI_TIMEOUT) != HAL_OK) {
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result = M2M_ERR_BUS_FAIL;
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}
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} else {
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tx_buf = rx_buf;
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memset(tx_buf, 0, u16Sz);
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if (HAL_SPI_TransmitReceive(&SPI_HANDLE, tx_buf, rx_buf, u16Sz, WINC_SPI_TIMEOUT) != HAL_OK) {
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} else {
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memset(rx_buf, 0, u16Sz);
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if (HAL_SPI_TransmitReceive(&SPI_HANDLE, rx_buf, rx_buf, u16Sz, WINC_SPI_TIMEOUT) != HAL_OK) {
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result = M2M_ERR_BUS_FAIL;
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}
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}
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WINC_CS_HIGH();
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restore_irq_pri(basepri);
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return result;
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WINC_CS_HIGH();
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return result;
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}
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#endif
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