Merge pull request #2300 from openmv/openamp_example_script

scripts/examples: Add Open-AMP example.
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Ibrahim Abdelkader 2024-07-19 11:49:53 +02:00 committed by GitHub
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4 changed files with 51 additions and 7 deletions

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@ -0,0 +1,37 @@
# This work is licensed under the MIT license.
# Copyright (c) 2024 OpenMV LLC. All rights reserved.
# https://github.com/openmv/openmv/blob/master/LICENSE
#
# This example demonstrates the most basic use of Open-AMP to communicate between two cores
# on dual-core micro-controllers. To run this example, firmware for the secondary core is
# required. For testing purposes, demo firmware for the secondary core is provided here:
# https://github.com/iabdalkader/openamp_vuart
# To configure and build the firmware, please follow the instructions in the README file.
#
# Note that on most micro-controllers it's not possible to reset the secondary core without
# a full reset, so running and then stopping this script may result in a full reset of the
# board, which is completely normal.
import openamp
import time
def ept_recv_callback(src_addr, data):
print("Received message: ", data.decode())
# Create a new RPMsg endpoint to communicate with the M4.
ept = openamp.Endpoint("vuart-channel", callback=ept_recv_callback)
# Create a remoteproc object, load its firmware and start it. Note that the remote core
# can also boot from an entry point in flash (such as 0x081E0000) if a firmware is there.
# rproc = openamp.RProc(0x08180000)
rproc = openamp.RemoteProc("vuart.elf")
rproc.start()
count = 0
while True:
if ept.is_ready():
ept.send("Hello World %d!" % count, timeout=1000)
count += 1
time.sleep_ms(1000)

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@ -26,6 +26,7 @@
"examples/09-WiFi/(?!WINC1500).*$", "^(?!arduino_nano_33_ble_sense).*$", ".+", ""
"examples/09-WiFi/WINC1500", "(OPENMV2|OPENMV3|OPENMV4|OPENMV4P|OPENMVPT)", ".+", ""
"examples/10-Bluetooth", "(OPENMV_RT1060|ARDUINO_GIGA|ARDUINO_PORTENTA_H7|ARDUINO_NICLA_VISION|ARDUINO_NANO_RP2040_CONNECT)", ".+", ""
"examples/11-Open-AMP", "(ARDUINO_GIGA|ARDUINO_PORTENTA_H7)", ".+", ""
"examples/50-OpenMV-Boards/50-STM32-Boards", "(OPENMV2|OPENMV3|OPENMV4|OPENMV4P|OPENMVPT)", ".+", "OpenMV-Boards(/50-STM32-Boards)?$"
"examples/50-OpenMV-Boards/50-IMXRT-Boards", "OPENMV_RT1060", ".+", "OpenMV-Boards(/50-IMXRT-Boards)?$"
"examples/50-OpenMV-Boards/51-Pure-Thermal", "OPENMVPT", ".+", "OpenMV-Boards(/51-Pure-Thermal)?$"

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@ -111,12 +111,12 @@
// Linker script constants (see the linker script template stm32fxxx.ld.S).
// Note: fb_alloc is a stack-based, dynamically allocated memory on FB.
// The maximum available fb_alloc memory = FB_ALLOC_SIZE + FB_SIZE - (w*h*bpp).
#define OMV_MAIN_MEMORY SRAM1 // Data/BSS memory
#define OMV_MAIN_MEMORY DTCM // Data/BSS memory
#define OMV_STACK_MEMORY DTCM // stack memory
#define OMV_STACK_SIZE (64K)
#define OMV_STACK_SIZE (32K)
#define OMV_FB_MEMORY DRAM // Framebuffer, fb_alloc
#define OMV_FB_SIZE (3M) // FB memory: header + VGA/GS image
#define OMV_FB_ALLOC_SIZE (2M) // minimum fb alloc size
#define OMV_FB_ALLOC_SIZE (1M) // minimum fb alloc size
#define OMV_FB_OVERLAY_MEMORY AXI_SRAM // Fast fb_alloc memory.
#define OMV_FB_OVERLAY_SIZE (480K) // Fast fb_alloc memory size.
#define OMV_JPEG_MEMORY DRAM // JPEG buffer memory buffer.
@ -127,10 +127,14 @@
#define OMV_DMA_MEMORY_D1 AXI_SRAM // Domain 1 DMA buffers.
#define OMV_DMA_MEMORY_D2 SRAM3 // Domain 2 DMA buffers.
#define OMV_DMA_MEMORY_D3 SRAM4 // Domain 3 DMA buffers.
#define OMV_OPENAMP_MEMORY SRAM1
#define OMV_OPENAMP_SIZE (64K)
#define OMV_CORE1_MEMORY DRAM
#define OMV_CORE1_SIZE (512K)
#define OMV_GC_BLOCK0_MEMORY SRAM1 // Main GC block.
#define OMV_GC_BLOCK0_SIZE (160K)
#define OMV_GC_BLOCK1_MEMORY DRAM // Extra GC block 0.
#define OMV_GC_BLOCK1_SIZE (2M)
#define OMV_GC_BLOCK0_SIZE (192K)
#define OMV_GC_BLOCK1_MEMORY DRAM // Extra GC block 1.
#define OMV_GC_BLOCK1_SIZE (2560K)
#define OMV_MSC_BUF_SIZE (2K) // USB MSC bot data
#define OMV_VFS_BUF_SIZE (1K) // VFS struct + FATFS file buffer (624 bytes)
#define OMV_SDRAM_SIZE (8 * 1024 * 1024) // This needs to be here for UVC firmware.
@ -142,7 +146,7 @@
#define OMV_DTCM_ORIGIN 0x20000000 // Note accessible by CPU and MDMA only.
#define OMV_DTCM_LENGTH 128K
#define OMV_SRAM1_ORIGIN 0x30000000
#define OMV_SRAM1_LENGTH 256K // SRAM1 + SRAM2
#define OMV_SRAM1_LENGTH 256K // SRAM1 + SRAM2
#define OMV_SRAM3_ORIGIN 0x30040000 // Second half of SRAM3 reserved for M4.
#define OMV_SRAM3_LENGTH 16K
#define OMV_SRAM4_ORIGIN 0x38000000

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@ -33,3 +33,5 @@ MICROPY_PY_AUDIO = 1
MICROPY_PY_DISPLAY = 1
MICROPY_PY_TV = 1
MICROPY_PY_BUZZER = 0
MICROPY_PY_OPENAMP = 1
MICROPY_PY_OPENAMP_REMOTEPROC = 1