Set H7 frequency to 480MHz.

* According to ST, the H7 can actually run at 480MHz.
This commit is contained in:
iabdalkader 2019-04-22 00:46:39 +02:00
parent 3ee5bd61a2
commit ab94cb14fd
2 changed files with 3 additions and 3 deletions

View File

@ -229,10 +229,10 @@ void SystemClock_Config(void)
RCC_OscInitStruct.PLL.PLLQ = 9; RCC_OscInitStruct.PLL.PLLQ = 9;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLR = 2; RCC_OscInitStruct.PLL.PLLR = 2;
#elif defined (STM32H743xx)// 400MHz/48MHz #elif defined (STM32H743xx)// 480MHz/48MHz
flash_latency = FLASH_LATENCY_2; flash_latency = FLASH_LATENCY_2;
RCC_OscInitStruct.PLL.PLLM = 3; RCC_OscInitStruct.PLL.PLLM = 3;
RCC_OscInitStruct.PLL.PLLN = 200; RCC_OscInitStruct.PLL.PLLN = 240;
RCC_OscInitStruct.PLL.PLLP = 2; RCC_OscInitStruct.PLL.PLLP = 2;
RCC_OscInitStruct.PLL.PLLQ = 8; RCC_OscInitStruct.PLL.PLLQ = 8;
RCC_OscInitStruct.PLL.PLLR = 2; RCC_OscInitStruct.PLL.PLLR = 2;

View File

@ -99,7 +99,7 @@
#define SCCB_PORT (GPIOB) #define SCCB_PORT (GPIOB)
#define SCCB_SCL_PIN (GPIO_PIN_8) #define SCCB_SCL_PIN (GPIO_PIN_8)
#define SCCB_SDA_PIN (GPIO_PIN_9) #define SCCB_SDA_PIN (GPIO_PIN_9)
#define SCCB_TIMING (0x40604E73) // Frequency: 100KHz Rise Time: 100ns Fall Time: 20ns #define SCCB_TIMING (0x20D09DE7) // Frequency: 100KHz Rise Time: 100ns Fall Time: 20ns
/* DCMI */ /* DCMI */
#define DCMI_TIM (TIM1) #define DCMI_TIM (TIM1)