Merge pull request #2699 from openmv/add_dsi_pll_config
Some checks are pending
🔥 Firmware Build / build-firmware (ARDUINO_GIGA) (push) Waiting to run
🔥 Firmware Build / build-firmware (ARDUINO_NANO_33_BLE_SENSE) (push) Waiting to run
🔥 Firmware Build / build-firmware (ARDUINO_NANO_RP2040_CONNECT) (push) Waiting to run
🔥 Firmware Build / build-firmware (ARDUINO_NICLA_VISION) (push) Waiting to run
🔥 Firmware Build / build-firmware (ARDUINO_PORTENTA_H7) (push) Waiting to run
🔥 Firmware Build / build-firmware (DOCKER) (push) Waiting to run
🔥 Firmware Build / build-firmware (OPENMV2) (push) Waiting to run
🔥 Firmware Build / build-firmware (OPENMV3) (push) Waiting to run
🔥 Firmware Build / build-firmware (OPENMV4) (push) Waiting to run
🔥 Firmware Build / build-firmware (OPENMV4P) (push) Waiting to run
🔥 Firmware Build / build-firmware (OPENMVPT) (push) Waiting to run
🔥 Firmware Build / build-firmware (OPENMV_AE3) (push) Waiting to run
🔥 Firmware Build / build-firmware (OPENMV_RT1060) (push) Waiting to run
🔥 Firmware Build / code-size-report (push) Blocked by required conditions
🔥 Firmware Build / stable-release (push) Blocked by required conditions
🔥 Firmware Build / development-release (push) Blocked by required conditions

ports/stm32: Add DSI PLL config.
This commit is contained in:
Ibrahim Abdelkader 2025-06-02 11:12:48 +03:00 committed by GitHub
commit c09db0f332
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
2 changed files with 8 additions and 3 deletions

View File

@ -105,6 +105,11 @@
#define OMV_OSC_PLL3VCO (RCC_PLL3VCOWIDE)
#define OMV_OSC_PLL3FRAC (0)
// DSI PLL
#define OMV_DSI_PLL_NDIV (125)
#define OMV_DSI_PLL_IDF (DSI_PLL_IN_DIV4)
#define OMV_DSI_PLL_ODF (DSI_PLL_OUT_DIV1)
// Clock Sources
#define OMV_OSC_PLL_CLKSOURCE RCC_PLLSOURCE_HSE
#define OMV_OSC_USB_CLKSOURCE RCC_USBCLKSOURCE_HSI48

View File

@ -260,9 +260,9 @@ static void dsi_init(py_display_obj_t *self) {
uint32_t pixel_clock = (dm.pixel_clock * self->refresh) / 60;
DSI_PLLInitTypeDef dsi_pllinit;
dsi_pllinit.PLLNDIV = 125;
dsi_pllinit.PLLIDF = DSI_PLL_IN_DIV4;
dsi_pllinit.PLLODF = DSI_PLL_OUT_DIV1;
dsi_pllinit.PLLNDIV = OMV_DSI_PLL_NDIV;
dsi_pllinit.PLLIDF = OMV_DSI_PLL_IDF;
dsi_pllinit.PLLODF = OMV_DSI_PLL_ODF;
uint32_t LANE_BYTE_CLOCK = 62500;
display.hdsi.Instance = DSI;