Merge pull request #2501 from openmv/stm32_spi_fixes
Some checks failed
🔥 Firmware Build / build-firmware (ARDUINO_GIGA) (push) Has been cancelled
🔥 Firmware Build / build-firmware (ARDUINO_NANO_33_BLE_SENSE) (push) Has been cancelled
🔥 Firmware Build / build-firmware (ARDUINO_NANO_RP2040_CONNECT) (push) Has been cancelled
🔥 Firmware Build / build-firmware (ARDUINO_NICLA_VISION) (push) Has been cancelled
🔥 Firmware Build / build-firmware (ARDUINO_PORTENTA_H7) (push) Has been cancelled
🔥 Firmware Build / build-firmware (OPENMV2) (push) Has been cancelled
🔥 Firmware Build / build-firmware (OPENMV3) (push) Has been cancelled
🔥 Firmware Build / build-firmware (OPENMV4) (push) Has been cancelled
🔥 Firmware Build / build-firmware (OPENMV4P) (push) Has been cancelled
🔥 Firmware Build / build-firmware (OPENMVPT) (push) Has been cancelled
🔥 Firmware Build / build-firmware (OPENMV_RT1060) (push) Has been cancelled
🔥 Firmware Build / code-size-report (push) Has been cancelled
🔥 Firmware Build / stable-release (push) Has been cancelled
🔥 Firmware Build / development-release (push) Has been cancelled
🔎 Check Code Formatting / formatting-check (push) Has been cancelled

ports/stm32: Update SPI driver.
This commit is contained in:
Ibrahim Abdelkader 2024-11-15 17:45:02 +02:00 committed by GitHub
commit c33fe7c63a
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
8 changed files with 39 additions and 19 deletions

View File

@ -274,7 +274,9 @@
#define OMV_SPI4_MOSI_PIN (&omv_pin_E14_SPI4)
#define OMV_SPI4_SSEL_PIN (&omv_pin_E11_SPI4)
#define OMV_SPI4_DMA_TX_CHANNEL (DMA2_Stream4)
#define OMV_SPI4_DMA_TX_REQUEST (DMA_REQUEST_SPI4_TX)
#define OMV_SPI4_DMA_RX_CHANNEL (DMA2_Stream3)
#define OMV_SPI4_DMA_RX_REQUEST (DMA_REQUEST_SPI4_RX)
// SPI bus 5
#define OMV_SPI5_ID (5)
@ -283,7 +285,9 @@
#define OMV_SPI5_MOSI_PIN (&omv_pin_F11_SPI5)
#define OMV_SPI5_SSEL_PIN (&omv_pin_F6_SPI5)
#define OMV_SPI5_DMA_TX_CHANNEL (DMA2_Stream4)
#define OMV_SPI5_DMA_TX_REQUEST (DMA_REQUEST_SPI5_TX)
#define OMV_SPI5_DMA_RX_CHANNEL (DMA2_Stream3)
#define OMV_SPI5_DMA_RX_REQUEST (DMA_REQUEST_SPI5_RX)
// SPI LCD Interface
#define OMV_SPI_DISPLAY_CONTROLLER (OMV_SPI4_ID)

View File

@ -277,7 +277,9 @@
#define OMV_SPI2_MOSI_PIN (&omv_pin_C3_SPI2)
#define OMV_SPI2_SSEL_PIN (&omv_pin_I0_SPI2)
#define OMV_SPI2_DMA_TX_CHANNEL (DMA1_Stream4)
#define OMV_SPI2_DMA_TX_REQUEST (DMA_REQUEST_SPI2_TX)
#define OMV_SPI2_DMA_RX_CHANNEL (DMA1_Stream3)
#define OMV_SPI2_DMA_RX_REQUEST (DMA_REQUEST_SPI2_RX)
// SAI4
#define OMV_SAI (SAI4_Block_A)

View File

@ -179,9 +179,9 @@
#define OMV_SPI2_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_SPI2_SSEL_PIN (&omv_pin_B12_SPI2)
#define OMV_SPI2_DMA_TX_CHANNEL (DMA1_Stream4)
#define OMV_SPI2_DMA_TX_REQUEST (DMA_CHANNEL_0)
#define OMV_SPI2_DMA_RX_CHANNEL (DMA1_Stream3)
#define DMA_REQUEST_SPI2_TX (DMA_CHANNEL_0)
#define DMA_REQUEST_SPI2_RX (DMA_CHANNEL_0)
#define OMV_SPI2_DMA_RX_REQUEST (DMA_CHANNEL_0)
// SPI LCD Interface
#define OMV_SPI_DISPLAY_CONTROLLER (OMV_SPI2_ID)

View File

@ -178,9 +178,9 @@
#define OMV_SPI2_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_SPI2_SSEL_PIN (&omv_pin_B12_SPI2)
#define OMV_SPI2_DMA_TX_CHANNEL (DMA1_Stream4)
#define OMV_SPI2_DMA_TX_REQUEST (DMA_CHANNEL_0)
#define OMV_SPI2_DMA_RX_CHANNEL (DMA1_Stream3)
#define DMA_REQUEST_SPI2_TX (DMA_CHANNEL_0)
#define DMA_REQUEST_SPI2_RX (DMA_CHANNEL_0)
#define OMV_SPI2_DMA_RX_REQUEST (DMA_CHANNEL_0)
// SPI LCD Interface
#define OMV_SPI_DISPLAY_CONTROLLER (OMV_SPI2_ID)

View File

@ -254,7 +254,9 @@
#define OMV_SPI2_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_SPI2_SSEL_PIN (&omv_pin_B12_SPI2)
#define OMV_SPI2_DMA_TX_CHANNEL (DMA1_Stream4)
#define OMV_SPI2_DMA_TX_REQUEST (DMA_REQUEST_SPI2_TX)
#define OMV_SPI2_DMA_RX_CHANNEL (DMA1_Stream3)
#define OMV_SPI2_DMA_RX_REQUEST (DMA_REQUEST_SPI2_RX)
// SPI bus 3
#define OMV_SPI3_ID (3)
@ -263,7 +265,9 @@
#define OMV_SPI3_MOSI_PIN (&omv_pin_B5_SPI3)
#define OMV_SPI3_SSEL_PIN (&omv_pin_A15_SPI3)
#define OMV_SPI3_DMA_TX_CHANNEL (DMA1_Stream7)
#define OMV_SPI3_DMA_TX_REQUEST (DMA_REQUEST_SPI3_TX)
#define OMV_SPI3_DMA_RX_CHANNEL (DMA1_Stream2)
#define OMV_SPI3_DMA_RX_REQUEST (DMA_REQUEST_SPI3_RX)
// SPI LCD Interface
#define OMV_SPI_DISPLAY_CONTROLLER (OMV_SPI2_ID)

View File

@ -254,7 +254,9 @@
#define OMV_SPI2_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_SPI2_SSEL_PIN (&omv_pin_B12_SPI2)
#define OMV_SPI2_DMA_TX_CHANNEL (DMA1_Stream4)
#define OMV_SPI2_DMA_TX_REQUEST (DMA_REQUEST_SPI2_TX)
#define OMV_SPI2_DMA_RX_CHANNEL (DMA1_Stream3)
#define OMV_SPI2_DMA_RX_REQUEST (DMA_REQUEST_SPI2_RX)
// SPI bus 3
#define OMV_SPI3_ID (3)
@ -263,7 +265,9 @@
#define OMV_SPI3_MOSI_PIN (&omv_pin_B5_SPI3)
#define OMV_SPI3_SSEL_PIN (&omv_pin_A15_SPI3)
#define OMV_SPI3_DMA_TX_CHANNEL (DMA1_Stream7)
#define OMV_SPI3_DMA_TX_REQUEST (DMA_REQUEST_SPI3_TX)
#define OMV_SPI3_DMA_RX_CHANNEL (DMA1_Stream2)
#define OMV_SPI3_DMA_RX_REQUEST (DMA_REQUEST_SPI3_RX)
// SPI LCD Interface
#define OMV_SPI_DISPLAY_CONTROLLER (OMV_SPI2_ID)

View File

@ -246,7 +246,9 @@
#define OMV_SPI2_MOSI_PIN (&omv_pin_B15_SPI2)
#define OMV_SPI2_SSEL_PIN (&omv_pin_B12_GPIO)
#define OMV_SPI2_DMA_TX_CHANNEL (DMA1_Stream4)
#define OMV_SPI2_DMA_TX_REQUEST (DMA_REQUEST_SPI2_TX)
#define OMV_SPI2_DMA_RX_CHANNEL (DMA1_Stream3)
#define OMV_SPI2_DMA_RX_REQUEST (DMA_REQUEST_SPI2_RX)
// SPI bus 3
#define OMV_SPI3_ID (3)
@ -255,7 +257,9 @@
#define OMV_SPI3_MOSI_PIN (&omv_pin_B5_SPI3)
#define OMV_SPI3_SSEL_PIN (&omv_pin_A15_GPIO)
#define OMV_SPI3_DMA_TX_CHANNEL (DMA1_Stream7)
#define OMV_SPI3_DMA_TX_REQUEST (DMA_REQUEST_SPI3_TX)
#define OMV_SPI3_DMA_RX_CHANNEL (DMA1_Stream2)
#define OMV_SPI3_DMA_RX_REQUEST (DMA_REQUEST_SPI3_RX)
// SPI bus 5
#define OMV_SPI5_ID (5)
@ -264,7 +268,9 @@
#define OMV_SPI5_MOSI_PIN (&omv_pin_J10_SPI5)
#define OMV_SPI5_SSEL_PIN (&omv_pin_K1_GPIO)
#define OMV_SPI5_DMA_TX_CHANNEL (DMA2_Stream4)
#define OMV_SPI5_DMA_TX_REQUEST (DMA_REQUEST_SPI5_TX)
#define OMV_SPI5_DMA_RX_CHANNEL (DMA2_Stream3)
#define OMV_SPI5_DMA_RX_REQUEST (DMA_REQUEST_SPI5_RX)
// LCD Interface
#define OMV_RGB_DISPLAY_CONTROLLER (LTDC)

View File

@ -73,23 +73,23 @@ extern SPI_HandleTypeDef SPIHandle5;
DEFINE_SPI_INSTANCE(5)
#endif
#if defined(SPI6_ID) && defined(MICROPY_HW_SPI6_SCK)
#if defined(OMV_SPI6_ID) && defined(MICROPY_HW_SPI6_SCK)
extern SPI_HandleTypeDef SPIHandle6;
#elif defined(SPI6_ID)
#elif defined(OMV_SPI6_ID)
DEFINE_SPI_INSTANCE(6)
#endif
#define INITIALIZE_SPI_DESCR(spi, spi_number) \
do { \
(spi)->id = spi_number; \
(spi)->irqn = SPI##spi_number##_IRQn; \
(spi)->cs = OMV_SPI##spi_number##_SSEL_PIN; \
(spi)->descr = &SPIHandle##spi_number; \
(spi)->descr->Instance = SPI##spi_number; \
(spi)->dma_descr_tx = (DMA_HandleTypeDef) \
{OMV_SPI##spi_number##_DMA_TX_CHANNEL, {DMA_REQUEST_SPI##spi_number##_TX}}; \
(spi)->dma_descr_rx = (DMA_HandleTypeDef) \
{OMV_SPI##spi_number##_DMA_RX_CHANNEL, {DMA_REQUEST_SPI##spi_number##_RX}}; \
#define INITIALIZE_SPI_DESCR(spi, spi_number) \
do { \
(spi)->id = spi_number; \
(spi)->irqn = SPI##spi_number##_IRQn; \
(spi)->cs = OMV_SPI##spi_number##_SSEL_PIN; \
(spi)->descr = &SPIHandle##spi_number; \
(spi)->descr->Instance = SPI##spi_number; \
(spi)->dma_descr_tx = (DMA_HandleTypeDef) \
{ OMV_SPI##spi_number##_DMA_TX_CHANNEL, { OMV_SPI##spi_number##_DMA_TX_REQUEST } }; \
(spi)->dma_descr_rx = (DMA_HandleTypeDef) \
{ OMV_SPI##spi_number##_DMA_RX_CHANNEL, { OMV_SPI##spi_number##_DMA_RX_REQUEST } }; \
} while (0)
static omv_spi_t *omv_spi_descr_all[6] = { NULL };
@ -164,7 +164,7 @@ static void omv_spi_callback(SPI_HandleTypeDef *hspi) {
} else if (hspi->Instance == SPI5) {
spi = omv_spi_descr_all[4];
#endif
#if defined(SPI6_ID)
#if defined(OMV_SPI6_ID)
} else if (hspi->Instance == SPI6) {
spi = omv_spi_descr_all[5];
#endif
@ -394,7 +394,7 @@ int omv_spi_init(omv_spi_t *spi, omv_spi_config_t *config) {
} else if (config->id == 5) {
INITIALIZE_SPI_DESCR(spi, 5);
#endif
#if defined(SPI6_ID)
#if defined(OMV_SPI6_ID)
} else if (config->id == 6) {
INITIALIZE_SPI_DESCR(spi, 6);
#endif