diff --git a/src/hal/cmsis/src/st/system_stm32fxxx.c b/src/hal/cmsis/src/st/system_stm32fxxx.c index 4ea932cfb..4acea1ff5 100644 --- a/src/hal/cmsis/src/st/system_stm32fxxx.c +++ b/src/hal/cmsis/src/st/system_stm32fxxx.c @@ -217,6 +217,9 @@ void SystemClock_Config(void) } #endif + /* Macro to configure the PLL clock source */ + __HAL_RCC_PLL_PLLSOURCE_CONFIG(OMV_OSC_PLL_CLKSOURCE); + /* Enable HSE Oscillator and activate PLL with HSE as source */ #if defined(OMV_OSC_HSE_STATE) RCC_OscInitStruct.HSEState = OMV_OSC_HSE_STATE; @@ -225,6 +228,7 @@ void SystemClock_Config(void) #if defined(OMV_OSC_HSI_STATE) RCC_OscInitStruct.HSIState = OMV_OSC_HSI_STATE; RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; #endif #if defined(OMV_OSC_CSI_STATE) RCC_OscInitStruct.CSIState = OMV_OSC_CSI_STATE; @@ -236,7 +240,7 @@ void SystemClock_Config(void) #endif RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLSource = OMV_OSC_PLL_CLKSOURCE; RCC_OscInitStruct.PLL.PLLM = OMV_OSC_PLL1M; RCC_OscInitStruct.PLL.PLLN = OMV_OSC_PLL1N; RCC_OscInitStruct.PLL.PLLQ = OMV_OSC_PLL1Q; diff --git a/src/omv/boards/OPENMV1/omv_boardconfig.h b/src/omv/boards/OPENMV1/omv_boardconfig.h index 702f9dc2e..2472b8539 100644 --- a/src/omv/boards/OPENMV1/omv_boardconfig.h +++ b/src/omv/boards/OPENMV1/omv_boardconfig.h @@ -42,6 +42,9 @@ // HSE/HSI/CSI State #define OMV_OSC_HSE_STATE (RCC_HSE_ON) +// Clock Sources +#define OMV_OSC_PLL_CLKSOURCE RCC_PLLSOURCE_HSE + // Flash Latency #define OMV_FLASH_LATENCY (FLASH_LATENCY_5) diff --git a/src/omv/boards/OPENMV2/omv_boardconfig.h b/src/omv/boards/OPENMV2/omv_boardconfig.h index 68c31dbc0..cce5a8130 100644 --- a/src/omv/boards/OPENMV2/omv_boardconfig.h +++ b/src/omv/boards/OPENMV2/omv_boardconfig.h @@ -88,6 +88,9 @@ // HSE/HSI/CSI State #define OMV_OSC_HSE_STATE (RCC_HSE_ON) +// Clock Sources +#define OMV_OSC_PLL_CLKSOURCE RCC_PLLSOURCE_HSE + // Flash Latency #define OMV_FLASH_LATENCY (FLASH_LATENCY_7) diff --git a/src/omv/boards/OPENMV3/omv_boardconfig.h b/src/omv/boards/OPENMV3/omv_boardconfig.h index e5da33a44..6ff5b907e 100644 --- a/src/omv/boards/OPENMV3/omv_boardconfig.h +++ b/src/omv/boards/OPENMV3/omv_boardconfig.h @@ -89,6 +89,9 @@ // HSE/HSI/CSI State #define OMV_OSC_HSE_STATE (RCC_HSE_ON) +// Clock Sources +#define OMV_OSC_PLL_CLKSOURCE (RCC_PLLSOURCE_HSE) + // Flash Latency #define OMV_FLASH_LATENCY (FLASH_LATENCY_7) diff --git a/src/omv/boards/OPENMV4/omv_boardconfig.h b/src/omv/boards/OPENMV4/omv_boardconfig.h index 8200e63ef..d78470e08 100644 --- a/src/omv/boards/OPENMV4/omv_boardconfig.h +++ b/src/omv/boards/OPENMV4/omv_boardconfig.h @@ -116,6 +116,7 @@ #define OMV_OSC_PLL3FRAC (0) // Clock Sources +#define OMV_OSC_PLL_CLKSOURCE RCC_PLLSOURCE_HSE #define OMV_OSC_USB_CLKSOURCE RCC_USBCLKSOURCE_HSI48 #define OMV_OSC_RNG_CLKSOURCE RCC_RNGCLKSOURCE_HSI48 #define OMV_OSC_ADC_CLKSOURCE RCC_ADCCLKSOURCE_PLL3 diff --git a/src/omv/boards/OPENMV4P/omv_boardconfig.h b/src/omv/boards/OPENMV4P/omv_boardconfig.h index b55950d6f..4541816fc 100644 --- a/src/omv/boards/OPENMV4P/omv_boardconfig.h +++ b/src/omv/boards/OPENMV4P/omv_boardconfig.h @@ -120,6 +120,7 @@ #define OMV_OSC_PLL3FRAC (0) // Clock Sources +#define OMV_OSC_PLL_CLKSOURCE RCC_PLLSOURCE_HSE #define OMV_OSC_USB_CLKSOURCE RCC_USBCLKSOURCE_PLL #define OMV_OSC_RNG_CLKSOURCE RCC_RNGCLKSOURCE_HSI48 #define OMV_OSC_ADC_CLKSOURCE RCC_ADCCLKSOURCE_PLL3 diff --git a/src/omv/boards/OPENMVPT/omv_boardconfig.h b/src/omv/boards/OPENMVPT/omv_boardconfig.h index 8deb42619..8c27a034e 100644 --- a/src/omv/boards/OPENMVPT/omv_boardconfig.h +++ b/src/omv/boards/OPENMVPT/omv_boardconfig.h @@ -86,12 +86,6 @@ // USB IRQn. #define OMV_USB_IRQN (OTG_FS_IRQn) -// Clock Sources -#define OMV_OSC_USB_CLKSOURCE RCC_USBCLKSOURCE_PLL -#define OMV_OSC_RNG_CLKSOURCE RCC_RNGCLKSOURCE_HSI48 -#define OMV_OSC_ADC_CLKSOURCE RCC_ADCCLKSOURCE_PLL2 -#define OMV_OSC_SPI123_CLKSOURCE RCC_SPI123CLKSOURCE_PLL2 - //PLL1 48MHz for USB, SDMMC and FDCAN #define OMV_OSC_PLL1M (3) #define OMV_OSC_PLL1N (240) @@ -122,6 +116,13 @@ #define OMV_OSC_PLL3VCO (RCC_PLL3VCOWIDE) #define OMV_OSC_PLL3FRAC (0) +// Clock Sources +#define OMV_OSC_PLL_CLKSOURCE RCC_PLLSOURCE_HSE +#define OMV_OSC_USB_CLKSOURCE RCC_USBCLKSOURCE_PLL +#define OMV_OSC_RNG_CLKSOURCE RCC_RNGCLKSOURCE_HSI48 +#define OMV_OSC_ADC_CLKSOURCE RCC_ADCCLKSOURCE_PLL2 +#define OMV_OSC_SPI123_CLKSOURCE RCC_SPI123CLKSOURCE_PLL2 + // HSE/HSI/CSI State #define OMV_OSC_HSE_STATE (RCC_HSE_ON) #define OMV_OSC_HSI48_STATE (RCC_HSI48_ON) diff --git a/src/omv/boards/PORTENTA/omv_boardconfig.h b/src/omv/boards/PORTENTA/omv_boardconfig.h index 626517010..53f66f67f 100644 --- a/src/omv/boards/PORTENTA/omv_boardconfig.h +++ b/src/omv/boards/PORTENTA/omv_boardconfig.h @@ -118,6 +118,7 @@ #define OMV_OSC_PLL3FRAC (0) // Clock Sources +#define OMV_OSC_PLL_CLKSOURCE RCC_PLLSOURCE_HSE #define OMV_OSC_USB_CLKSOURCE RCC_USBCLKSOURCE_HSI48 #define OMV_OSC_RNG_CLKSOURCE RCC_RNGCLKSOURCE_HSI48 #define OMV_OSC_ADC_CLKSOURCE RCC_ADCCLKSOURCE_PLL3