diff --git a/firmware/OPENMV4/bootloader.dfu b/firmware/OPENMV4/bootloader.dfu new file mode 100644 index 000000000..88b1030ec Binary files /dev/null and b/firmware/OPENMV4/bootloader.dfu differ diff --git a/firmware/OPENMV4/bootloader.elf b/firmware/OPENMV4/bootloader.elf new file mode 100755 index 000000000..85099f054 Binary files /dev/null and b/firmware/OPENMV4/bootloader.elf differ diff --git a/firmware/OPENMV4/firmware.dfu b/firmware/OPENMV4/firmware.dfu new file mode 100644 index 000000000..e1673560b Binary files /dev/null and b/firmware/OPENMV4/firmware.dfu differ diff --git a/firmware/OPENMV4/firmware.elf b/firmware/OPENMV4/firmware.elf new file mode 100755 index 000000000..c5dbffdae Binary files /dev/null and b/firmware/OPENMV4/firmware.elf differ diff --git a/firmware/OPENMV4/openmv.dfu b/firmware/OPENMV4/openmv.dfu new file mode 100644 index 000000000..053c3478a Binary files /dev/null and b/firmware/OPENMV4/openmv.dfu differ diff --git a/src/bootloader/stm32fxxx.ld.S b/src/bootloader/stm32fxxx.ld.S index fc4998a12..d1055e0eb 100644 --- a/src/bootloader/stm32fxxx.ld.S +++ b/src/bootloader/stm32fxxx.ld.S @@ -45,7 +45,19 @@ ENTRY(Reset_Handler) #define CCM_LENGTH 128K #define RAM_ORIGIN 0x20020000 - #define RAM_LENGTH 384K + #define RAM_LENGTH 384K +#elif defined(OPENMV4) + #define FLASH_ORIGIN 0x08000000 + #define FLASH_LENGTH 1920K + + #define TEXT_ORIGIN 0x08000000 + #define TEXT_LENGTH 32K + + #define CCM_ORIGIN 0x20000000 + #define CCM_LENGTH 128K + + #define RAM_ORIGIN 0x20020000 + #define RAM_LENGTH 384K #endif //OPENMV1 /* Specify the memory areas */ diff --git a/src/micropython b/src/micropython index 2722bf352..b88850b17 160000 --- a/src/micropython +++ b/src/micropython @@ -1 +1 @@ -Subproject commit 2722bf352936d2984444a6efaecb67e210404547 +Subproject commit b88850b179ffe70cdc25d333b5b41c1f5f111807 diff --git a/src/omv/boards/OPENMV4/omv_boardconfig.h b/src/omv/boards/OPENMV4/omv_boardconfig.h new file mode 100644 index 000000000..83ba788d3 --- /dev/null +++ b/src/omv/boards/OPENMV4/omv_boardconfig.h @@ -0,0 +1,148 @@ +/* + * This file is part of the OpenMV project. + * Copyright (c) 2013/2014 Ibrahim Abdelkader + * This work is licensed under the MIT license, see the file LICENSE for details. + * + * Board configuration and pin definitions. + * + */ +#ifndef __OMV_BOARDCONFIG_H__ +#define __OMV_BOARDCONFIG_H__ + +// Architecture info +#define OMV_ARCH_STR "OMV3 F7 512" // 33 chars max +#define OMV_BOARD_TYPE "M7" +#define OMV_UNIQUE_ID_ADDR 0x1FF0F420 + +#define OMV_XCLK_MCO (0U) +#define OMV_XCLK_TIM (1U) + +// Sensor external clock source. +#define OMV_XCLK_SOURCE (OMV_XCLK_TIM) + +// Sensor external clock timer frequency. +#define OMV_XCLK_FREQUENCY (9000000) + +// Sensor PLL register value. +#define OMV_OV7725_PLL_CONFIG (0x81) // x6 + +// Have built-in RGB->LAB table. +#define OMV_HAVE_LAB_TABLE + +// Enable Find_Line_Segments +#define OMV_ENABLE_FIND_LINE_SEGMENTS + +// Enable Find_Circles +#define OMV_ENABLE_FIND_CIRCLES + +// Enable Find_Rects +#define OMV_ENABLE_FIND_RECTS + +// Enable QRCodes (14 KB) +#define OMV_ENABLE_QRCODES + +// Enable AprilTags (64 KB). +#define OMV_ENABLE_APRILTAGS + +// Enable DataMatrices (26 KB). +#define OMV_ENABLE_DATAMATRICES + +// Enable Barcodes (42 KB). +#define OMV_ENABLE_BARCODES + +// Enable LENET (200+ KB). +#define OMV_ENABLE_LENET + +// Bootloader LED GPIO port/pin +#define OMV_BOOTLDR_LED_PIN (GPIO_PIN_1) +#define OMV_BOOTLDR_LED_PORT (GPIOC) + +// RAW buffer size +#define OMV_RAW_BUF_SIZE (307200) + +// JPEG buffer size (header + data) +#define OMV_JPEG_BUF_SIZE (23000) + +// If buffer size is bigger than this threshold, the quality is reduced. +// This is only used for JPEG images sent to the IDE not normal compression. +#define JPEG_QUALITY_THRESH (160*120*2) + +/* SCCB/I2C */ +#define SCCB_I2C (I2C1) +#define SCCB_AF (GPIO_AF4_I2C1) +#define SCCB_CLK_ENABLE() __I2C1_CLK_ENABLE() +#define SCCB_CLK_DISABLE() __I2C1_CLK_DISABLE() +#define SCCB_PORT (GPIOB) +#define SCCB_SCL_PIN (GPIO_PIN_8) +#define SCCB_SDA_PIN (GPIO_PIN_9) + +/* DCMI */ +#define DCMI_TIM (TIM1) +#define DCMI_TIM_PIN (GPIO_PIN_8) +#define DCMI_TIM_PORT (GPIOA) +#define DCMI_TIM_AF (GPIO_AF1_TIM1) +#define DCMI_TIM_CHANNEL (TIM_CHANNEL_1) +#define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE() +#define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE() +#define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq() + +#define DCMI_RESET_PIN (GPIO_PIN_10) +#define DCMI_RESET_PORT (GPIOA) + +#define DCMI_PWDN_PIN (GPIO_PIN_7) +#define DCMI_PWDN_PORT (GPIOD) + +#define DCMI_FREX_PIN (GPIO_PIN_9) +#define DCMI_FREX_PORT (GPIOD) + +#define DCMI_EXPST_PIN (GPIO_PIN_8) +#define DCMI_EXPST_PORT (GPIOD) + +#define DCMI_FSIN_PIN (GPIO_PIN_3) +#define DCMI_FSIN_PORT (GPIOD) + +#define DCMI_D0_PIN (GPIO_PIN_6) +#define DCMI_D1_PIN (GPIO_PIN_7) +#define DCMI_D2_PIN (GPIO_PIN_0) +#define DCMI_D3_PIN (GPIO_PIN_1) +#define DCMI_D4_PIN (GPIO_PIN_4) +#define DCMI_D5_PIN (GPIO_PIN_6) +#define DCMI_D6_PIN (GPIO_PIN_5) +#define DCMI_D7_PIN (GPIO_PIN_6) + +#define DCMI_D0_PORT (GPIOC) +#define DCMI_D1_PORT (GPIOC) +#define DCMI_D2_PORT (GPIOE) +#define DCMI_D3_PORT (GPIOE) +#define DCMI_D4_PORT (GPIOE) +#define DCMI_D5_PORT (GPIOB) +#define DCMI_D6_PORT (GPIOE) +#define DCMI_D7_PORT (GPIOE) + +#define DCMI_HSYNC_PIN (GPIO_PIN_4) +#define DCMI_VSYNC_PIN (GPIO_PIN_7) +#define DCMI_PXCLK_PIN (GPIO_PIN_6) + +#define DCMI_HSYNC_PORT (GPIOA) +#define DCMI_VSYNC_PORT (GPIOB) +#define DCMI_PXCLK_PORT (GPIOA) + +#define DCMI_RESET_LOW() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_RESET) +#define DCMI_RESET_HIGH() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_SET) + +#define DCMI_PWDN_LOW() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_RESET) +#define DCMI_PWDN_HIGH() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_SET) + +#define DCMI_FREX_LOW() HAL_GPIO_WritePin(DCMI_FREX_PORT, DCMI_FREX_PIN, GPIO_PIN_RESET) +#define DCMI_FREX_HIGH() HAL_GPIO_WritePin(DCMI_FREX_PORT, DCMI_FREX_PIN, GPIO_PIN_SET) + +#define DCMI_EXPST_LOW() HAL_GPIO_WritePin(DCMI_EXPST_PORT, DCMI_EXPST_PIN, GPIO_PIN_RESET) +#define DCMI_EXPST_HIGH() HAL_GPIO_WritePin(DCMI_EXPST_PORT, DCMI_EXPST_PIN, GPIO_PIN_SET) + +#define DCMI_FSIN_LOW() HAL_GPIO_WritePin(DCMI_FSIN_PORT, DCMI_FSIN_PIN, GPIO_PIN_RESET) +#define DCMI_FSIN_HIGH() HAL_GPIO_WritePin(DCMI_FSIN_PORT, DCMI_FSIN_PIN, GPIO_PIN_SET) + +#define DCMI_VSYNC_IRQN EXTI9_5_IRQn +#define DCMI_VSYNC_IRQ_LINE (7) + +#endif //__OMV_BOARDCONFIG_H__ diff --git a/src/omv/boards/OPENMV4/omv_boardconfig.mk b/src/omv/boards/OPENMV4/omv_boardconfig.mk new file mode 100755 index 000000000..7336ae779 --- /dev/null +++ b/src/omv/boards/OPENMV4/omv_boardconfig.mk @@ -0,0 +1,10 @@ +MCU=STM32F765xx +CPU=cortex-m7 +FPU=fpv5-sp-d16 +STHAL_DIR=sthal/f7 +ARM_MATH=ARM_MATH_CM7 +HAL_INC='' +CFLAGS_MCU=MCU_SERIES_F7 +STARTUP=startup_stm32f765xx +VECT_TAB_OFFSET=0x20000 +MAIN_APP_ADDR=0x08020000 diff --git a/src/omv/stm32fxxx.ld.S b/src/omv/stm32fxxx.ld.S index f9be832a3..bf77af808 100755 --- a/src/omv/stm32fxxx.ld.S +++ b/src/omv/stm32fxxx.ld.S @@ -92,6 +92,39 @@ ENTRY(Reset_Handler) #define SRAM1_ORIGIN 0x20020000 #define SRAM1_LENGTH 368K + #define SRAM2_ORIGIN 0x2007C000 + #define SRAM2_LENGTH 16K +#elif defined(OPENMV4) + #define FB_MEMORY SRAM1 // Framebuffer, fb_alloc + #define MAIN_MEMORY CCM // data, bss, stack and heap + #define DMA_MEMORY CCM // Misc DMA buffers + + #define FB_SIZE (301K) // FB memory: header + VGA/GS image + #define FB_ALLOC_SIZE (83K) // minimum fb alloc size + + #define STACK_SIZE (4K) + #define HEAP_SIZE (55K) + + #define LINE_BUF_SIZE (3K) // Image line buffer round(640 * 2BPP * 2 buffers). + #define MSC_BUF_SIZE (2K) // USB MSC bot data + #define VFS_BUF_SIZE (1K) // VFS sturct + FATFS file buffer (624 bytes) + #define FFS_BUF_SIZE (32K) // Flash filesystem cache + // TODO Set OMV_JPEG_BUF_SIZE if you change this + #define JPEG_BUF_SIZE (23K) // IDE JPEG buffer + + #define FLASH_ORIGIN 0x08000000 + #define FLASH_LENGTH 2048K + + #define TEXT_ORIGIN 0x08020000 + #define TEXT_LENGTH 1920K + + // Note DTCM/ITCM memory is not cacheable on M7 + #define CCM_ORIGIN 0x20000000 + #define CCM_LENGTH 128K + + #define SRAM1_ORIGIN 0x20020000 + #define SRAM1_LENGTH 368K + #define SRAM2_ORIGIN 0x2007C000 #define SRAM2_LENGTH 16K #endif diff --git a/src/winc1500/include/bsp/include/nm_bsp_internal.h b/src/winc1500/include/bsp/include/nm_bsp_internal.h index 938ffb1eb..2c2e007cb 100644 --- a/src/winc1500/include/bsp/include/nm_bsp_internal.h +++ b/src/winc1500/include/bsp/include/nm_bsp_internal.h @@ -109,6 +109,8 @@ #include "nm_bsp_openmv2.h" #elif defined(OPENMV3) #include "nm_bsp_openmv3.h" +#elif defined(OPENMV4) +#include "nm_bsp_openmv4.h" #endif #endif //_NM_BSP_INTERNAL_H_ diff --git a/src/winc1500/include/bsp/include/nm_bsp_openmv4.h b/src/winc1500/include/bsp/include/nm_bsp_openmv4.h new file mode 100644 index 000000000..11106c508 --- /dev/null +++ b/src/winc1500/include/bsp/include/nm_bsp_openmv4.h @@ -0,0 +1,16 @@ +#ifndef _NM_BSP_OPENMV4_H_ +#define _NM_BSP_OPENMV4_H_ + +#include "conf_winc.h" + +#define NM_EDGE_INTERRUPT (1) + +#define NM_DEBUG CONF_WINC_DEBUG +#define NM_BSP_PRINTF CONF_WINC_PRINTF + +#define WINC_PIN_CS (pin_B12) +#define WINC_PIN_EN (pin_A5) +#define WINC_PIN_RST (pin_D12) +#define WINC_PIN_IRQ (pin_D13) + +#endif /* _NM_BSP_OPENMV4_H_ */