Merge pull request #2909 from kwagyeman/kwabena/fix_nn_caching_issue
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lib/stai: Fix STAI NPU memory allocation.
This commit is contained in:
Ibrahim Abdelkader 2025-11-02 17:37:09 +02:00 committed by GitHub
commit daf26f9fc8
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@ -49,6 +49,10 @@
#include "ll_aton_caches_interface.h"
#include "ll_aton_reloc_network.h"
// Due to limitations with the STM32N6 NPU design, the ext_ram_sz memory pool
// must be in external SDRAM and not in internal SRAM. Forcing a minimum of a
// 1MB allocation ensures that the ext_ram_sz buffer ends up in SDRAM.
#define AI_MIN_EXT_RAM_SZ (1048576)
#define AI_RELOC_ALIGNMENT (32)
typedef struct ml_backend_state {
@ -132,6 +136,10 @@ int ml_backend_init_model(py_ml_model_obj_t *model) {
return -1;
}
if (rt.ext_ram_sz) {
rt.ext_ram_sz = OMV_MAX(rt.ext_ram_sz, AI_MIN_EXT_RAM_SZ);
}
// Allocate executable memory.
state->exec_ram_size = OMV_ALIGN_TO(rt.rt_ram_xip, AI_RELOC_ALIGNMENT);
state->exec_ram_addr = m_new(uint8_t, state->exec_ram_size + AI_RELOC_ALIGNMENT);