Make mutex support Cortex-M0/M0+

This commit is contained in:
iabdalkader 2021-05-12 23:18:39 +02:00
parent c209ac8b58
commit ed43bd58c0
2 changed files with 33 additions and 28 deletions

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@ -7,15 +7,17 @@
* This work is licensed under the MIT license, see the file LICENSE for details. * This work is licensed under the MIT license, see the file LICENSE for details.
* *
* Mutex implementation. * Mutex implementation.
* This is a standard implementation of mutexs on ARM processors following the ARM guide.
* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0321a/BIHEJCHB.html
*
* Note: The Cortex-M0/M0+ does Not have the Load/Store exclusive instructions, on these
* CPUs the locking function is implemented with atomic access using disable/enable IRQs.
*/ */
#include "mutex.h" #include "mutex.h"
#include "cmsis_gcc.h" #include "cmsis_gcc.h"
#include "py/mphal.h" #include "py/mphal.h"
// This is a standard implementation of mutexs on ARM processors following the ARM guide. void mutex_init0(mutex_t *mutex)
// http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0321a/BIHEJCHB.html
void mutex_init(mutex_t *mutex)
{ {
__DMB(); __DMB();
mutex->tid = 0; mutex->tid = 0;
@ -23,46 +25,49 @@ void mutex_init(mutex_t *mutex)
mutex->last_tid = 0; mutex->last_tid = 0;
} }
void mutex_lock(mutex_t *mutex, uint32_t tid) static void _mutex_lock(mutex_t *mutex, uint32_t tid, bool blocking)
{ {
volatile int locked = 0; #if (CPU==cortex-m0)
// Wait for mutex to be unlocked do {
__disable_irq();
if (mutex->lock == 0) {
mutex->lock = 1;
mutex->tid = tid;
}
__enable_irq();
__WFI();
} while (mutex->tid != tid && blocking);
#else
do { do {
// Attempt exclusive read // Attempt exclusive read
while (__LDREXW(&mutex->lock) != 0); while (__LDREXW(&mutex->lock) != 0);
// Attempt to lock mutex // Attempt to lock mutex
locked = __STREXW(1, &mutex->lock); if(__STREXW(1, &mutex->lock) == 0) {
// Set TID if mutex is locked
// Set TID if mutex is locked
if (locked == 0) {
mutex->tid = tid; mutex->tid = tid;
} }
} while (locked != 0); } while (mutex->tid != tid && blocking);
#endif
__DMB(); __DMB();
} }
void mutex_lock(mutex_t *mutex, uint32_t tid)
{
_mutex_lock(mutex, tid, true);
}
int mutex_try_lock(mutex_t *mutex, uint32_t tid) int mutex_try_lock(mutex_t *mutex, uint32_t tid)
{ {
volatile int locked = 1; // If the mutex is already locked by the current thread then
// release it and return without locking, otherwise try to lock it.
// If mutex is already locked by the current thread
// then release the the mutex, else attempt to lock it.
if (mutex->tid == tid) { if (mutex->tid == tid) {
mutex_unlock(mutex, tid); mutex_unlock(mutex, tid);
} else if (__LDREXW(&mutex->lock) == 0) { } else {
// Attempt to lock the mutex _mutex_lock(mutex, tid, false);
locked = __STREXW(1, &mutex->lock);
__DMB();
// Set TID if mutex is locked
if (locked == 0) {
mutex->tid = tid;
}
} }
return (locked == 0); return (mutex->tid == tid);
} }
int mutex_try_lock_alternate(mutex_t *mutex, uint32_t tid) int mutex_try_lock_alternate(mutex_t *mutex, uint32_t tid)

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@ -20,7 +20,7 @@ typedef volatile struct {
uint32_t last_tid; uint32_t last_tid;
} mutex_t; } mutex_t;
void mutex_init(mutex_t *mutex); void mutex_init0(mutex_t *mutex);
void mutex_lock(mutex_t *mutex, uint32_t tid); void mutex_lock(mutex_t *mutex, uint32_t tid);
int mutex_try_lock(mutex_t *mutex, uint32_t tid); int mutex_try_lock(mutex_t *mutex, uint32_t tid);
int mutex_try_lock_alternate(mutex_t *mutex, uint32_t tid); int mutex_try_lock_alternate(mutex_t *mutex, uint32_t tid);