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ports/stm32: Update VTOR, main and boot addresses.
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commit
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@ -95,7 +95,7 @@ void SystemInit(void)
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{
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/* FPU settings ------------------------------------------------------------*/
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#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
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SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
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SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
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#endif
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/*SEVONPEND enabled so that an interrupt coming from the CPU(n) interrupt
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@ -180,11 +180,7 @@ void SystemInit(void)
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#endif // !defined(CORE_CM4)
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/* Configure the Vector Table location add offset address ------------------*/
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#ifdef VECT_TAB_SRAM
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SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
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#else
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SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
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#endif
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SCB->VTOR = OMV_VTOR_BASE;
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}
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void SystemClock_Config(void)
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@ -51,14 +51,12 @@ CFLAGS += -D$(MCU) \
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-DARM_NN_TRUNCATE \
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-D__FPU_PRESENT=1 \
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-D__VFP_FP__ \
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-DUSE_DEVICE_MODE \
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-DHSE_VALUE=$(OMV_HSE_VALUE)\
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-DVECT_TAB_OFFSET=$(VECT_TAB_OFFSET) \
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-DMAIN_APP_ADDR=$(MAIN_APP_ADDR) \
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-DOMV_VTOR_BASE=$(OMV_FIRM_BASE) \
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-DSTM32_HAL_H=$(HAL_INC) \
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-DCMSIS_MCU_H=$(CMSIS_MCU_H) \
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-DUSE_FULL_LL_DRIVER \
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$(OMV_BOARD_EXTRA_CFLAGS)
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$(OMV_BOARD_CFLAGS)
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# Linker Flags
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LDFLAGS = -mthumb \
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@ -696,7 +694,7 @@ BOOTLOADER = bootloader
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$(BOOTLOADER): | $(BUILD) $(FW_DIR)
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$(MAKE) -C $(TOP_DIR)/$(BOOT_DIR) BUILD=$(BUILD)/$(BOOT_DIR)
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$(OBJCOPY) -Obinary $(FW_DIR)/$(BOOTLOADER).elf $(FW_DIR)/$(BOOTLOADER).bin
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$(PYTHON) $(MKDFU) -D $(DFU_DEVICE) -b 0x08000000:$(FW_DIR)/$(BOOTLOADER).bin $(FW_DIR)/$(BOOTLOADER).dfu
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$(PYTHON) $(MKDFU) -D $(DFU_DEVICE) -b $(OMV_BOOT_BASE):$(FW_DIR)/$(BOOTLOADER).bin $(FW_DIR)/$(BOOTLOADER).dfu
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endif
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# This target generates the UVC firmware.
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@ -706,7 +704,7 @@ $(UVC): FIRMWARE_OBJS UVC_OBJS
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$(UVC_DIR)/stm32fxxx.ld.S > $(BUILD)/$(UVC_DIR)/stm32fxxx.lds
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$(CC) $(UVC_LDFLAGS) $(UVC_OBJ) -o $(FW_DIR)/$(UVC).elf -lgcc
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$(OBJCOPY) -Obinary $(FW_DIR)/$(UVC).elf $(FW_DIR)/$(UVC).bin
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$(PYTHON) $(MKDFU) -D $(DFU_DEVICE) -b $(MAIN_APP_ADDR):$(FW_DIR)/$(UVC).bin $(FW_DIR)/$(UVC).dfu
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$(PYTHON) $(MKDFU) -D $(DFU_DEVICE) -b $(OMV_FIRM_BASE):$(FW_DIR)/$(UVC).bin $(FW_DIR)/$(UVC).dfu
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endif
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# This target generates the main/app firmware image located at 0x08010000
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@ -715,13 +713,13 @@ $(FIRMWARE): FIRMWARE_OBJS
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$(OMV_DIR)/ports/$(PORT)/$(LDSCRIPT).ld.S > $(BUILD)/$(LDSCRIPT).lds
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$(CC) $(LDFLAGS) $(FIRM_OBJ) -o $(FW_DIR)/$(FIRMWARE).elf $(LIBS) -lm
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$(OBJCOPY) -Obinary $(FW_DIR)/$(FIRMWARE).elf $(FW_DIR)/$(FIRMWARE).bin
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$(PYTHON) $(MKDFU) -D $(DFU_DEVICE) -b $(MAIN_APP_ADDR):$(FW_DIR)/$(FIRMWARE).bin $(FW_DIR)/$(FIRMWARE).dfu
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$(PYTHON) $(MKDFU) -D $(DFU_DEVICE) -b $(OMV_FIRM_BASE):$(FW_DIR)/$(FIRMWARE).bin $(FW_DIR)/$(FIRMWARE).dfu
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# This target generates the uvc, bootloader and firmware images.
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$(OPENMV): $(BOOTLOADER) $(UVC) $(FIRMWARE)
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ifeq ($(OMV_ENABLE_BL), 1)
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# Generate a contiguous firmware image for factory programming
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$(OBJCOPY) -Obinary --pad-to=$(MAIN_APP_ADDR) --gap-fill=0xFF $(FW_DIR)/$(BOOTLOADER).elf $(FW_DIR)/$(BOOTLOADER)_padded.bin
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$(OBJCOPY) -Obinary --pad-to=$(OMV_FIRM_BASE) --gap-fill=0xFF $(FW_DIR)/$(BOOTLOADER).elf $(FW_DIR)/$(BOOTLOADER)_padded.bin
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$(CAT) $(FW_DIR)/$(BOOTLOADER)_padded.bin $(FW_DIR)/$(FIRMWARE).bin > $(FW_DIR)/$(OPENMV).bin
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$(RM) $(FW_DIR)/$(BOOTLOADER)_padded.bin
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$(SIZE) $(FW_DIR)/$(BOOTLOADER).elf
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