misc: Format code.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
This commit is contained in:
iabdalkader 2025-09-28 19:45:07 +02:00
parent 8233e03553
commit f8e110ca91
31 changed files with 243 additions and 208 deletions

View File

@ -45,10 +45,10 @@
#endif
#define OMV_ALIGN_TO(x, alignment) \
((((uintptr_t)(x)) + (alignment) - 1) & ~((uintptr_t)((alignment) - 1)))
((((uintptr_t) (x)) + (alignment) - 1) & ~((uintptr_t) ((alignment) - 1)))
#define OMV_ALIGN_DOWN(x, alignment) \
((uintptr_t)(x) & ~((uintptr_t)(alignment) - 1))
((uintptr_t) (x) & ~((uintptr_t) (alignment) - 1))
#define check_timeout_ms(start_ms, timeout) \
((mp_hal_ticks_ms() - start_ms) > timeout)
@ -88,5 +88,5 @@
// type: Type of the containing structure
// member: Name of the member within the structure
#define OMV_CONTAINER_OF(ptr, type, member) \
((type *)((char *)(ptr) - offsetof(type, member)))
((type *) ((char *) (ptr) - offsetof(type, member)))
#endif //__OMV_COMMON_H__

View File

@ -78,6 +78,7 @@ typedef struct _i2c_dev {
static omv_i2c_t csi_i2c;
static omv_clk_t csi_clk;
// *INDENT-OFF*
// Standard resolution table;
static uint16_t csi_resolution[][2] = {
[OMV_CSI_FRAMESIZE_INVALID] = {0, 0},
@ -125,11 +126,12 @@ static uint16_t csi_resolution[][2] = {
[OMV_CSI_FRAMESIZE_WQXGA] = {2560, 1600},
[OMV_CSI_FRAMESIZE_WQXGA2] = {2592, 1944},
};
// *INDENT-ON*
omv_csi_t csi_all[OMV_CSI_MAX_DEVICES] = {0};
__weak void omv_csi_init0() {
for (size_t i=0; i<OMV_CSI_MAX_DEVICES; i++) {
for (size_t i = 0; i < OMV_CSI_MAX_DEVICES; i++) {
omv_csi_t *csi = &csi_all[i];
omv_i2c_t *i2c = csi->i2c;
@ -179,7 +181,7 @@ __weak int omv_csi_init() {
// Initialize the CSIs using the port's ops as defaults,
// which can be overridden by sensor drivers during probe.
for (size_t i=0; i<OMV_CSI_MAX_DEVICES; i++) {
for (size_t i = 0; i < OMV_CSI_MAX_DEVICES; i++) {
omv_csi_t *csi = &csi_all[i];
memset(csi, 0, sizeof(omv_csi_t));
@ -197,7 +199,7 @@ __weak int omv_csi_init() {
}
// Detect and initialize sensor(s).
for (uint32_t i=0, n_buses=OMV_ARRAY_SIZE(buses); i<n_buses; i++) {
for (uint32_t i = 0, n_buses = OMV_ARRAY_SIZE(buses); i < n_buses; i++) {
// Initialize the camera bus.
omv_i2c_init(&csi_i2c, buses[i][0], buses[i][1]);
@ -214,7 +216,7 @@ __weak int omv_csi_init() {
}
// Configure the DCMI interface.
for (size_t i=0; i<OMV_CSI_MAX_DEVICES; i++) {
for (size_t i = 0; i < OMV_CSI_MAX_DEVICES; i++) {
omv_csi_t *csi = &csi_all[i];
if (omv_csi_config(csi, OMV_CSI_CONFIG_INIT) != 0) {
@ -230,7 +232,7 @@ __weak int omv_csi_init() {
omv_csi_t *omv_csi_get(int id) {
omv_csi_t *csi = NULL;
for (size_t i=0; !csi && i<OMV_CSI_MAX_DEVICES; i++) {
for (size_t i = 0; !csi && i < OMV_CSI_MAX_DEVICES; i++) {
if (id == -1 && !csi_all[i].auxiliary) {
csi = &csi_all[i];
} else if (omv_csi_match(&csi_all[i], id)) {
@ -276,7 +278,7 @@ __weak int omv_csi_abort(omv_csi_t *csi, bool fifo_flush, bool in_irq) {
}
void omv_csi_abort_all(void) {
for (size_t i=0; i<OMV_CSI_MAX_DEVICES; i++) {
for (size_t i = 0; i < OMV_CSI_MAX_DEVICES; i++) {
omv_csi_t *csi = &csi_all[i];
// Abort ongoing transfer
@ -313,9 +315,13 @@ __weak int omv_csi_reset(omv_csi_t *csi, bool hard) {
#endif // MICROPY_PY_IMU
csi->color_palette = rainbow_table;
csi->disable_full_flush = false;
csi->vsync_cb = (omv_csi_cb_t) { NULL, NULL };
csi->frame_cb = (omv_csi_cb_t) { NULL, NULL };
csi->vsync_cb = (omv_csi_cb_t) {
NULL, NULL
};
csi->frame_cb = (omv_csi_cb_t) {
NULL, NULL
};
// Restore shutdown state on reset.
if (!csi->power_on) {
omv_csi_shutdown(csi, false);
@ -341,7 +347,7 @@ __weak int omv_csi_reset(omv_csi_t *csi, bool hard) {
// Note hard-reset is shared between all CSIs.
uint32_t reset_time_ms = mp_hal_ticks_ms();
for (size_t i=0; i<OMV_CSI_MAX_DEVICES; i++) {
for (size_t i = 0; i < OMV_CSI_MAX_DEVICES; i++) {
omv_csi_t *csi = &csi_all[i];
if (csi->detected) {
csi->reset_time_ms = reset_time_ms;
@ -371,7 +377,7 @@ static size_t omv_csi_detect(omv_i2c_t *i2c, i2c_dev_t *dev_list) {
uint8_t addr_list[OMV_CSI_I2C_MAX_DEV];
int addr_count = omv_i2c_scan(i2c, addr_list, OMV_ARRAY_SIZE(addr_list));
for (int i=0; i<addr_count; i++) {
for (int i = 0; i < addr_count; i++) {
uint32_t chip_id = 0;
uint8_t slv_addr = addr_list[i];
@ -462,7 +468,9 @@ static size_t omv_csi_detect(omv_i2c_t *i2c, i2c_dev_t *dev_list) {
}
if (chip_id && dev_count < OMV_CSI_MAX_DEVICES) {
dev_list[dev_count++] = (i2c_dev_t) { slv_addr, chip_id };
dev_list[dev_count++] = (i2c_dev_t) {
slv_addr, chip_id
};
}
}
@ -489,10 +497,10 @@ int omv_csi_probe(omv_i2c_t *i2c) {
{ OMV_CSI_ACTIVE_LOW, OMV_CSI_ACTIVE_LOW },
#endif // OMV_CSI_POLARITY_CONFIG
};
// Scan the bus multiple times using different reset and power polarities,
// until a supported sensor is detected.
for (size_t i=0; dev_count == 0 && i<OMV_ARRAY_SIZE(polarity_configs); i++) {
for (size_t i = 0; dev_count == 0 && i < OMV_ARRAY_SIZE(polarity_configs); i++) {
// Power cycle
#if defined(OMV_CSI_POWER_PIN)
power_pol = polarity_configs[i][0];
@ -513,14 +521,16 @@ int omv_csi_probe(omv_i2c_t *i2c) {
dev_count = omv_csi_detect(i2c, dev_list);
}
// Track elapsed time since power-on.
uint32_t power_time_ms = mp_hal_ticks_ms();
// Add special devices, such as SPI sensors, soft-CSI etc...
#if OMV_SOFTCSI_ENABLE
if (dev_count < OMV_CSI_MAX_DEVICES) {
dev_list[dev_count++] = (i2c_dev_t) { 0, SOFTCSI_ID };
dev_list[dev_count++] = (i2c_dev_t) {
0, SOFTCSI_ID
};
}
#endif
@ -529,7 +539,9 @@ int omv_csi_probe(omv_i2c_t *i2c) {
// Found PixArt PAJ6100
power_pol = OMV_CSI_ACTIVE_LOW;
reset_pol = OMV_CSI_ACTIVE_LOW;
dev_list[dev_count++] = (i2c_dev_t) { 0, PAJ6100_ID };
dev_list[dev_count++] = (i2c_dev_t) {
0, PAJ6100_ID
};
}
#endif
@ -539,7 +551,7 @@ int omv_csi_probe(omv_i2c_t *i2c) {
}
// Initialize detected sensors.
for (size_t i=0; i<dev_count; i++) {
for (size_t i = 0; i < dev_count; i++) {
omv_csi_t *csi = &csi_all[i];
sensor_init_t init_fun = NULL;
@ -547,13 +559,13 @@ int omv_csi_probe(omv_i2c_t *i2c) {
csi->power_on = true;
csi->power_pol = power_pol;
csi->reset_pol = reset_pol;
csi->chip_id = dev_list[i].chip_id;
csi->chip_id = dev_list[i].chip_id;
csi->slv_addr = dev_list[i].slv_addr;
csi->power_time_ms = power_time_ms;
csi->reset_time_ms = power_time_ms;
// Find the sensors init function.
for (size_t i=0; i<OMV_ARRAY_SIZE(sensor_config_table); i++) {
for (size_t i = 0; i < OMV_ARRAY_SIZE(sensor_config_table); i++) {
const sensor_config_t *config = &sensor_config_table[i];
if (csi->chip_id == config->chip_id) {
init_fun = config->init_fun;
@ -562,7 +574,7 @@ int omv_csi_probe(omv_i2c_t *i2c) {
}
}
if (init_fun == NULL) {
if (init_fun == NULL) {
return OMV_CSI_ERROR_ISC_UNSUPPORTED;
} else if (init_fun(csi) != 0) {
return OMV_CSI_ERROR_ISC_INIT_FAILED;
@ -583,7 +595,7 @@ int omv_csi_probe(omv_i2c_t *i2c) {
// Soft-CSI + Lepton). If only one is found, use it as main. If
// multiple, pick the first non-Soft-CSI sensor as main.
if (dev_count == aux_count) {
for (size_t i=0; i<dev_count; i++) {
for (size_t i = 0; i < dev_count; i++) {
omv_csi_t *csi = &csi_all[i];
if (dev_count == 1 || csi->chip_id != SOFTCSI_ID) {
aux_count--;
@ -603,10 +615,10 @@ int omv_csi_probe(omv_i2c_t *i2c) {
if ((dev_count - aux_count) != 1) {
return -1;
}
// Clear the FB pointer for all aux sensors, as they use
// dynamically allocated frame buffers.
for (size_t i=0; i<dev_count; i++) {
for (size_t i = 0; i < dev_count; i++) {
omv_csi_t *csi = &csi_all[i];
if (csi->auxiliary) {
csi->fb = NULL;
@ -654,7 +666,7 @@ __weak int omv_csi_set_clk_frequency(omv_csi_t *csi, uint32_t frequency) {
clk->set_freq(clk, frequency) != 0) {
return OMV_CSI_ERROR_CTL_FAILED;
}
clk->freq = frequency;
return 0;
}
@ -1292,7 +1304,7 @@ __weak int omv_csi_set_framebuffers(omv_csi_t *csi, size_t count, bool expand) {
#endif
if (count == -1) {
for (size_t i=3; i>0; i--) {
for (size_t i = 3; i > 0; i--) {
if (!framebuffer_resize(csi->fb, i, frame_size, expand)) {
return 0;
}
@ -1472,16 +1484,16 @@ __weak int omv_csi_auto_crop_framebuffer(omv_csi_t *csi) {
return 0;
}
#define copy_transposed_line(dstp, srcp) \
#define copy_transposed_line(dstp, srcp) \
for (int i = csi->fb->u, h = csi->fb->v; i; i--) { \
*dstp = *srcp++; \
dstp += h; \
*dstp = *srcp++; \
dstp += h; \
}
#define copy_transposed_line_rev16(dstp, srcp) \
#define copy_transposed_line_rev16(dstp, srcp) \
for (int i = csi->fb->u, h = csi->fb->v; i; i--) { \
*dstp = __REV16(*srcp++); \
dstp += h; \
*dstp = __REV16(*srcp++); \
dstp += h; \
}
__weak int omv_csi_copy_line(omv_csi_t *csi, void *dma, uint8_t *src, uint8_t *dst) {

View File

@ -42,36 +42,36 @@
// Call stack entry for tracking nested calls
typedef struct {
void *func_addr; // Function address
void *call_addr; // Call site address
void *func_addr; // Function address
void *call_addr; // Call site address
uint32_t enter_ticks; // Timestamp on entry
uint32_t enter_cycles; // Cycle count on entry
uint32_t enter_ticks; // Timestamp on entry
uint32_t enter_cycles; // Cycle count on entry
uint64_t child_ticks; // Total child execution time
uint64_t child_cycles; // Total child cycle count
uint64_t child_ticks; // Total child execution time
uint64_t child_cycles; // Total child cycle count
#if __PMU_PRESENT
uint16_t enter_events[__PMU_NUM_EVENTCNT]; // PMU events on entry
uint64_t child_events[__PMU_NUM_EVENTCNT]; // Total child PMU events
uint16_t enter_events[__PMU_NUM_EVENTCNT]; // PMU events on entry
uint64_t child_events[__PMU_NUM_EVENTCNT]; // Total child PMU events
#endif
} omv_stack_entry_t;
typedef struct {
bool initialized; // Profiler state.
mutex_t mutex; // Protects profile data
bool reset_pending; // Reset requested flag
omv_profiler_mode_t mode; // Inclusive/exclusive mode
bool initialized; // Profiler state.
mutex_t mutex; // Protects profile data
bool reset_pending; // Reset requested flag
omv_profiler_mode_t mode; // Inclusive/exclusive mode
uint32_t collisions; // Hash table collision count
omv_profiler_data_t *hash[OMV_PROFILER_HASH_SIZE]; // Hash table buckets
uint32_t collisions; // Hash table collision count
omv_profiler_data_t *hash[OMV_PROFILER_HASH_SIZE]; // Hash table buckets
uint32_t pool_index; // Next free pool entry
omv_profiler_data_t pool[OMV_PROFILER_HASH_SIZE]; // Entry pool
uint32_t pool_index; // Next free pool entry
omv_profiler_data_t pool[OMV_PROFILER_HASH_SIZE]; // Entry pool
int32_t stack_top; // Current stack position
uint32_t stack_depth; // Max stack depth reached
omv_stack_entry_t stack[OMV_PROFILER_STACK_DEPTH]; // Call stack
int32_t stack_top; // Current stack position
uint32_t stack_depth; // Max stack depth reached
omv_stack_entry_t stack[OMV_PROFILER_STACK_DEPTH]; // Call stack
} omv_profiler_state_t;
static omv_profiler_state_t profiler;
@ -82,12 +82,12 @@ static omv_profiler_state_t profiler;
static OMV_ATTR_NO_INSTRUMENT mp_uint_t ticks_us_monotonic(void) {
static mp_uint_t last_timestamp = 0;
mp_uint_t current = mp_hal_ticks_us();
// Ensure monotonic behavior
if (current > last_timestamp) {
last_timestamp = current;
}
return last_timestamp;
}
@ -103,7 +103,7 @@ static inline uint32_t OMV_ATTR_NO_INSTRUMENT hash_address(void *addr) {
}
// Initialize profiling system
void omv_profiler_init(void) {
void omv_profiler_init(void) {
if (!profiler.initialized) {
// Reset state
memset(&profiler, 0, sizeof(profiler));
@ -125,7 +125,7 @@ void omv_profiler_init(void) {
}
void omv_profiler_reset(void) {
if (!mutex_try_lock(&profiler.mutex, MUTEX_TID_OMV)) {
if (!mutex_try_lock(&profiler.mutex, MUTEX_TID_OMV)) {
// Set a pending reset if the data is locked.
profiler.reset_pending = true;
} else {
@ -184,7 +184,7 @@ void omv_profiler_set_event(uint32_t num, uint32_t type) {
static omv_profiler_data_t *omv_profiler_get_entry(void *func_addr) {
uint32_t hash = hash_address(func_addr);
omv_profiler_data_t *entry = profiler.hash[hash];
// Search existing entries in collision chain
while (entry != NULL) {
if (entry->func_addr == func_addr) {
@ -192,18 +192,18 @@ static omv_profiler_data_t *omv_profiler_get_entry(void *func_addr) {
}
entry = entry->next;
}
// Create new entry if not found
if (profiler.pool_index >= OMV_PROFILER_HASH_SIZE) {
// Pool exhausted
return NULL;
}
entry = &profiler.pool[profiler.pool_index++];
memset(entry, 0, sizeof(omv_profiler_data_t));
entry->min_ticks = UINT32_MAX;
// Insert at head of collision chain
if (profiler.hash[hash] != NULL) {
profiler.collisions++;
@ -211,14 +211,14 @@ static omv_profiler_data_t *omv_profiler_get_entry(void *func_addr) {
entry->next = profiler.hash[hash];
profiler.hash[hash] = entry;
return entry;
}
void OMV_ATTR_NO_INSTRUMENT __cyg_profile_func_enter(void *func_addr, void *call_addr) {
uint32_t enter_ticks = OMV_GET_TICKS_COUNT();
uint32_t enter_cycles = OMV_GET_CYCLE_COUNT();
if (func_addr == NULL || call_addr == NULL) {
return;
}
@ -241,11 +241,11 @@ void OMV_ATTR_NO_INSTRUMENT __cyg_profile_func_enter(void *func_addr, void *call
profiler.stack_top = OMV_PROFILER_STACK_DEPTH - 1;
return;
}
if (profiler.stack_top > (int32_t)profiler.stack_depth) {
if (profiler.stack_top > (int32_t) profiler.stack_depth) {
profiler.stack_depth = profiler.stack_top;
}
profiler_stack_top(func_addr) = func_addr;
profiler_stack_top(call_addr) = call_addr;
@ -254,7 +254,7 @@ void OMV_ATTR_NO_INSTRUMENT __cyg_profile_func_enter(void *func_addr, void *call
profiler_stack_top(child_cycles) = 0;
profiler_stack_top(enter_cycles) = enter_cycles;
#if __PMU_PRESENT
for (size_t i = 0; i < __PMU_NUM_EVENTCNT; i++) {
profiler_stack_top(child_events[i]) = 0;
@ -294,13 +294,13 @@ void OMV_ATTR_NO_INSTRUMENT __cyg_profile_func_exit(void *func_addr, void *call_
if (profiler.stack_top < 0 || profiler.stack_top >= OMV_PROFILER_STACK_DEPTH) {
return;
}
// Function address should match the stack's top.
if (func_addr != profiler_stack_top(func_addr) ||
call_addr != profiler_stack_top(call_addr)) {
goto exit_cleanup;
}
// Protect profile data update via mutex.
if (!mutex_try_lock(&profiler.mutex, MUTEX_TID_OMV)) {
goto exit_cleanup;
@ -359,7 +359,7 @@ void OMV_ATTR_NO_INSTRUMENT __cyg_profile_func_exit(void *func_addr, void *call_
}
}
#endif
mutex_unlock:
mutex_unlock(&profiler.mutex, MUTEX_TID_OMV);
exit_cleanup:

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@ -81,23 +81,23 @@ OMV_ATTR_NO_INSTRUMENT mutex_t *omv_profiler_lock(void);
#endif
// Manual instrumentation macros
#define OMV_PROFILER_ENTER(func) \
do { \
void *func_addr = (void*)(func); \
void *call_addr = __builtin_return_address(0); \
#define OMV_PROFILER_ENTER(func) \
do { \
void *func_addr = (void *) (func); \
void *call_addr = __builtin_return_address(0); \
__cyg_profile_func_enter(func_addr, call_addr); \
} while(0)
} while (0)
#define OMV_PROFILER_EXIT(func) \
do { \
void *func_addr = (void*)(func); \
#define OMV_PROFILER_EXIT(func) \
do { \
void *func_addr = (void *) (func); \
void *call_addr = __builtin_return_address(0); \
__cyg_profile_func_exit(func_addr, call_addr); \
} while(0)
} while (0)
#else
// Disabled - empty macros
#define OMV_PROFILER_ENTER(func) do {} while(0)
#define OMV_PROFILER_EXIT(func) do {} while(0)
#define OMV_PROFILER_ENTER(func) do {} while (0)
#define OMV_PROFILER_EXIT(func) do {} while (0)
#endif // OMV_PROFILER_ENABLE
#endif // __OMV_PROFILER_H__

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@ -36,7 +36,7 @@ void queue_init(queue_t **q, size_t capacity, void *buffer) {
if (!q || !buffer) {
return;
}
*q = (queue_t *) buffer;
(*q)->capacity = capacity;
queue_flush(*q);
@ -46,12 +46,12 @@ queue_t *queue_alloc(size_t capacity) {
if (capacity == 0) {
return NULL;
}
void *buffer = malloc(queue_calc_size(capacity));
if (!buffer) {
return NULL;
}
queue_t *q;
queue_init(&q, capacity, buffer);
return q;
@ -79,7 +79,7 @@ bool queue_push(queue_t *q, void *item) {
if (!q || !item) {
return false;
}
#ifndef HAVE_STDATOMIC_H
size_t new_tail = (q->tail + 1) % (q->capacity + 1);
@ -101,7 +101,7 @@ bool queue_push(queue_t *q, void *item) {
// Release ensures the write completes before advancing tail
atomic_store_explicit(&q->tail, new_tail, memory_order_release);
#endif
return true;
}
@ -125,7 +125,7 @@ void *queue_pop(queue_t *q, bool peek) {
atomic_store_explicit(&q->head, new_head, memory_order_release);
}
#endif
return item;
}
@ -133,7 +133,7 @@ bool queue_is_empty(const queue_t *q) {
if (!q) {
return true;
}
#ifndef HAVE_STDATOMIC_H
size_t head = q->head;
size_t tail = q->tail;
@ -149,7 +149,7 @@ size_t queue_size(const queue_t *q) {
if (!q) {
return 0;
}
#ifndef HAVE_STDATOMIC_H
size_t head = q->head;
size_t tail = q->tail;
@ -158,7 +158,7 @@ size_t queue_size(const queue_t *q) {
size_t head = atomic_load_explicit(&q->head, memory_order_acquire);
size_t tail = atomic_load_explicit(&q->tail, memory_order_acquire);
#endif
// Calculate size considering the circular buffer
if (tail >= head) {
return tail - head;

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@ -143,7 +143,9 @@ int tinyusb_debug_init(void) {
ctx.opcode = 0;
ctx.length = 0;
if (!ctx.ringbuf.buf) {
ctx.ringbuf = (ringbuf_t) { ctx.rawbuf, sizeof(ctx.rawbuf), 0, 0 };
ctx.ringbuf = (ringbuf_t) {
ctx.rawbuf, sizeof(ctx.rawbuf), 0, 0
};
}
return 0;
}
@ -165,7 +167,7 @@ void tinyusb_debug_task(mp_sched_node_t *node) {
if (cmdbuf[0] == 0x30) {
ctx.opcode = cmdbuf[1];
ctx.length = *((uint32_t*)(cmdbuf+2));
ctx.length = *((uint32_t *) (cmdbuf + 2));
usbdbg_control(NULL, ctx.opcode, ctx.length);
}
@ -180,7 +182,7 @@ void tinyusb_debug_task(mp_sched_node_t *node) {
if (tud_task_event_ready()) {
tud_task_ext(0, false);
}
if (ctx.opcode & 0x80) {
bytes = OMV_MIN(ctx.length, tud_cdc_write_available());
if (bytes) {
@ -197,7 +199,7 @@ void tinyusb_debug_task(mp_sched_node_t *node) {
usbdbg_data_out(bytes, tud_cdc_read);
}
}
if (bytes) {
ctx.timestamp = mp_hal_ticks_ms();
} else if (__get_PRIMASK() & 1) {
@ -205,7 +207,7 @@ void tinyusb_debug_task(mp_sched_node_t *node) {
} else if (check_timeout_ms(ctx.timestamp, USBDBG_DATA_TIMEOUT)) {
tinyusb_debug_init();
}
}
}
}
// For the mimxrt, and nrf ports this replaces the weak USB IRQ handlers.

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@ -418,7 +418,7 @@ void usbdbg_control(void *buffer, uint8_t request, uint32_t size) {
xfer_offs = 0;
xfer_size = size;
break;
case USBDBG_SCRIPT_STOP:
if (script_running) {
// Reset CDC buffers.

View File

@ -64,8 +64,8 @@
#define VOSPI_IS_SID_VALID(vospi, pid) (VOSPI_IS_LEPTON3(vospi) && pid == 20)
typedef enum {
VOSPI_FLAG_STREAM = (1 << 0),
VOSPI_FLAG_CAPTURE = (1 << 1),
VOSPI_FLAG_STREAM = (1 << 0),
VOSPI_FLAG_CAPTURE = (1 << 1),
VOSPI_FLAG_SYNC_ERROR = (1 << 2),
} vospi_flags_t;

View File

@ -156,7 +156,7 @@ static int set_framesize(omv_csi_t *csi, omv_csi_framesize_t framesize) {
if (framesize == OMV_CSI_FRAMESIZE_CUSTOM &&
csi->resolution[framesize][0] == ACTIVE_SENSOR_WIDTH &&
csi->resolution[framesize][1] == ACTIVE_SENSOR_HEIGHT) {
return 0;
return 0;
}
return (framesize == OMV_CSI_FRAMESIZE_320X320) ? 0 : -1;
} else {
@ -520,7 +520,7 @@ static int ioctl(omv_csi_t *csi, int request, va_list ap) {
}
} else {
uint32_t len = csi->resolution[csi->framesize][0] *
(csi->resolution[csi->framesize][1] / sizeof(uint32_t));
(csi->resolution[csi->framesize][1] / sizeof(uint32_t));
for (uint32_t j = 0; j < len; j++) {
uint32_t val = ((uint32_t *) image.data)[j];
switch (__EVT20_TYPE(val)) {

View File

@ -192,7 +192,7 @@ static int ioctl(omv_csi_t *csi, int request, va_list ap) {
}
case OMV_CSI_IOCTL_LEPTON_GET_RESOLUTION: {
int *resolution = va_arg(ap, int *);
*resolution = lepton.radiometry ? 16 : 14;
*resolution = lepton.radiometry ? 16 : 14;
break;
}
case OMV_CSI_IOCTL_LEPTON_RUN_COMMAND: {
@ -411,7 +411,7 @@ static int snapshot(omv_csi_t *csi, image_t *image, uint32_t flags) {
if (!vospi_active()) {
vospi_restart();
}
if ((buffer = framebuffer_acquire(csi->fb, FB_FLAG_USED | FB_FLAG_PEEK))) {
break;
}
@ -430,7 +430,7 @@ static int snapshot(omv_csi_t *csi, image_t *image, uint32_t flags) {
if (lepton_config(csi, lepton.measurement_mode, lepton.high_temp_mode) != 0) {
return OMV_CSI_ERROR_CTL_FAILED;
}
tick_start = mp_hal_ticks_ms();
}
}
@ -439,7 +439,7 @@ static int snapshot(omv_csi_t *csi, image_t *image, uint32_t flags) {
fb->h = csi->transpose ? fb->u : fb->v;
fb->pixfmt = csi->pixformat;
image_t fb_image;
image_t fb_image;
framebuffer_to_image(fb, &fb_image);
LEP_SYS_FPA_TEMPERATURE_KELVIN_T kelvin;
@ -448,7 +448,7 @@ static int snapshot(omv_csi_t *csi, image_t *image, uint32_t flags) {
return OMV_CSI_ERROR_IO_ERROR;
}
}
fb_alloc_mark();
image_t temp = {
.w = csi->transpose ? lepton.v_res : lepton.h_res,

View File

@ -47,8 +47,7 @@ static int16_t readout_y = 0;
static enum {
MONO_CFA, RCCC_CFA, BAYER_CFA
}
cfa_type = MONO_CFA;
} cfa_type = MONO_CFA;
static bool is_mt9v0x2(omv_csi_t *csi) {
return (csi->chip_id == MT9V0X2_ID) || (csi->chip_id == MT9V0X2_C_ID);

View File

@ -6,7 +6,7 @@
#include "omv_csi.h"
#include "omv_boardconfig.h"
typedef int (*sensor_init_t)(omv_csi_t *);
typedef int (*sensor_init_t) (omv_csi_t *);
typedef struct {
uint32_t chip_id;
@ -115,7 +115,7 @@ extern int frogeye2020_init(omv_csi_t *csi);
#endif
extern int softcsi_init(omv_csi_t *csi);
// Sensor table
// Sensor table *INDENT-OFF*
static const sensor_config_t sensor_config_table[] = {
#if OMV_OV2640_ENABLE
{ OV2640_ID, OMV_OV2640_CLK_FREQ, ov2640_init },

View File

@ -95,18 +95,18 @@ static int snapshot(omv_csi_t *csi, image_t *image, uint32_t flags) {
for (size_t x = 0; x < image->w; x++) {
size_t tx = x;
size_t ty = y;
if (csi->hmirror) {
tx = image->w - 1 - tx;
}
if (csi->vflip) {
ty = image->h - 1 - ty;
}
size_t pattern_x = csi->transpose ? y : x;
size_t pattern_y = csi->transpose ? x : y;
switch (csi->pixformat) {
case PIXFORMAT_GRAYSCALE: {
uint8_t value = ((((pattern_x + offset) / 16) + (pattern_y / 16)) % 2) ? 0xFF : 0x00;
@ -126,7 +126,7 @@ static int snapshot(omv_csi_t *csi, image_t *image, uint32_t flags) {
}
}
}
// Move the buffer from free queue -> used queue.
framebuffer_release(fb, FB_FLAG_FREE);
framebuffer_to_image(fb, image);

View File

@ -27,8 +27,7 @@
typedef struct xylr {
int16_t x, y, l, r, t_l, b_l;
}
xylr_t;
} xylr_t;
static float sign(float x) {
return x / fabsf(x);

View File

@ -61,8 +61,7 @@ float fast_expf(float x) {
float fast_cbrtf(float x) {
union {
int ix; float x;
}
v;
} v;
v.x = x; // x can be viewed as int.
v.ix = v.ix / 4 + v.ix / 16; // Approximate divide by 3.
v.ix = v.ix + v.ix / 16;
@ -135,12 +134,10 @@ float fast_atan2f(float y, float x) {
float fast_log2(float x) {
union {
float f; uint32_t i;
}
vx = { x };
} vx = { x };
union {
uint32_t i; float f;
}
mx = { (vx.i & 0x007FFFFF) | 0x3f000000 };
} mx = { (vx.i & 0x007FFFFF) | 0x3f000000 };
float y = vx.i;
y *= 1.1920928955078125e-7f;
@ -155,8 +152,7 @@ float fast_log(float x) {
float fast_powf(float a, float b) {
union {
float d; int x;
}
u = { a };
} u = { a };
u.x = (int) ((b * (u.x - 1064866805)) + 1064866805);
return u.d;
}

View File

@ -78,8 +78,7 @@ static inline int fast_ceilf(float x) {
#else
union {
uint32_t i; float f;
}
max = { 0x3f7fffff };
} max = { 0x3f7fffff };
x += max.f;
__asm__ volatile (
"vcvt.S32.f32 %[r], %[x]\n"

View File

@ -172,8 +172,7 @@ typedef struct color_thresholds_list_lnk_data {
uint8_t LMin, LMax; // or grayscale
int8_t AMin, AMax;
int8_t BMin, BMax;
}
color_thresholds_list_lnk_data_t;
}color_thresholds_list_lnk_data_t;
#define COLOR_THRESHOLD_BINARY(pixel, threshold, invert) \
({ \
@ -389,12 +388,12 @@ typedef struct ec_event {
#define EC_EVENT_SIZE (sizeof(ec_event_t) / sizeof(uint16_t))
typedef enum {
EC_PIX_OFF_EVENT = 0,
EC_PIX_ON_EVENT = 1,
EC_PIX_OFF_EVENT = 0,
EC_PIX_ON_EVENT = 1,
EC_EXT_TRIGGER_FALLING = 2,
EC_EXT_TRIGGER_RISING = 3,
EC_EXT_TRIGGER_RISING = 3,
EC_RST_TRIGGER_FALLING = 4,
EC_RST_TRIGGER_RISING = 5
EC_RST_TRIGGER_RISING = 5
} ec_event_type_t;
#define EC_PIXEL_EVENT(event) (EC_PIX_OFF_EVENT + ((event) & 1))

View File

@ -41,8 +41,7 @@ static void read_int_reset(ppm_read_settings_t *rs) {
static void read_int(FIL *fp, uint32_t *i, ppm_read_settings_t *rs) {
enum {
EAT_WHITESPACE, EAT_COMMENT, EAT_NUMBER
}
mode = EAT_WHITESPACE;
} mode = EAT_WHITESPACE;
for (*i = 0;;) {
if (!rs->read_int_c_valid) {
if (file_tell(fp) == file_size(fp)) {

View File

@ -54,8 +54,8 @@ typedef uint8x16_t v128_u8_t;
typedef int16x8_t v128_s16_t;
typedef uint16x8_t v128_u16_t;
typedef int32x4_t v128_s32_t;
typedef uint32x4_t v128_u32_t;
typedef int32x4_t v128_s32_t;
typedef uint32x4_t v128_u32_t;
typedef float32x4_t v128_f32_t;
#if (VECTOR_SIZE_BYTES >= 8)
@ -71,8 +71,8 @@ typedef uint8_t v128_u8_t __attribute__ ((vector_size(VECTOR_SIZE_BYTES)));
typedef int16_t v128_s16_t __attribute__ ((vector_size(VECTOR_SIZE_BYTES)));
typedef uint16_t v128_u16_t __attribute__ ((vector_size(VECTOR_SIZE_BYTES)));
typedef int32_t v128_s32_t __attribute__ ((vector_size(VECTOR_SIZE_BYTES)));
typedef uint32_t v128_u32_t __attribute__ ((vector_size(VECTOR_SIZE_BYTES)));
typedef int32_t v128_s32_t __attribute__ ((vector_size(VECTOR_SIZE_BYTES)));
typedef uint32_t v128_u32_t __attribute__ ((vector_size(VECTOR_SIZE_BYTES)));
typedef float32_t v128_f32_t __attribute__ ((vector_size(VECTOR_SIZE_BYTES)));
#if (VECTOR_SIZE_BYTES >= 8)
@ -1357,10 +1357,18 @@ static inline v4x_rows_t vcvt_u8_f32(v128_t v0) {
};
#else
return (v4x_rows_t) {
.r0 = (v128_t) { .f32 = { (float32_t) v0.u8[0] } },
.r1 = (v128_t) { .f32 = { (float32_t) v0.u8[1] } },
.r2 = (v128_t) { .f32 = { (float32_t) v0.u8[2] } },
.r3 = (v128_t) { .f32 = { (float32_t) v0.u8[3] } }
.r0 = (v128_t) {
.f32 = { (float32_t) v0.u8[0] }
},
.r1 = (v128_t) {
.f32 = { (float32_t) v0.u8[1] }
},
.r2 = (v128_t) {
.f32 = { (float32_t) v0.u8[2] }
},
.r3 = (v128_t) {
.f32 = { (float32_t) v0.u8[3] }
}
};
#endif
}
@ -1377,10 +1385,18 @@ static inline v4x_rows_t vcvt_s8_f32(v128_t v0) {
};
#else
return (v4x_rows_t) {
.r0 = (v128_t) { .f32 = { (float32_t) v0.s8[0] } },
.r1 = (v128_t) { .f32 = { (float32_t) v0.s8[1] } },
.r2 = (v128_t) { .f32 = { (float32_t) v0.s8[2] } },
.r3 = (v128_t) { .f32 = { (float32_t) v0.s8[3] } }
.r0 = (v128_t) {
.f32 = { (float32_t) v0.s8[0] }
},
.r1 = (v128_t) {
.f32 = { (float32_t) v0.s8[1] }
},
.r2 = (v128_t) {
.f32 = { (float32_t) v0.s8[2] }
},
.r3 = (v128_t) {
.f32 = { (float32_t) v0.s8[3] }
}
};
#endif
}
@ -1393,8 +1409,12 @@ static inline v2x_rows_t vcvt_u16_f32(v128_t v0) {
};
#else
return (v2x_rows_t) {
.r0 = (v128_t) { .f32 = { (float32_t) v0.u16[0] } },
.r1 = (v128_t) { .f32 = { (float32_t) v0.u16[1] } }
.r0 = (v128_t) {
.f32 = { (float32_t) v0.u16[0] }
},
.r1 = (v128_t) {
.f32 = { (float32_t) v0.u16[1] }
}
};
#endif
}
@ -1407,8 +1427,12 @@ static inline v2x_rows_t vcvt_s16_f32(v128_t v0) {
};
#else
return (v2x_rows_t) {
.r0 = (v128_t) { .f32 = { (float32_t) v0.s16[0] } },
.r1 = (v128_t) { .f32 = { (float32_t) v0.s16[1] } }
.r0 = (v128_t) {
.f32 = { (float32_t) v0.s16[0] }
},
.r1 = (v128_t) {
.f32 = { (float32_t) v0.s16[1] }
}
};
#endif
}

View File

@ -133,11 +133,11 @@ int ml_backend_init_model(py_ml_model_obj_t *model) {
}
// Allocate executable memory.
state->exec_ram_size = OMV_ALIGN_TO(rt.rt_ram_xip, AI_RELOC_ALIGNMENT);
state->exec_ram_size = OMV_ALIGN_TO(rt.rt_ram_xip, AI_RELOC_ALIGNMENT);
state->exec_ram_addr = m_new(uint8_t, state->exec_ram_size + AI_RELOC_ALIGNMENT);
// Allocate external memory.
state->ext_ram_size = OMV_ALIGN_TO(rt.ext_ram_sz, AI_RELOC_ALIGNMENT);
state->ext_ram_size = OMV_ALIGN_TO(rt.ext_ram_sz, AI_RELOC_ALIGNMENT);
state->ext_ram_addr = m_new(uint8_t, state->ext_ram_size + AI_RELOC_ALIGNMENT);
// Create and install the relocatable model.
@ -174,17 +174,19 @@ int ml_backend_init_model(py_ml_model_obj_t *model) {
model->memory_addr = config.exec_ram_addr;
model->memory_size = config.exec_ram_size + config.ext_ram_size;
const LL_Buffer_InfoTypeDef *model_inputs = ll_aton_reloc_get_input_buffers_info(&state->nn_inst, -1);
const LL_Buffer_InfoTypeDef *model_inputs = ll_aton_reloc_get_input_buffers_info(&state->nn_inst, -1);
const LL_Buffer_InfoTypeDef *model_outputs = ll_aton_reloc_get_output_buffers_info(&state->nn_inst, -1);
// Initialize the model's inputs.
for (model->inputs_size = 0; model_inputs[model->inputs_size].name != NULL; model->inputs_size++);
for (model->inputs_size = 0; model_inputs[model->inputs_size].name != NULL; model->inputs_size++) {
;
}
model->input_shape = (mp_obj_tuple_t *) MP_OBJ_TO_PTR(mp_obj_new_tuple(model->inputs_size, NULL));
model->input_scale = (mp_obj_tuple_t *) MP_OBJ_TO_PTR(mp_obj_new_tuple(model->inputs_size, NULL));
model->input_zero_point = (mp_obj_tuple_t *) MP_OBJ_TO_PTR(mp_obj_new_tuple(model->inputs_size, NULL));
model->input_dtype = (mp_obj_tuple_t *) MP_OBJ_TO_PTR(mp_obj_new_tuple(model->inputs_size, NULL));
for (size_t i=0; i<model->inputs_size; i++) {
for (size_t i = 0; i < model->inputs_size; i++) {
const LL_Buffer_InfoTypeDef *input = &model_inputs[i];
// Check input data type.
@ -193,7 +195,7 @@ int ml_backend_init_model(py_ml_model_obj_t *model) {
}
mp_obj_tuple_t *o = (mp_obj_tuple_t *) MP_OBJ_TO_PTR(mp_obj_new_tuple(input->mem_ndims, NULL));
for (int j=0; j<input->mem_ndims; j++) {
for (int j = 0; j < input->mem_ndims; j++) {
o->items[j] = mp_obj_new_int(input->mem_shape[j]);
}
@ -205,13 +207,15 @@ int ml_backend_init_model(py_ml_model_obj_t *model) {
}
// Initialize the model's outputs.
for (model->outputs_size = 0; model_outputs[model->outputs_size].name != NULL; model->outputs_size++);
for (model->outputs_size = 0; model_outputs[model->outputs_size].name != NULL; model->outputs_size++) {
;
}
model->output_shape = (mp_obj_tuple_t *) MP_OBJ_TO_PTR(mp_obj_new_tuple(model->outputs_size, NULL));
model->output_scale = (mp_obj_tuple_t *) MP_OBJ_TO_PTR(mp_obj_new_tuple(model->outputs_size, NULL));
model->output_zero_point = (mp_obj_tuple_t *) MP_OBJ_TO_PTR(mp_obj_new_tuple(model->outputs_size, NULL));
model->output_dtype = (mp_obj_tuple_t *) MP_OBJ_TO_PTR(mp_obj_new_tuple(model->outputs_size, NULL));
for (size_t i=0; i<model->outputs_size; i++) {
for (size_t i = 0; i < model->outputs_size; i++) {
const LL_Buffer_InfoTypeDef *output = &model_outputs[i];
// Check output data type.
@ -220,7 +224,7 @@ int ml_backend_init_model(py_ml_model_obj_t *model) {
}
mp_obj_tuple_t *o = (mp_obj_tuple_t *) MP_OBJ_TO_PTR(mp_obj_new_tuple(output->mem_ndims, NULL));
for (int j=0; j<output->mem_ndims; j++) {
for (int j = 0; j < output->mem_ndims; j++) {
o->items[j] = mp_obj_new_int(output->mem_shape[j]);
}
@ -237,7 +241,7 @@ int ml_backend_run_inference(py_ml_model_obj_t *model) {
ml_backend_state_t *state = (ml_backend_state_t *) model->state;
// Flush input buffers.
for (size_t i=0; i< model->inputs_size; i++) {
for (size_t i = 0; i < model->inputs_size; i++) {
const LL_Buffer_InfoTypeDef *buf = ll_aton_reloc_get_input_buffers_info(&state->nn_inst, i);
SCB_CleanDCache_by_Addr(LL_Buffer_addr_start(buf), LL_Buffer_len(buf));
}

View File

@ -380,7 +380,7 @@ int imx_csi_snapshot(omv_csi_t *csi, image_t *image, uint32_t flags) {
csi->one_shot = csi->pixformat != PIXFORMAT_JPEG &&
!csi->transpose && !omv_csi_get_cropped(csi) &&
!(csi->pixformat == PIXFORMAT_GRAYSCALE && csi->mono_bpp == 2);
// Configure DMA buffers.
CSI_REG_DMASA_FB1(CSI) = (uint32_t) (&_line_buf[OMV_LINE_BUF_SIZE * 0]);
CSI_REG_DMASA_FB2(CSI) = (uint32_t) (&_line_buf[OMV_LINE_BUF_SIZE / 2]);

View File

@ -416,12 +416,12 @@ void MP_WEAK __assert_func(const char *file, int line, const char *func, const c
#if MICROPY_EMIT_MACHINE_CODE
void *nrf_native_code_commit(void *buf, unsigned int len, void *reloc) {
(void)len;
(void) len;
if (reloc) {
// Native code in RAM must execute from the IRAM region at 0x00800000, and so relocations
// to text must also point to this region. The MICROPY_MAKE_POINTER_CALLABLE macro will
// adjust the `buf` address from RAM to IRAM.
mp_native_relocate(reloc, buf, (uintptr_t)MICROPY_MAKE_POINTER_CALLABLE(buf) & ~1);
mp_native_relocate(reloc, buf, (uintptr_t) MICROPY_MAKE_POINTER_CALLABLE(buf) & ~1);
}
return buf;
}

View File

@ -181,11 +181,11 @@ static int rp2_csi_snapshot(omv_csi_t *csi, image_t *image, uint32_t flags) {
channel_config_set_bswap(&c, csi->rgb_swap && (fb->bpp == 2));
dma_channel_configure(OMV_CSI_DMA_CHANNEL, &c,
(uint32_t *) buffer->data, // Destinatinon pointer.
&OMV_CSI_PIO->rxf[OMV_CSI_SM], // Source pointer.
(fb->u * fb->v * fb->bpp) >> 2, // Number of transfers in words.
true // Start immediately, will block on SM.
);
(uint32_t *) buffer->data, // Destinatinon pointer.
&OMV_CSI_PIO->rxf[OMV_CSI_SM], // Source pointer.
(fb->u * fb->v * fb->bpp) >> 2, // Number of transfers in words.
true // Start immediately, will block on SM.
);
// Re-enable DMA IRQs.
dma_irqn_set_channel_enabled(OMV_CSI_DMA, OMV_CSI_DMA_CHANNEL, true);

View File

@ -225,7 +225,7 @@ soft_reset:
#if MICROPY_HW_ENABLE_CAN
pyb_can_init0();
#endif
#if MICROPY_PY_PYB_LEGACY && MICROPY_HW_ENABLE_HW_I2C
#if MICROPY_PY_PYB_LEGACY && MICROPY_HW_ENABLE_HW_I2C
i2c_init0();
#endif
spi_init0();
@ -377,7 +377,7 @@ soft_reset_exit:
// soft reset
mp_printf(MP_PYTHON_PRINTER, "MPY: soft reboot\n");
#if MICROPY_PY_CSI
omv_csi_abort_all();
omv_csi_abort_all();
#endif
#if MICROPY_PY_LWIP
systick_disable_dispatch(SYSTICK_DISPATCH_LWIP);

View File

@ -74,7 +74,7 @@
#endif
typedef enum {
CSI_HANDLE_DCMI = 0,
CSI_HANDLE_DCMI = 0,
CSI_HANDLE_DCMIPP = 1,
} csi_handle_t;
@ -131,15 +131,15 @@ static int stm_csi_config(omv_csi_t *csi, omv_csi_config_t config) {
if (!csi->mipi_if) {
// Configure and initialize DMA.
if (stm_dma_init(&csi->dma, OMV_CSI_DMA_CHANNEL, OMV_CSI_DMA_REQUEST,
DMA_PERIPH_TO_MEMORY, 4, 4, OMV_CSI_DMA_XFER_PORTS,
&stm_dma_csi_init, true)) {
DMA_PERIPH_TO_MEMORY, 4, 4, OMV_CSI_DMA_XFER_PORTS,
&stm_dma_csi_init, true)) {
return OMV_CSI_ERROR_DMA_INIT_FAILED;
}
#if defined(STM32N6)
// Initialize DMA in circular mode.
if (stm_dma_ll_init(&csi->dma, &csi->dma_queue, dma_nodes,
OMV_ARRAY_SIZE(dma_nodes), OMV_CSI_DMA_LIST_PORTS)) {
OMV_ARRAY_SIZE(dma_nodes), OMV_CSI_DMA_LIST_PORTS)) {
return OMV_CSI_ERROR_CSI_INIT_FAILED;
}
#endif
@ -209,7 +209,7 @@ static int stm_csi_config(omv_csi_t *csi, omv_csi_config_t config) {
};
if (HAL_DCMIPP_CSI_SetVCConfig(&csi->dcmipp, DCMIPP_VIRTUAL_CHANNEL0,
DCMIPP_CSI_DT_BPP10) != HAL_OK) {
DCMIPP_CSI_DT_BPP10) != HAL_OK) {
return OMV_CSI_ERROR_CSI_INIT_FAILED;
}
@ -260,12 +260,12 @@ static int stm_csi_config(omv_csi_t *csi, omv_csi_config_t config) {
dma_nodes[i].LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] &= ~DMA_CTR1_DBX;
}
}
#endif
#endif
} else {
#if USE_DCMIPP
csi->dcmipp.State = HAL_DCMIPP_STATE_READY;
// Reset pipes states to allow reconfiguring them.
for (size_t i=0; i<DCMIPP_NUM_OF_PIPES; i++) {
for (size_t i = 0; i < DCMIPP_NUM_OF_PIPES; i++) {
csi->dcmipp.PipeState[i] = HAL_DCMIPP_PIPE_STATE_RESET;
}
// Configure the pixel processing pipeline.
@ -287,7 +287,9 @@ static int stm_csi_abort(omv_csi_t *csi, bool fifo_flush, bool in_irq) {
if (!csi->mipi_if) {
DCMI->CR &= ~DCMI_CR_ENABLE;
while (DCMI->CR & DCMI_CR_ENABLE);
while (DCMI->CR & DCMI_CR_ENABLE) {
;
}
#if defined(STM32N6)
HAL_DMA_Abort(&csi->dma);

View File

@ -158,20 +158,20 @@ typedef I2C_HandleTypeDef *omv_i2c_dev_t;
#define OMV_CSI_PORT_BITS_DCMIPP
#endif
#define OMV_CSI_PORT_BITS \
struct { \
uint32_t dma_size; \
bool one_shot; \
DMA_HandleTypeDef dma; \
IRQn_Type dma_irqn; \
DCMI_HandleTypeDef dcmi; \
OMV_CSI_PORT_BITS_MDMA \
OMV_CSI_PORT_BITS_DCMIPP \
#define OMV_CSI_PORT_BITS \
struct { \
uint32_t dma_size; \
bool one_shot; \
DMA_HandleTypeDef dma; \
IRQn_Type dma_irqn; \
DCMI_HandleTypeDef dcmi; \
OMV_CSI_PORT_BITS_MDMA \
OMV_CSI_PORT_BITS_DCMIPP \
};
#define OMV_CSI_CLK_PORT_BITS \
struct { \
TIM_HandleTypeDef tim; \
#define OMV_CSI_CLK_PORT_BITS \
struct { \
TIM_HandleTypeDef tim; \
};
#endif // __OMV_PORTCONFIG_H__

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@ -302,8 +302,8 @@ static int omv_spi_dma_init(omv_spi_t *spi, uint32_t direction, omv_spi_config_t
}
#if defined(STM32N6)
DMA_NodeTypeDef *dma_nodes = NULL;
DMA_QListTypeDef *dma_queue = NULL;
DMA_NodeTypeDef *dma_nodes = NULL;
DMA_QListTypeDef *dma_queue = NULL;
if (direction == DMA_MEMORY_TO_PERIPH) {
dma_queue = &spi->dma_queue_tx;

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@ -283,7 +283,7 @@ uint8_t stm_dma_mpu_region_size(uint32_t size) {
static uint32_t stm_dma_width(uint32_t size, bool source) {
#if defined(STM32N6)
switch(size) {
switch (size) {
case 1: return (source) ? DMA_SRC_DATAWIDTH_BYTE : DMA_DEST_DATAWIDTH_BYTE;
case 2: return (source) ? DMA_SRC_DATAWIDTH_HALFWORD : DMA_DEST_DATAWIDTH_HALFWORD;
case 4: return (source) ? DMA_SRC_DATAWIDTH_WORD : DMA_DEST_DATAWIDTH_WORD;
@ -291,7 +291,7 @@ static uint32_t stm_dma_width(uint32_t size, bool source) {
default: return -1;
}
#else
switch(size) {
switch (size) {
case 1: return (source) ? DMA_PDATAALIGN_BYTE : DMA_MDATAALIGN_BYTE;
case 2: return (source) ? DMA_PDATAALIGN_HALFWORD : DMA_MDATAALIGN_HALFWORD;
case 4: return (source) ? DMA_PDATAALIGN_WORD : DMA_MDATAALIGN_WORD;
@ -313,7 +313,7 @@ static int stm_dma_sec_config(DMA_HandleTypeDef *dma_descr) {
// Enable isolation for HPDMA channels.
if (stm_dma_is_hp_channel(dma_descr->Instance)) {
DMA_IsolationConfigTypeDef isocfg = {
.CidFiltering = DMA_ISOLATION_ON,
.CidFiltering = DMA_ISOLATION_ON,
.StaticCid = DMA_CHANNEL_STATIC_CID_1,
};
@ -344,7 +344,7 @@ int stm_dma_init(DMA_HandleTypeDef *dma_descr, void *dma_channel, uint32_t reque
#else
dma_init->Channel = request;
#endif
// Set direction
dma_init->Direction = direction;
@ -378,7 +378,7 @@ int stm_dma_init(DMA_HandleTypeDef *dma_descr, void *dma_channel, uint32_t reque
// Set allocated ports.
#if defined(STM32N6)
dma_init->TransferAllocatedPort = ports;
#endif
#endif
// F4, F7, H7 or N6 in non-circular mode.
#if defined(STM32N6)
@ -402,7 +402,7 @@ int stm_dma_init(DMA_HandleTypeDef *dma_descr, void *dma_channel, uint32_t reque
#if defined(STM32N6)
int stm_dma_ll_init(DMA_HandleTypeDef *dma_descr, DMA_QListTypeDef *dma_queue,
DMA_NodeTypeDef *dma_nodes, size_t nodes_count, uint32_t ports) {
DMA_NodeTypeDef *dma_nodes, size_t nodes_count, uint32_t ports) {
bool is_hp = stm_dma_is_hp_channel(dma_descr->Instance);
DMA_NodeConfTypeDef node_conf = {
@ -422,7 +422,7 @@ int stm_dma_ll_init(DMA_HandleTypeDef *dma_descr, DMA_QListTypeDef *dma_queue,
memset(dma_nodes, 0, sizeof(DMA_NodeTypeDef) * nodes_count);
DMA_NodeTypeDef *prev_node = NULL;
for (size_t i=0; i<nodes_count; i++) {
for (size_t i = 0; i < nodes_count; i++) {
if (HAL_DMAEx_List_BuildNode(&node_conf, &dma_nodes[i]) != HAL_OK ||
HAL_DMAEx_List_InsertNode(dma_queue, prev_node, &dma_nodes[i]) != HAL_OK) {
return -1;

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@ -45,7 +45,7 @@ int stm_dma_init(DMA_HandleTypeDef *dma_descr, void *dma_channel, uint32_t reque
#if defined(STM32N6)
int stm_dma_ll_init(DMA_HandleTypeDef *dma_descr, DMA_QListTypeDef *dma_queue,
DMA_NodeTypeDef *dma_nodes, size_t nodes_count, uint32_t ports);
DMA_NodeTypeDef *dma_nodes, size_t nodes_count, uint32_t ports);
#endif
#ifdef OMV_MDMA_CHANNEL_DCMI_0

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@ -149,8 +149,8 @@ int stm_isp_config_pipeline(DCMIPP_HandleTypeDef *dcmipp, uint32_t pipe,
for (size_t i = DCMIPP_STATEXT_MODULE1; i <= DCMIPP_STATEXT_MODULE3; i++) {
if (HAL_DCMIPP_PIPE_SetISPStatisticExtractionConfig(dcmipp,
pipe, i,
&statcfg[i - DCMIPP_STATEXT_MODULE1]) != HAL_OK) {
pipe, i,
&statcfg[i - DCMIPP_STATEXT_MODULE1]) != HAL_OK) {
return -1;
}
@ -158,7 +158,7 @@ int stm_isp_config_pipeline(DCMIPP_HandleTypeDef *dcmipp, uint32_t pipe,
return -1;
}
}
return 0;
}
#endif // DCMIPP

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@ -12,11 +12,11 @@ typedef struct _tim_info {
static uint32_t stm_tim_get_source_clock(TIM_TypeDef *inst) {
uint32_t source = 0;
#if defined (STM32F4) || defined(STM32F7) || defined(STM32H7)
#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
uintptr_t base = ((uintptr_t) inst) & 0xFFFF0000u;
#endif
#if defined (STM32F4) || defined(STM32F7)
#if defined(STM32F4) || defined(STM32F7)
// Timer clock on F4, F7, H7 == APBx * 2.
if (base == APB1PERIPH_BASE) {
source = HAL_RCC_GetPCLK1Freq() * 2;
@ -38,7 +38,7 @@ static uint32_t stm_tim_get_source_clock(TIM_TypeDef *inst) {
}
static void stm_tim_calc_period_pulse(TIM_TypeDef *inst, uint32_t frequency,
uint32_t *period, uint32_t *pulse) {
uint32_t *period, uint32_t *pulse) {
uint32_t tclk = stm_tim_get_source_clock(inst);
*period = fast_ceilf(tclk / ((float) frequency)) - 1;
@ -100,7 +100,7 @@ int stm_pwm_stop(TIM_HandleTypeDef *tim, uint32_t channel) {
int stm_pwm_set_frequency(TIM_HandleTypeDef *tim, uint32_t channel, uint32_t frequency) {
uint32_t period, pulse;
if (tim->Instance) {
// Calculate period and pulse.
stm_tim_calc_period_pulse(tim->Instance, frequency, &period, &pulse);