From fc6e69c470337dd68c45f2a782be4e69670879a9 Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Fri, 1 Nov 2024 16:10:38 +0100 Subject: [PATCH] bootloader: Misc fixes. - Fix string descriptos. - Allow board to override port/speed. - Cleanup clock config. --- src/boot/src/common/desc.c | 62 ++++++---- src/boot/src/common/main.c | 2 +- src/boot/src/ports/stm32/stm32.ld.S | 4 +- src/boot/src/ports/stm32/stm32_port.c | 165 +++++++++++++------------ src/boot/src/ports/stm32/tusb_config.h | 17 ++- 5 files changed, 143 insertions(+), 107 deletions(-) diff --git a/src/boot/src/common/desc.c b/src/boot/src/common/desc.c index 40cad3849..adc0d5ad9 100644 --- a/src/boot/src/common/desc.c +++ b/src/boot/src/common/desc.c @@ -45,9 +45,10 @@ #define CFG_DESC_TOTAL_SIZE (TUD_CONFIG_DESC_LEN + TUD_DFU_DESC_LEN(DFU_DESC_ALT_COUNT)) static char const *desc_string[] = { - "\x09\x04", // 0: English (0x0409) + "\x04\x03\x09\x04", // 0: English (0x0409) "OpenMV", // 1: Manufacturer "OpenMV Camera (DFU Mode)", // 2: Product + "0123456789ABCDEF", // 3: Default Serial. OMV_BOOT_PARTITIONS_STR, }; @@ -107,34 +108,43 @@ uint8_t const *tud_descriptor_configuration_cb(uint8_t index) { uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) { size_t desc_len = 0; - static uint16_t desc_str[STR_DESC_MAX_LEN + 1]; // + 1 for string type + const char *desc_str = NULL; + static uint16_t desc_wstr[STR_DESC_MAX_LEN + 1] = {0}; + // For serial number. uint8_t uid[12] = {0}; char hex_buf[sizeof(uid) * 2] = {0}; const char hex_chars[] = "0123456789ABCDEF"; - const char *str = NULL; - if (index == 0) { - // Language ID - desc_len = 1; - memcpy(&desc_str[1], desc_string[0], 2); - } else if (index == 3) { - // Serial number - if (port_get_uid(uid) != 0) { - return NULL; + switch (index) { + case 0: + // Language ID + memcpy(desc_wstr, desc_string[0], 4); + return desc_wstr; + case 1: { + // Serial number + if (port_get_uid(uid) != 0) { + // No UID support. + desc_str = desc_string[3]; + desc_len = strlen(desc_str); + break; + } + // UID supported. + for (size_t i = 0; i < sizeof(uid); i++) { + hex_buf[i * 2 + 0] = hex_chars[(uid[i] & 0xF0) >> 4]; + hex_buf[i * 2 + 1] = hex_chars[uid[i] & 0x0F]; + } + desc_str = hex_buf; + desc_len = sizeof(uid) * 2; + break; } - for (size_t i = 0; i < sizeof(uid); i++) { - hex_buf[i * 2] = hex_chars[(uid[i] & 0xF0) >> 4]; - hex_buf[i * 2 + 1] = hex_chars[uid[i] & 0x0F]; - } - str = hex_buf; - desc_len = sizeof(uid) * 2; - } else if (index < STR_DESC_COUNT) { - // Other. - str = desc_string[index]; - desc_len = strlen(str); - } else { - return NULL; + default: + if (index < STR_DESC_COUNT) { + desc_str = desc_string[index]; + desc_len = strlen(desc_str); + } else { + return NULL; + } } // Check max string descriptor length. @@ -144,10 +154,10 @@ uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) { // Convert to UTF-16 for (size_t i = 0; i < desc_len; i++) { - desc_str[1 + i] = str[i]; + desc_wstr[1 + i] = desc_str[i]; } // First byte is the length (including the header), the second byte is string type. - desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * desc_len + 2)); - return desc_str; + desc_wstr[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * desc_len + 2)); + return desc_wstr; } diff --git a/src/boot/src/common/main.c b/src/boot/src/common/main.c index ddc3a11c4..ce16b40f9 100644 --- a/src/boot/src/common/main.c +++ b/src/boot/src/common/main.c @@ -52,7 +52,7 @@ int main(void) { port_init(); // Initialize TinyUSB. - tusb_init(); + tud_init(TUD_OPT_RHPORT); uint32_t start_ms = port_ticks_ms(); diff --git a/src/boot/src/ports/stm32/stm32.ld.S b/src/boot/src/ports/stm32/stm32.ld.S index 8bbdd3ea2..db28f9d3f 100644 --- a/src/boot/src/ports/stm32/stm32.ld.S +++ b/src/boot/src/ports/stm32/stm32.ld.S @@ -83,10 +83,10 @@ SECTIONS /* Make sure there is enough RAM the stack and FS cache */ .stack : { - . = ALIGN(4); + . = ALIGN(8); _sstack = .; . = . + _stack_size; - . = ALIGN(4); + . = ALIGN(8); _estack = .; } >RAM diff --git a/src/boot/src/ports/stm32/stm32_port.c b/src/boot/src/ports/stm32/stm32_port.c index 398786849..632a0266b 100644 --- a/src/boot/src/ports/stm32/stm32_port.c +++ b/src/boot/src/ports/stm32/stm32_port.c @@ -45,7 +45,9 @@ #endif static volatile uint32_t ticks_ms; + extern void SystemClock_Config(void); +static void enable_gpio_clocks(bool enable); void SysTick_Handler(void) { ticks_ms += 1; @@ -68,45 +70,8 @@ int port_init(void) { // Config Systick HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); - // Enable GPIO clocks - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOD_CLK_ENABLE(); - __HAL_RCC_GPIOE_CLK_ENABLE(); - #ifdef OMV_GPIO_PORT_F_ENABLE - __HAL_RCC_GPIOF_CLK_ENABLE(); - #endif - #ifdef OMV_GPIO_PORT_G_ENABLE - __HAL_RCC_GPIOG_CLK_ENABLE(); - #endif - #ifdef OMV_GPIO_PORT_H_ENABLE - __HAL_RCC_GPIOH_CLK_ENABLE(); - #endif - #ifdef OMV_GPIO_PORT_I_ENABLE - __HAL_RCC_GPIOI_CLK_ENABLE(); - #endif - #ifdef OMV_GPIO_PORT_J_ENABLE - __HAL_RCC_GPIOJ_CLK_ENABLE(); - #endif - #ifdef OMV_GPIO_PORT_K_ENABLE - __HAL_RCC_GPIOK_CLK_ENABLE(); - #endif - #ifdef OMV_GPIO_PORT_H_ENABLE - __HAL_RCC_GPIOH_CLK_ENABLE(); - #endif - #ifdef OMV_GPIO_PORT_N_ENABLE - __HAL_RCC_GPION_CLK_ENABLE(); - #endif - #ifdef OMV_GPIO_PORT_O_ENABLE - __HAL_RCC_GPIOO_CLK_ENABLE(); - #endif - #ifdef OMV_GPIO_PORT_P_ENABLE - __HAL_RCC_GPIOP_CLK_ENABLE(); - #endif - #ifdef OMV_GPIO_PORT_Q_ENABLE - __HAL_RCC_GPIOQ_CLK_ENABLE(); - #endif + // Enable GPIO clocks. + enable_gpio_clocks(true); // Configure I/O pins. for (size_t i = 0; i < OMV_BOOT_PINS_COUNT; i++) { @@ -156,44 +121,7 @@ int port_deinit(void) { __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE(); // Disable GPIO clocks. - __HAL_RCC_GPIOA_CLK_DISABLE(); - __HAL_RCC_GPIOB_CLK_DISABLE(); - __HAL_RCC_GPIOC_CLK_DISABLE(); - __HAL_RCC_GPIOD_CLK_DISABLE(); - __HAL_RCC_GPIOE_CLK_DISABLE(); - #ifdef OMV_GPIO_PORT_F_ENABLE - __HAL_RCC_GPIOF_CLK_DISABLE(); - #endif - #ifdef OMV_GPIO_PORT_G_ENABLE - __HAL_RCC_GPIOG_CLK_DISABLE(); - #endif - #ifdef OMV_GPIO_PORT_H_ENABLE - __HAL_RCC_GPIOH_CLK_DISABLE(); - #endif - #ifdef OMV_GPIO_PORT_I_ENABLE - __HAL_RCC_GPIOI_CLK_DISABLE(); - #endif - #ifdef OMV_GPIO_PORT_J_ENABLE - __HAL_RCC_GPIOJ_CLK_DISABLE(); - #endif - #ifdef OMV_GPIO_PORT_K_ENABLE - __HAL_RCC_GPIOK_CLK_DISABLE(); - #endif - #ifdef OMV_GPIO_PORT_H_ENABLE - __HAL_RCC_GPIOH_CLK_DISABLE(); - #endif - #ifdef OMV_GPIO_PORT_N_ENABLE - __HAL_RCC_GPION_CLK_DISABLE(); - #endif - #ifdef OMV_GPIO_PORT_O_ENABLE - __HAL_RCC_GPIOO_CLK_DISABLE(); - #endif - #ifdef OMV_GPIO_PORT_P_ENABLE - __HAL_RCC_GPIOP_CLK_DISABLE(); - #endif - #ifdef OMV_GPIO_PORT_Q_ENABLE - __HAL_RCC_GPIOQ_CLK_DISABLE(); - #endif + enable_gpio_clocks(false); return 0; } @@ -260,3 +188,86 @@ void __attribute__((noreturn)) __fatal_error() { port_led_blink(50); } } + +static void enable_gpio_clocks(bool enable) { + // Enable GPIO clocks + if (enable) { + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOE_CLK_ENABLE(); + #ifdef OMV_GPIO_PORT_F_ENABLE + __HAL_RCC_GPIOF_CLK_ENABLE(); + #endif + #ifdef OMV_GPIO_PORT_G_ENABLE + __HAL_RCC_GPIOG_CLK_ENABLE(); + #endif + #ifdef OMV_GPIO_PORT_H_ENABLE + __HAL_RCC_GPIOH_CLK_ENABLE(); + #endif + #ifdef OMV_GPIO_PORT_I_ENABLE + __HAL_RCC_GPIOI_CLK_ENABLE(); + #endif + #ifdef OMV_GPIO_PORT_J_ENABLE + __HAL_RCC_GPIOJ_CLK_ENABLE(); + #endif + #ifdef OMV_GPIO_PORT_K_ENABLE + __HAL_RCC_GPIOK_CLK_ENABLE(); + #endif + #ifdef OMV_GPIO_PORT_H_ENABLE + __HAL_RCC_GPIOH_CLK_ENABLE(); + #endif + #ifdef OMV_GPIO_PORT_N_ENABLE + __HAL_RCC_GPION_CLK_ENABLE(); + #endif + #ifdef OMV_GPIO_PORT_O_ENABLE + __HAL_RCC_GPIOO_CLK_ENABLE(); + #endif + #ifdef OMV_GPIO_PORT_P_ENABLE + __HAL_RCC_GPIOP_CLK_ENABLE(); + #endif + #ifdef OMV_GPIO_PORT_Q_ENABLE + __HAL_RCC_GPIOQ_CLK_ENABLE(); + #endif + } else { + __HAL_RCC_GPIOA_CLK_DISABLE(); + __HAL_RCC_GPIOB_CLK_DISABLE(); + __HAL_RCC_GPIOC_CLK_DISABLE(); + __HAL_RCC_GPIOD_CLK_DISABLE(); + __HAL_RCC_GPIOE_CLK_DISABLE(); + #ifdef OMV_GPIO_PORT_F_ENABLE + __HAL_RCC_GPIOF_CLK_DISABLE(); + #endif + #ifdef OMV_GPIO_PORT_G_ENABLE + __HAL_RCC_GPIOG_CLK_DISABLE(); + #endif + #ifdef OMV_GPIO_PORT_H_ENABLE + __HAL_RCC_GPIOH_CLK_DISABLE(); + #endif + #ifdef OMV_GPIO_PORT_I_ENABLE + __HAL_RCC_GPIOI_CLK_DISABLE(); + #endif + #ifdef OMV_GPIO_PORT_J_ENABLE + __HAL_RCC_GPIOJ_CLK_DISABLE(); + #endif + #ifdef OMV_GPIO_PORT_K_ENABLE + __HAL_RCC_GPIOK_CLK_DISABLE(); + #endif + #ifdef OMV_GPIO_PORT_H_ENABLE + __HAL_RCC_GPIOH_CLK_DISABLE(); + #endif + #ifdef OMV_GPIO_PORT_N_ENABLE + __HAL_RCC_GPION_CLK_DISABLE(); + #endif + #ifdef OMV_GPIO_PORT_O_ENABLE + __HAL_RCC_GPIOO_CLK_DISABLE(); + #endif + #ifdef OMV_GPIO_PORT_P_ENABLE + __HAL_RCC_GPIOP_CLK_DISABLE(); + #endif + #ifdef OMV_GPIO_PORT_Q_ENABLE + __HAL_RCC_GPIOQ_CLK_DISABLE(); + #endif + } +} diff --git a/src/boot/src/ports/stm32/tusb_config.h b/src/boot/src/ports/stm32/tusb_config.h index 2fa137bc1..564d41f08 100644 --- a/src/boot/src/ports/stm32/tusb_config.h +++ b/src/boot/src/ports/stm32/tusb_config.h @@ -34,7 +34,22 @@ #define __STM32_TUSB_CONFIG_H__ // Common configuration #define CFG_TUSB_OS OPT_OS_NONE -#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | OPT_MODE_FULL_SPEED) + +// MCU +#ifndef CFG_TUSB_MCU +#define CFG_TUSB_MCU OPT_MCU_NONE +#endif + +// USB speed +#ifndef CFG_TUD_MAX_SPEED +#define CFG_TUD_MAX_SPEED (OPT_MODE_FULL_SPEED) +#endif + +// USB port. +#if !defined(CFG_TUSB_RHPORT0_MODE) && \ + !defined(CFG_TUSB_RHPORT1_MODE) +#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE) +#endif // Device stack configuration. #define CFG_TUD_ENABLED (1)