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3 Commits

Author SHA1 Message Date
iabdalkader
00ba887043 boards: Enable CRC module for AE3 and N6.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
2025-09-25 18:06:00 +02:00
iabdalkader
1b5da3ebfe modules/py_crc: Add hardware-accelerated CRC module.
Optional, small module for testing.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
2025-09-25 18:06:00 +02:00
iabdalkader
9704ed8c62 ports/alif: Add support for CRC32.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
2025-09-25 18:05:57 +02:00

View File

@ -25,22 +25,26 @@
#include "global_map.h"
#include "omv_crc.h"
// There seems to be a mismatch between how the Alif HW CRC32 algorithm
// works and the other HW CRCs and the software implementation.
// Just leaving this here just in case it works on a different series.
#if 0
#define CRC0 ((CRC_Type *) CRC0_BASE)
static bool crc32_initialized = false;
static void crc_calculate(CRC_Type *crc, const void *buf, uint32_t len, uint32_t *value);
static void omv_crc32_init(void) {
CRC0->CRC_SEED = OMV_CRC32_INIT;
CRC0->CRC_POLY_CUSTOM = OMV_CRC32_POLY;
CRC0->CRC_CONTROL = CRC_32C |
CRC_CUSTOM_POLY |
CRC_ALGO_32_BIT_SIZE;
CRC0->CRC_SEED = OMV_CRC32_INIT;
CRC0->CRC_POLY_CUSTOM = OMV_CRC32_POLY;
crc32_initialized = true;
}
uint32_t omv_crc32_start(const void *buf, size_t len) {
uint32_t result = 0;
uint32_t result = OMV_CRC32_INIT;
if (!crc32_initialized) {
omv_crc32_init();
@ -50,15 +54,12 @@ uint32_t omv_crc32_start(const void *buf, size_t len) {
return OMV_CRC32_INIT;
}
CRC0->CRC_SEED = OMV_CRC32_INIT;
CRC0->CRC_CONTROL |= CRC_INIT_BIT;
crc_calculate(CRC0, buf, len, &result);
return result;
}
uint32_t omv_crc32_update(uint32_t crc, const void *buf, size_t len) {
uint32_t result = 0;
uint32_t result = crc;
if (!crc32_initialized) {
omv_crc32_init();
@ -68,10 +69,6 @@ uint32_t omv_crc32_update(uint32_t crc, const void *buf, size_t len) {
return crc;
}
// Set current CRC value and calculate incrementally
CRC0->CRC_SEED = OMV_CRC32_INIT;
CRC0->CRC_CONTROL |= CRC_INIT_BIT;
crc_calculate(CRC0, buf, len, &result);
return result;
}
@ -79,8 +76,11 @@ uint32_t omv_crc32_update(uint32_t crc, const void *buf, size_t len) {
static void crc_calculate(CRC_Type *crc, const void *buf, uint32_t len, uint32_t *value) {
const uint8_t *data = (const uint8_t *) buf;
// Use hardware only if length is multiple of 4, otherwise use pure software
if ((len % 4) == 0) {
// Use hardware only if length is multiple of 4
crc->CRC_SEED = *value;
crc->CRC_CONTROL |= CRC_INIT_BIT;
// Hardware path - process all data as 32-bit words
const uint32_t *data32 = (const uint32_t *) data;
for (uint32_t i = 0; i < len / 4; i++) {
@ -89,8 +89,8 @@ static void crc_calculate(CRC_Type *crc, const void *buf, uint32_t len, uint32_t
*value = crc->CRC_OUT;
} else {
// Software path - use lookup table
uint32_t result = *value;
extern const uint32_t crc32_table[256];
uint32_t result = OMV_CRC32_INIT;
for (uint32_t i = 0; i < len; i++) {
uint8_t index = (result >> 24) ^ data[i];
@ -99,3 +99,4 @@ static void crc_calculate(CRC_Type *crc, const void *buf, uint32_t len, uint32_t
*value = result;
}
}
#endif