/** ****************************************************************************** * @file stm32n6xx.h * @author MCD Application Team * @brief CMSIS STM32N6xx Device Peripheral Access Layer Header File. * * The file is the unique include file that the application programmer * is using in the C source code, usually in main.c. This file contains: * - Configuration section that allows to select: * - The STM32N6xx device used in the target application * ****************************************************************************** * @attention * * Copyright (c) 2023 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ /** @addtogroup CMSIS * @{ */ /** @addtogroup STM32N6xx * @{ */ #ifndef STM32N6xx_H #define STM32N6xx_H #ifdef __cplusplus extern "C" { #endif /* __cplusplus */ /** @addtogroup Library_configuration_section * @{ */ /** * @brief STM32 Family */ #if !defined (STM32N6) #define STM32N6 #endif /* STM32N6 */ /* Uncomment the line below according to the target STM32N6 device used in your application */ #if !defined (STM32N647xx) && !defined (STM32N657xx) /* #define STM32N647xx */ /*!< STM32N647xx Devices */ /* #define STM32N657xx */ /*!< STM32N657xx Devices */ #endif /* Tip: To avoid modifying this file each time you need to switch between these devices, you can define the device in your toolchain compiler preprocessor. */ /** * @brief CMSIS Device version number */ #define __STM32N6_CMSIS_VERSION_MAIN (0x00U) /*!< [31:24] main version */ #define __STM32N6_CMSIS_VERSION_SUB1 (0x05U) /*!< [23:16] sub1 version */ #define __STM32N6_CMSIS_VERSION_SUB2 (0x01U) /*!< [15:8] sub2 version */ #define __STM32N6_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #define __STM32N6_CMSIS_VERSION ((__STM32N6_CMSIS_VERSION_MAIN << 24U)\ |(__STM32N6_CMSIS_VERSION_SUB1 << 16U)\ |(__STM32N6_CMSIS_VERSION_SUB2 << 8U )\ |(__STM32N6_CMSIS_VERSION_RC)) /** * @} */ /** @addtogroup Device_Included * @{ */ #if defined(STM32N657xx) #include "stm32n657xx.h" #elif defined(STM32N655xx) #include "stm32n655xx.h" #elif defined(STM32N647xx) #include "stm32n647xx.h" #elif defined(STM32N645xx) #include "stm32n645xx.h" #else #error "Please select first the target STM32N6xx device used in your application (in stm32n6xx.h file)" #endif /** * @} */ /** @addtogroup Exported_types * @{ */ typedef enum { RESET = 0, SET = !RESET } FlagStatus, ITStatus; typedef enum { DISABLE = 0, ENABLE = !DISABLE } FunctionalState; #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) typedef enum { SUCCESS = 0, ERROR = !SUCCESS } ErrorStatus; /** * @} */ /** @addtogroup Exported_macros * @{ */ #define SET_BIT(REG, BIT) ((REG) |= (BIT)) #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) #define READ_BIT(REG, BIT) ((REG) & (BIT)) #define CLEAR_REG(REG) ((REG) = (0x0)) #define WRITE_REG(REG, VAL) ((REG) = (VAL)) #define READ_REG(REG) ((REG)) #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) /* Use of CMSIS compiler intrinsics for register exclusive access */ /* Atomic 32-bit register access macro to set one or several bits */ #define ATOMIC_SET_BIT(REG, BIT) \ do { \ uint32_t val; \ do { \ val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \ } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ } while(0) /* Atomic 32-bit register access macro to clear one or several bits */ #define ATOMIC_CLEAR_BIT(REG, BIT) \ do { \ uint32_t val; \ do { \ val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \ } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ } while(0) /* Atomic 32-bit register access macro to clear and set one or several bits */ #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ do { \ uint32_t val; \ do { \ val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ } while(0) /* Atomic 16-bit register access macro to set one or several bits */ #define ATOMIC_SETH_BIT(REG, BIT) \ do { \ uint16_t val; \ do { \ val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \ } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ } while(0) /* Atomic 16-bit register access macro to clear one or several bits */ #define ATOMIC_CLEARH_BIT(REG, BIT) \ do { \ uint16_t val; \ do { \ val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \ } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ } while(0) /* Atomic 16-bit register access macro to clear and set one or several bits */ #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \ do { \ uint16_t val; \ do { \ val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ } while(0) #define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) /** * @} */ #if defined (USE_HAL_DRIVER) #include "stm32n6xx_hal.h" #endif /* USE_HAL_DRIVER */ #ifdef __cplusplus } #endif /* __cplusplus */ #endif /* STM32N6xx_H */ /** * @} */ /** * @} */