0x027 STMicroelectronics MCU Cortex-M0+ STM32WL3 STM32WL3 ARM 32-bit Cortex-M0+ based device Embedded SRAM Storage 0x00 RWE Single Embedded Flash Storage The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms 0xFF RWE Single 0x10 OTP Storage The Data OTP memory block. It contains the one time programmable bits. 0xFF RW Single 0x4 MirrorOptionBytes Storage Mirror Option Bytes contains the extra area. 0xFF RW Single 0x20 Option Bytes Configuration RW Read Out Protection RDP The read protection is used to protect the software code stored in Flash memory 0x0 0x20 RW Debugger can access and modify flash memory and RAM content. Debugger connection is not possible. Debugger cannot access or modify flash memory and RAM content. Device Id Test RDP Read protection option byte. The read protection is used to protect the software code stored in Flash memory. 0x1 0x1 R Flash memory is not read-protected. Flash memory is read-protected.