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336 lines
15 KiB
C
336 lines
15 KiB
C
/*--------------------------------------------------------------------------
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* Project: D/AVE
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* File: dave_intern.h (%version: 29 %)
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* created Tue Jan 11 12:57:48 2005 by hh04027
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*
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* Description:
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* %date_modified: Thu Jan 25 18:12:54 2007 % (%derived_by: hh74026 %)
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*
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* Changes:
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* 2005-12-22 CSe removed transfermode field, added flags field in _d2_devicedata
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* 2006-02-16 CSe added performance counter support
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* 2006-10-30 CSe removed waitdlist flag
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* 2006-11-07 CSe removed waitdlist flag
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* 2006-11-07 CSe added dlist_buffer to device struct for 'd2_df_low_localmem' mode
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* 2007-01-26 CSe made 'low localmem' mode configurable
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* 2007-05-23 MGe added delayed_errorcode to context
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* 2008-01-14 ASc changed comments from C++ to C, removed tabs
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* 2008-11-24 AJ Added support for IAR compiler
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* 2011-09-05 MRe added cr2 register to device structure
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* 2012-09-25 BSp MISRA cleanup
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*-------------------------------------------------------------------------- */
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#ifndef __1_dave_intern_h_H
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#define __1_dave_intern_h_H
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/*---------------------------------------------------------------------------
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* define inline modifier if available */
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#ifdef _MSC_VER
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#define D2_INLINE __forceinline
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#else
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#ifdef __CA850__
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#define D2_INLINE
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#elif defined(__ICCV850__)
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#define D2_INLINE _Pragma("inline")
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#else
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#define D2_INLINE inline
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#endif
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#endif
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/*---------------------------------------------------------------------------
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* define null to become independent of stdlib */
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#ifndef NULL
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#ifdef __cplusplus
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#define NULL 0
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#else
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#define NULL ((void *)0)
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#endif
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#endif
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/*---------------------------------------------------------------------------
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* internally used types */
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#ifdef _MSC_VER
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typedef __int64 d2_int64;
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#elif (defined(__CA850__) || defined(__ICC850__))
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#define _NO_LL_
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typedef struct {
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d2_u32 low32;
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d2_s32 high32;
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} d2_int64;
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#else
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typedef long long d2_int64;
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#endif
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/*---------------------------------------------------------------------------
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* use separate context for blit
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see also d2_df_no_blitctxbackup and d2_bf_no_blitctxbackup*/
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/*
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#define D2_USEBLITBACKUPCONTEXT
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*/
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/*---------------------------------------------------------------------------
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* force register cache usage
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see also d2_df_no_registercaching */
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#define D2_USEREGCACHE
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/*---------------------------------------------------------------------------
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* set initial size of list of dlist start address */
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#define DLIST_ADRESSES_NUMBER 16
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/*---------------------------------------------------------------------------
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* Register Cache */
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#include "dave_registermap.h"
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typedef struct _d2_cacheddata
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{
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d2_s32 data[ D2_QUANTITY ];
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d2_s8 valid[ D2_QUANTITY ];
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} d2_cacheddata;
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#ifdef D2_USEREGCACHE
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D2_EXTERN const d2_u8 d2_cacheableregs[D2_QUANTITY];
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#endif
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typedef void (*d2_fp_scratchfull)( void *handle );
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/*--------------------------------------------------------------------------- */
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#include "dave_base.h"
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#include "dave_dlist.h"
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#include "dave_rbuffer.h"
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#include "dave_hardware.h"
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#include "dave_context.h"
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#include "dave_math.h"
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/*---------------------------------------------------------------------------
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* use higher precision of qlimiters */
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#define LIMITER_HIPRECISION 6
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/*---------------------------------------------------------------------------
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* These helper macros are used to stringify a given macro */
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#define D2_STR(s) # s
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#define D2_XSTR(s) D2_STR(s) /* PRQA S 3453 */ /* $Misra: #MISRA_BUG_MACRO_HASH $*/
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/*---------------------------------------------------------------------------
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* Define the D2_VERSION and D2_VERSION_STRING macros */
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/* Build up the D2_VERSION macro */
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#define D2_VERSION ((D2_VERSION_BRANCH << 24) | (D2_VERSION_MAJOR << 16) | D2_VERSION_MINOR )
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/* Create the D2_VERSION_STRING macro */
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#define D2_VERSION_STRING D2_VERSION_BRANCH_STRING " V" D2_XSTR(D2_VERSION_MAJOR) "." D2_XSTR(D2_VERSION_MINOR)
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/*---------------------------------------------------------------------------
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* Internal device structure */
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typedef struct _d2_devicedata
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{
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struct _d2_devicedata *next; /* to chain devices [must be index 0] */
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d2_dlist *readlist; /* read (executing) dlist */
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d2_dlist *writelist; /* write (under construction) dlist */
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d2_rbuffer *selectedbuffer; /* currently selected renderbuffer */
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d2_rbuffer *renderbuffer[2]; /* default renderbuffers */
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d1_device *hwid; /* lowlevel access handle */
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d2_contextdata *ctxchain; /* context chain (list of all contexts for this device) */
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d2_contextdata *ctxdef; /* default context (cannot be removed by application) */
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d2_contextdata *ctxselected; /* selected context (used as target of context write/read ops) */
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d2_contextdata *ctxsolid; /* solid context (used as source for rendering solid geometry) */
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d2_contextdata *ctxoutline; /* outline context (used as source for rendering outlines) */
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#ifdef D2_USEBLITBACKUPCONTEXT
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d2_contextdata *blitcontext; /* internal context used only for blits */
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#else
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d2_contextdata_backup *blitcontext_b; /* internal context backup used only for blits */
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#endif
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d2_contextdata *srccontext; /* last context that acted as source for display list (for dirtybit checks) */
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d2_color *srcclut; /* last clut that was loaded */
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void * framebuffer; /* rendering baseaddress */
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d2_s32 pitch, bpp; /* framebuffer pitch and bytes per pixel */
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d2_s32 fbformat; /* framebuffer format */
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d2_u32 fbwidth,fbheight; /* framebuffer size */
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d2_u32 fbstylemask; /* dave ctrl1 bitmask for framebuffer format */
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d2_u32 cr2; /* control register 2 */
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d2_u32 cachectlmask; /* dave cache ctrl register bitmask */
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d2_u32 perftriggermask; /* dave performance counter trigger source register bitmask */
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d2_u32 rendermode; /* see 'enum d2_rendermodes' */
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d2_u32 flags; /* see 'enum d2_deviceflags' */
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d2_width outlinewidth;
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d2_point soffx, soffy;
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d2_point clipxmin, clipymin;
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d2_point clipxmax, clipymax;
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d2_lowlocalmem_mode *lowlocalmem_mode; /* only used in 'low localmem' mode */
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d2_u32 hwrevision;
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d2_u32 hwmemarchitecture;
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d2_u32 dlistblocksize; /* specify number of entries to grow when dlist is full */
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#ifdef D2_USEREGCACHE
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d2_cacheddata cache; /* register cache for this device */
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#endif
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/* display list assembly buffer */
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d2_dlist_scratch_entry *dlscratch_base;
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d2_dlist_scratch_entry *dlscratch_pos;
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d2_s32 dlscratch_cnt;
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d2_fp_scratchfull dlscratch_hook;
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d2_s8 lasttextwasrle; /* last texture format was RLE */
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d2_s8 maxpatlen; /* maximum size of pattern bitvector supported by the hardware */
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d2_s8 errorcode; /* last actions detaild result code */
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d2_s8 delayed_errorcode; /* errorcondition that exists until the renderbuffer gets executed. This errorcode is used for errors that occure while the scratchbuffer is written to the displaylist */
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d2_s8 hilimiterprecision_supported; /* is set to 1 when the hilimiterprecision feature is supported by the hardware */
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d2_s8 dlist_indirect_supported; /* is set to 1 when lists of dlist addresses are supported by d1 driver */
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d2_s32* dlist_list_single[2]; /* for d2_executedlist we need an extra dlist list with just one entry */
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} d2_devicedata;
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/*--------------------------------------------------------------------------- */
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typedef struct _d2_bbox
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{
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d2_point xmin, ymin;
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d2_point xmax, ymax;
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} d2_bbox;
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typedef struct _d2_limdata
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{
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d2_s32 start;
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d2_s32 xadd;
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d2_s32 yadd;
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} d2_limdata;
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/*---------------------------------------------------------------------------
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* Internal flags */
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typedef d2_u32 d2_lineendflags_intern;
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#define d2_lei_base 256u
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#define d2_lei_ext_first_edge (d2_lei_base * 2)
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#define d2_lei_ext_last_edge (d2_lei_base * 4)
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#define d2_lei_buffer_first_edge (d2_lei_base * 8)
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#define d2_lei_buffer_last_edge (d2_lei_base * 16)
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#define d2_lei_miter_edge (d2_lei_base * 32)
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#define d2_lei_miter1_flip (d2_lei_base * 64)
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#define d2_lei_miter2_flip (d2_lei_base *128)
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/*---------------------------------------------------------------------------
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* Internal macros */
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#define D2_DEV(d) ((d2_devicedata *) (d)) /* PRQA S 3453 */ /* $Misra: #MACRO_TYPECAST_OVERKILL $*/
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#define D2_CTX(c) ((d2_contextdata *) (c)) /* PRQA S 3453 */ /* $Misra: #MACRO_TYPECAST_OVERKILL $*/
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#define D2_FNC(r) ((d2_renderfunctions *) (r)) /* PRQA S 3453 */ /* $Misra: #MACRO_TYPECAST_OVERKILL $*/
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#define D2_DRB(r) ((d2_rbuffer *) (r)) /* PRQA S 3453 */ /* $Misra: #MACRO_TYPECAST_OVERKILL $*/
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static D2_INLINE d2_s32 d2_seterr(d2_device *handle, d2_s32 err); /* to satisfy MISRA rule 3450 */
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static D2_INLINE d2_s32 d2_seterr(d2_device *handle, d2_s32 err) /* PRQA S 3219, 3480 */ /* $Misra: #UTIL_INLINE_FUNC $*/
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{
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D2_DEV(handle)->errorcode = (d2_s8)(err);
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return err;
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}
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#define D2_SETERR(d,e) d2_seterr(d, e) /* PRQA S 3453 */ /* $Misra: #MACRO_FXN_FORWARD $*/
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#define D2_SETOK(d) D2_SETERR(d, D2_OK) /* PRQA S 3453 */ /* $Misra: #MACRO_FXN_FORWARD $*/
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#define D2_RETERR(d,e) return D2_SETERR(d,e) /* PRQA S 3453 */ /* $Misra: #MISRA_BUG_MACRO_RETURN_STATEMENT $*/ /* PRQA S 3412 */ /* $Misra: #MACRO_RETURN $*/
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#define D2_RETERRU(d,e) return (d2_u32) (D2_SETERR(d,e)) /* PRQA S 3412 */ /* $Misra: #MACRO_RETURN $*/
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#define D2_RETOK(d) return D2_SETOK(d) /* PRQA S 3412 */ /* $Misra: #MACRO_RETURN $*/
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#ifdef _DEBUG
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#define D2_VALIDATE(x,e) if (0 == (x)) \
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{ \
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return (e); \
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}(void)0 /* PRQA S 3412 */ /* $Misra: #COMPILER_WARNING $*/
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#define D2_CHECKERR(x,e) if (! (x)) \
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{ \
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D2_RETERR(handle, (e)); \
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}(void)0 /* PRQA S 3412 */ /* $Misra: #COMPILER_WARNING $*/
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#define D2_VALIDATEP(x,e) if (0 == (x)) \
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{ \
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return 0; \
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}(void)0 /* PRQA S 3412 */ /* $Misra: #COMPILER_WARNING $*/
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#define D2_CHECKERRP(x,e) if (! (x)) \
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{ \
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(void)D2_SETERR(handle, (e)); \
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return 0; \
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} (void)0 /* PRQA S 3412 */ /* $Misra: #COMPILER_WARNING $*/
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#define D2_CHECKRANGE( v, min, max ) if( ((min) > (v)) || ( (v) > (max)) ) \
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{ \
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(void)D2_SETERR( handle, D2_INVALIDINDEX); \
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return D2_INVALIDINDEX; \
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}(void)0 /* PRQA S 3412 */ /* $Misra: #COMPILER_WARNING $*/
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#else
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#define D2_VALIDATE(x,e)(void)0 /* PRQA S 4130, 3112, 3453 */ /* $Misra: #DEBUG_MACRO $*/
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#define D2_CHECKERR(x,e)(void)0 /* PRQA S 4130, 3112, 3453 */ /* $Misra: #DEBUG_MACRO $*/
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#define D2_VALIDATEP(x,e)(void)0 /* PRQA S 4130, 3112, 3453 */ /* $Misra: #DEBUG_MACRO $*/
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#define D2_CHECKERRP(x,e)(void)0 /* PRQA S 4130, 3112, 3453 */ /* $Misra: #DEBUG_MACRO $*/
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#define D2_CHECKRANGE( v, min, max )(void)0 /* PRQA S 4130, 3112, 3453 */ /* $Misra: #DEBUG_MACRO $*/
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#endif
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D2_EXTERN void d2_cast32to64(d2_s32 par, d2_int64 *res);
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D2_EXTERN d2_s32 d2_cast64to32(const d2_int64 *par);
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D2_EXTERN void d2_add64(const d2_int64 *a, const d2_int64 *b, d2_int64 *res);
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D2_EXTERN void d2_sub64(const d2_int64 *a, const d2_int64 *b, d2_int64 *res);
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D2_EXTERN void d2_mul3232to64(d2_s32 a, d2_s32 b, d2_int64 *res);
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D2_EXTERN void d2_mul3264(d2_s32 a, d2_int64 *b, d2_int64 *res);
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D2_EXTERN void d2_div6432(const d2_int64 *dividend, d2_s32 divisor, d2_int64 *res);
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D2_EXTERN void d2_shiftleft64(const d2_int64 *var, d2_s32 index, d2_int64 *res);
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D2_EXTERN void d2_shiftright64(const d2_int64 *var, d2_s32 index, d2_int64 *res);
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#ifdef _NO_LL_
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#define D2_CAST32TO64(PAR, RES) d2_cast32to64(PAR, RES) /* PRQA S 3453 */ /* $Misra: #MACRO_FXN_FORWARD $*/
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#define D2_CAST64TO32(PAR) d2_cast64to32(PAR) /* PRQA S 3453 */ /* $Misra: #MACRO_FXN_FORWARD $*/
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#define D2_ADD64(A, B, RES) d2_add64(A, B, RES) /* PRQA S 3453 */ /* $Misra: #MACRO_FXN_FORWARD $*/
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#define D2_SUB64(A, B, RES) d2_sub64(A, B, RES) /* PRQA S 3453 */ /* $Misra: #MACRO_FXN_FORWARD $*/
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#define D2_MUL3232TO64(A, B, RES) d2_mul3232to64(A, B, RES) /* PRQA S 3453 */ /* $Misra: #MACRO_FXN_FORWARD $*/
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#define D2_MUL3264(A, B, RES) d2_mul3264(A, B, RES) /* PRQA S 3453 */ /* $Misra: #MACRO_FXN_FORWARD $*/
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#define D2_DIV6432(DVD, DVS, RES) d2_div6432(DVD, DVS, RES) /* PRQA S 3453 */ /* $Misra: #MACRO_FXN_FORWARD $*/
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#define D2_SHIFTLEFT64(V, I, RES) d2_shiftleft64(V, I, RES) /* PRQA S 3453 */ /* $Misra: #MACRO_FXN_FORWARD $*/
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#define D2_SHIFTRIGHT64(V, I, RES) d2_shiftright64(V, I, RES) /* PRQA S 3453 */ /* $Misra: #MACRO_FXN_FORWARD $*/
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#else
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#define D2_CAST32TO64(PAR, RES) *(RES) = (PAR) /* PRQA S 3453 */ /* $Misra: #MACRO_TYPE_SAFE_FXN_REPL $*/
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#define D2_CAST64TO32(PAR) ((d2_s32)*(PAR)) /* PRQA S 3453 */ /* $Misra: #MACRO_TYPE_SAFE_FXN_REPL $*/
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#define D2_ADD64(A, B, RES) *(RES) = (*(A)) + (*(B)) /* PRQA S 3453 */ /* $Misra: #MACRO_TYPE_SAFE_FXN_REPL $*/
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#define D2_SUB64(A, B, RES) *(RES) = (*(A)) - (*(B)) /* PRQA S 3453 */ /* $Misra: #MACRO_TYPE_SAFE_FXN_REPL $*/
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#define D2_MUL3232TO64(A, B, RES) *(RES) = ((A)) * (*(B)) /* PRQA S 3453 */ /* $Misra: #MACRO_TYPE_SAFE_FXN_REPL $*/
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#define D2_MUL3264(A, B, RES) *(RES) = ((A)) * (*(B)) /* PRQA S 3453 */ /* $Misra: #MACRO_TYPE_SAFE_FXN_REPL $*/
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#define D2_DIV6432(DVD, DVS, RES) *(RES) = (*(DVD)) / ((DVS)) /* PRQA S 3453 */ /* $Misra: #MACRO_TYPE_SAFE_FXN_REPL $*/
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#define D2_SHIFTLEFT64(V, I, RES) *(RES) = ((*(V)) << (I)) /* PRQA S 3453 */ /* $Misra: #MACRO_TYPE_SAFE_FXN_REPL $*/
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#define D2_SHIFTRIGHT64(V, I, RES) *(RES) = ((*(V)) >> (I)) /* PRQA S 3453 */ /* $Misra: #MACRO_TYPE_SAFE_FXN_REPL $*/
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#endif
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/*---------------------------------------------------------------------------
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* Display List entry macro (moved from dlist.h because of include dependencies) */
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static D2_INLINE void d2_add2dlist_intern( d2_devicedata *handle, d2_u32 regIdx, d2_s32 value ) /* PRQA S 3450, 3480, 3219 */ /* $Misra: #UTIL_INLINE_FUNC $*/
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{
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d2_dlist_scratch_entry *entry = handle->dlscratch_pos;
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entry->reg = regIdx;
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entry->value = value;
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handle->dlscratch_pos++;
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handle->dlscratch_cnt--;
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if(handle->dlscratch_cnt <= 0)
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{
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handle->dlscratch_hook( (d2_device*) handle );
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}
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}
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/*--------------------------------------------------------------------------- */
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#endif
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