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Old header files are no longer needed. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
153 lines
5.8 KiB
C
153 lines
5.8 KiB
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright (C) 2013-2024 OpenMV, LLC.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* OV9650 register definitions.
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*/
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#ifndef __REG_REGS_H__
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#define __REG_REGS_H__
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#define REG_GAIN 0x00
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#define REG_BLUE 0x01
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#define REG_RED 0x02
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#define REG_VREF 0x03
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#define REG_COM1 0x04
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#define REG_BAVE 0x05
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#define REG_GEAVE 0x06
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#define REG_RAVE 0x08
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#define REG_COM2 0x09
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#define REG_PID 0x0A
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#define REG_VER 0x0B
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#define REG_COM3 0x0C
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#define REG_COM4 0x0D
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#define REG_COM5 0x0E
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#define REG_COM6 0x0F
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#define REG_AECH 0x10
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#define REG_CLKRC 0x11
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#define REG_COM7 0x12
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#define REG_COM8 0x13
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#define REG_COM9 0x14
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#define REG_COM10 0x15
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#define REG_RSVD16 0x16
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#define REG_HSTART 0x17
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#define REG_HSTOP 0x18
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#define REG_VSTART 0x19
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#define REG_VSTOP 0x1A
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#define REG_PSHFT 0x1B
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#define REG_MIDH 0x1C
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#define REG_MIDL 0x1D
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#define REG_MVFP 0x1E
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#define REG_BOS 0x20
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#define REG_GBOS 0x21
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#define REG_GROS 0x22
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#define REG_ROS 0x23
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#define REG_AEW 0x24
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#define REG_AEB 0x25
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#define REG_VPT 0x26
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#define REG_BBIAS 0x27
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#define REG_GbBIAS 0x28
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#define REG_GRCOM 0x29
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#define REG_EXHCH 0x2A
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#define REG_EXHCL 0x2B
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#define REG_RBIAS 0x2C
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#define REG_ADVFL 0x2D
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#define REG_ADVFH 0x2E
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#define REG_YAVE 0x2F
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#define REG_HSYST 0x30
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#define REG_HSYEN 0x31
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#define REG_HREF 0x32
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#define REG_CHLF 0x33
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#define REG_ARBLM 0x34
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#define REG_RSVD35 0x35
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#define REG_RSVD36 0x36
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#define REG_ADC 0x37
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#define REG_ACOM38 0x38
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#define REG_OFON 0x39
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#define REG_TSLB 0x3A
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#define REG_COM11 0x3B
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#define REG_COM12 0x3C
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#define REG_COM13 0x3D
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#define REG_COM14 0x3E
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#define REG_EDGE 0x3F
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#define REG_COM15 0x40
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#define REG_COM16 0x41
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#define REG_COM17 0x42
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#define REG_MTX1 0x4F
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#define REG_MTX2 0x50
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#define REG_MTX3 0x51
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#define REG_MTX4 0x52
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#define REG_MTX5 0x53
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#define REG_MTX6 0x54
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#define REG_MTX7 0x55
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#define REG_MTX8 0x56
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#define REG_MTX9 0x57
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#define REG_MTXS 0x58
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#define REG_LCC1 0x62
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#define REG_LCC2 0x63
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#define REG_LCC3 0x64
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#define REG_LCC4 0x65
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#define REG_LCC5 0x66
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#define REG_MANU 0x67
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#define REG_MANV 0x68
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#define REG_HV 0x69
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#define REG_MBD 0x6A
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#define REG_DBLV 0x6B
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#define REG_COM21 0x8B
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#define REG_COM22 0x8C
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#define REG_COM23 0x8D
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#define REG_COM24 0x8E
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#define REG_DBLC1 0x8F
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#define REG_DBLC_B 0x90
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#define REG_DBLC_R 0x91
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#define REG_DMLNL 0x92
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#define REG_DMLNH 0x93
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#define REG_LCCFB 0x9D
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#define REG_LCCFR 0x9E
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#define REG_DBLC_GB 0x9F
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#define REG_DBLC_GR 0xA0
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#define REG_AECHM 0xA1
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#define REG_COM25 0xA4
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#define REG_COM26 0xA5
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#define REG_GGAIN 0xA6
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#define REG_VGAST 0xA7
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/* register bits */
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#define REG_COM1_QQCIF (1 << 5)
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#define REG_COM1_QQVGA (1 << 5)
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#define REG_COM1_SKIP2 (1 << 2)
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#define REG_COM1_SKIP3 (1 << 3)
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#define REG_COM7_RGB (1 << 2)
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#define REG_COM7_QCIF (1 << 3)
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#define REG_COM7_QVGA (1 << 4)
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#define REG_COM7_CIF (1 << 5)
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#define REG_COM7_VGA (1 << 6)
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#define REG_COM8_AGC (1 << 2)
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#define REG_COM8_AWB (1 << 1)
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#define REG_COM8_AEC (1 << 0)
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#define REG_MVFP_HMIRROR (1 << 5)
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#define REG_MVFP_VFLIP (1 << 4)
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#define REG_CLKRC_DOUBLE (1 << 8)
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#define REG_CLKRC_DIVIDER_MASK (0x3F)
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#endif //__REG_REGS_H__
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