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Old header files are no longer needed. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
137 lines
3.7 KiB
C
137 lines
3.7 KiB
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright (c) 2021 Pixart Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* Author: Lake Fu at <lake_fu@pixart.com>
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*/
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#include <stdint.h>
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#define REG_BANK_SWITCH 0x7F
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// =======================================
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#define BANK_0 0x00
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// ---------------------------------------
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#define REG_CMD_HSYNC_INV 0X07 // bit7
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#define REG_CMD_VSYNC_INV 0X07 // bit6
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#define REG_CMD_AAVG_V 0X07 // bit3
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#define REG_CMD_AAVG_H 0X07 // bit2
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#define REG_ABC_START_LINE 0x0D // bit3:1
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#define REG_FGH 0x11 // bit5:4
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#define REG_GGH 0x12 // bit7
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#define REG_EXP_OFFSET_L 0x18
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#define REG_EXP_OFFSET_H 0x19
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#define REG_CMD_EXPO_L 0x48
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#define REG_CMD_EXPO_H 0x49
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#define REG_CMD_EXPO_2H 0x4A
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#define REG_FRAME_TIME_L 0x7A
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#define REG_FRAME_TIME_H 0x7B
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#define REG_FRAME_TIME_2H 0x7C
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// =======================================
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#define BANK_1 0x01
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// ---------------------------------------
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#define REG_ISP_UPDATE 0x00
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#define REG_CMD_SENSOR_MODE 0X23 // bit7
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#define REG_CMD_LPM_ENH 0x23 // bit6
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#define REG_CP_WOI_VOFFSET 0x45
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#define REG_ABC_SAMPLE_SIZE 0x46 // bit2:0
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// 20180504
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static const uint8_t low_active_R_ABC_Avg_UBx50_T_BLACINV_EnHx1_T_SIG_REFx1[] = {
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//address, value
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0x7F, 0x00,
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0x0C, 0x1D, // software reset
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0x7F, 0x00,
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0x07, 0x00, // low active
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0x08, 0x03,
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0x0B, 0x0E,
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0x0D, 0xC5,
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0x0F, 0x32, //R_ABC_Avg_UB=50
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0x11, 0x41, //R_global=1
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0x13, 0xD2,
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0x14, 0xFE,
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0x15, 0x00, // R_fg_fast=0
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0x17, 0x02, //03
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0x1A, 0x07,
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0x1B, 0x08,
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0x20, 0x00, //R_fast_powerdn_WakeupTime=0
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0x25, 0x78,
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0x29, 0x28,
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0x2B, 0x06,
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0x2F, 0x0E,
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0x30, 0x0E,
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0x34, 0x0F,
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0x35, 0x0F,
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0x3A, 0x28,
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0x45, 0x17,
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0x46, 0x17,
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0x48, 0x10, //EXP
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0x49, 0x27, //EXP
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0x4A, 0x00, //EXP
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0x4D, 0x0D,
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0x4E, 0x20,
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0x62, 0x12,
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0x64, 0x02,
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0x67, 0x0A,
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0x69, 0x0A,
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0x6C, 0x0B,
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0x6E, 0x0B,
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0x71, 0x0A,
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0x73, 0x1D,
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0x75, 0x1E,
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0x77, 0x0B,
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0x7F, 0x01,
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0x01, 0x14,
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0x02, 0x02, //
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0x04, 0x96,
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0x05, 0x03,
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0x06, 0x46,
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0x0D, 0x9F, //T_BLACINV_EnH=1
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0x0E, 0x11, //T_SIG_REF=1
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0x0F, 0x48,
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0x10, 0x10, //T_vcom_lvl=0
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0x11, 0x00,
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0x12, 0x05,
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0x15, 0x00,
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0x16, 0x01, //schmitt trigger
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0x17, 0x67,
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0x18, 0xD0, //T_vrt_lvl=T_vrb_lvl=2
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0x21, 0x14,
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0x22, 0x80, //
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0x2F, 0x30,
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0x35, 0x64,
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0x39, 0x03,
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0x3A, 0x03,
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0x46, 0x06,
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0x4A, 0x01, // 0x00 //FX2
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0x4B, 0x10, // 0x00 //FX2
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0x00, 0x01, //updated flag
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};
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