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167 lines
5.4 KiB
C
167 lines
5.4 KiB
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright (C) 2013-2024 OpenMV, LLC.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* OpenMV STM32 port abstraction layer.
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*/
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#ifndef __OMV_PORTCONFIG_H__
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#define __OMV_PORTCONFIG_H__
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#include STM32_HAL_H
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// GPIO speeds.
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#define OMV_GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
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#define OMV_GPIO_SPEED_MED GPIO_SPEED_FREQ_MEDIUM
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#define OMV_GPIO_SPEED_HIGH GPIO_SPEED_FREQ_HIGH
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#define OMV_GPIO_SPEED_MAX GPIO_SPEED_FREQ_VERY_HIGH
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// GPIO pull.
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#define OMV_GPIO_PULL_NONE GPIO_NOPULL
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#define OMV_GPIO_PULL_UP GPIO_PULLUP
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#define OMV_GPIO_PULL_DOWN GPIO_PULLDOWN
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// GPIO modes.
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#define OMV_GPIO_MODE_INPUT GPIO_MODE_INPUT
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#define OMV_GPIO_MODE_OUTPUT GPIO_MODE_OUTPUT_PP
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#define OMV_GPIO_MODE_OUTPUT_OD GPIO_MODE_OUTPUT_OD
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#define OMV_GPIO_MODE_ALT GPIO_MODE_AF_PP
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#define OMV_GPIO_MODE_ALT_OD GPIO_MODE_AF_OD
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#define OMV_GPIO_MODE_ANALOG GPIO_MODE_ANALOG
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// GPIO IT modes.
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#define OMV_GPIO_MODE_IT_FALL GPIO_MODE_IT_FALLING
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#define OMV_GPIO_MODE_IT_RISE GPIO_MODE_IT_RISING
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#define OMV_GPIO_MODE_IT_BOTH GPIO_MODE_IT_RISING_FALLING
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// omv_gpio_t definition
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typedef struct {
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GPIO_TypeDef *port;
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uint16_t pin;
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uint16_t af;
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} stm32_gpio_t;
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typedef const stm32_gpio_t *omv_gpio_t;
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#define OMV_GPIO_IRQ_DESCR_PORT_BITS \
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struct { \
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uint32_t gpio; \
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};
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// Dummy AF for pins defined as I/O
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#define GPIO_NONE_GPIO (0)
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// For board config files.
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#if OMV_GPIO_DEFINE_PINS
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#define OMV_GPIO_DEFINE(port, pin, af, inst) \
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const stm32_gpio_t omv_pin_##port##pin##_##inst = {GPIO##port, GPIO_PIN_##pin, GPIO_##af##_##inst};
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#else
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#define OMV_GPIO_DEFINE(port, pin, af, inst) \
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extern stm32_gpio_t omv_pin_##port##pin##_##inst;
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#endif
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#include "omv_pins.h"
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// This pointer will be set to its respective I2C handle which is defined in MicroPython along with
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// IRQ handlers, if this I2C is enabled in Micropython, or defined and handled in stm32_hal_msp.c.
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typedef I2C_HandleTypeDef *omv_i2c_dev_t;
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#define OMV_I2C_MAX_8BIT_XFER (65536U - 16U)
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#define OMV_I2C_MAX_16BIT_XFER (65536U - 8U)
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#define OMV_SPI_MODE_SLAVE (SPI_MODE_SLAVE)
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#define OMV_SPI_MODE_MASTER (SPI_MODE_MASTER)
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#define OMV_SPI_LSB_FIRST (SPI_FIRSTBIT_LSB)
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#define OMV_SPI_MSB_FIRST (SPI_FIRSTBIT_MSB)
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#define OMV_SPI_BUS_TX (1 << 0)
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#define OMV_SPI_BUS_RX (1 << 1)
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#define OMV_SPI_BUS_TX_RX (OMV_SPI_BUS_TX | OMV_SPI_BUS_RX)
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#define OMV_SPI_CPOL_LOW (SPI_POLARITY_LOW)
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#define OMV_SPI_CPOL_HIGH (SPI_POLARITY_HIGH)
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#define OMV_SPI_CPHA_1EDGE (SPI_PHASE_1EDGE)
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#define OMV_SPI_CPHA_2EDGE (SPI_PHASE_2EDGE)
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#define OMV_SPI_NSS_LOW (0)
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#define OMV_SPI_NSS_HIGH (1)
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#define OMV_SPI_MAX_8BIT_XFER (65536U - 16U)
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#define OMV_SPI_MAX_16BIT_XFER (65536U - 8U)
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#define OMV_SPI_MAX_TIMEOUT (HAL_MAX_DELAY)
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#if defined(STM32N6)
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#define OMV_SPI_PORT_BITS \
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struct { \
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IRQn_Type irqn; \
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SPI_HandleTypeDef *descr; \
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DMA_QListTypeDef dma_queue_tx; \
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DMA_QListTypeDef dma_queue_rx; \
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DMA_HandleTypeDef dma_descr_tx; \
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DMA_HandleTypeDef dma_descr_rx; \
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};
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#else
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#define OMV_SPI_PORT_BITS \
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struct { \
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IRQn_Type irqn; \
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SPI_HandleTypeDef *descr; \
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DMA_HandleTypeDef dma_descr_tx; \
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DMA_HandleTypeDef dma_descr_rx; \
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};
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#endif
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// omv_csi_t port-specific fields.
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#if defined(STM32H7)
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#define OMV_CSI_PORT_BITS_MDMA \
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MDMA_HandleTypeDef mdma0; \
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MDMA_HandleTypeDef mdma1;
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#else
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#define OMV_CSI_PORT_BITS_MDMA
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#endif
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#if defined(STM32N6)
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#define OMV_CSI_PORT_BITS_DCMIPP \
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struct { \
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DCMIPP_HandleTypeDef dcmipp; \
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};
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#else
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#define OMV_CSI_PORT_BITS_DCMIPP
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#endif
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#define OMV_CSI_PORT_BITS \
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struct { \
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uint32_t dma_size; \
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bool one_shot; \
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DMA_HandleTypeDef dma; \
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IRQn_Type dma_irqn; \
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DCMI_HandleTypeDef dcmi; \
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OMV_CSI_PORT_BITS_MDMA \
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OMV_CSI_PORT_BITS_DCMIPP \
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};
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#define OMV_CSI_CLK_PORT_BITS \
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struct { \
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TIM_HandleTypeDef tim; \
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};
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#endif // __OMV_PORTCONFIG_H__
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