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62 lines
2.7 KiB
C
62 lines
2.7 KiB
C
/* Copyright (C) 2022 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* contact@alifsemi.com, or visit: https://alifsemi.com/license
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*
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*/
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/**************************************************************************//**
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* @file ospi_drv.h
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* @version V1.0.0
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* @brief Header file for OSPI driver to set up flash in XIP mode.
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* @bug None.
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* @Note None
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******************************************************************************/
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#ifndef OSPI_DRV_H
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#define OSPI_DRV_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include <stdint.h>
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#include <stdbool.h>
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#include "ospi_private.h"
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typedef struct {
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ssi_regs_t *regs; ///< Pointer to OSPI0 or OSPI1 base address
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aes_regs_t *aes_regs; ///< Pointer to AES0 or AES1 decryption module & XIP enable line registers
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volatile void *xip_base; ///< Pointer to OSPI0 or OSPI1 XIP base address
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uint32_t ospi_clock; ///< Octal SPI clock - Device and Bus characteristics defined
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uint32_t ser; ///< Slave Select / Enable register - application defined (to drive ospiN_ss0 or ospiN_ss1)
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uint32_t addrlen; ///< Address length 3 or 4 bytes depending on the device capacity
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uint32_t ddr_en; ///< DDR enable if set to 1, default 0
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uint32_t rx_req; ///< Requested data to receive
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uint32_t rx_cnt; ///< Received data count
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uint32_t device_id; ///< Manufacturer Device ID
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uint32_t wait_cycles; ///< Wait cycles - Device defined for switching from Rx to Tx
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} ospi_flash_cfg_t ;
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/* Function Prototypes */
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void ospi_init(ospi_flash_cfg_t *ospi_cfg);
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void ospi_xip_enter(ospi_flash_cfg_t *ospi_cfg, uint16_t incr_command, uint16_t wrap_command);
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void ospi_recv_blocking(ospi_flash_cfg_t *ospi_cfg, uint32_t command, uint8_t *buffer);
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void ospi_push(ospi_flash_cfg_t *ospi_cfg, uint32_t data);
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void ospi_send_blocking(ospi_flash_cfg_t *ospi_cfg, uint32_t data);
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void ospi_setup_write(ospi_flash_cfg_t *ospi_cfg, uint32_t addr_len);
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void ospi_setup_write_sdr(ospi_flash_cfg_t *ospi_cfg, uint32_t addr_len);
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void ospi_setup_read(ospi_flash_cfg_t *ospi_cfg, uint32_t addr_len, uint32_t read_len, uint32_t wait_cycles);
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void ospi_xip_exit(ospi_flash_cfg_t *ospi_cfg, uint16_t incr_command, uint16_t wrap_command);
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bool ospi_xip_enabled(ospi_flash_cfg_t *ospi_cfg);
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#ifdef __cplusplus
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}
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#endif
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#endif /* OSPI_DRV_H */
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