openmv/lib/mimxrt/MIMXRT1062/drivers/mimxrt_pads.h
iabdalkader daf2bb30da misc: Restructure repo.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
2025-04-13 08:28:34 +02:00

1344 lines
37 KiB
C

// THIS FILE IS AUTO-GENERATED DO NOT EDIT.
/*
* This file is part of the OpenMV project.
*
* Copyright (c) 2023 Ibrahim Abdelkader <iabdalkader@openmv.io>
* Copyright (c) 2023 Kwabena W. Agyeman <kwagyeman@openmv.io>
*
* This work is licensed under the MIT license, see the file LICENSE for details.
*/
#ifndef __IMXRT_PADS_H__
#define __IMXRT_PADS_H__
#define MIMXRT_PAD_COUNT 149
#define EMC_00_AF_SEMC_DATA00 0x0
#define EMC_00_AF_FLEXPWM4 0x1
#define EMC_00_AF_LPSPI2 0x2
#define EMC_00_AF_XBAR1 0x3
#define EMC_00_AF_FLEXIO1 0x4
#define EMC_00_AF_GPIO 0x5
#define EMC_01_AF_SEMC_DATA01 0x0
#define EMC_01_AF_FLEXPWM4 0x1
#define EMC_01_AF_LPSPI2 0x2
#define EMC_01_AF_XBAR1 0x3
#define EMC_01_AF_FLEXIO1 0x4
#define EMC_01_AF_GPIO 0x5
#define EMC_02_AF_SEMC_DATA02 0x0
#define EMC_02_AF_FLEXPWM4 0x1
#define EMC_02_AF_LPSPI2 0x2
#define EMC_02_AF_XBAR1 0x3
#define EMC_02_AF_FLEXIO1 0x4
#define EMC_02_AF_GPIO 0x5
#define EMC_03_AF_SEMC_DATA03 0x0
#define EMC_03_AF_FLEXPWM4 0x1
#define EMC_03_AF_LPSPI2 0x2
#define EMC_03_AF_XBAR1 0x3
#define EMC_03_AF_FLEXIO1 0x4
#define EMC_03_AF_GPIO 0x5
#define EMC_04_AF_SEMC_DATA04 0x0
#define EMC_04_AF_FLEXPWM4 0x1
#define EMC_04_AF_SAI2 0x2
#define EMC_04_AF_XBAR1 0x3
#define EMC_04_AF_FLEXIO1 0x4
#define EMC_04_AF_GPIO 0x5
#define EMC_05_AF_SEMC_DATA05 0x0
#define EMC_05_AF_FLEXPWM4 0x1
#define EMC_05_AF_SAI2 0x2
#define EMC_05_AF_XBAR1 0x3
#define EMC_05_AF_FLEXIO1 0x4
#define EMC_05_AF_GPIO 0x5
#define EMC_06_AF_SEMC_DATA06 0x0
#define EMC_06_AF_FLEXPWM2 0x1
#define EMC_06_AF_SAI2 0x2
#define EMC_06_AF_XBAR1 0x3
#define EMC_06_AF_FLEXIO1 0x4
#define EMC_06_AF_GPIO 0x5
#define EMC_07_AF_SEMC_DATA07 0x0
#define EMC_07_AF_FLEXPWM2 0x1
#define EMC_07_AF_SAI2 0x2
#define EMC_07_AF_XBAR1 0x3
#define EMC_07_AF_FLEXIO1 0x4
#define EMC_07_AF_GPIO 0x5
#define EMC_08_AF_SEMC_DM00 0x0
#define EMC_08_AF_FLEXPWM2 0x1
#define EMC_08_AF_SAI2 0x2
#define EMC_08_AF_XBAR1 0x3
#define EMC_08_AF_FLEXIO1 0x4
#define EMC_08_AF_GPIO 0x5
#define EMC_09_AF_SEMC_ADDR00 0x0
#define EMC_09_AF_FLEXPWM2 0x1
#define EMC_09_AF_SAI2 0x2
#define EMC_09_AF_FLEXCAN2 0x3
#define EMC_09_AF_FLEXIO1 0x4
#define EMC_09_AF_GPIO 0x5
#define EMC_09_AF_FLEXSPI2 0x8
#define EMC_10_AF_SEMC_ADDR01 0x0
#define EMC_10_AF_FLEXPWM2 0x1
#define EMC_10_AF_SAI2 0x2
#define EMC_10_AF_FLEXCAN2 0x3
#define EMC_10_AF_FLEXIO1 0x4
#define EMC_10_AF_GPIO 0x5
#define EMC_10_AF_FLEXSPI2 0x8
#define EMC_11_AF_SEMC_ADDR02 0x0
#define EMC_11_AF_FLEXPWM2 0x1
#define EMC_11_AF_LPI2C4 0x2
#define EMC_11_AF_USDHC2 0x3
#define EMC_11_AF_FLEXIO1 0x4
#define EMC_11_AF_GPIO 0x5
#define EMC_11_AF_FLEXSPI2 0x8
#define EMC_12_AF_SEMC_ADDR03 0x0
#define EMC_12_AF_XBAR1 0x1
#define EMC_12_AF_LPI2C4 0x2
#define EMC_12_AF_USDHC1 0x3
#define EMC_12_AF_FLEXPWM1 0x4
#define EMC_12_AF_GPIO 0x5
#define EMC_12_AF_FLEXSPI2 0x8
#define EMC_13_AF_SEMC_ADDR04 0x0
#define EMC_13_AF_XBAR1 0x1
#define EMC_13_AF_LPUART3 0x2
#define EMC_13_AF_MQS 0x3
#define EMC_13_AF_FLEXPWM1 0x4
#define EMC_13_AF_GPIO 0x5
#define EMC_13_AF_FLEXSPI2 0x8
#define EMC_14_AF_SEMC_ADDR05 0x0
#define EMC_14_AF_XBAR1 0x1
#define EMC_14_AF_LPUART3 0x2
#define EMC_14_AF_MQS 0x3
#define EMC_14_AF_LPSPI2 0x4
#define EMC_14_AF_GPIO 0x5
#define EMC_14_AF_FLEXSPI2 0x8
#define EMC_15_AF_SEMC_ADDR06 0x0
#define EMC_15_AF_XBAR1 0x1
#define EMC_15_AF_LPUART3 0x2
#define EMC_15_AF_SPDIF 0x3
#define EMC_15_AF_QTIMER3 0x4
#define EMC_15_AF_GPIO 0x5
#define EMC_15_AF_FLEXSPI2 0x8
#define EMC_16_AF_SEMC_ADDR07 0x0
#define EMC_16_AF_XBAR1 0x1
#define EMC_16_AF_LPUART3 0x2
#define EMC_16_AF_SPDIF 0x3
#define EMC_16_AF_QTIMER3 0x4
#define EMC_16_AF_GPIO 0x5
#define EMC_16_AF_FLEXSPI2 0x8
#define EMC_17_AF_SEMC_ADDR08 0x0
#define EMC_17_AF_FLEXPWM4 0x1
#define EMC_17_AF_LPUART4 0x2
#define EMC_17_AF_FLEXCAN1 0x3
#define EMC_17_AF_QTIMER3 0x4
#define EMC_17_AF_GPIO 0x5
#define EMC_18_AF_SEMC_ADDR09 0x0
#define EMC_18_AF_FLEXPWM4 0x1
#define EMC_18_AF_LPUART4 0x2
#define EMC_18_AF_FLEXCAN1 0x3
#define EMC_18_AF_QTIMER3 0x4
#define EMC_18_AF_GPIO 0x5
#define EMC_18_AF_SNVS 0x6
#define EMC_19_AF_SEMC_ADDR11 0x0
#define EMC_19_AF_FLEXPWM2 0x1
#define EMC_19_AF_LPUART4 0x2
#define EMC_19_AF_ENET_RDATA01 0x3
#define EMC_19_AF_QTIMER2 0x4
#define EMC_19_AF_GPIO 0x5
#define EMC_19_AF_SNVS 0x6
#define EMC_20_AF_SEMC_ADDR12 0x0
#define EMC_20_AF_FLEXPWM2 0x1
#define EMC_20_AF_LPUART4 0x2
#define EMC_20_AF_ENET_RDATA00 0x3
#define EMC_20_AF_QTIMER2 0x4
#define EMC_20_AF_GPIO 0x5
#define EMC_21_AF_SEMC_BA0 0x0
#define EMC_21_AF_FLEXPWM3 0x1
#define EMC_21_AF_LPI2C3 0x2
#define EMC_21_AF_ENET_TDATA01 0x3
#define EMC_21_AF_QTIMER2 0x4
#define EMC_21_AF_GPIO 0x5
#define EMC_22_AF_SEMC_BA1 0x0
#define EMC_22_AF_FLEXPWM3 0x1
#define EMC_22_AF_LPI2C3 0x2
#define EMC_22_AF_ENET_TDATA00 0x3
#define EMC_22_AF_QTIMER2 0x4
#define EMC_22_AF_GPIO 0x5
#define EMC_22_AF_FLEXSPI2 0x8
#define EMC_23_AF_SEMC_ADDR10 0x0
#define EMC_23_AF_FLEXPWM1 0x1
#define EMC_23_AF_LPUART5 0x2
#define EMC_23_AF_ENET_RX_EN 0x3
#define EMC_23_AF_GPT1 0x4
#define EMC_23_AF_GPIO 0x5
#define EMC_23_AF_FLEXSPI2 0x8
#define EMC_24_AF_SEMC_CAS 0x0
#define EMC_24_AF_FLEXPWM1 0x1
#define EMC_24_AF_LPUART5 0x2
#define EMC_24_AF_ENET_TX_EN 0x3
#define EMC_24_AF_GPT1 0x4
#define EMC_24_AF_GPIO 0x5
#define EMC_24_AF_FLEXSPI2 0x8
#define EMC_25_AF_SEMC_RAS 0x0
#define EMC_25_AF_FLEXPWM1 0x1
#define EMC_25_AF_LPUART6 0x2
#define EMC_25_AF_ENET_TX_CLK 0x3
#define EMC_25_AF_ENET_REF_CLK 0x4
#define EMC_25_AF_GPIO 0x5
#define EMC_25_AF_FLEXSPI2 0x8
#define EMC_26_AF_SEMC_CLK 0x0
#define EMC_26_AF_FLEXPWM1 0x1
#define EMC_26_AF_LPUART6 0x2
#define EMC_26_AF_ENET_RX_ER 0x3
#define EMC_26_AF_FLEXIO1 0x4
#define EMC_26_AF_GPIO 0x5
#define EMC_26_AF_FLEXSPI2 0x8
#define EMC_27_AF_SEMC_CKE 0x0
#define EMC_27_AF_FLEXPWM1 0x1
#define EMC_27_AF_LPUART5 0x2
#define EMC_27_AF_LPSPI1 0x3
#define EMC_27_AF_FLEXIO1 0x4
#define EMC_27_AF_GPIO 0x5
#define EMC_27_AF_FLEXSPI2 0x8
#define EMC_28_AF_SEMC_WE 0x0
#define EMC_28_AF_FLEXPWM1 0x1
#define EMC_28_AF_LPUART5 0x2
#define EMC_28_AF_LPSPI1 0x3
#define EMC_28_AF_FLEXIO1 0x4
#define EMC_28_AF_GPIO 0x5
#define EMC_28_AF_FLEXSPI2 0x8
#define EMC_29_AF_SEMC_CS0 0x0
#define EMC_29_AF_FLEXPWM3 0x1
#define EMC_29_AF_LPUART6 0x2
#define EMC_29_AF_LPSPI1 0x3
#define EMC_29_AF_FLEXIO1 0x4
#define EMC_29_AF_GPIO 0x5
#define EMC_29_AF_FLEXSPI2 0x8
#define EMC_30_AF_SEMC_DATA08 0x0
#define EMC_30_AF_FLEXPWM3 0x1
#define EMC_30_AF_LPUART6 0x2
#define EMC_30_AF_LPSPI1 0x3
#define EMC_30_AF_CSI 0x4
#define EMC_30_AF_GPIO 0x5
#define EMC_30_AF_ENET2_TDATA00 0x8
#define EMC_31_AF_SEMC_DATA09 0x0
#define EMC_31_AF_FLEXPWM3 0x1
#define EMC_31_AF_LPUART7 0x2
#define EMC_31_AF_LPSPI1 0x3
#define EMC_31_AF_CSI 0x4
#define EMC_31_AF_GPIO 0x5
#define EMC_31_AF_ENET2_TDATA01 0x8
#define EMC_32_AF_SEMC_DATA10 0x0
#define EMC_32_AF_FLEXPWM3 0x1
#define EMC_32_AF_LPUART7 0x2
#define EMC_32_AF_CCM 0x3
#define EMC_32_AF_CSI 0x4
#define EMC_32_AF_GPIO 0x5
#define EMC_32_AF_ENET2_TX_EN 0x8
#define EMC_33_AF_SEMC_DATA11 0x0
#define EMC_33_AF_FLEXPWM3 0x1
#define EMC_33_AF_USDHC1 0x2
#define EMC_33_AF_SAI3 0x3
#define EMC_33_AF_CSI 0x4
#define EMC_33_AF_GPIO 0x5
#define EMC_33_AF_ENET2_TX_CLK 0x8
#define EMC_33_AF_ENET2_REF_CLK2 0x9
#define EMC_34_AF_SEMC_DATA12 0x0
#define EMC_34_AF_FLEXPWM3 0x1
#define EMC_34_AF_USDHC1 0x2
#define EMC_34_AF_SAI3 0x3
#define EMC_34_AF_CSI 0x4
#define EMC_34_AF_GPIO 0x5
#define EMC_34_AF_ENET2_RX_ER 0x8
#define EMC_35_AF_SEMC_DATA13 0x0
#define EMC_35_AF_XBAR1 0x1
#define EMC_35_AF_GPT1 0x2
#define EMC_35_AF_SAI3 0x3
#define EMC_35_AF_CSI 0x4
#define EMC_35_AF_GPIO 0x5
#define EMC_35_AF_USDHC1 0x6
#define EMC_35_AF_ENET2_RDATA00 0x8
#define EMC_36_AF_SEMC_DATA14 0x0
#define EMC_36_AF_XBAR1 0x1
#define EMC_36_AF_GPT1 0x2
#define EMC_36_AF_SAI3 0x3
#define EMC_36_AF_CSI 0x4
#define EMC_36_AF_GPIO 0x5
#define EMC_36_AF_USDHC1 0x6
#define EMC_36_AF_ENET2_RDATA01 0x8
#define EMC_36_AF_FLEXCAN3 0x9
#define EMC_37_AF_SEMC_DATA15 0x0
#define EMC_37_AF_XBAR1 0x1
#define EMC_37_AF_GPT1 0x2
#define EMC_37_AF_SAI3 0x3
#define EMC_37_AF_CSI 0x4
#define EMC_37_AF_GPIO 0x5
#define EMC_37_AF_USDHC2 0x6
#define EMC_37_AF_ENET2_RX_EN 0x8
#define EMC_37_AF_FLEXCAN3 0x9
#define EMC_38_AF_SEMC_DM01 0x0
#define EMC_38_AF_FLEXPWM1 0x1
#define EMC_38_AF_LPUART8 0x2
#define EMC_38_AF_SAI3 0x3
#define EMC_38_AF_CSI 0x4
#define EMC_38_AF_GPIO 0x5
#define EMC_38_AF_USDHC2 0x6
#define EMC_38_AF_ENET2_MDC 0x8
#define EMC_39_AF_SEMC_DQS 0x0
#define EMC_39_AF_FLEXPWM1 0x1
#define EMC_39_AF_LPUART8 0x2
#define EMC_39_AF_SAI3 0x3
#define EMC_39_AF_WDOG1 0x4
#define EMC_39_AF_GPIO 0x5
#define EMC_39_AF_USDHC2 0x6
#define EMC_39_AF_ENET2_MDIO 0x8
#define EMC_39_AF_SEMC_DQS4 0x9
#define EMC_40_AF_SEMC_RDY 0x0
#define EMC_40_AF_GPT2 0x1
#define EMC_40_AF_LPSPI1 0x2
#define EMC_40_AF_USB 0x3
#define EMC_40_AF_ENET_MDC 0x4
#define EMC_40_AF_GPIO 0x5
#define EMC_40_AF_USDHC2 0x6
#define EMC_40_AF_SEMC_CLK5 0x9
#define EMC_41_AF_SEMC_CSX00 0x0
#define EMC_41_AF_GPT2 0x1
#define EMC_41_AF_LPSPI1 0x2
#define EMC_41_AF_USB 0x3
#define EMC_41_AF_ENET_MDIO 0x4
#define EMC_41_AF_GPIO 0x5
#define EMC_41_AF_USDHC1 0x6
#define AD_B0_00_AF_FLEXPWM2 0x0
#define AD_B0_00_AF_XBAR1 0x1
#define AD_B0_00_AF_REF 0x2
#define AD_B0_00_AF_USB 0x3
#define AD_B0_00_AF_LPI2C1 0x4
#define AD_B0_00_AF_GPIO 0x5
#define AD_B0_00_AF_USDHC1 0x6
#define AD_B0_00_AF_LPSPI3 0x7
#define AD_B0_01_AF_FLEXPWM2 0x0
#define AD_B0_01_AF_XBAR1 0x1
#define AD_B0_01_AF_REF 0x2
#define AD_B0_01_AF_USB 0x3
#define AD_B0_01_AF_LPI2C1 0x4
#define AD_B0_01_AF_GPIO 0x5
#define AD_B0_01_AF_EWM 0x6
#define AD_B0_01_AF_LPSPI3 0x7
#define AD_B0_02_AF_FLEXCAN2 0x0
#define AD_B0_02_AF_XBAR1 0x1
#define AD_B0_02_AF_LPUART6 0x2
#define AD_B0_02_AF_USB 0x3
#define AD_B0_02_AF_FLEXPWM1 0x4
#define AD_B0_02_AF_GPIO 0x5
#define AD_B0_02_AF_LPI2C1 0x6
#define AD_B0_02_AF_LPSPI3 0x7
#define AD_B0_03_AF_FLEXCAN2 0x0
#define AD_B0_03_AF_XBAR1 0x1
#define AD_B0_03_AF_LPUART6 0x2
#define AD_B0_03_AF_USB 0x3
#define AD_B0_03_AF_FLEXPWM1 0x4
#define AD_B0_03_AF_GPIO 0x5
#define AD_B0_03_AF_REF 0x6
#define AD_B0_03_AF_LPSPI3 0x7
#define AD_B0_04_AF_SRC 0x0
#define AD_B0_04_AF_MQS 0x1
#define AD_B0_04_AF_ENET_TX_DATA03 0x2
#define AD_B0_04_AF_SAI2 0x3
#define AD_B0_04_AF_CSI 0x4
#define AD_B0_04_AF_GPIO 0x5
#define AD_B0_04_AF_PIT 0x6
#define AD_B0_04_AF_LPSPI3 0x7
#define AD_B0_05_AF_SRC 0x0
#define AD_B0_05_AF_MQS 0x1
#define AD_B0_05_AF_ENET_TX_DATA02 0x2
#define AD_B0_05_AF_SAI2 0x3
#define AD_B0_05_AF_CSI 0x4
#define AD_B0_05_AF_GPIO 0x5
#define AD_B0_05_AF_XBAR1 0x6
#define AD_B0_05_AF_LPSPI3 0x7
#define AD_B0_06_AF_JTAG 0x0
#define AD_B0_06_AF_GPT2 0x1
#define AD_B0_06_AF_ENET_RX_CLK 0x2
#define AD_B0_06_AF_SAI2 0x3
#define AD_B0_06_AF_CSI 0x4
#define AD_B0_06_AF_GPIO 0x5
#define AD_B0_06_AF_XBAR1 0x6
#define AD_B0_06_AF_LPSPI3 0x7
#define AD_B0_07_AF_JTAG 0x0
#define AD_B0_07_AF_GPT2 0x1
#define AD_B0_07_AF_ENET_TX_ER 0x2
#define AD_B0_07_AF_SAI2 0x3
#define AD_B0_07_AF_CSI 0x4
#define AD_B0_07_AF_GPIO 0x5
#define AD_B0_07_AF_XBAR1 0x6
#define AD_B0_07_AF_ENET_1588_EVENT3_OUT 0x7
#define AD_B0_08_AF_JTAG 0x0
#define AD_B0_08_AF_GPT2 0x1
#define AD_B0_08_AF_ENET_RX_DATA03 0x2
#define AD_B0_08_AF_SAI2 0x3
#define AD_B0_08_AF_CSI 0x4
#define AD_B0_08_AF_GPIO 0x5
#define AD_B0_08_AF_XBAR1 0x6
#define AD_B0_08_AF_ENET_1588_EVENT3_IN 0x7
#define AD_B0_09_AF_JTAG 0x0
#define AD_B0_09_AF_FLEXPWM2 0x1
#define AD_B0_09_AF_ENET_RX_DATA02 0x2
#define AD_B0_09_AF_SAI2 0x3
#define AD_B0_09_AF_CSI 0x4
#define AD_B0_09_AF_GPIO 0x5
#define AD_B0_09_AF_XBAR1 0x6
#define AD_B0_09_AF_GPT2 0x7
#define AD_B0_09_AF_SEMC_DQS4 0x9
#define AD_B0_10_AF_JTAG 0x0
#define AD_B0_10_AF_FLEXPWM1 0x1
#define AD_B0_10_AF_ENET_CRS 0x2
#define AD_B0_10_AF_SAI2 0x3
#define AD_B0_10_AF_CSI 0x4
#define AD_B0_10_AF_GPIO 0x5
#define AD_B0_10_AF_XBAR1 0x6
#define AD_B0_10_AF_ENET_1588_EVENT0_OUT 0x7
#define AD_B0_10_AF_FLEXCAN3 0x8
#define AD_B0_10_AF_ARM 0x9
#define AD_B0_11_AF_JTAG 0x0
#define AD_B0_11_AF_FLEXPWM1 0x1
#define AD_B0_11_AF_ENET_COL 0x2
#define AD_B0_11_AF_WDOG1 0x3
#define AD_B0_11_AF_CSI 0x4
#define AD_B0_11_AF_GPIO 0x5
#define AD_B0_11_AF_XBAR1 0x6
#define AD_B0_11_AF_ENET_1588_EVENT0_IN 0x7
#define AD_B0_11_AF_FLEXCAN3 0x8
#define AD_B0_11_AF_SEMC_CLK6 0x9
#define AD_B0_12_AF_LPI2C4 0x0
#define AD_B0_12_AF_CCM 0x1
#define AD_B0_12_AF_LPUART1 0x2
#define AD_B0_12_AF_WDOG2 0x3
#define AD_B0_12_AF_FLEXPWM1 0x4
#define AD_B0_12_AF_GPIO 0x5
#define AD_B0_12_AF_ENET_1588_EVENT1_OUT 0x6
#define AD_B0_12_AF_NMI 0x7
#define AD_B0_13_AF_LPI2C4 0x0
#define AD_B0_13_AF_GPT1 0x1
#define AD_B0_13_AF_LPUART1 0x2
#define AD_B0_13_AF_EWM 0x3
#define AD_B0_13_AF_FLEXPWM1 0x4
#define AD_B0_13_AF_GPIO 0x5
#define AD_B0_13_AF_ENET_1588_EVENT1_IN 0x6
#define AD_B0_13_AF_REF 0x7
#define AD_B0_14_AF_USB 0x0
#define AD_B0_14_AF_XBAR1 0x1
#define AD_B0_14_AF_LPUART1 0x2
#define AD_B0_14_AF_ENET_1588_EVENT0_OUT 0x3
#define AD_B0_14_AF_CSI 0x4
#define AD_B0_14_AF_GPIO 0x5
#define AD_B0_14_AF_FLEXCAN2 0x6
#define AD_B0_14_AF_FLEXCAN3 0x8
#define AD_B0_15_AF_USB 0x0
#define AD_B0_15_AF_XBAR1 0x1
#define AD_B0_15_AF_LPUART1 0x2
#define AD_B0_15_AF_ENET_1588_EVENT0_IN 0x3
#define AD_B0_15_AF_CSI 0x4
#define AD_B0_15_AF_GPIO 0x5
#define AD_B0_15_AF_FLEXCAN2 0x6
#define AD_B0_15_AF_WDOG1 0x7
#define AD_B0_15_AF_FLEXCAN3 0x8
#define AD_B1_00_AF_USB 0x0
#define AD_B1_00_AF_QTIMER3 0x1
#define AD_B1_00_AF_LPUART2 0x2
#define AD_B1_00_AF_LPI2C1 0x3
#define AD_B1_00_AF_WDOG1 0x4
#define AD_B1_00_AF_GPIO 0x5
#define AD_B1_00_AF_USDHC1 0x6
#define AD_B1_00_AF_KPP 0x7
#define AD_B1_00_AF_ENET2_1588_EVENT0_OUT 0x8
#define AD_B1_00_AF_FLEXIO3 0x9
#define AD_B1_01_AF_USB 0x0
#define AD_B1_01_AF_QTIMER3 0x1
#define AD_B1_01_AF_LPUART2 0x2
#define AD_B1_01_AF_LPI2C1 0x3
#define AD_B1_01_AF_CCM 0x4
#define AD_B1_01_AF_GPIO 0x5
#define AD_B1_01_AF_USDHC1 0x6
#define AD_B1_01_AF_KPP 0x7
#define AD_B1_01_AF_ENET2_1588_EVENT0_IN 0x8
#define AD_B1_01_AF_FLEXIO3 0x9
#define AD_B1_02_AF_USB 0x0
#define AD_B1_02_AF_QTIMER3 0x1
#define AD_B1_02_AF_LPUART2 0x2
#define AD_B1_02_AF_SPDIF 0x3
#define AD_B1_02_AF_ENET_1588_EVENT2_OUT 0x4
#define AD_B1_02_AF_GPIO 0x5
#define AD_B1_02_AF_USDHC1 0x6
#define AD_B1_02_AF_KPP 0x7
#define AD_B1_02_AF_GPT2 0x8
#define AD_B1_02_AF_FLEXIO3 0x9
#define AD_B1_03_AF_USB 0x0
#define AD_B1_03_AF_QTIMER3 0x1
#define AD_B1_03_AF_LPUART2 0x2
#define AD_B1_03_AF_SPDIF 0x3
#define AD_B1_03_AF_ENET_1588_EVENT2_IN 0x4
#define AD_B1_03_AF_GPIO 0x5
#define AD_B1_03_AF_USDHC2 0x6
#define AD_B1_03_AF_KPP 0x7
#define AD_B1_03_AF_GPT2 0x8
#define AD_B1_03_AF_FLEXIO3 0x9
#define AD_B1_04_AF_FLEXSPIB 0x0
#define AD_B1_04_AF_ENET_MDC 0x1
#define AD_B1_04_AF_LPUART3 0x2
#define AD_B1_04_AF_SPDIF 0x3
#define AD_B1_04_AF_CSI 0x4
#define AD_B1_04_AF_GPIO 0x5
#define AD_B1_04_AF_USDHC2 0x6
#define AD_B1_04_AF_KPP 0x7
#define AD_B1_04_AF_GPT2 0x8
#define AD_B1_04_AF_FLEXIO3 0x9
#define AD_B1_05_AF_FLEXSPIB 0x0
#define AD_B1_05_AF_ENET_MDIO 0x1
#define AD_B1_05_AF_LPUART3 0x2
#define AD_B1_05_AF_SPDIF 0x3
#define AD_B1_05_AF_CSI 0x4
#define AD_B1_05_AF_GPIO 0x5
#define AD_B1_05_AF_USDHC2 0x6
#define AD_B1_05_AF_KPP 0x7
#define AD_B1_05_AF_GPT2 0x8
#define AD_B1_05_AF_FLEXIO3 0x9
#define AD_B1_06_AF_FLEXSPIB 0x0
#define AD_B1_06_AF_LPI2C3 0x1
#define AD_B1_06_AF_LPUART3 0x2
#define AD_B1_06_AF_SPDIF 0x3
#define AD_B1_06_AF_CSI 0x4
#define AD_B1_06_AF_GPIO 0x5
#define AD_B1_06_AF_USDHC2 0x6
#define AD_B1_06_AF_KPP 0x7
#define AD_B1_06_AF_GPT2 0x8
#define AD_B1_06_AF_FLEXIO3 0x9
#define AD_B1_07_AF_FLEXSPIB 0x0
#define AD_B1_07_AF_LPI2C3 0x1
#define AD_B1_07_AF_LPUART3 0x2
#define AD_B1_07_AF_SPDIF 0x3
#define AD_B1_07_AF_CSI 0x4
#define AD_B1_07_AF_GPIO 0x5
#define AD_B1_07_AF_USDHC2 0x6
#define AD_B1_07_AF_KPP 0x7
#define AD_B1_07_AF_GPT2 0x8
#define AD_B1_07_AF_FLEXIO3 0x9
#define AD_B1_08_AF_FLEXSPIA 0x0
#define AD_B1_08_AF_FLEXPWM4 0x1
#define AD_B1_08_AF_FLEXCAN1 0x2
#define AD_B1_08_AF_CCM 0x3
#define AD_B1_08_AF_CSI 0x4
#define AD_B1_08_AF_GPIO 0x5
#define AD_B1_08_AF_USDHC2 0x6
#define AD_B1_08_AF_KPP 0x7
#define AD_B1_08_AF_FLEXIO3 0x9
#define AD_B1_09_AF_FLEXSPIA 0x0
#define AD_B1_09_AF_FLEXPWM4 0x1
#define AD_B1_09_AF_FLEXCAN1 0x2
#define AD_B1_09_AF_SAI1 0x3
#define AD_B1_09_AF_CSI 0x4
#define AD_B1_09_AF_GPIO 0x5
#define AD_B1_09_AF_USDHC2 0x6
#define AD_B1_09_AF_KPP 0x7
#define AD_B1_09_AF_FLEXIO3 0x9
#define AD_B1_10_AF_FLEXSPIA 0x0
#define AD_B1_10_AF_WDOG1 0x1
#define AD_B1_10_AF_LPUART8 0x2
#define AD_B1_10_AF_SAI1 0x3
#define AD_B1_10_AF_CSI 0x4
#define AD_B1_10_AF_GPIO 0x5
#define AD_B1_10_AF_USDHC2 0x6
#define AD_B1_10_AF_KPP 0x7
#define AD_B1_10_AF_ENET2_1588_EVENT1_OUT 0x8
#define AD_B1_10_AF_FLEXIO3 0x9
#define AD_B1_11_AF_FLEXSPIA 0x0
#define AD_B1_11_AF_EWM 0x1
#define AD_B1_11_AF_LPUART8 0x2
#define AD_B1_11_AF_SAI1 0x3
#define AD_B1_11_AF_CSI 0x4
#define AD_B1_11_AF_GPIO 0x5
#define AD_B1_11_AF_USDHC2 0x6
#define AD_B1_11_AF_KPP 0x7
#define AD_B1_11_AF_ENET2_1588_EVENT1_IN 0x8
#define AD_B1_11_AF_FLEXIO3 0x9
#define AD_B1_12_AF_FLEXSPIA 0x0
#define AD_B1_12_AF_ACMP 0x1
#define AD_B1_12_AF_LPSPI3 0x2
#define AD_B1_12_AF_SAI1 0x3
#define AD_B1_12_AF_CSI 0x4
#define AD_B1_12_AF_GPIO 0x5
#define AD_B1_12_AF_USDHC2 0x6
#define AD_B1_12_AF_KPP 0x7
#define AD_B1_12_AF_ENET2_1588_EVENT2_OUT 0x8
#define AD_B1_12_AF_FLEXIO3 0x9
#define AD_B1_13_AF_FLEXSPIA 0x0
#define AD_B1_13_AF_ACMP 0x1
#define AD_B1_13_AF_LPSPI3 0x2
#define AD_B1_13_AF_SAI1 0x3
#define AD_B1_13_AF_CSI 0x4
#define AD_B1_13_AF_GPIO 0x5
#define AD_B1_13_AF_USDHC2 0x6
#define AD_B1_13_AF_KPP 0x7
#define AD_B1_13_AF_ENET2_1588_EVENT2_IN 0x8
#define AD_B1_13_AF_FLEXIO3 0x9
#define AD_B1_14_AF_FLEXSPIA 0x0
#define AD_B1_14_AF_ACMP 0x1
#define AD_B1_14_AF_LPSPI3 0x2
#define AD_B1_14_AF_SAI1 0x3
#define AD_B1_14_AF_CSI 0x4
#define AD_B1_14_AF_GPIO 0x5
#define AD_B1_14_AF_USDHC2 0x6
#define AD_B1_14_AF_KPP 0x7
#define AD_B1_14_AF_ENET2_1588_EVENT3_OUT 0x8
#define AD_B1_14_AF_FLEXIO3 0x9
#define AD_B1_15_AF_FLEXSPIA 0x0
#define AD_B1_15_AF_ACMP 0x1
#define AD_B1_15_AF_LPSPI3 0x2
#define AD_B1_15_AF_SAI1 0x3
#define AD_B1_15_AF_CSI 0x4
#define AD_B1_15_AF_GPIO 0x5
#define AD_B1_15_AF_USDHC2 0x6
#define AD_B1_15_AF_KPP 0x7
#define AD_B1_15_AF_ENET2_1588_EVENT3_IN 0x8
#define AD_B1_15_AF_FLEXIO3 0x9
#define B0_00_AF_LCD 0x0
#define B0_00_AF_QTIMER1 0x1
#define B0_00_AF_MQS 0x2
#define B0_00_AF_LPSPI4 0x3
#define B0_00_AF_FLEXIO2 0x4
#define B0_00_AF_GPIO 0x5
#define B0_00_AF_SEMC_CSX01 0x6
#define B0_00_AF_ENET2_MDC 0x8
#define B0_01_AF_LCD 0x0
#define B0_01_AF_QTIMER1 0x1
#define B0_01_AF_MQS 0x2
#define B0_01_AF_LPSPI4 0x3
#define B0_01_AF_FLEXIO2 0x4
#define B0_01_AF_GPIO 0x5
#define B0_01_AF_SEMC_CSX02 0x6
#define B0_01_AF_ENET2_MDIO 0x8
#define B0_02_AF_LCD 0x0
#define B0_02_AF_QTIMER1 0x1
#define B0_02_AF_FLEXCAN1 0x2
#define B0_02_AF_LPSPI4 0x3
#define B0_02_AF_FLEXIO2 0x4
#define B0_02_AF_GPIO 0x5
#define B0_02_AF_SEMC_CSX03 0x6
#define B0_02_AF_ENET2_1588_EVENT0_OUT 0x8
#define B0_03_AF_LCD 0x0
#define B0_03_AF_QTIMER2 0x1
#define B0_03_AF_FLEXCAN1 0x2
#define B0_03_AF_LPSPI4 0x3
#define B0_03_AF_FLEXIO2 0x4
#define B0_03_AF_GPIO 0x5
#define B0_03_AF_WDOG2 0x6
#define B0_03_AF_ENET2_1588_EVENT0_IN 0x8
#define B0_04_AF_LCD 0x0
#define B0_04_AF_QTIMER2 0x1
#define B0_04_AF_LPI2C2 0x2
#define B0_04_AF_ARM 0x3
#define B0_04_AF_FLEXIO2 0x4
#define B0_04_AF_GPIO 0x5
#define B0_04_AF_SRC 0x6
#define B0_04_AF_ENET2_TDATA03 0x8
#define B0_05_AF_LCD 0x0
#define B0_05_AF_QTIMER2 0x1
#define B0_05_AF_LPI2C2 0x2
#define B0_05_AF_ARM 0x3
#define B0_05_AF_FLEXIO2 0x4
#define B0_05_AF_GPIO 0x5
#define B0_05_AF_SRC 0x6
#define B0_05_AF_ENET2_TDATA02 0x8
#define B0_06_AF_LCD 0x0
#define B0_06_AF_QTIMER3 0x1
#define B0_06_AF_FLEXPWM2 0x2
#define B0_06_AF_ARM 0x3
#define B0_06_AF_FLEXIO2 0x4
#define B0_06_AF_GPIO 0x5
#define B0_06_AF_SRC 0x6
#define B0_06_AF_ENET2_RX_CLK 0x8
#define B0_07_AF_LCD 0x0
#define B0_07_AF_QTIMER3 0x1
#define B0_07_AF_FLEXPWM2 0x2
#define B0_07_AF_ARM 0x3
#define B0_07_AF_FLEXIO2 0x4
#define B0_07_AF_GPIO 0x5
#define B0_07_AF_SRC 0x6
#define B0_07_AF_ENET2_TX_ER 0x8
#define B0_08_AF_LCD 0x0
#define B0_08_AF_QTIMER3 0x1
#define B0_08_AF_FLEXPWM2 0x2
#define B0_08_AF_LPUART3 0x3
#define B0_08_AF_FLEXIO2 0x4
#define B0_08_AF_GPIO 0x5
#define B0_08_AF_SRC 0x6
#define B0_08_AF_ENET2_RDATA03 0x8
#define B0_09_AF_LCD 0x0
#define B0_09_AF_QTIMER4 0x1
#define B0_09_AF_FLEXPWM2 0x2
#define B0_09_AF_LPUART3 0x3
#define B0_09_AF_FLEXIO2 0x4
#define B0_09_AF_GPIO 0x5
#define B0_09_AF_SRC 0x6
#define B0_09_AF_ENET2_RDATA02 0x8
#define B0_10_AF_LCD 0x0
#define B0_10_AF_QTIMER4 0x1
#define B0_10_AF_FLEXPWM2 0x2
#define B0_10_AF_SAI1 0x3
#define B0_10_AF_FLEXIO2 0x4
#define B0_10_AF_GPIO 0x5
#define B0_10_AF_SRC 0x6
#define B0_10_AF_ENET2_CRS 0x8
#define B0_11_AF_LCD 0x0
#define B0_11_AF_QTIMER4 0x1
#define B0_11_AF_FLEXPWM2 0x2
#define B0_11_AF_SAI1 0x3
#define B0_11_AF_FLEXIO2 0x4
#define B0_11_AF_GPIO 0x5
#define B0_11_AF_SRC 0x6
#define B0_11_AF_ENET2_COL 0x8
#define B0_12_AF_LCD 0x0
#define B0_12_AF_XBAR1 0x1
#define B0_12_AF_ARM 0x2
#define B0_12_AF_SAI1 0x3
#define B0_12_AF_FLEXIO2 0x4
#define B0_12_AF_GPIO 0x5
#define B0_12_AF_SRC 0x6
#define B0_12_AF_ENET2_TDATA00 0x8
#define B0_13_AF_LCD 0x0
#define B0_13_AF_XBAR1 0x1
#define B0_13_AF_ARM 0x2
#define B0_13_AF_SAI1 0x3
#define B0_13_AF_FLEXIO2 0x4
#define B0_13_AF_GPIO 0x5
#define B0_13_AF_SRC 0x6
#define B0_13_AF_ENET2_TDATA01 0x8
#define B0_14_AF_LCD 0x0
#define B0_14_AF_XBAR1 0x1
#define B0_14_AF_ARM 0x2
#define B0_14_AF_SAI1 0x3
#define B0_14_AF_FLEXIO2 0x4
#define B0_14_AF_GPIO 0x5
#define B0_14_AF_SRC 0x6
#define B0_14_AF_ENET2_TX_EN 0x8
#define B0_15_AF_LCD 0x0
#define B0_15_AF_XBAR1 0x1
#define B0_15_AF_ARM 0x2
#define B0_15_AF_SAI1 0x3
#define B0_15_AF_FLEXIO2 0x4
#define B0_15_AF_GPIO 0x5
#define B0_15_AF_SRC 0x6
#define B0_15_AF_ENET2_TX_CLK 0x8
#define B0_15_AF_ENET2_REF_CLK2 0x9
#define B1_00_AF_LCD 0x0
#define B1_00_AF_XBAR1 0x1
#define B1_00_AF_LPUART4 0x2
#define B1_00_AF_SAI1 0x3
#define B1_00_AF_FLEXIO2 0x4
#define B1_00_AF_GPIO 0x5
#define B1_00_AF_FLEXPWM1 0x6
#define B1_00_AF_ENET2_RX_ER 0x8
#define B1_00_AF_FLEXIO3 0x9
#define B1_01_AF_LCD 0x0
#define B1_01_AF_XBAR1 0x1
#define B1_01_AF_LPUART4 0x2
#define B1_01_AF_SAI1 0x3
#define B1_01_AF_FLEXIO2 0x4
#define B1_01_AF_GPIO 0x5
#define B1_01_AF_FLEXPWM1 0x6
#define B1_01_AF_ENET2_RDATA00 0x8
#define B1_01_AF_FLEXIO3 0x9
#define B1_02_AF_LCD 0x0
#define B1_02_AF_XBAR1 0x1
#define B1_02_AF_LPSPI4 0x2
#define B1_02_AF_SAI1 0x3
#define B1_02_AF_FLEXIO2 0x4
#define B1_02_AF_GPIO 0x5
#define B1_02_AF_FLEXPWM2 0x6
#define B1_02_AF_ENET2_RDATA01 0x8
#define B1_02_AF_FLEXIO3 0x9
#define B1_03_AF_LCD 0x0
#define B1_03_AF_XBAR1 0x1
#define B1_03_AF_LPSPI4 0x2
#define B1_03_AF_SAI1 0x3
#define B1_03_AF_FLEXIO2 0x4
#define B1_03_AF_GPIO 0x5
#define B1_03_AF_FLEXPWM2 0x6
#define B1_03_AF_ENET2_RX_EN 0x8
#define B1_03_AF_FLEXIO3 0x9
#define B1_04_AF_LCD 0x0
#define B1_04_AF_LPSPI4 0x1
#define B1_04_AF_CSI 0x2
#define B1_04_AF_ENET_RX_DATA00 0x3
#define B1_04_AF_FLEXIO2 0x4
#define B1_04_AF_GPIO 0x5
#define B1_04_AF_GPT1 0x8
#define B1_04_AF_FLEXIO3 0x9
#define B1_05_AF_LCD 0x0
#define B1_05_AF_LPSPI4 0x1
#define B1_05_AF_CSI 0x2
#define B1_05_AF_ENET_RX_DATA01 0x3
#define B1_05_AF_FLEXIO2 0x4
#define B1_05_AF_GPIO 0x5
#define B1_05_AF_GPT1 0x8
#define B1_05_AF_FLEXIO3 0x9
#define B1_06_AF_LCD 0x0
#define B1_06_AF_LPSPI4 0x1
#define B1_06_AF_CSI 0x2
#define B1_06_AF_ENET_RX_EN 0x3
#define B1_06_AF_FLEXIO2 0x4
#define B1_06_AF_GPIO 0x5
#define B1_06_AF_GPT1 0x8
#define B1_06_AF_FLEXIO3 0x9
#define B1_07_AF_LCD 0x0
#define B1_07_AF_LPSPI4 0x1
#define B1_07_AF_CSI 0x2
#define B1_07_AF_ENET_TX_DATA00 0x3
#define B1_07_AF_FLEXIO2 0x4
#define B1_07_AF_GPIO 0x5
#define B1_07_AF_GPT1 0x8
#define B1_07_AF_FLEXIO3 0x9
#define B1_08_AF_LCD 0x0
#define B1_08_AF_QTIMER1 0x1
#define B1_08_AF_CSI 0x2
#define B1_08_AF_ENET_TX_DATA01 0x3
#define B1_08_AF_FLEXIO2 0x4
#define B1_08_AF_GPIO 0x5
#define B1_08_AF_FLEXCAN2 0x6
#define B1_08_AF_GPT1 0x8
#define B1_08_AF_FLEXIO3 0x9
#define B1_09_AF_LCD 0x0
#define B1_09_AF_QTIMER2 0x1
#define B1_09_AF_CSI 0x2
#define B1_09_AF_ENET_TX_EN 0x3
#define B1_09_AF_FLEXIO2 0x4
#define B1_09_AF_GPIO 0x5
#define B1_09_AF_FLEXCAN2 0x6
#define B1_09_AF_GPT1 0x8
#define B1_09_AF_FLEXIO3 0x9
#define B1_10_AF_LCD 0x0
#define B1_10_AF_QTIMER3 0x1
#define B1_10_AF_CSI 0x2
#define B1_10_AF_ENET_TX_CLK 0x3
#define B1_10_AF_FLEXIO2 0x4
#define B1_10_AF_GPIO 0x5
#define B1_10_AF_ENET_REF_CLK 0x6
#define B1_10_AF_FLEXIO3 0x9
#define B1_11_AF_LCD 0x0
#define B1_11_AF_QTIMER4 0x1
#define B1_11_AF_CSI 0x2
#define B1_11_AF_ENET_RX_ER 0x3
#define B1_11_AF_FLEXIO2 0x4
#define B1_11_AF_GPIO 0x5
#define B1_11_AF_LPSPI4 0x6
#define B1_11_AF_FLEXIO3 0x9
#define B1_12_AF_LPUART5 0x1
#define B1_12_AF_CSI 0x2
#define B1_12_AF_ENET_1588_EVENT0_IN 0x3
#define B1_12_AF_FLEXIO2 0x4
#define B1_12_AF_GPIO 0x5
#define B1_12_AF_USDHC1 0x6
#define B1_12_AF_FLEXIO3 0x9
#define B1_13_AF_WDOG1 0x0
#define B1_13_AF_LPUART5 0x1
#define B1_13_AF_CSI 0x2
#define B1_13_AF_ENET_1588_EVENT0_OUT 0x3
#define B1_13_AF_FLEXIO2 0x4
#define B1_13_AF_GPIO 0x5
#define B1_13_AF_USDHC1 0x6
#define B1_13_AF_SEMC_DQS4 0x8
#define B1_13_AF_FLEXIO3 0x9
#define B1_14_AF_ENET_MDC 0x0
#define B1_14_AF_FLEXPWM4 0x1
#define B1_14_AF_CSI 0x2
#define B1_14_AF_XBAR1 0x3
#define B1_14_AF_FLEXIO2 0x4
#define B1_14_AF_GPIO 0x5
#define B1_14_AF_USDHC1 0x6
#define B1_14_AF_ENET2_TDATA00 0x8
#define B1_14_AF_FLEXIO3 0x9
#define B1_15_AF_ENET_MDIO 0x0
#define B1_15_AF_FLEXPWM4 0x1
#define B1_15_AF_CSI 0x2
#define B1_15_AF_XBAR1 0x3
#define B1_15_AF_FLEXIO2 0x4
#define B1_15_AF_GPIO 0x5
#define B1_15_AF_USDHC1 0x6
#define B1_15_AF_ENET2_TDATA01 0x8
#define B1_15_AF_FLEXIO3 0x9
#define SD_B0_00_AF_USDHC1 0x0
#define SD_B0_00_AF_FLEXPWM1 0x1
#define SD_B0_00_AF_LPI2C3 0x2
#define SD_B0_00_AF_XBAR1 0x3
#define SD_B0_00_AF_LPSPI1 0x4
#define SD_B0_00_AF_GPIO 0x5
#define SD_B0_00_AF_FLEXSPIA 0x6
#define SD_B0_00_AF_ENET2_TX_EN 0x8
#define SD_B0_00_AF_SEMC_DQS4 0x9
#define SD_B0_01_AF_USDHC1 0x0
#define SD_B0_01_AF_FLEXPWM1 0x1
#define SD_B0_01_AF_LPI2C3 0x2
#define SD_B0_01_AF_XBAR1 0x3
#define SD_B0_01_AF_LPSPI1 0x4
#define SD_B0_01_AF_GPIO 0x5
#define SD_B0_01_AF_FLEXSPIB 0x6
#define SD_B0_01_AF_ENET2_TX_CLK 0x8
#define SD_B0_01_AF_ENET2_REF_CLK2 0x9
#define SD_B0_02_AF_USDHC1 0x0
#define SD_B0_02_AF_FLEXPWM1 0x1
#define SD_B0_02_AF_LPUART8 0x2
#define SD_B0_02_AF_XBAR1 0x3
#define SD_B0_02_AF_LPSPI1 0x4
#define SD_B0_02_AF_GPIO 0x5
#define SD_B0_02_AF_ENET2_RX_ER 0x8
#define SD_B0_02_AF_SEMC_CLK5 0x9
#define SD_B0_03_AF_USDHC1 0x0
#define SD_B0_03_AF_FLEXPWM1 0x1
#define SD_B0_03_AF_LPUART8 0x2
#define SD_B0_03_AF_XBAR1 0x3
#define SD_B0_03_AF_LPSPI1 0x4
#define SD_B0_03_AF_GPIO 0x5
#define SD_B0_03_AF_ENET2_RDATA00 0x8
#define SD_B0_03_AF_SEMC_CLK6 0x9
#define SD_B0_04_AF_USDHC1 0x0
#define SD_B0_04_AF_FLEXPWM1 0x1
#define SD_B0_04_AF_LPUART8 0x2
#define SD_B0_04_AF_XBAR1 0x3
#define SD_B0_04_AF_FLEXSPIB 0x4
#define SD_B0_04_AF_GPIO 0x5
#define SD_B0_04_AF_CCM 0x6
#define SD_B0_04_AF_ENET2_RDATA01 0x8
#define SD_B0_05_AF_USDHC1 0x0
#define SD_B0_05_AF_FLEXPWM1 0x1
#define SD_B0_05_AF_LPUART8 0x2
#define SD_B0_05_AF_XBAR1 0x3
#define SD_B0_05_AF_FLEXSPIB 0x4
#define SD_B0_05_AF_GPIO 0x5
#define SD_B0_05_AF_CCM 0x6
#define SD_B0_05_AF_ENET2_RX_EN 0x8
#define SD_B1_00_AF_USDHC2 0x0
#define SD_B1_00_AF_FLEXSPIB 0x1
#define SD_B1_00_AF_FLEXPWM1 0x2
#define SD_B1_00_AF_SAI1 0x3
#define SD_B1_00_AF_LPUART4 0x4
#define SD_B1_00_AF_GPIO 0x5
#define SD_B1_00_AF_SAI3 0x8
#define SD_B1_01_AF_USDHC2 0x0
#define SD_B1_01_AF_FLEXSPIB 0x1
#define SD_B1_01_AF_FLEXPWM1 0x2
#define SD_B1_01_AF_SAI1 0x3
#define SD_B1_01_AF_LPUART4 0x4
#define SD_B1_01_AF_GPIO 0x5
#define SD_B1_01_AF_SAI3 0x8
#define SD_B1_02_AF_USDHC2 0x0
#define SD_B1_02_AF_FLEXSPIB 0x1
#define SD_B1_02_AF_FLEXPWM2 0x2
#define SD_B1_02_AF_SAI1 0x3
#define SD_B1_02_AF_FLEXCAN1 0x4
#define SD_B1_02_AF_GPIO 0x5
#define SD_B1_02_AF_CCM 0x6
#define SD_B1_02_AF_SAI3 0x8
#define SD_B1_03_AF_USDHC2 0x0
#define SD_B1_03_AF_FLEXSPIB 0x1
#define SD_B1_03_AF_FLEXPWM2 0x2
#define SD_B1_03_AF_SAI1 0x3
#define SD_B1_03_AF_FLEXCAN1 0x4
#define SD_B1_03_AF_GPIO 0x5
#define SD_B1_03_AF_CCM 0x6
#define SD_B1_03_AF_SAI3 0x8
#define SD_B1_04_AF_USDHC2 0x0
#define SD_B1_04_AF_FLEXSPIB 0x1
#define SD_B1_04_AF_LPI2C1 0x2
#define SD_B1_04_AF_SAI1 0x3
#define SD_B1_04_AF_FLEXSPIA 0x4
#define SD_B1_04_AF_GPIO 0x5
#define SD_B1_04_AF_CCM 0x6
#define SD_B1_04_AF_SAI3 0x8
#define SD_B1_05_AF_USDHC2 0x0
#define SD_B1_05_AF_FLEXSPIA 0x1
#define SD_B1_05_AF_LPI2C1 0x2
#define SD_B1_05_AF_SAI1 0x3
#define SD_B1_05_AF_FLEXSPIB 0x4
#define SD_B1_05_AF_GPIO 0x5
#define SD_B1_05_AF_SAI3 0x8
#define SD_B1_06_AF_USDHC2 0x0
#define SD_B1_06_AF_FLEXSPIA 0x1
#define SD_B1_06_AF_LPUART7 0x2
#define SD_B1_06_AF_SAI1 0x3
#define SD_B1_06_AF_LPSPI2 0x4
#define SD_B1_06_AF_GPIO 0x5
#define SD_B1_06_AF_SAI3 0x8
#define SD_B1_07_AF_SEMC_CSX01 0x0
#define SD_B1_07_AF_FLEXSPIA 0x1
#define SD_B1_07_AF_LPUART7 0x2
#define SD_B1_07_AF_SAI1 0x3
#define SD_B1_07_AF_LPSPI2 0x4
#define SD_B1_07_AF_GPIO 0x5
#define SD_B1_08_AF_USDHC2 0x0
#define SD_B1_08_AF_FLEXSPIA 0x1
#define SD_B1_08_AF_LPUART7 0x2
#define SD_B1_08_AF_SAI1 0x3
#define SD_B1_08_AF_LPSPI2 0x4
#define SD_B1_08_AF_GPIO 0x5
#define SD_B1_08_AF_SEMC_CSX02 0x6
#define SD_B1_09_AF_USDHC2 0x0
#define SD_B1_09_AF_FLEXSPIA 0x1
#define SD_B1_09_AF_LPUART7 0x2
#define SD_B1_09_AF_SAI1 0x3
#define SD_B1_09_AF_LPSPI2 0x4
#define SD_B1_09_AF_GPIO 0x5
#define SD_B1_10_AF_USDHC2 0x0
#define SD_B1_10_AF_FLEXSPIA 0x1
#define SD_B1_10_AF_LPUART2 0x2
#define SD_B1_10_AF_LPI2C2 0x3
#define SD_B1_10_AF_LPSPI2 0x4
#define SD_B1_10_AF_GPIO 0x5
#define SD_B1_11_AF_USDHC2 0x0
#define SD_B1_11_AF_FLEXSPIA 0x1
#define SD_B1_11_AF_LPUART2 0x2
#define SD_B1_11_AF_LPI2C2 0x3
#define SD_B1_11_AF_LPSPI2 0x4
#define SD_B1_11_AF_GPIO 0x5
#define SPI_B0_00_AF_GPIO 0x5
#define SPI_B0_01_AF_FLEXSPI2 0x0
#define SPI_B0_01_AF_GPIO 0x5
#define SPI_B0_02_AF_FLEXSPI2 0x0
#define SPI_B0_02_AF_GPIO 0x5
#define SPI_B0_03_AF_FLEXSPI2 0x0
#define SPI_B0_03_AF_GPIO 0x5
#define SPI_B0_04_AF_FLEXSPI2 0x0
#define SPI_B0_04_AF_GPIO 0x5
#define SPI_B0_05_AF_FLEXSPI2 0x0
#define SPI_B0_05_AF_GPIO 0x5
#define SPI_B0_06_AF_FLEXSPI2 0x0
#define SPI_B0_06_AF_GPIO 0x5
#define SPI_B0_07_AF_FLEXSPI2 0x0
#define SPI_B0_07_AF_GPIO 0x5
#define SPI_B0_08_AF_FLEXSPI2 0x0
#define SPI_B0_08_AF_GPIO 0x5
#define SPI_B0_09_AF_FLEXSPI2 0x0
#define SPI_B0_09_AF_GPIO 0x5
#define SPI_B0_10_AF_FLEXSPI2 0x0
#define SPI_B0_10_AF_GPIO 0x5
#define SPI_B0_11_AF_FLEXSPI2 0x0
#define SPI_B0_11_AF_GPIO 0x5
#define SPI_B0_12_AF_FLEXSPI2 0x0
#define SPI_B0_12_AF_GPIO 0x5
#define SPI_B0_13_AF_GPIO 0x5
#define SPI_B1_00_AF_FLEXSPI2 0x0
#define SPI_B1_00_AF_GPIO 0x5
#define SPI_B1_01_AF_FLEXSPI2 0x0
#define SPI_B1_01_AF_GPIO 0x5
#define SPI_B1_02_AF_FLEXSPI2 0x0
#define SPI_B1_02_AF_GPIO 0x5
#define SPI_B1_03_AF_FLEXSPI2 0x0
#define SPI_B1_03_AF_GPIO 0x5
#define SPI_B1_04_AF_FLEXSPI2 0x0
#define SPI_B1_04_AF_GPIO 0x5
#define SPI_B1_05_AF_FLEXSPI2 0x0
#define SPI_B1_05_AF_GPIO 0x5
#define SPI_B1_06_AF_FLEXSPI2 0x0
#define SPI_B1_06_AF_GPIO 0x5
#define SPI_B1_07_AF_GPIO 0x5
#define WAKEUP_AF_GPIO 0x5
#define WAKEUP_AF_NMI 0x7
#define PMIC_ON_REQ_AF_SNVS 0x0
#define PMIC_ON_REQ_AF_GPIO 0x5
#define PMIC_STBY_REQ_AF_CCM 0x0
#define PMIC_STBY_REQ_AF_GPIO 0x5
extern const imxrt_pad_t imxrt_pad_EMC_00;
extern const imxrt_pad_t imxrt_pad_EMC_01;
extern const imxrt_pad_t imxrt_pad_EMC_02;
extern const imxrt_pad_t imxrt_pad_EMC_03;
extern const imxrt_pad_t imxrt_pad_EMC_04;
extern const imxrt_pad_t imxrt_pad_EMC_05;
extern const imxrt_pad_t imxrt_pad_EMC_06;
extern const imxrt_pad_t imxrt_pad_EMC_07;
extern const imxrt_pad_t imxrt_pad_EMC_08;
extern const imxrt_pad_t imxrt_pad_EMC_09;
extern const imxrt_pad_t imxrt_pad_EMC_10;
extern const imxrt_pad_t imxrt_pad_EMC_11;
extern const imxrt_pad_t imxrt_pad_EMC_12;
extern const imxrt_pad_t imxrt_pad_EMC_13;
extern const imxrt_pad_t imxrt_pad_EMC_14;
extern const imxrt_pad_t imxrt_pad_EMC_15;
extern const imxrt_pad_t imxrt_pad_EMC_16;
extern const imxrt_pad_t imxrt_pad_EMC_17;
extern const imxrt_pad_t imxrt_pad_EMC_18;
extern const imxrt_pad_t imxrt_pad_EMC_19;
extern const imxrt_pad_t imxrt_pad_EMC_20;
extern const imxrt_pad_t imxrt_pad_EMC_21;
extern const imxrt_pad_t imxrt_pad_EMC_22;
extern const imxrt_pad_t imxrt_pad_EMC_23;
extern const imxrt_pad_t imxrt_pad_EMC_24;
extern const imxrt_pad_t imxrt_pad_EMC_25;
extern const imxrt_pad_t imxrt_pad_EMC_26;
extern const imxrt_pad_t imxrt_pad_EMC_27;
extern const imxrt_pad_t imxrt_pad_EMC_28;
extern const imxrt_pad_t imxrt_pad_EMC_29;
extern const imxrt_pad_t imxrt_pad_EMC_30;
extern const imxrt_pad_t imxrt_pad_EMC_31;
extern const imxrt_pad_t imxrt_pad_EMC_32;
extern const imxrt_pad_t imxrt_pad_EMC_33;
extern const imxrt_pad_t imxrt_pad_EMC_34;
extern const imxrt_pad_t imxrt_pad_EMC_35;
extern const imxrt_pad_t imxrt_pad_EMC_36;
extern const imxrt_pad_t imxrt_pad_EMC_37;
extern const imxrt_pad_t imxrt_pad_EMC_38;
extern const imxrt_pad_t imxrt_pad_EMC_39;
extern const imxrt_pad_t imxrt_pad_EMC_40;
extern const imxrt_pad_t imxrt_pad_EMC_41;
extern const imxrt_pad_t imxrt_pad_AD_B0_00;
extern const imxrt_pad_t imxrt_pad_AD_B0_01;
extern const imxrt_pad_t imxrt_pad_AD_B0_02;
extern const imxrt_pad_t imxrt_pad_AD_B0_03;
extern const imxrt_pad_t imxrt_pad_AD_B0_04;
extern const imxrt_pad_t imxrt_pad_AD_B0_05;
extern const imxrt_pad_t imxrt_pad_AD_B0_06;
extern const imxrt_pad_t imxrt_pad_AD_B0_07;
extern const imxrt_pad_t imxrt_pad_AD_B0_08;
extern const imxrt_pad_t imxrt_pad_AD_B0_09;
extern const imxrt_pad_t imxrt_pad_AD_B0_10;
extern const imxrt_pad_t imxrt_pad_AD_B0_11;
extern const imxrt_pad_t imxrt_pad_AD_B0_12;
extern const imxrt_pad_t imxrt_pad_AD_B0_13;
extern const imxrt_pad_t imxrt_pad_AD_B0_14;
extern const imxrt_pad_t imxrt_pad_AD_B0_15;
extern const imxrt_pad_t imxrt_pad_AD_B1_00;
extern const imxrt_pad_t imxrt_pad_AD_B1_01;
extern const imxrt_pad_t imxrt_pad_AD_B1_02;
extern const imxrt_pad_t imxrt_pad_AD_B1_03;
extern const imxrt_pad_t imxrt_pad_AD_B1_04;
extern const imxrt_pad_t imxrt_pad_AD_B1_05;
extern const imxrt_pad_t imxrt_pad_AD_B1_06;
extern const imxrt_pad_t imxrt_pad_AD_B1_07;
extern const imxrt_pad_t imxrt_pad_AD_B1_08;
extern const imxrt_pad_t imxrt_pad_AD_B1_09;
extern const imxrt_pad_t imxrt_pad_AD_B1_10;
extern const imxrt_pad_t imxrt_pad_AD_B1_11;
extern const imxrt_pad_t imxrt_pad_AD_B1_12;
extern const imxrt_pad_t imxrt_pad_AD_B1_13;
extern const imxrt_pad_t imxrt_pad_AD_B1_14;
extern const imxrt_pad_t imxrt_pad_AD_B1_15;
extern const imxrt_pad_t imxrt_pad_B0_00;
extern const imxrt_pad_t imxrt_pad_B0_01;
extern const imxrt_pad_t imxrt_pad_B0_02;
extern const imxrt_pad_t imxrt_pad_B0_03;
extern const imxrt_pad_t imxrt_pad_B0_04;
extern const imxrt_pad_t imxrt_pad_B0_05;
extern const imxrt_pad_t imxrt_pad_B0_06;
extern const imxrt_pad_t imxrt_pad_B0_07;
extern const imxrt_pad_t imxrt_pad_B0_08;
extern const imxrt_pad_t imxrt_pad_B0_09;
extern const imxrt_pad_t imxrt_pad_B0_10;
extern const imxrt_pad_t imxrt_pad_B0_11;
extern const imxrt_pad_t imxrt_pad_B0_12;
extern const imxrt_pad_t imxrt_pad_B0_13;
extern const imxrt_pad_t imxrt_pad_B0_14;
extern const imxrt_pad_t imxrt_pad_B0_15;
extern const imxrt_pad_t imxrt_pad_B1_00;
extern const imxrt_pad_t imxrt_pad_B1_01;
extern const imxrt_pad_t imxrt_pad_B1_02;
extern const imxrt_pad_t imxrt_pad_B1_03;
extern const imxrt_pad_t imxrt_pad_B1_04;
extern const imxrt_pad_t imxrt_pad_B1_05;
extern const imxrt_pad_t imxrt_pad_B1_06;
extern const imxrt_pad_t imxrt_pad_B1_07;
extern const imxrt_pad_t imxrt_pad_B1_08;
extern const imxrt_pad_t imxrt_pad_B1_09;
extern const imxrt_pad_t imxrt_pad_B1_10;
extern const imxrt_pad_t imxrt_pad_B1_11;
extern const imxrt_pad_t imxrt_pad_B1_12;
extern const imxrt_pad_t imxrt_pad_B1_13;
extern const imxrt_pad_t imxrt_pad_B1_14;
extern const imxrt_pad_t imxrt_pad_B1_15;
extern const imxrt_pad_t imxrt_pad_SD_B0_00;
extern const imxrt_pad_t imxrt_pad_SD_B0_01;
extern const imxrt_pad_t imxrt_pad_SD_B0_02;
extern const imxrt_pad_t imxrt_pad_SD_B0_03;
extern const imxrt_pad_t imxrt_pad_SD_B0_04;
extern const imxrt_pad_t imxrt_pad_SD_B0_05;
extern const imxrt_pad_t imxrt_pad_SD_B1_00;
extern const imxrt_pad_t imxrt_pad_SD_B1_01;
extern const imxrt_pad_t imxrt_pad_SD_B1_02;
extern const imxrt_pad_t imxrt_pad_SD_B1_03;
extern const imxrt_pad_t imxrt_pad_SD_B1_04;
extern const imxrt_pad_t imxrt_pad_SD_B1_05;
extern const imxrt_pad_t imxrt_pad_SD_B1_06;
extern const imxrt_pad_t imxrt_pad_SD_B1_07;
extern const imxrt_pad_t imxrt_pad_SD_B1_08;
extern const imxrt_pad_t imxrt_pad_SD_B1_09;
extern const imxrt_pad_t imxrt_pad_SD_B1_10;
extern const imxrt_pad_t imxrt_pad_SD_B1_11;
extern const imxrt_pad_t imxrt_pad_SPI_B0_00;
extern const imxrt_pad_t imxrt_pad_SPI_B0_01;
extern const imxrt_pad_t imxrt_pad_SPI_B0_02;
extern const imxrt_pad_t imxrt_pad_SPI_B0_03;
extern const imxrt_pad_t imxrt_pad_SPI_B0_04;
extern const imxrt_pad_t imxrt_pad_SPI_B0_05;
extern const imxrt_pad_t imxrt_pad_SPI_B0_06;
extern const imxrt_pad_t imxrt_pad_SPI_B0_07;
extern const imxrt_pad_t imxrt_pad_SPI_B0_08;
extern const imxrt_pad_t imxrt_pad_SPI_B0_09;
extern const imxrt_pad_t imxrt_pad_SPI_B0_10;
extern const imxrt_pad_t imxrt_pad_SPI_B0_11;
extern const imxrt_pad_t imxrt_pad_SPI_B0_12;
extern const imxrt_pad_t imxrt_pad_SPI_B0_13;
extern const imxrt_pad_t imxrt_pad_SPI_B1_00;
extern const imxrt_pad_t imxrt_pad_SPI_B1_01;
extern const imxrt_pad_t imxrt_pad_SPI_B1_02;
extern const imxrt_pad_t imxrt_pad_SPI_B1_03;
extern const imxrt_pad_t imxrt_pad_SPI_B1_04;
extern const imxrt_pad_t imxrt_pad_SPI_B1_05;
extern const imxrt_pad_t imxrt_pad_SPI_B1_06;
extern const imxrt_pad_t imxrt_pad_SPI_B1_07;
extern const imxrt_pad_t imxrt_pad_WAKEUP;
extern const imxrt_pad_t imxrt_pad_PMIC_ON_REQ;
extern const imxrt_pad_t imxrt_pad_PMIC_STBY_REQ;
#endif // __IMXRT_PADS_H__