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87 lines
3.6 KiB
C
87 lines
3.6 KiB
C
/* Copyright (C) 2023 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* contact@alifsemi.com, or visit: https://alifsemi.com/license
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*
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*/
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/**************************************************************************//**
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* @file Driver_DSI_Private.h
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* @author Prasanna Ravi
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* @email prasanna.ravi@alifsemi.com
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* @version V1.0.0
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* @date 17-April-2023
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* @brief DSI driver Specific Header file.
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******************************************************************************/
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#ifndef DRIVER_DSI_PRIVATE_H_
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#define DRIVER_DSI_PRIVATE_H_
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#include "RTE_Components.h"
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#include CMSIS_device_header
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#include "Driver_MIPI_DSI.h"
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#include "dsi.h"
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#include "cdc.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/*Helper macro*/
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#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
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/** \brief DSI DPHY high speed transition timings */
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typedef struct _DSI_DPHY_HS_TRANSITION_TIMINGS_RANGE {
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uint16_t bitrate_mbps; /**< DPHY data rate in mbps */
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uint16_t clklp2hs_time; /**< DPHY clock lane LP to HS transition time */
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uint16_t clkhs2lp_time; /**< DPHY clock lane HS to LP transition time */
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uint16_t lp2hs_time; /**< DPHY data lane LP to HS transition time */
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uint16_t hs2lp_time; /**< DPHY data lane HS to LP transition time */
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} DSI_DPHY_HS_TRANSITION_TIMINGS_RANGE;
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/** \brief DSI Driver states. */
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typedef volatile struct _DSI_DRIVER_STATE {
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uint32_t initialized : 1; /**< Driver Initialized */
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uint32_t powered : 1; /**< Driver powered */
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uint32_t host_configured : 1; /**< Driver host configured */
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uint32_t dpi_configured : 1; /**< Driver DPI configured */
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uint32_t panel_initialized : 1; /**< Driver panel initialized */
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uint32_t reserved : 27; /**< Reserved */
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} DSI_DRIVER_STATE;
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/** \brief DSI DPI Info */
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typedef struct _DSI_DPI_INFO{
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DSI_VIDEO_MODE vid_mode; /**< video mode */
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uint32_t vid_pkt_size; /**< video packet size */
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uint32_t vid_num_chunks; /**< video number of chunks */
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uint32_t vid_null_size; /**< video null packet size */
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}DSI_DPI_INFO;
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/**
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\brief MIPI DSI driver info
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*/
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typedef struct _DSI_RESOURCES{
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DSI_Type *reg_base; /**< Pointer to regs */
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ARM_MIPI_DSI_SignalEvent_t cb_event; /**< Pointer to call back function */
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uint32_t frequency; /**< DSI PHY Frequency */
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uint32_t tx_ecs_clk_div; /**< Tx escape clock divider value */
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uint32_t horizontal_timing; /**< Total horizontal timing */
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uint32_t vertical_timing; /**< Total vertical timing */
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DSI_DPI_INFO *dpi_info; /**< Pointer to DPI info */
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IRQn_Type irq; /**< Interrupt number */
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uint32_t irq_priority; /**< Interrupt priority */
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DSI_DRIVER_STATE state; /**< DSI driver status */
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}DSI_RESOURCES;
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#ifdef __cplusplus
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}
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#endif
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#endif /* DRIVER_DSI_PRIVATE_H_ */
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