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106 lines
4.0 KiB
C
106 lines
4.0 KiB
C
/* Copyright (C) 2023 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* contact@alifsemi.com, or visit: https://alifsemi.com/license
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*
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*/
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/******************************************************************************
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* @file Driver_OSPI_Private.h
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* @author Silesh C V
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* @email silesh@alifsemi.com
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* @version V1.0.0
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* @date 19-06-2023
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* @brief Private header file for OSPI.
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******************************************************************************/
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#ifndef DRIVER_OSPI_PRIVATE_H
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#define DRIVER_OSPI_PRIVATE_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include "RTE_Device.h"
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#include "RTE_Components.h"
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#include CMSIS_device_header
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#include "Driver_OSPI.h"
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#include "ospi.h"
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#include "clk.h"
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#include "sys_ctrl_aes.h"
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#if (RTE_OSPI0_DMA_ENABLE || RTE_OSPI1_DMA_ENABLE)
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#define OSPI_DMA_ENABLE 1
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#else
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#define OSPI_DMA_ENABLE 0
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#endif
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#if OSPI_DMA_ENABLE
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#include <DMA_Common.h>
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#endif
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typedef enum _OSPI_INSTANCE
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{
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OSPI_INSTANCE_0, /* SPI instance - 0 */
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OSPI_INSTANCE_1, /* SPI instance - 1 */
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} OSPI_INSTANCE;
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typedef volatile struct _OSPI_DRIVER_STATE {
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uint32_t initialized: 1; /* SPI driver initialized status */
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uint32_t powered : 1; /* SPI driver powered status */
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uint32_t reserved : 30; /* Reserved */
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} OSPI_DRIVER_STATE;
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#if OSPI_DMA_ENABLE
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typedef struct _OSPI_DMA_HW_CONFIG {
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DMA_PERIPHERAL_CONFIG dma_tx; /* DMA Tx config */
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DMA_PERIPHERAL_CONFIG dma_rx; /* DMA Rx config */
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} OSPI_DMA_HW_CONFIG;
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#endif
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typedef struct _OSPI_RESOURCES
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{
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OSPI_Type *regs; /* Pointer to OSPI memory map */
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AES_Type *aes_regs; /* Pointer to AES memory map */
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IRQn_Type irq; /* IRQ number */
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OSPI_INSTANCE drv_instance; /* Driver instance */
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ARM_OSPI_SignalEvent_t cb_event; /* Pointer to call back function */
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ARM_OSPI_STATUS status; /* OSPI driver status */
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OSPI_DRIVER_STATE state; /* OSPI driver state */
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uint32_t irq_priority; /* Interrupt priority */
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uint32_t rx_total_cnt; /* Total count to receive */
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ospi_transfer_t transfer; /* Transfer structure for the instance */
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SPI_TMOD mode; /* Transfer mode */
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#if OSPI_DMA_ENABLE
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ARM_DMA_SignalEvent_t dma_cb; /* Pointer to DMA callback function */
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OSPI_DMA_HW_CONFIG *dma_config; /* OSPI DMA configuration */
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const bool dma_enable; /* Enable DMA for the instance */
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const uint32_t dma_irq_priority; /* DMA irq priority */
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uint16_t rx_dma_data_level; /* Rx DMA data level */
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uint16_t tx_dma_data_level; /* Tx DMA data level */
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#endif
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uint16_t rx_fifo_threshold; /* Rx fifo threshold */
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uint16_t tx_fifo_threshold; /* Tx fifo threshold */
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uint16_t tx_fifo_start_level; /* Tx fifo level to start communication */
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uint8_t ddr_drive_edge; /* Drive edge for transmit data */
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uint8_t rx_sample_delay; /* Receive data sample delay */
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uint8_t rxds_delay; /* RXDS delay */
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uint8_t chip_selection_pin; /* chip selection pin from 0-3 */
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} OSPI_RESOURCES;
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static inline uint32_t getOSPICoreClock(void)
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{
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return GetSystemAXIClock();
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* DRIVER_OSPI_PRIVATE_H */
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