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https://github.com/openmv/openmv.git
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176 lines
6.9 KiB
C
176 lines
6.9 KiB
C
/* Copyright (C) 2023 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* contact@alifsemi.com, or visit: https://alifsemi.com/license
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*
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*/
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#ifndef DRIVER_USART_PRIVATE_H
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#define DRIVER_USART_PRIVATE_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include "RTE_Device.h"
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#include "RTE_Components.h"
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#include CMSIS_device_header
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#include "Driver_USART.h"
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#include "uart.h"
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/* As per PINMUX,
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* UART0-UART3 instances has RS232 with RTS/CTS functionality and
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* UART4-UART7 instances has RS232 without RTS/CTS and RS485 functionality.
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*/
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/* Check if RS485 functionality is enable? */
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#if ( (RTE_UART4_RS485_ENABLE) || (RTE_UART5_RS485_ENABLE) || (RTE_UART6_RS485_ENABLE) || (RTE_UART7_RS485_ENABLE) )
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#ifndef RS485_SUPPORT
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#define RS485_SUPPORT (1) /* Enable(1): RS485 Support */
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#endif
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#else
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#ifndef RS485_SUPPORT
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#define RS485_SUPPORT (0) /* Disable(0): RS485 Support */
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#endif
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#endif
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/* Check if DMA Support is enable? */
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#if (RTE_UART0_DMA_ENABLE || RTE_UART1_DMA_ENABLE || RTE_UART2_DMA_ENABLE || \
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RTE_UART3_DMA_ENABLE || RTE_UART4_DMA_ENABLE || RTE_UART5_DMA_ENABLE || \
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RTE_UART6_DMA_ENABLE || RTE_UART7_DMA_ENABLE || RTE_LPUART_DMA_ENABLE)
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#define UART_DMA_ENABLE 1
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#else
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#define UART_DMA_ENABLE 0
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#endif
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#if UART_DMA_ENABLE
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#include <DMA_Common.h>
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#endif
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/* Check if Blocking(Polling) mode support is enable? */
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#if (RTE_UART0_BLOCKING_MODE_ENABLE || RTE_UART1_BLOCKING_MODE_ENABLE || RTE_UART2_BLOCKING_MODE_ENABLE || \
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RTE_UART3_BLOCKING_MODE_ENABLE || RTE_UART4_BLOCKING_MODE_ENABLE || RTE_UART5_BLOCKING_MODE_ENABLE || \
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RTE_UART6_BLOCKING_MODE_ENABLE || RTE_UART7_BLOCKING_MODE_ENABLE || RTE_LPUART_BLOCKING_MODE_ENABLE)
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#define UART_BLOCKING_MODE_ENABLE 1
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#else
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#define UART_BLOCKING_MODE_ENABLE 0
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#endif
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/**
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* enum UART_INSTANCE
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* UART instances
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*/
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typedef enum
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{
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UART_INSTANCE_0, /**< UART instance - 0 */
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UART_INSTANCE_1, /**< UART instance - 1 */
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UART_INSTANCE_2, /**< UART instance - 2 */
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UART_INSTANCE_3, /**< UART instance - 3 */
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UART_INSTANCE_4, /**< UART instance - 4 */
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UART_INSTANCE_5, /**< UART instance - 5 */
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UART_INSTANCE_6, /**< UART instance - 6 */
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UART_INSTANCE_7, /**< UART instance - 7 */
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UART_INSTANCE_LP /**< UART instance - LP */
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} UART_INSTANCE;
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/* UART Status */
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typedef enum
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{
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UART_STATUS_FREE = 0, /* UART Status Free. */
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UART_STATUS_BUSY = 1 /* UART Status Busy. */
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}UART_STATUS;
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/* UART Clock Source */
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typedef enum _UART_CLK_SOURCE
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{
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UART_CLK_SOURCE_HFOSC_CLK = 0, /* UART Clock Source HFOSC_CLK */
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UART_CLK_SOURCE_SYST_PCLK = 1, /* UART Clock Source SYST_PCLK */
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} UART_CLK_SOURCE;
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/** \brief UART Driver states. */
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typedef volatile struct _UART_DRIVER_STATE
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{
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uint32_t initialized : 1; /* Driver initialized */
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uint32_t powered : 1; /* Driver powered */
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uint32_t tx_enabled : 1; /* Driver tx enabled */
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uint32_t rx_enabled : 1; /* Driver rx enabled */
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uint32_t rs485_enabled : 1; /* Driver rs485 enabled */
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uint32_t reserved : 27;/* Reserved */
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} UART_DRIVER_STATE;
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#if RS485_SUPPORT
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/* UART Configuration definitions for RS485. */
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/* @brief Structure to save contexts for a UART RS485 configurations */
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typedef struct _UART_RS485_CONFIG
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{
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uint8_t rs485_control; /* uart RS485 Control, 0-Disable, 1-Enable */
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UART_RS485_TRANSFER_MODE rs485_transfer_mode; /* uart RS485 transfer mode. */
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uint8_t rs485_de_assertion_time_8bit; /* uart RS485 Driver Enable DE Assertion Time (8-bit). */
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uint8_t rs485_de_deassertion_time_8bit; /* uart RS485 Driver Enable DE De-Assertion Time (8-bit). */
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uint16_t rs485_de_to_re_turn_around_time_16bit; /* uart RS485 Turn Around Time TAT for Driver Enable DE to Receive Enable RE (16-bit). */
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uint16_t rs485_re_to_de_turn_around_time_16bit; /* uart RS485 Turn Around Time TAT for Receive Enable RE to Driver Enable DE (16-bit). */
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} UART_RS485_CONFIG;
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#endif /* END RS485_SUPPORT */
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#if UART_DMA_ENABLE
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typedef struct _UART_DMA_HW_CONFIG
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{
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DMA_PERIPHERAL_CONFIG dma_tx; /* DMA Tx interface */
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DMA_PERIPHERAL_CONFIG dma_rx; /* DMA Rx interface */
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} UART_DMA_HW_CONFIG;
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#endif
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/* UART Resources definitions */
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/* @brief Structure to save contexts for a UART */
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typedef struct _UART_RESOURCES
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{
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UART_Type *regs; /* Pointer to UART regs */
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ARM_USART_SignalEvent_t cb_event; /* Pointer to call back function */
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#if UART_DMA_ENABLE
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ARM_DMA_SignalEvent_t dmatx_cb; /* Pointer to DMA Tx Callback */
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ARM_DMA_SignalEvent_t dmarx_cb; /* Pointer to DMA Rx Callback */
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#endif
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UART_TRANSFER transfer; /* UART Transfer information */
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ARM_USART_STATUS status; /* UART driver status */
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UART_DRIVER_STATE state; /* UART driver state */
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uint32_t baudrate; /* UART Baudrate */
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uint32_t clk; /* UART system clock */
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UART_CLK_SOURCE clk_source; /* UART clock source */
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UART_TX_TRIGGER tx_fifo_trg_lvl; /* UART Tx FIFO Trigger Level */
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UART_RX_TRIGGER rx_fifo_trg_lvl; /* UART Rx FIFO Trigger Level */
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IRQn_Type irq_num; /* UART interrupt vector number */
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uint32_t irq_priority; /* UART interrupt priority */
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uint8_t instance; /* UART instance */
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#if UART_DMA_ENABLE
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const bool dma_enable; /* UART dma enable */
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const uint32_t dma_irq_priority; /* DMA IRQ priority number */
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UART_DMA_HW_CONFIG *dma_cfg; /* DMA Controller configuration */
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#endif
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#if UART_BLOCKING_MODE_ENABLE
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const bool blocking_mode; /* UART instance blocking mode transfer enable */
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#endif
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#if RS485_SUPPORT
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UART_RS485_CONFIG rs485_cfg; /* UART rs485 configuration. */
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#endif
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} UART_RESOURCES;
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#ifdef __cplusplus
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}
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#endif
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#endif /* DRIVER_USART_PRIVATE_H */
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