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309 lines
13 KiB
C
309 lines
13 KiB
C
/*
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* Copyright (C) 2023-2024 OpenMV, LLC.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Any redistribution, use, or modification in source or binary form
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* is done solely for personal benefit and not for any commercial
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* purpose or for monetary gain. For commercial licensing options,
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* please contact openmv@openmv.io
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*
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* THIS SOFTWARE IS PROVIDED BY THE LICENSOR AND COPYRIGHT OWNER "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE LICENSOR OR COPYRIGHT
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* OWNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Board configuration and pin definitions.
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*/
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#ifndef __OMV_BOARDCONFIG_H__
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#define __OMV_BOARDCONFIG_H__
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// Architecture info
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#define OMV_BOARD_ARCH "OPENMV AE3" // 33 chars max
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#define OMV_BOARD_TYPE "AE3"
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#ifndef LINKER_SCRIPT
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void se_services_reset_soc(void);
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extern unsigned char OMV_BOARD_UID_ADDR[12]; // Unique address.
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#endif
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#define OMV_BOARD_UID_SIZE 3 // Unique ID size in words.
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#define OMV_BOARD_UID_OFFSET 4 // Bytes offset for multi-word UIDs.
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#define OMV_BOARD_RESET se_services_reset_soc
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// GPU configuration
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#define OMV_GPU_ENABLE (CORE_M55_HP)
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// JPEG configuration.
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#define OMV_JPEG_CODEC_ENABLE (0)
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#define OMV_JPEG_QUALITY_LOW (50)
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#define OMV_JPEG_QUALITY_HIGH (68)
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#define OMV_JPEG_QUALITY_THRESHOLD (320 * 240 * 2)
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// Enable RAW preview.
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#define OMV_RAW_PREVIEW_ENABLE (1)
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#define OMV_RAW_PREVIEW_WIDTH (512)
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#define OMV_RAW_PREVIEW_HEIGHT (320)
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// CSI drivers configuration.
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#define OMV_PAG7936_ENABLE (CORE_M55_HP)
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// FIR drivers configuration.
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#define OMV_FIR_MLX90621_ENABLE (0)
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#define OMV_FIR_MLX90640_ENABLE (0)
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#define OMV_FIR_MLX90641_ENABLE (0)
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#define OMV_FIR_AMG8833_ENABLE (1)
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// UMM heap block size
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#define OMV_UMM_BLOCK_SIZE 256
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// USB config.
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#define OMV_USB_IRQN (USB_IRQ_IRQn)
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#define OMV_USB1_IRQ_HANDLER (USB_IRQHandler)
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#define OMV_USB_SWITCH_PIN (&omv_pin_USB_SWITCH)
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// OpenMV protocol configuration.
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#define OMV_PROTOCOL_MAX_BUFFER_SIZE (8192)
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#define OMV_PROTOCOL_HW_CAPS OMV_PROTOCOL_HW_CAPS_MAKE( \
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HAS_GPU, HAS_NPU, HAS_JPEG, HAS_CRC, HAS_PMU, HAS_WIFI, \
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HAS_BT, HAS_SD, HAS_ETH, HAS_USB_HS, HAS_MULTICORE)
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// Linker script constants (see the linker script template alif.ld.S).
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// Note: fb_alloc is a stack-based, dynamically allocated memory on FB.
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// The maximum available fb_alloc memory = FB_ALLOC_SIZE + FB_SIZE - (w*h*bpp).
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#if BOOTLOADER
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// Bootloader config
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#define OMV_MAIN_MEMORY DTCM // data, bss and heap memory
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#define OMV_HEAP_MEMORY DTCM // heap memory
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#define OMV_HEAP_SIZE (256K)
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#define OMV_STACK_MEMORY ITCM // stack memory
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#define OMV_STACK_SIZE (256K)
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#elif CORE_M55_HP
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// HP core config
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#define OMV_MAIN_MEMORY DTCM // data, bss
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#define OMV_HEAP_MEMORY DTCM // libc/sbrk heap memory
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#define OMV_HEAP_SIZE (128K)
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#define OMV_BSS_SRAM_MEMORY SRAM1 // BSS memory outside DTCM.
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#define OMV_STACK_MEMORY ITCM // stack memory
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#define OMV_STACK_SIZE (256K)
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#define OMV_FB_MEMORY SRAM1 // Main Frame buffer, fb_alloc
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#define OMV_FB_SIZE (2048K)
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#define OMV_FB_ALLOC_SIZE (464K) // Minimum fb alloc size
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#define OMV_FB_OVERLAY_MEMORY DTCM // Fast fb_alloc memory.
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#define OMV_FB_OVERLAY_SIZE (256K) // Fast fb_alloc memory size.
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#define OMV_SB_MEMORY SRAM6_A // Streaming buffer memory.
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#define OMV_SB_SIZE (1M) // Streaming buffer size.
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#define OMV_DMA_MEMORY DTCM // Misc DMA buffers memory.
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#define OMV_GPU_MEMORY SRAM9_B // GPU heap.
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#define OMV_GPU_SIZE (256K)
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#define OMV_OPENAMP_MEMORY SRAM9_A // Open-AMP SHM.
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#define OMV_OPENAMP_SIZE (64K)
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#define OMV_GC_BLOCK0_MEMORY SRAM0 // Extra GC block 1
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#define OMV_GC_BLOCK0_SIZE (4M)
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#else
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// HE core config
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#define OMV_MAIN_MEMORY DTCM // data, bss
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#define OMV_HEAP_MEMORY DTCM // libc/sbrk heap memory
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#define OMV_HEAP_SIZE (64K)
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#define OMV_BSS_SRAM_MEMORY SRAM6_B // BSS memory outside DTCM.
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#define OMV_STACK_MEMORY ITCM // stack memory
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#define OMV_STACK_SIZE (256K)
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#define OMV_FB_MEMORY SRAM6_B // Main Frame buffer, fb_alloc
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#define OMV_FB_SIZE (256K)
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#define OMV_FB_ALLOC_SIZE (256K) // Minimum fb alloc size
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#define OMV_SB_MEMORY SRAM6_B // JPEG buffer.
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#define OMV_SB_SIZE (500K)
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#define OMV_DMA_MEMORY DTCM // Misc DMA buffers memory.
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#define OMV_OPENAMP_MEMORY SRAM9_A // Open-AMP SHM
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#define OMV_OPENAMP_SIZE (64K)
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#define OMV_GC_BLOCK0_MEMORY SRAM8 // Main GC block
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#define OMV_GC_BLOCK0_SIZE (2M)
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#endif
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// Flash configuration.
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#if BOOTLOADER
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#define OMV_FLASH_ORIGIN 0x80000000
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#define OMV_FLASH_LENGTH 0x00020000 /* 128K */
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#elif CORE_M55_HP
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#define OMV_FLASH_ORIGIN 0x80020000
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#define OMV_FLASH_LENGTH 0x00300000 /* 3MB */
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#define OMV_ROMFS_PART0_ORIGIN 0xa0800000
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#define OMV_ROMFS_PART0_LENGTH 0x01800000
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#define OMV_ROMFS_PART1_ORIGIN 0x8047E000
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#define OMV_ROMFS_PART1_LENGTH 0x00100000
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#elif CORE_M55_HE
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#define OMV_FLASH_ORIGIN 0x80320000
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#define OMV_FLASH_LENGTH 0x0015E000 /* 1.4MB */
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#define OMV_ROMFS_PART0_ORIGIN 0x8047E000
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#define OMV_ROMFS_PART0_LENGTH 0x00100000
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#else
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#error "MCU core is not specified"
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#endif
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// Memory configuration.
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// Note SRAM2, SRAM3, SRAM4, SRAM5 are TCMs. Each M55 core sees its own ITCM
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// memory mapped at 0x00000000, and its DTCM mapped at 0x20000000.
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// Since the TCM is accessible through the global address map it is possible
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// to configure peripherals and DMAs to read/write data to/from the TCM.
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#define OMV_DTCM_ORIGIN 0x20000000
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#define OMV_ITCM_ORIGIN 0x00000000
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#if CORE_M55_HP
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#define OMV_DTCM_LENGTH 1024K
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#define OMV_ITCM_LENGTH 256K
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#else
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#define OMV_DTCM_LENGTH 256K
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#define OMV_ITCM_LENGTH 256K
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#endif
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#define OMV_SRAM0_ORIGIN 0x02000000
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#define OMV_SRAM0_LENGTH 4096K
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#define OMV_SRAM1_ORIGIN 0x08000000
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#define OMV_SRAM1_LENGTH 2560K
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// #define SRAM2_ORIGIN 0x50000000
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// #define SRAM2_LENGTH 0x00040000 /* 256K */
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// #define SRAM3_ORIGIN 0x50800000
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// #define SRAM3_LENGTH 0x00100000 /* 1M */
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// #define SRAM4_ORIGIN 0x58000000
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// #define SRAM4_LENGTH 0x00040000 /* 256K */
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// #define SRAM5_ORIGIN 0x58800000
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// #define SRAM5_LENGTH 0x00040000 /* 256K */
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#define OMV_SRAM6_A_ORIGIN 0x62000000
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#define OMV_SRAM6_A_LENGTH 0x00100000 /* 1M */
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#define OMV_SRAM6_B_ORIGIN 0x62400000
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#define OMV_SRAM6_B_LENGTH 0x00100000 /* 1M */
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#define OMV_SRAM7_ORIGIN 0x63000000
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#define OMV_SRAM7_LENGTH 0x00080000 /* 512K */
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#define OMV_SRAM8_ORIGIN 0x63200000
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#define OMV_SRAM8_LENGTH 0x00200000 /* 2M */
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#define OMV_SRAM9_A_ORIGIN 0x60000000
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#define OMV_SRAM9_A_LENGTH 0x00040000 /* 256K */
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#define OMV_SRAM9_B_ORIGIN 0x60040000
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#define OMV_SRAM9_B_LENGTH 0x00080000 /* 512K */
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// Physical I2C/I3C buses.
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// I2C0
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#define OMV_I2C0_ID (0)
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#define OMV_I2C0_SCL_PIN (&omv_pin_I2C0_SCL)
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#define OMV_I2C0_SDA_PIN (&omv_pin_I2C0_SDA)
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// I2C1
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#define OMV_I2C1_ID (1)
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#define OMV_I2C1_SCL_PIN (&omv_pin_I2C1_SCL)
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#define OMV_I2C1_SDA_PIN (&omv_pin_I2C1_SDA)
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// I2C3
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#define OMV_I2C3_ID (3)
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#define OMV_I2C3_SCL_PIN (&omv_pin_I2C3_SCL)
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#define OMV_I2C3_SDA_PIN (&omv_pin_I2C3_SDA)
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// I3C0
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#define OMV_I3C0_ID (4)
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#define OMV_I3C0_SCL_PIN (&omv_pin_I3C_SCL)
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#define OMV_I3C0_SDA_PIN (&omv_pin_I3C_SDA)
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// Physical PDM buses.
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// PDM1
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#define OMV_PDM1_ID (1)
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#define OMV_PDM1_C0_PIN (&omv_pin_PDM_C1)
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#define OMV_PDM1_D0_PIN (&omv_pin_PDM_D1)
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// Physical SPI buses.
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// SPI bus 0
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#define OMV_SPI0_ID (0)
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#define OMV_SPI0_SCLK_PIN (&omv_pin_SPI_SCLK)
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#define OMV_SPI0_MISO_PIN (&omv_pin_SPI_MISO)
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#define OMV_SPI0_MOSI_PIN (&omv_pin_SPI_MOSI)
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#define OMV_SPI0_SSEL_PIN (&omv_pin_SPI_SSEL)
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// SPI bus 4
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#define OMV_SPI4_ID (4)
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#define OMV_SPI4_SCLK_PIN (&omv_pin_LPSPI_SCLK)
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#define OMV_SPI4_MISO_PIN (&omv_pin_LPSPI_MISO)
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#define OMV_SPI4_MOSI_PIN (&omv_pin_LPSPI_MOSI)
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#define OMV_SPI4_SSEL_PIN (&omv_pin_LPSPI_SSEL)
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// CSI I2C bus
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#define OMV_CSI_I2C_ID (0)
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#define OMV_CSI_I2C_SPEED (OMV_I2C_SPEED_FULL)
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#define OMV_CSI_I2C_REINIT (0)
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// FIR I2C bus
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#define OMV_FIR_I2C_ID (1)
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#define OMV_FIR_I2C_SPEED (OMV_I2C_SPEED_FULL)
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// TOF I2C bus
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#define OMV_TOF_I2C_ID (3)
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#define OMV_TOF_I2C_SPEED (OMV_I2C_SPEED_FULL)
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#define OMV_TOF_POWER_PIN (&omv_pin_TOF_POWER)
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// IMU SPI bus
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#define OMV_IMU_SPI_ID (OMV_SPI4_ID)
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#define OMV_IMU_SPI_BAUDRATE (500000)
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#define OMV_IMU_CHIP_LSM6DSM (1)
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#define OMV_IMU_X_Y_ROTATION_DEGREES 90
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#define OMV_IMU_MOUNTING_Z_DIRECTION -1
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// PDM configuration
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#define OMV_PDM_ID (OMV_PDM1_ID)
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#define OMV_PDM_CHANNELS (1)
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// Camera interface
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#define OMV_CSI_BASE ((CPI_Type *) CPI_BASE)
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#define OMV_CSI_CLK_FREQUENCY (24000000)
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#define OMV_CSI_D0_PIN (&omv_pin_CSI_D0)
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#define OMV_CSI_D1_PIN (&omv_pin_CSI_D1)
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#define OMV_CSI_D2_PIN (&omv_pin_CSI_D2)
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#define OMV_CSI_D3_PIN (&omv_pin_CSI_D3)
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#define OMV_CSI_D4_PIN (&omv_pin_CSI_D4)
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#define OMV_CSI_D5_PIN (&omv_pin_CSI_D5)
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#define OMV_CSI_D6_PIN (&omv_pin_CSI_D6)
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#define OMV_CSI_D7_PIN (&omv_pin_CSI_D7)
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#define OMV_CSI_HSYNC_PIN (&omv_pin_CSI_HSYNC)
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#define OMV_CSI_VSYNC_PIN (&omv_pin_CSI_VSYNC)
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#define OMV_CSI_PXCLK_PIN (&omv_pin_CSI_PXCLK)
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#define OMV_CSI_MXCLK_PIN (&omv_pin_CSI_MXCLK)
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#define OMV_CSI_RESET_PIN (&omv_pin_CSI_RESET)
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#define OMV_CSI_POWER_PIN (&omv_pin_CSI_POWER)
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#define OMV_CSI_POLARITY_CONFIG { OMV_CSI_ACTIVE_LOW, OMV_CSI_ACTIVE_LOW }
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#define OMV_WL_POWER_PIN (&omv_pin_WL_REG_ON)
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#define OMV_BT_POWER_PIN (&omv_pin_BT_REG_ON)
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// SPI LCD Interface
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#define OMV_SPI_DISPLAY_CONTROLLER (OMV_SPI0_ID)
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#define OMV_SPI_DISPLAY_MOSI_PIN (&omv_pin_SPI_MOSI)
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#define OMV_SPI_DISPLAY_MISO_PIN (&omv_pin_SPI_MISO)
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#define OMV_SPI_DISPLAY_SCLK_PIN (&omv_pin_SPI_SCLK)
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#define OMV_SPI_DISPLAY_SSEL_PIN (&omv_pin_SPI_SSEL)
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#define OMV_SPI_DISPLAY_RS_PIN (&omv_pin_LCD_RS)
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#define OMV_SPI_DISPLAY_RST_PIN (&omv_pin_LCD_RST)
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#endif //__OMV_BOARDCONFIG_H__
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