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283 lines
8.3 KiB
C
283 lines
8.3 KiB
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright (C) 2013-2024 OpenMV, LLC.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* GPIO port for stm32.
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*/
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#include STM32_HAL_H
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#include <string.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "py/mphal.h"
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#include "irq.h"
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#include "omv_boardconfig.h"
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#include "omv_gpio.h"
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#if defined(STM32N6)
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// EXTI lines 0 to 15 have single IRQs.
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#define MAX_SINGLE_IRQ_LINE (16)
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#else
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// EXTI lines 0 to 4 have single IRQs.
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#define MAX_SINGLE_IRQ_LINE (5)
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#endif
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static omv_gpio_irq_descr_t gpio_irq_descr_table[16] = {{0}};
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// Returns the port number configured in EXTI_CR for this line.
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static uint32_t omv_gpio_irq_get_gpio(uint32_t line) {
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#if defined(STM32N6)
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return (EXTI->EXTICR[line >> 2] >> (8 * (line & 3))) & 0x0F;
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#else
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return (SYSCFG->EXTICR[line >> 2] >> (4 * (line & 3))) & 0x0F;
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#endif
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}
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// Returns pin number.
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static uint32_t omv_gpio_irq_get_line(omv_gpio_t pin) {
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return 31 - __CLZ(pin->pin);
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}
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// Returns the IRQ number of a an EXTI line.
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static uint32_t omv_gpio_irq_get_irqn(omv_gpio_t pin) {
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uint32_t exti_irqn = 0;
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uint32_t exti_line = omv_gpio_irq_get_line(pin);
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switch (exti_line) {
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case 0:
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exti_irqn = EXTI0_IRQn;
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break;
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case 1:
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exti_irqn = EXTI1_IRQn;
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break;
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case 2:
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exti_irqn = EXTI2_IRQn;
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break;
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case 3:
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exti_irqn = EXTI3_IRQn;
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break;
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case 4:
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exti_irqn = EXTI4_IRQn;
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break;
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#if defined(STM32N6)
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case 5:
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exti_irqn = EXTI5_IRQn;
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break;
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case 6:
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exti_irqn = EXTI6_IRQn;
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break;
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case 7:
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exti_irqn = EXTI7_IRQn;
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break;
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case 8:
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exti_irqn = EXTI8_IRQn;
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break;
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case 9:
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exti_irqn = EXTI9_IRQn;
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break;
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case 10:
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exti_irqn = EXTI10_IRQn;
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break;
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case 11:
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exti_irqn = EXTI11_IRQn;
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break;
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case 12:
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exti_irqn = EXTI12_IRQn;
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break;
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case 13:
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exti_irqn = EXTI13_IRQn;
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break;
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case 14:
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exti_irqn = EXTI14_IRQn;
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break;
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case 15:
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exti_irqn = EXTI15_IRQn;
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break;
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#else
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case 5 ... 9:
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exti_irqn = EXTI9_5_IRQn;
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break;
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case 10 ... 15:
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exti_irqn = EXTI15_10_IRQn;
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break;
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#endif
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default:
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break;
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}
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return exti_irqn;
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}
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static inline bool omv_gpio_irq_enabled(omv_gpio_irq_descr_t *gpio_irq_descr, uint32_t line) {
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return (gpio_irq_descr->enabled &&
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gpio_irq_descr->callback &&
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gpio_irq_descr->gpio == omv_gpio_irq_get_gpio(line));
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}
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void omv_gpio_irq_handler(uint32_t line) {
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if (line < MAX_SINGLE_IRQ_LINE) {
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omv_gpio_irq_descr_t *gpio_irq_descr = &gpio_irq_descr_table[line];
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if (omv_gpio_irq_enabled(gpio_irq_descr, line)) {
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__HAL_GPIO_EXTI_CLEAR_FLAG(1 << line);
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gpio_irq_descr->callback(gpio_irq_descr->data);
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}
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} else {
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size_t line_max = (line == 5) ? 10 : 16;
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// EXTI lines 5 to 9 and 10 to 15 are multiplexed.
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for (size_t i = line; i < line_max; i++) {
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omv_gpio_irq_descr_t *gpio_irq_descr = &gpio_irq_descr_table[i];
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if (__HAL_GPIO_EXTI_GET_FLAG(1 << i)
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&& omv_gpio_irq_enabled(gpio_irq_descr, i)) {
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__HAL_GPIO_EXTI_CLEAR_FLAG(1 << i);
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gpio_irq_descr->callback(gpio_irq_descr->data);
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}
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}
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}
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}
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void omv_gpio_init0(void) {
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memset(gpio_irq_descr_table, 0, sizeof(gpio_irq_descr_table));
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}
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void omv_gpio_config(omv_gpio_t pin, uint32_t mode, uint32_t pull, uint32_t speed, uint32_t af) {
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GPIO_InitTypeDef gpio_config = {
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.Pin = pin->pin,
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.Mode = mode,
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.Pull = pull,
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.Speed = speed,
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.Alternate = ((af == -1) ? pin->af : af),
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};
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HAL_GPIO_Init(pin->port, &gpio_config);
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}
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void omv_gpio_deinit(omv_gpio_t pin) {
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HAL_GPIO_DeInit(pin->port, pin->pin);
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}
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bool omv_gpio_read(omv_gpio_t pin) {
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return HAL_GPIO_ReadPin(pin->port, pin->pin);
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}
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void omv_gpio_write(omv_gpio_t pin, bool value) {
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HAL_GPIO_WritePin(pin->port, pin->pin, value);
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}
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void omv_gpio_irq_register(omv_gpio_t pin, omv_gpio_callback_t callback, void *data) {
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omv_gpio_irq_descr_t *gpio_irq_descr = NULL;
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uint32_t exti_line = omv_gpio_irq_get_line(pin);
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if (exti_line != 0) {
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gpio_irq_descr = &gpio_irq_descr_table[exti_line];
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gpio_irq_descr->enabled = true;
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gpio_irq_descr->data = data;
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gpio_irq_descr->gpio = omv_gpio_irq_get_gpio(exti_line);
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gpio_irq_descr->callback = callback;
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}
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}
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void omv_gpio_irq_enable(omv_gpio_t pin, bool enable) {
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uint32_t exti_line = omv_gpio_irq_get_line(pin);
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uint32_t exti_irqn = omv_gpio_irq_get_irqn(pin);
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gpio_irq_descr_table[exti_line].enabled = enable;
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if (!enable) {
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HAL_NVIC_DisableIRQ(exti_irqn);
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} else {
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NVIC_SetPriority(exti_irqn, IRQ_PRI_EXTINT);
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HAL_NVIC_EnableIRQ(exti_irqn);
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}
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}
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void omv_gpio_clock_enable(omv_gpio_t pin, bool enable) {
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if (pin->port == GPIOA) {
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if (enable) {
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__HAL_RCC_GPIOA_CLK_ENABLE();
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} else {
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__HAL_RCC_GPIOA_CLK_DISABLE();
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}
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} else if (pin->port == GPIOB) {
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if (enable) {
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__HAL_RCC_GPIOB_CLK_ENABLE();
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} else {
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__HAL_RCC_GPIOB_CLK_DISABLE();
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}
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} else if (pin->port == GPIOC) {
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if (enable) {
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__HAL_RCC_GPIOC_CLK_ENABLE();
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} else {
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__HAL_RCC_GPIOC_CLK_DISABLE();
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}
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} else if (pin->port == GPIOD) {
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if (enable) {
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__HAL_RCC_GPIOD_CLK_ENABLE();
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} else {
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__HAL_RCC_GPIOD_CLK_DISABLE();
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}
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} else if (pin->port == GPIOE) {
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if (enable) {
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__HAL_RCC_GPIOE_CLK_ENABLE();
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} else {
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__HAL_RCC_GPIOE_CLK_DISABLE();
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}
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} else if (pin->port == GPIOF) {
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if (enable) {
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__HAL_RCC_GPIOF_CLK_ENABLE();
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} else {
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__HAL_RCC_GPIOF_CLK_DISABLE();
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}
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} else if (pin->port == GPIOG) {
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if (enable) {
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__HAL_RCC_GPIOG_CLK_ENABLE();
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} else {
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__HAL_RCC_GPIOG_CLK_DISABLE();
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}
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#if defined(__HAL_RCC_GPIOH_CLK_ENABLE)
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} else if (pin->port == GPIOH) {
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if (enable) {
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__HAL_RCC_GPIOH_CLK_ENABLE();
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} else {
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__HAL_RCC_GPIOH_CLK_DISABLE();
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}
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#elif defined(__HAL_RCC_GPIOI_CLK_ENABLE)
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} else if (pin->port == GPIOI) {
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if (enable) {
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__HAL_RCC_GPIOI_CLK_ENABLE();
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} else {
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__HAL_RCC_GPIOI_CLK_DISABLE();
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}
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#elif defined(__HAL_RCC_GPIOJ_CLK_ENABLE)
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} else if (pin->port == GPIOJ) {
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if (enable) {
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__HAL_RCC_GPIOJ_CLK_ENABLE();
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} else {
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__HAL_RCC_GPIOJ_CLK_DISABLE();
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}
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#elif defined(__HAL_RCC_GPIOK_CLK_ENABLE)
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} else if (pin->port == GPIOK) {
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if (enable) {
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__HAL_RCC_GPIOK_CLK_ENABLE();
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} else {
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__HAL_RCC_GPIOK_CLK_DISABLE();
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}
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#endif
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}
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}
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