mirror of
https://github.com/openmv/openmv.git
synced 2025-11-04 14:49:50 +08:00
506 lines
13 KiB
JSON
506 lines
13 KiB
JSON
{
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"Registers": [
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{
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"Address": "0xF8",
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"Name": "MAIN_CTRL_SHR",
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"Description": "NVM main control shadow register",
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"Size": "0x1",
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"Fields": [
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{
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"Bit": {
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"Name": "LOCK_OCP",
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"Description": "0: STPMIC1 is turned OFF only if regulator related OCPOFF bit is set\n1: short-circuit turn-OFF STPMIC1 and keep it in LOCK_OCP state until LOCK_OCP_FLAG is reset",
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"BitOffset": "0x0",
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"BitWidth": "0x1",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "0",
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"0x1": "1"
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}
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}
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},
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{
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"Bit": {
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"Name": "AUTO_TURN_ON",
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"Description": "0: STPMIC1 does not start automatically on VIN rising\n1: STPMIC1 starts automatically on VIN rising",
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"BitOffset": "0x1",
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"BitWidth": "0x1",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "0",
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"0x1": "1"
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}
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}
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},
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{
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"Bit": {
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"Name": "PKEYLKP_OFF",
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"Description": "0: Turn-OFF on long key press inactive\n1: Turn-OFF on long key press active",
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"BitOffset": "0x2",
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"BitWidth": "0x1",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "0",
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"0x1": "1"
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}
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}
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},
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{
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"Bit": {
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"Name": "FORCE_LDO4",
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"Description": "0: LDO4 starts with rank LDO4_RANK only if VBUS_det turn-ON condition occurs\n1: LDO4 starts with rank LDO4_RANK every turn-ON condition",
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"BitOffset": "0x3",
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"BitWidth": "0x1",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "0",
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"0x1": "1"
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}
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}
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},
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{
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"Bit": {
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"Name": "VINOK_THRES",
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"Description": "VINOK_Rise threshold voltage",
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"BitOffset": "0x4",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "3.1V",
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"0x1": "3.3V",
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"0x2": "3.5V",
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"0x3": "4.0V"
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}
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}
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},
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{
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"Bit": {
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"Name": "VINOK_HYST",
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"Description": "VINOK threshold hysteresis",
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"BitOffset": "0x6",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "200mV",
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"0x1": "300mV",
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"0x2": "400mV",
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"0x3": "500mV"
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}
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}
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}
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]
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},
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{
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"Address": "0xF9",
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"Name": "BUCKS_RANK_SHR",
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"Description": "NVM buck rank shadow register",
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"Size": "0x1",
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"Fields": [
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{
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"Bit": {
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"Name": "BUCK1_RANK",
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"Description": "-",
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"BitOffset": "0x0",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "rank0",
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"0x1": "rank1",
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"0x2": "rank2",
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"0x3": "rank3"
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}
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}
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},
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{
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"Bit": {
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"Name": "BUCK2_RANK",
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"Description": "-",
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"BitOffset": "0x2",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "rank0",
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"0x1": "rank1",
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"0x2": "rank2",
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"0x3": "rank3"
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}
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}
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},
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{
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"Bit": {
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"Name": "BUCK3_RANK",
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"Description": "-",
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"BitOffset": "0x4",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "rank0",
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"0x1": "rank1",
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"0x2": "rank2",
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"0x3": "rank3"
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}
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}
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},
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{
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"Bit": {
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"Name": "BUCK4_RANK",
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"Description": "-",
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"BitOffset": "0x6",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "rank0",
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"0x1": "rank1",
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"0x2": "rank2",
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"0x3": "rank3"
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}
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}
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}
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]
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},
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{
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"Address": "0xFA",
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"Name": "LDOS_RANK_SHR1",
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"Description": "NVM LDOs rank shadow register 1",
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"Size": "0x1",
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"Fields": [
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{
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"Bit": {
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"Name": "LDO1_RANK",
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"Description": "-",
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"BitOffset": "0x0",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "rank0",
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"0x1": "rank1",
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"0x2": "rank2",
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"0x3": "rank3"
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}
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}
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},
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{
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"Bit": {
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"Name": "LDO2_RANK",
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"Description": "-",
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"BitOffset": "0x2",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "rank0",
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"0x1": "rank1",
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"0x2": "rank2",
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"0x3": "rank3"
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}
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}
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},
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{
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"Bit": {
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"Name": "LDO3_RANK",
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"Description": "-",
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"BitOffset": "0x4",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "rank0",
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"0x1": "rank1",
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"0x2": "rank2",
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"0x3": "rank3"
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}
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}
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},
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{
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"Bit": {
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"Name": "LDO4_RANK",
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"Description": "-",
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"BitOffset": "0x6",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "rank0",
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"0x1": "rank1",
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"0x2": "rank2",
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"0x3": "rank3"
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}
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}
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}
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]
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},
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{
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"Address": "0xFB",
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"Name": "LDOS_RANK_SHR2",
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"Description": "NVM LDOs rank shadow register 2",
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"Size": "0x1",
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"Fields": [
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{
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"Bit": {
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"Name": "LDO5_RANK",
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"Description": "-",
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"BitOffset": "0x0",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "rank0",
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"0x1": "rank1",
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"0x2": "rank2",
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"0x3": "rank3"
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}
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}
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},
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{
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"Bit": {
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"Name": "LDO6_RANK",
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"Description": "-",
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"BitOffset": "0x2",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "rank0",
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"0x1": "rank1",
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"0x2": "rank2",
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"0x3": "rank3"
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}
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}
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},
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{
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"Bit": {
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"Name": "REFDDR_RANK",
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"Description": "-",
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"BitOffset": "0x4",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "rank0",
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"0x1": "rank1",
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"0x2": "rank2",
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"0x3": "rank3"
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}
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}
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},
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{
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"Bit": {
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"Name": "LDO3_BYPASS",
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"Description": "LDO3 forced bypass mode\n0: LDO3 not in bypass mode\n1: LDO3 in bypass mode",
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"BitOffset": "0x6",
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"BitWidth": "0x1",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "Normal",
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"0x1": "Bypass"
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}
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}
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},
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{
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"Bit": {
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"Name": "BUCK4_CLAMP",
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"Description": "Clamp Buck4 output value to 1.3 V max\n0: VOUT of Buck4 is not clamped\n1: VOUT of Buck4 is clamped 1.3 V",
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"BitOffset": "0x7",
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"BitWidth": "0x1",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "No",
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"0x1": "Yes"
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}
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}
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}
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]
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},
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{
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"Address": "0xFC",
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"Name": "BUCKS_VOUT_SHR",
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"Description": "NVM Bucks VOUT register",
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"Size": "0x1",
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"Fields": [
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{
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"Bit": {
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"Name": "BUCK1_VOUT",
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"Description": " Buck1 default output selection",
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"BitOffset": "0x0",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "1.1V",
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"0x1": "1.15V",
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"0x2": "1.2V",
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"0x3": "1.5V"
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}
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}
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},
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{
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"Bit": {
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"Name": "BUCK2_VOUT",
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"Description": "Buck2 default output selection",
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"BitOffset": "0x2",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "1.1V",
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"0x1": "1.2V",
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"0x2": "1.35V",
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"0x3": "1.5V"
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}
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}
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},
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{
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"Bit": {
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"Name": "BUCK3_VOUT",
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"Description": " Buck3 default output selection",
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"BitOffset": "0x4",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "1.2V",
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"0x1": "1.8V",
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"0x2": "3.0V",
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"0x3": "3.3V"
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}
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}
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},
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{
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"Bit": {
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"Name": "BUCK4_VOUT",
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"Description": "Buck4 default output selection",
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"BitOffset": "0x6",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "1.15V",
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"0x1": "1.2V",
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"0x2": "1.8V",
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"0x3": "3.3V"
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}
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}
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}
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]
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},
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{
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"Address": "0xFD",
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"Name": "LDOS_VOUT_SHR1",
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"Description": " NVM LDO1 to LDO3 default voltage output setting shadow register",
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"Size": "0x1",
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"Fields": [
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{
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"Bit": {
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"Name": "LDO1_VOUT",
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"Description": "LDO1 default output selection",
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"BitOffset": "0x0",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "1.8V",
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"0x1": "2.5V",
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"0x2": "2.9V",
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"0x3": "3.3V"
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}
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}
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},
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{
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"Bit": {
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"Name": "LDO2_VOUT",
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"Description": "LDO2 default output selection",
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"BitOffset": "0x2",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "1.8V",
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"0x1": "2.5V",
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"0x2": "2.9V",
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"0x3": "3.3V"
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}
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}
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},
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{
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"Bit": {
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"Name": "LDO3_VOUT",
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"Description": "LDO3 default output selection",
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"BitOffset": "0x4",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "1.8V",
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"0x1": "2.5V",
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"0x2": "3.3V",
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"0x3": "VOUT Back2 /2"
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}
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}
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},
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{
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"Bit": {
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"Name": "SWOUT_BOOST_OVP",
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"Description": "0: PWR_SW does not turn OFF if boost OVP occurs\n1: PWR_SW is turned OFF automatically if Boost OVP occurs",
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"BitOffset": "0x7",
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"BitWidth": "0x1",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "PWR_SW ON",
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"0x1": "PWR_SW OFF"
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}
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}
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}
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]
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},
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{
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"Address": "0xFE",
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"Name": "LDOS_VOUT_SHR2",
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"Description": "NVM LDO5-6 voltage output shadow register",
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"Size": "0x1",
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"Fields": [
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{
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"Bit": {
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"Name": "LDO5_VOUT",
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"Description": "LDO5 default output selection",
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"BitOffset": "0x0",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "1.8V",
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"0x1": "2.5V",
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"0x2": "2.9V",
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"0x3": "3.3V"
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}
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}
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},
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{
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"Bit": {
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"Name": "LDO6_VOUT",
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"Description": "LDO6 default output selection",
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"BitOffset": "0x2",
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"BitWidth": "0x2",
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"Access": "RW",
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"PossibleValues": {
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"0x0": "1.0V",
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"0x1": "1.2V",
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"0x2": "1.8V",
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"0x3": "3.3V"
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}
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}
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}
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]
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},
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{
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"Address": "0xFF",
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"Name": "I2C_ADDR_SHR",
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"Description": "NVM I2C device address shadow register",
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"Size": "0x1",
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"Fields": [
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{
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"Bit": {
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"Name": "I2C_ADDR",
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"Description": "PMIC I2C address\nWarning: applied immediately, next access should use new address",
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"BitOffset": "0x0",
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"BitWidth": "0x7",
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"Access": "RW"
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}
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}
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]
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}
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]
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} |