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https://github.com/openmv/openmv.git
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1607 lines
50 KiB
C
1607 lines
50 KiB
C
/* Copyright (C) 2023 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* contact@alifsemi.com, or visit: https://alifsemi.com/license
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*
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*/
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/* Include */
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#include "Driver_ADC_Private.h"
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#include "analog_config.h"
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#define ARM_ADC_DRV_VERISON ARM_DRIVER_VERSION_MAJOR_MINOR(1,0) /*DRIVER VERSION*/
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/* Driver Version */
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static const ARM_DRIVER_VERSION DriverVersion ={
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ARM_ADC_API_VERSION,
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ARM_ADC_DRV_VERISON
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};
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/* Driver Capabilities */
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static const ARM_ADC_CAPABILITIES DriverCapabilities = {
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1, /* Resolution 12 or 20 bits*/
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0 /* Reserved */
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};
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/*
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* @func : void Analog_config()
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* @brief : vbat comparator value and register configuration
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* @parameter : NONE
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* @return : NONE
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*/
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static void Analog_Config(void)
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{
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/* Analog configuration Vbat register2 */
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analog_config_vbat_reg2();
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/* Analog configuration comparator register2 */
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analog_config_cmp_reg2();
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}
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/*
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* @func : int32_t ADC_Initialize(ADC_RESOURCES *ADC, ARM_ADC_SignalEvent_t cb_event)
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* @brief : initialize the device
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* @parameter[1] : adc : Pointer to /ref ADC_RESOURCES structure
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* @parameter[2] : cb_event : Pointer to /ref ARM_ADC_Signal_Event_t cb_event
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* @return : ARM_DRIVER_OK : if driver initialized successfully
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* : ARM_DRIVER_ERROR_PARAMETER : if parameter is invalid or not
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*/
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static int32_t ADC_Initialize(ADC_RESOURCES *ADC, ARM_ADC_SignalEvent_t cb_event)
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{
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int ret = ARM_DRIVER_OK ;
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if(!cb_event)
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return ARM_DRIVER_ERROR_PARAMETER;
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/* User call back Event */
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ADC->cb_event = cb_event;
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/* Setting flag to initialize */
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ADC->state |= ADC_FLAG_DRV_INIT_DONE;
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return ret;
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}
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/*
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* @func : int32_t ADC_Uninitialize (ARM_ADC_SignalEvent_t cb_event)
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* @brief : Uninitialize the device
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* @parameter[in] : ADC : Pointer to the structure ADC_RESOURCES
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* @return : ARM_DRIVER_OK : if adc is successfully initialized
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* : ARM_DRIVER_ERROR_PARAMETER : if adc device is invalid
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*/
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static int32_t ADC_Uninitialize(ADC_RESOURCES *ADC)
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{
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int ret = ARM_DRIVER_OK;
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/* parameter checking */
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if(!ADC)
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return ARM_DRIVER_ERROR_PARAMETER;
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/* Checking initialized has done or not */
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if(!(ADC->state & ADC_FLAG_DRV_INIT_DONE))
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return ARM_DRIVER_OK;
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/* set call back to NULL */
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ADC->cb_event = NULL;
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/* Reset last read channel */
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ADC->conv.read_channel = 0;
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/* flags */
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ADC->state = 0;
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return ret;
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}
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/*
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* @func : int32_t ADC_PowerControl(ARM_POWER_status status, ADC_RESOURCES *adc)
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* @brief : power the driver and enable NVIC
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* @parameter[1] : ADC : pointer to /ref ADC_RESOURCES
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* @parameter[2] : state : power state
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* @return : ARM_DRIVER_OK : if power done successful
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* ARM_DRIVER_ERROR : if initialize is not done
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*/
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static int32_t ADC_PowerControl(ADC_RESOURCES *ADC, ARM_POWER_STATE state)
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{
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int32_t ret = ARM_DRIVER_OK;
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switch(state)
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{
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case ARM_POWER_FULL:
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if (!(ADC->state & ADC_FLAG_DRV_INIT_DONE))
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return ARM_DRIVER_ERROR;
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if ((ADC->state & ADC_FLAG_DRV_POWER_DONE))
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return ARM_DRIVER_OK;
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/* Clear Any Pending IRQ */
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NVIC_ClearPendingIRQ (ADC->intr_done0_irq_num);
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NVIC_ClearPendingIRQ (ADC->intr_done1_irq_num);
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NVIC_ClearPendingIRQ (ADC->intr_cmpa_irq_num);
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NVIC_ClearPendingIRQ (ADC->intr_cmpb_irq_num);
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/* Set priority */
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NVIC_SetPriority (ADC->intr_done0_irq_num, ADC->intr_done0_irq_priority);
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NVIC_SetPriority (ADC->intr_done1_irq_num, ADC->intr_done1_irq_priority);
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NVIC_SetPriority (ADC->intr_cmpa_irq_num, ADC->intr_cmpa_irq_priority);
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NVIC_SetPriority (ADC->intr_cmpb_irq_num, ADC->intr_cmpb_irq_priority);
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/* Enable the NIVC */
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NVIC_EnableIRQ (ADC->intr_done0_irq_num);
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NVIC_EnableIRQ (ADC->intr_done1_irq_num);
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NVIC_EnableIRQ (ADC->intr_cmpa_irq_num);
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NVIC_EnableIRQ (ADC->intr_cmpb_irq_num);;
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/* adc clock enable */
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adc_set_clk_control(ADC->drv_instance, true);
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/* Enabling comparator clock */
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enable_cmp_periph_clk();
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/*function include vbat and comparator address and it value */
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Analog_Config();
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/* set differential control for ADC12 */
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adc_set_differential_ctrl(ADC->drv_instance,
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ADC->differential_enable);
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adc_set_comparator_ctrl(ADC->drv_instance,
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ADC->comparator_enable,
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ADC->comparator_bias);
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if (ADC->differential_enable == ADC_DIFFERENTIAL_ENABLE || \
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(ADC->drv_instance == ADC_INSTANCE_ADC24_0))
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{
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/* check adc instances pga enabled */
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if (ADC->pga_enable)
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{
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/* set pga gain */
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enable_adc_pga_gain(ADC->drv_instance, ADC->pga_value);
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}
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}
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if (ADC->drv_instance == ADC_INSTANCE_ADC24_0)
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{
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/* enable adc24 from control register */
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enable_adc24();
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/* set output rate from control register */
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set_adc24_output_rate(ADC->output_rate);
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/* Set adc24 bias from control register */
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set_adc24_bias(ADC->bias);
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/* Enabling continuous sampling */
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adc24_enable_continous_sample(ADC->regs);
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}
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else
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{
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/* set Sample width value for ADC12 */
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adc_set_sample_width(ADC->regs, ADC->sample_width);
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}
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/* set user channel input */
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adc_init_channel_select(ADC->regs, ADC->conv.user_input);
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/* set the clock divisor */
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adc_set_clk_div(ADC->regs, ADC->clock_div);
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/* set avg sample value */
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adc_set_avg_sample(ADC->regs, ADC->avg_sample_num);
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/* set number of n shift bits */
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adc_set_n_shift_bit(ADC->regs, ADC->shift_n_bit, ADC->shift_left_or_right);
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/* set sequencer control to single channel scan */
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adc_set_single_ch_scan_mode(ADC->regs, &ADC->conv);
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/* Disable the interrupt (mask the interrupt(0xF))*/
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adc_mask_interrupt(ADC->regs);
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/* Set the power flag enabled */
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ADC->state |= ADC_FLAG_DRV_POWER_DONE;
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break;
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case ARM_POWER_OFF:
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/* Disable ADC NVIC */
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NVIC_DisableIRQ (ADC->intr_done0_irq_num);
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NVIC_DisableIRQ (ADC->intr_done1_irq_num);
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NVIC_DisableIRQ (ADC->intr_cmpa_irq_num);
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NVIC_DisableIRQ (ADC->intr_cmpb_irq_num);
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/* Clear Any Pending IRQ */
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NVIC_ClearPendingIRQ (ADC->intr_done0_irq_num);
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NVIC_ClearPendingIRQ (ADC->intr_done1_irq_num);
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NVIC_ClearPendingIRQ (ADC->intr_cmpa_irq_num);
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NVIC_ClearPendingIRQ (ADC->intr_cmpb_irq_num);
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/* set the clock divisor */
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adc_set_clk_div(ADC->regs, ADC_CLOCK_DIV_MIN_VALUE);
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/* set avg sample value */
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adc_set_avg_sample(ADC->regs, ADC_AVG_SAMPLES_FOR_AVG_MIN);
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/* set Sample width value */
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adc_set_sample_width(ADC->regs, ADC_SAMPLE_WIDTH_MIN_VALUE);
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/* set number of n shift bits */
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adc_set_n_shift_bit(ADC->regs, 0, 0);
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/* Disable the interrupt (mask the interrupt(0xF)) */
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adc_mask_interrupt(ADC->regs);
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if (ADC->differential_enable == ADC_DIFFERENTIAL_ENABLE || \
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(ADC->drv_instance == ADC_INSTANCE_ADC24_0))
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{
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/* check adc instances pga enabled */
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if (ADC->pga_value)
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{
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/* Disable pga gain */
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disable_adc_pga_gain(ADC->drv_instance);
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}
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}
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if (ADC->drv_instance == ADC_INSTANCE_ADC24_0)
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{
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/* disable adc24 from control register */
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disable_adc24();
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/* set output rate from control register */
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set_adc24_output_rate(0U);
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}
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/* Disabling CMP clock */
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disable_cmp_periph_clk();
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/* adc clock disable */
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adc_set_clk_control(ADC->drv_instance, false);
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/* Reset the power status of ADC */
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ADC->state &= ~ADC_FLAG_DRV_POWER_DONE;
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break;
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case ARM_POWER_LOW:
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default:
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return ARM_DRIVER_ERROR_UNSUPPORTED;
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break;
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}
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return ret;
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}
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/*
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* @func : int32_t ADC_Start( ADC_RESOURCES *ADC)
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* @brief : Start the adc and initialize interrupt
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* @parameter : ADC : pointer to ADC_RESOURCES structure
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* @return : ARM_DRIVER_OK : if the function are return successful
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* ARM_DRIVER_ERROR_PARAMETER : if parameter are invalid
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*/
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static int32_t ADC_Start( ADC_RESOURCES *ADC)
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{
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/* Check Power done or not */
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if (!(ADC->state & ADC_FLAG_DRV_POWER_DONE))
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return ARM_DRIVER_ERROR;
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if(ADC->busy == 1U)
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return ARM_DRIVER_ERROR_BUSY;
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/* setup conversion status */
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ADC->conv.status = ADC_CONV_STAT_NONE;
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/* active the conv busy flag */
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ADC->busy = 1U;
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/* enable the interrupt(unmask the interrupt 0x0)*/
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adc_unmask_interrupt(ADC->regs);
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if (ADC->ext_trig_val)
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{
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/* Enable the trigger */
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adc_enable_external_trigger(ADC->regs, ADC->ext_trig_val);
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}
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else
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{
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/* Start the ADC conversion mode */
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if (ADC->conv.mode == ADC_CONV_MODE_SINGLE_SHOT)
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{
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/* Enable single shot conversion */
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adc_enable_single_shot_conv(ADC->regs);
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}
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else
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{
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/* Enable continuous conversion */
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adc_enable_continuous_conv(ADC->regs);
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}
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}
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return ARM_DRIVER_OK;
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}
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/*
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* @func : int32_t ADC_Stop( ADC_RESOURCES *adc)
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* @brief : Disable the adc
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* @parameter : ADC : pointer to ADC_RESOURCES structure
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* @return : ARM_DRIVER_OK : if function return successfully
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*/
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static int32_t ADC_Stop(ADC_RESOURCES *ADC)
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{
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/* Check Power done or not */
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if (!(ADC->state & ADC_FLAG_DRV_POWER_DONE))
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return ARM_DRIVER_ERROR;
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/* Disable the interrupt(mask the interrupt 0xF)*/
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adc_mask_interrupt(ADC->regs);
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if (ADC->ext_trig_val)
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{
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/* Disable the trigger */
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adc_disable_external_trigger(ADC->regs, ADC->ext_trig_val);
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}
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else
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{
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/* Disable the adc */
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if (ADC->conv.mode == ADC_CONV_MODE_SINGLE_SHOT)
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{
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adc_disable_single_shot_conv(ADC->regs);
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}
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else
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{
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adc_disable_continuous_conv(ADC->regs);
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}
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}
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return ARM_DRIVER_OK;
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}
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/*
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* @func : in32_t ADC_Control(uint32_t control , uint32_t arg, ADC_RESOURCES adc)
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* @brief : control the following
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* - ARM_SET_SHIFT_CONTROL : to control shift control of bits
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* - ARM_SET_SEQUENCER_CTRL : selecting sample individual or rotate through
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* each unmasked sample
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* - ARM_ADC_SEQUENCER_MSK_CTRL : to control masking of the channel
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* - ARM_ADC_CHANNEL_INIT_VAL : to select initial channel for storing
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* - ARM_SET_ADC_COMPARATOR_A : to set comparator a value
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* - ARM_SET_ADC_COMPARATOR_B : to set comparator b value
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* - ARM_SET_ADC_THRESHOLD_COMPARISON : to set the threshold comparison
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* - ARM_ADC_SET_CONVERSION_MODE : to set conversion mode
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* @parameter[1] : ADC : pointer to ADC_RESOURCES structure
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* @parameter[2] : Control : Selecting the operation
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* @parameter[3] : arg : values for the the operation
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* @return[1] : ARM_DRIVER_OK : if function return successfully
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* @return[2] : ARM_DRIVER_ERROR_PARAMETER : if adc parameter are invalid
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*/
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static int32_t ADC_Control(ADC_RESOURCES *ADC, uint32_t Control, uint32_t arg)
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{
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int ret = ARM_DRIVER_OK;
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/* Check Power done or not */
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if (!(ADC->state & ADC_FLAG_DRV_POWER_DONE))
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return ARM_DRIVER_ERROR;
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switch(Control)
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{
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case ARM_ADC_SHIFT_CTRL:
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/*selecting the mode for the shifting bit left(0) or right(1) */
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if(arg)
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{
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adc_output_right_shift(ADC->regs);
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}
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else
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{
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adc_output_left_shift(ADC->regs);
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}
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break;
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case ARM_ADC_SEQUENCER_CTRL:
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if(!(arg == 0 || arg == 1))
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return ARM_DRIVER_ERROR_PARAMETER;
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/*selecting the mode of control for taking single scan(1) or multiple channel scan(0)*/
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if(arg == ADC_SCAN_MODE_SINGLE_CH)
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{
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adc_set_single_ch_scan_mode(ADC->regs, &ADC->conv);
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}
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else
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{
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adc_set_multi_ch_scan_mode(ADC->regs, &ADC->conv);
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}
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break;
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case ARM_ADC_SEQUENCER_MSK_CH_CTRL:
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if(!(arg < ADC_MSK_ALL_CHANNELS))
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return ARM_DRIVER_ERROR_PARAMETER;
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/* set channel to be masked */
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adc_sequencer_msk_ch_control(ADC->regs, arg);
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break;
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case ARM_ADC_CHANNEL_INIT_VAL:
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if(!(arg < ADC_MAX_INIT_CHANNEL))
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return ARM_DRIVER_ERROR_PARAMETER;
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if(ADC->differential_enable == ADC_DIFFERENTIAL_ENABLE)
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{
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/* check for differential input channels
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* 3 input channels are used in differential mode
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* which are channel 0,1 and 2
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*/
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if (arg > ADC_MAX_DIFFERENTIAL_CHANNEL)
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return ARM_DRIVER_ERROR_PARAMETER;
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}
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if(ADC->drv_instance == ADC_INSTANCE_ADC24_0)
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{
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/* 4 Differential input channels are there in ADC24 */
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if (arg > ADC24_MAX_DIFFERENTIAL_CHANNEL)
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return ARM_DRIVER_ERROR_PARAMETER;
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}
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/* select the initial value */
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adc_init_channel_select(ADC->regs, arg);
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/* Store first channel to start conversion */
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ADC->conv.read_channel = arg;
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break;
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case ARM_ADC_COMPARATOR_A:
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/* set comparator A */
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adc_set_comparator_A(ADC->regs, arg);
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break;
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case ARM_ADC_COMPARATOR_B:
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/* set comparator B */
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adc_set_comparator_B(ADC->regs, arg);
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break;
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case ARM_ADC_THRESHOLD_COMPARISON:
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if(!(arg < 3))
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return ARM_DRIVER_ERROR_PARAMETER;
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/* set comparison control bit */
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adc_set_comparator_ctrl_bit(ADC->regs, arg);
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break;
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case ARM_ADC_CONVERSION_MODE_CTRL:
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if(!(arg == 0 || arg == 1))
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return ARM_DRIVER_ERROR_PARAMETER;
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/* set conversion mode */
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if (arg)
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{
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ADC->conv.mode = ADC_CONV_MODE_SINGLE_SHOT;
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}
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else
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{
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ADC->conv.mode = ADC_CONV_MODE_CONTINUOUS;
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}
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break;
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case ARM_ADC_EXTERNAL_TRIGGER_ENABLE:
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if(arg > ADC_EXTERNAL_TRIGGER_MAX_VAL)
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return ARM_DRIVER_ERROR_PARAMETER;
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ADC->ext_trig_val = arg;
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break;
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case ARM_ADC_EXTERNAL_TRIGGER_DISABLE:
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if(arg > ADC_EXTERNAL_TRIGGER_MAX_VAL)
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return ARM_DRIVER_ERROR_PARAMETER;
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ADC->ext_trig_val = arg;
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break;
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case ARM_ADC_HARDWARE_AVERAGING_CTRL:
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/* argument is power of 2 */
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if ((arg & (arg - 1)) == 0)
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{
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/* Check if the value is between 2 to 256 */
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if (arg < ADC_AVG_SAMPLES_FOR_AVG_MIN || arg > ADC_AVG_SAMPLES_FOR_AVG_MAX)
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return ARM_DRIVER_ERROR;
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}
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|
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/* set average sample number */
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adc_set_avg_sample(ADC->regs, arg);
|
|
break;
|
|
|
|
case ARM_ADC_INPUT_CLOCK_DIV_CTRL:
|
|
|
|
/* check for CLOCK INPUT */
|
|
if (arg > ADC_CLOCK_DIV_MIN_VALUE || arg < ADC_CLOCK_DIV_MAX_VALUE)
|
|
return ARM_DRIVER_ERROR;
|
|
|
|
/* set the clock divisor */
|
|
adc_set_clk_div(ADC->regs, arg);
|
|
break;
|
|
|
|
case ARM_ADC_SAMPLE_WIDTH_CTRL:
|
|
|
|
/* check for sample width input */
|
|
if (ADC->drv_instance != ADC_INSTANCE_ADC24_0)
|
|
{
|
|
if ((arg < ADC_SAMPLE_WIDTH_MIN_VALUE || arg > ADC_SAMPLE_WIDTH_MAX_VALUE))
|
|
return ARM_DRIVER_ERROR_PARAMETER;
|
|
}
|
|
|
|
/* set Sample width value for ADC12 and ADC24*/
|
|
adc_set_sample_width(ADC->regs, arg);
|
|
break;
|
|
|
|
case ARM_ADC_DIFFERENTIAL_MODE_CTRL:
|
|
|
|
if (arg)
|
|
{
|
|
if (ADC->drv_instance != ADC_INSTANCE_ADC24_0)
|
|
{
|
|
adc_set_differential_ctrl(ADC->drv_instance, ENABLE);
|
|
}
|
|
|
|
/* set pga gain */
|
|
enable_adc_pga_gain(ADC->drv_instance, ADC->pga_value);
|
|
}
|
|
else
|
|
{
|
|
/* Disable differential */
|
|
if (ADC->drv_instance != ADC_INSTANCE_ADC24_0)
|
|
{
|
|
adc_set_differential_ctrl(ADC->drv_instance, DISABLE);
|
|
}
|
|
/* Disable pga gain */
|
|
disable_adc_pga_gain(ADC->drv_instance);
|
|
}
|
|
break;
|
|
|
|
case ARM_ADC_SET_PGA_GAIN_CTRL:
|
|
|
|
/* check for pga gain input */
|
|
if(arg > ADC_PGA_GAIN_MAX_VALUE)
|
|
return ARM_DRIVER_ERROR_PARAMETER;
|
|
|
|
/* set pga gain */
|
|
enable_adc_pga_gain(ADC->drv_instance, arg);
|
|
break;
|
|
|
|
case ARM_ADC_24_BIAS_CTRL:
|
|
|
|
/* check for bias control input */
|
|
if(arg > ADC_24_BIAS_MAX_VALUE)
|
|
return ARM_DRIVER_ERROR_PARAMETER;
|
|
|
|
set_adc24_bias(arg);
|
|
break;
|
|
|
|
case ARM_ADC_24_OUTPUT_RATE_CTRL:
|
|
|
|
/* check for the arg input */
|
|
if(arg < ADC_24_OUPUT_RATE_MAX_VALUE)
|
|
return ARM_DRIVER_ERROR_PARAMETER;
|
|
|
|
/* set output rate from control register */
|
|
set_adc24_output_rate(arg);
|
|
break;
|
|
|
|
default:
|
|
return ARM_DRIVER_ERROR_PARAMETER;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* RTE_ADC120 */
|
|
#if (RTE_ADC120)
|
|
|
|
static ADC_RESOURCES ADC120_RES = {
|
|
.cb_event = NULL, /* ARM_ADC_SignalEvent_t */
|
|
.regs = (ADC_Type *)ADC120_BASE, /* ADC register base address */
|
|
.conv.user_input = RTE_ADC120_INPUT_NUM, /* user input */
|
|
.drv_instance = ADC_INSTANCE_ADC12_0, /* Driver instances */
|
|
.intr_done0_irq_num = (IRQn_Type) ADC120_DONE0_IRQ_IRQn, /* ADC DONE0 IRQ number */
|
|
.intr_done1_irq_num = (IRQn_Type) ADC120_DONE1_IRQ_IRQn, /* ADC DONE1 IRQ number */
|
|
.intr_cmpa_irq_num = (IRQn_Type) ADC120_CMPA_IRQ_IRQn, /* ADC CMPA IRQ number */
|
|
.intr_cmpb_irq_num = (IRQn_Type) ADC120_CMPB_IRQ_IRQn, /* ADC CMPB IRQ number */
|
|
.busy = 0, /* ADC busy */
|
|
.intr_done0_irq_priority = RTE_ADC120_DONE0_IRQ_PRIORITY, /* ADC done0 irq priority */
|
|
.intr_done1_irq_priority = RTE_ADC120_DONE1_IRQ_PRIORITY, /* ADC done1 irq priority */
|
|
.intr_cmpa_irq_priority = RTE_ADC120_CMPA_IRQ_PRIORITY, /* ADC cmpa irq priority */
|
|
.intr_cmpb_irq_priority = RTE_ADC120_CMPB_IRQ_PRIORITY, /* ADC cmpa irq priority */
|
|
.clock_div = RTE_ADC120_CLOCK_DIV, /* clock divisor */
|
|
.avg_sample_num = RTE_ADC120_AVG_SAMPLE_NUM, /* average sample number */
|
|
.sample_width = RTE_ADC120_SAMPLE_WIDTH, /* sample width */
|
|
.shift_n_bit = RTE_ADC120_SHIFT_N_BIT, /* number of shift bit */
|
|
.shift_left_or_right = RTE_ADC120_SHIFT_LEFT_OR_RIGHT, /* shifting left to right */
|
|
.differential_enable = RTE_ADC120_DIFFERENTIAL_EN,
|
|
.comparator_enable = RTE_ADC120_COMPARATOR_EN,
|
|
.comparator_bias = RTE_ADC120_COMPARATOR_BIAS,
|
|
.pga_enable = RTE_ADC120_PGA_EN,
|
|
.pga_value = RTE_ADC120_PGA_GAIN
|
|
};
|
|
|
|
/**
|
|
@fn : void ADC120_DONE0_IRQHandler(void)
|
|
@brief : DONE0 (AVG SAMPLE RDY) Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC120_DONE0_IRQHandler(void)
|
|
{
|
|
conv_info_t *conv = &(ADC120_RES.conv);
|
|
|
|
adc_done0_irq_handler(ADC120_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_COMPLETE)
|
|
{
|
|
/* set busy flag to 0U */
|
|
ADC120_RES.busy = 0U;
|
|
|
|
/* clearing conversion complete status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_COMPLETE);
|
|
|
|
ADC120_RES.cb_event(ARM_ADC_EVENT_CONVERSION_COMPLETE, conv->curr_channel, conv->sampled_value);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn : void ADC120_DONE1_IRQHandler (void)
|
|
@brief : DONE1 (All sample taken) Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC120_DONE1_IRQHandler (void)
|
|
{
|
|
conv_info_t *conv = &(ADC120_RES.conv);
|
|
|
|
adc_done1_irq_handler(ADC120_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_COMPLETE)
|
|
{
|
|
/* set busy flag to 0U */
|
|
ADC120_RES.busy = 0U;
|
|
|
|
/* clearing conversion complete status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_COMPLETE);
|
|
|
|
ADC120_RES.cb_event(ARM_ADC_EVENT_CONVERSION_COMPLETE, conv->curr_channel, conv->sampled_value);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn : void ADC120_CMPA_IRQHandler (void)
|
|
@brief : CMPA Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC120_CMPA_IRQHandler (void)
|
|
{
|
|
conv_info_t *conv = &(ADC120_RES.conv);
|
|
|
|
adc_cmpa_irq_handler(ADC120_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_ABOVE_A)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_ABOVE_A);
|
|
|
|
ADC120_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_ABOVE_A, 0, 0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_BELOW_A)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_BELOW_A);
|
|
|
|
ADC120_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_BELOW_A, 0, 0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_BETWEEN_A_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_BETWEEN_A_B);
|
|
|
|
ADC120_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_BETWEEN_A_B, 0, 0);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn : void ADC120_CMPB_IRQHandler (void)
|
|
@brief : CMPB Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC120_CMPB_IRQHandler (void)
|
|
{
|
|
conv_info_t *conv = &(ADC120_RES.conv);
|
|
|
|
adc_cmpb_irq_handler(ADC120_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_ABOVE_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_ABOVE_B);
|
|
|
|
ADC120_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_ABOVE_B, 0, 0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_BELOW_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_BELOW_B);
|
|
|
|
ADC120_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_BELOW_B, 0, 0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_OUTSIDE_A_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_OUTSIDE_A_B);
|
|
|
|
ADC120_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_OUTSIDE_A_B, 0, 0);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn ARM_DRIVER_VERSION ADC120_GetVersion(void)
|
|
@brief Get ADC120 VERSION
|
|
@return DriverVersion
|
|
**/
|
|
static ARM_DRIVER_VERSION ADC120_GetVersion(void)
|
|
{
|
|
return DriverVersion;
|
|
}
|
|
/**
|
|
@fn ARM_ADC120_CAPABILITIES ADC120_GetCapabilities(void)
|
|
@brief Get ADC120 CAPABILITIES
|
|
@return DriverCapabilities
|
|
**/
|
|
static ARM_ADC_CAPABILITIES ADC120_GetCapabilities(void)
|
|
{
|
|
return DriverCapabilities;
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC120_Initialize(ARM_ADC_SignalEvent_t cb_event)
|
|
@brief : Initialize the ADC Interface
|
|
@parameter[1] : cb_event : Pointer to \ref ARM_ADC_SignalEvent_t
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC120_Initialize(ARM_ADC_SignalEvent_t cb_event)
|
|
{
|
|
return (ADC_Initialize(&ADC120_RES, cb_event));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC120_Uninitialize(void)
|
|
@brief : Un-Initialize the ADC Interface
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC120_Uninitialize(void)
|
|
{
|
|
return (ADC_Uninitialize(&ADC120_RES));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC120_Start(void)
|
|
@brief : start ADC driver
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC120_Start(void)
|
|
{
|
|
return (ADC_Start(&ADC120_RES));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC120_Stop(void)
|
|
@brief : stop ADC driver
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC120_Stop(void)
|
|
{
|
|
return (ADC_Stop(&ADC120_RES));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC120_PowerControl(ARM_POWER_STATE status)
|
|
@brief : Control ADC Interface power
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC120_PowerControl(ARM_POWER_STATE status)
|
|
{
|
|
return(ADC_PowerControl(&ADC120_RES, status));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC121_Control(uint32_t Control, uint32_t arg)
|
|
@brief : Control ADC Interface
|
|
@parameter[1] : Control : control operation
|
|
@parameter[2] : arg : Argument for operation
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC120_Control(uint32_t Control, uint32_t arg)
|
|
{
|
|
return (ADC_Control(&ADC120_RES, Control, arg));
|
|
}
|
|
|
|
extern ARM_DRIVER_ADC Driver_ADC120;
|
|
ARM_DRIVER_ADC Driver_ADC120 ={
|
|
ADC120_GetVersion,
|
|
ADC120_GetCapabilities,
|
|
ADC120_Initialize,
|
|
ADC120_Uninitialize,
|
|
ADC120_Start,
|
|
ADC120_Stop,
|
|
ADC120_PowerControl,
|
|
ADC120_Control
|
|
};
|
|
#endif /* RTE_ADC120 */
|
|
|
|
/* RTE_ADC121 */
|
|
#if (RTE_ADC121)
|
|
|
|
static ADC_RESOURCES ADC121_RES = {
|
|
.cb_event = NULL, /* ARM_ADC_SignalEvent_t */
|
|
.regs = (ADC_Type *)ADC121_BASE, /* ADC register base address */
|
|
.conv.user_input = RTE_ADC121_INPUT_NUM, /* user input */
|
|
.drv_instance = ADC_INSTANCE_ADC12_1, /* Driver instances */
|
|
.intr_done0_irq_num = (IRQn_Type) ADC121_DONE0_IRQ_IRQn, /* ADC DONE0 number */
|
|
.intr_done1_irq_num = (IRQn_Type) ADC121_DONE1_IRQ_IRQn, /* ADC DONE1 IRQ number */
|
|
.intr_cmpa_irq_num = (IRQn_Type) ADC121_CMPA_IRQ_IRQn, /* ADC CMPA IRQ number */
|
|
.intr_cmpb_irq_num = (IRQn_Type) ADC121_CMPB_IRQ_IRQn, /* ADC CMPB IRQ number */
|
|
.busy = 0, /* ADC busy */
|
|
.intr_done0_irq_priority = RTE_ADC121_DONE0_IRQ_PRIORITY, /* ADC done0 irq priority */
|
|
.intr_done1_irq_priority = RTE_ADC121_DONE1_IRQ_PRIORITY, /* ADC done1 irq priority */
|
|
.intr_cmpa_irq_priority = RTE_ADC121_CMPA_IRQ_PRIORITY, /* ADC cmpa irq priority */
|
|
.intr_cmpb_irq_priority = RTE_ADC121_CMPB_IRQ_PRIORITY, /* ADC cmpa irq priority */
|
|
.clock_div = RTE_ADC121_CLOCK_DIV, /* clock divisor */
|
|
.avg_sample_num = RTE_ADC121_AVG_SAMPLE_NUM, /* average sample number */
|
|
.sample_width = RTE_ADC121_SAMPLE_WIDTH, /* sample width */
|
|
.shift_n_bit = RTE_ADC121_SHIFT_N_BIT, /* number of shift bit */
|
|
.shift_left_or_right = RTE_ADC121_SHIFT_LEFT_OR_RIGHT, /* shifting left to right */
|
|
.differential_enable = RTE_ADC121_DIFFERENTIAL_EN,
|
|
.comparator_enable = RTE_ADC121_COMPARATOR_EN,
|
|
.comparator_bias = RTE_ADC121_COMPARATOR_BIAS,
|
|
.pga_enable = RTE_ADC121_PGA_EN,
|
|
.pga_value = RTE_ADC121_PGA_GAIN
|
|
};
|
|
|
|
/**
|
|
@fn : void ADC121_DONE0_IRQHandler(void)
|
|
@brief : DONE0 (AVG SAMPLE RDY) Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC121_DONE0_IRQHandler(void)
|
|
{
|
|
conv_info_t *conv = &(ADC121_RES.conv);
|
|
|
|
adc_done0_irq_handler(ADC121_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_COMPLETE)
|
|
{
|
|
/* set busy flag to 0U */
|
|
ADC121_RES.busy = 0U;
|
|
|
|
/* clearing conversion complete status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_COMPLETE);
|
|
|
|
ADC121_RES.cb_event(ARM_ADC_EVENT_CONVERSION_COMPLETE, conv->curr_channel, conv->sampled_value);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn : void ADC121_DONE1_IRQHandler (void)
|
|
@brief : DONE1 (All sample taken) Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC121_DONE1_IRQHandler (void)
|
|
{
|
|
conv_info_t *conv = &(ADC121_RES.conv);
|
|
|
|
adc_done1_irq_handler(ADC121_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_COMPLETE)
|
|
{
|
|
/* set busy flag to 0U */
|
|
ADC121_RES.busy = 0U;
|
|
|
|
/* clearing conversion complete status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_COMPLETE);
|
|
|
|
ADC121_RES.cb_event(ARM_ADC_EVENT_CONVERSION_COMPLETE, conv->curr_channel, conv->sampled_value);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn : void ADC121_CMPA_IRQHandler (void)
|
|
@brief : CMPA Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC121_CMPA_IRQHandler (void)
|
|
{
|
|
conv_info_t *conv = &(ADC121_RES.conv);
|
|
|
|
adc_cmpa_irq_handler(ADC121_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_ABOVE_A)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_ABOVE_A);
|
|
|
|
ADC121_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_ABOVE_A, 0, 0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_BELOW_A)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_BELOW_A);
|
|
|
|
ADC121_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_BELOW_A, 0, 0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_BETWEEN_A_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_BETWEEN_A_B);
|
|
|
|
ADC121_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_BETWEEN_A_B, 0, 0);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn : void ADC122_CMPB_IRQHandler (void)
|
|
@brief : CMPB Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC121_CMPB_IRQHandler (void)
|
|
{
|
|
conv_info_t *conv = &(ADC121_RES.conv);
|
|
|
|
adc_cmpb_irq_handler(ADC121_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_ABOVE_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_ABOVE_B);
|
|
|
|
ADC121_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_ABOVE_B, 0, 0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_BELOW_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_BELOW_B);
|
|
|
|
ADC121_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_BELOW_B, 0, 0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_OUTSIDE_A_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_OUTSIDE_A_B);
|
|
|
|
ADC121_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_OUTSIDE_A_B, 0, 0);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn ARM_DRIVER_VERSION ADC121_GetVersion(void)
|
|
@brief Get ADC121 VERSION
|
|
@return DriverVersion
|
|
**/
|
|
static ARM_DRIVER_VERSION ADC121_GetVersion(void)
|
|
{
|
|
return DriverVersion;
|
|
}
|
|
/**
|
|
@fn ARM_ADC121_CAPABILITIES ADC121_GetCapabilities(void)
|
|
@brief Get ADC121 CAPABILITIES
|
|
@return DriverCapabilities
|
|
**/
|
|
static ARM_ADC_CAPABILITIES ADC121_GetCapabilities(void)
|
|
{
|
|
return DriverCapabilities;
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC121_Initialize(ARM_ADC_SignalEvent_t cb_event)
|
|
@brief : Initialize the ADC Interface
|
|
@parameter[1] : cb_event : Pointer to \ref ARM_ADC_SignalEvent_t
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC121_Initialize(ARM_ADC_SignalEvent_t cb_event)
|
|
{
|
|
return (ADC_Initialize(&ADC121_RES, cb_event));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC121_Uninitialize(void)
|
|
@brief : Un-Initialize the ADC Interface
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC121_Uninitialize(void)
|
|
{
|
|
return (ADC_Uninitialize(&ADC121_RES));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC121_Start(void)
|
|
@brief : start ADC driver
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC121_Start(void)
|
|
{
|
|
return (ADC_Start(&ADC121_RES));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC121_Stop(void)
|
|
@brief : stop ADC driver
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC121_Stop(void)
|
|
{
|
|
return (ADC_Stop(&ADC121_RES));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC121_PowerControl(ARM_POWER_STATE status)
|
|
@brief : Control ADC Interface power
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC121_PowerControl(ARM_POWER_STATE status)
|
|
{
|
|
return(ADC_PowerControl(&ADC121_RES, status));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC121_Control(uint32_t Control, uint32_t arg)
|
|
@brief : Control ADC Interface
|
|
@parameter[1] : Control : control operation
|
|
@parameter[2] : arg : Argument for operation
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC121_Control(uint32_t Control, uint32_t arg)
|
|
{
|
|
return (ADC_Control(&ADC121_RES, Control, arg));
|
|
}
|
|
|
|
extern ARM_DRIVER_ADC Driver_ADC121;
|
|
ARM_DRIVER_ADC Driver_ADC121 ={
|
|
ADC121_GetVersion,
|
|
ADC121_GetCapabilities,
|
|
ADC121_Initialize,
|
|
ADC121_Uninitialize,
|
|
ADC121_Start,
|
|
ADC121_Stop,
|
|
ADC121_PowerControl,
|
|
ADC121_Control
|
|
};
|
|
#endif /* RTE_ADC121 */
|
|
|
|
/* RTE_ADC122 */
|
|
#if (RTE_ADC122)
|
|
|
|
static ADC_RESOURCES ADC122_RES = {
|
|
.cb_event = NULL, /* ARM_ADC_SignalEvent_t */
|
|
.regs = (ADC_Type *)ADC122_BASE, /* ADC register base address */
|
|
.conv.user_input = RTE_ADC122_INPUT_NUM, /* user input */
|
|
.drv_instance = ADC_INSTANCE_ADC12_2, /* Driver instances */
|
|
.intr_done0_irq_num = (IRQn_Type) ADC122_DONE0_IRQ_IRQn, /* ADC DONE0 IRQ number */
|
|
.intr_done1_irq_num = (IRQn_Type) ADC122_DONE1_IRQ_IRQn, /* ADC DONE1 IRQ number */
|
|
.intr_cmpa_irq_num = (IRQn_Type) ADC122_CMPA_IRQ_IRQn, /* ADC CMPA IRQ number */
|
|
.intr_cmpb_irq_num = (IRQn_Type) ADC122_CMPB_IRQ_IRQn, /* ADC CMPB IRQ number */
|
|
.busy = 0, /* ADC busy */
|
|
.intr_done0_irq_priority = RTE_ADC122_DONE0_IRQ_PRIORITY, /* ADC done0 irq priority */
|
|
.intr_done1_irq_priority = RTE_ADC122_DONE1_IRQ_PRIORITY, /* ADC done1 irq priority */
|
|
.intr_cmpa_irq_priority = RTE_ADC122_CMPA_IRQ_PRIORITY, /* ADC cmpa irq priority */
|
|
.intr_cmpb_irq_priority = RTE_ADC122_CMPB_IRQ_PRIORITY, /* ADC cmpa irq priority */
|
|
.clock_div = RTE_ADC122_CLOCK_DIV, /* clock divisor */
|
|
.avg_sample_num = RTE_ADC122_AVG_SAMPLE_NUM, /* average sample number */
|
|
.sample_width = RTE_ADC122_SAMPLE_WIDTH, /* sample width */
|
|
.shift_n_bit = RTE_ADC122_SHIFT_N_BIT, /* number of shift bit */
|
|
.shift_left_or_right = RTE_ADC122_SHIFT_LEFT_OR_RIGHT, /* shifting left to right */
|
|
.differential_enable = RTE_ADC122_DIFFERENTIAL_EN,
|
|
.comparator_enable = RTE_ADC122_COMPARATOR_EN,
|
|
.comparator_bias = RTE_ADC122_COMPARATOR_BIAS,
|
|
.pga_enable = RTE_ADC122_PGA_EN,
|
|
.pga_value = RTE_ADC122_PGA_GAIN
|
|
};
|
|
|
|
/**
|
|
@fn : void ADC122_DONE0_IRQHandler(void)
|
|
@brief : DONE0 (AVG SAMPLE RDY) Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC122_DONE0_IRQHandler(void)
|
|
{
|
|
conv_info_t *conv = &(ADC122_RES.conv);
|
|
|
|
adc_done0_irq_handler(ADC122_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_COMPLETE)
|
|
{
|
|
/* set busy flag to 0U */
|
|
ADC122_RES.busy = 0U;
|
|
|
|
/* clearing conversion complete status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_COMPLETE);
|
|
|
|
ADC122_RES.cb_event(ARM_ADC_EVENT_CONVERSION_COMPLETE, conv->curr_channel, conv->sampled_value);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn : void ADC122_DONE1_IRQHandler (void)
|
|
@brief : DONE1 (All sample taken) Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC122_DONE1_IRQHandler (void)
|
|
{
|
|
conv_info_t *conv = &(ADC122_RES.conv);
|
|
|
|
adc_done1_irq_handler(ADC122_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_COMPLETE)
|
|
{
|
|
/* set busy flag to 0U */
|
|
ADC122_RES.busy = 0U;
|
|
|
|
/* clearing conversion complete status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_COMPLETE);
|
|
|
|
ADC122_RES.cb_event(ARM_ADC_EVENT_CONVERSION_COMPLETE, conv->curr_channel, conv->sampled_value);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn : void ADC122_CMPA_IRQHandler (void)
|
|
@brief : CMPA Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC122_CMPA_IRQHandler (void)
|
|
{
|
|
conv_info_t *conv = &(ADC122_RES.conv);
|
|
|
|
adc_cmpa_irq_handler(ADC122_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_ABOVE_A)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_ABOVE_A);
|
|
|
|
ADC122_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_ABOVE_A,0,0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_BELOW_A)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_BELOW_A);
|
|
|
|
ADC122_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_BELOW_A,0,0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_BETWEEN_A_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_BETWEEN_A_B);
|
|
|
|
ADC122_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_BETWEEN_A_B,0,0);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn : void ADC122_CMPB_IRQHandler (void)
|
|
@brief : CMPB Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC122_CMPB_IRQHandler (void)
|
|
{
|
|
conv_info_t *conv = &(ADC122_RES.conv);
|
|
|
|
adc_cmpb_irq_handler(ADC122_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_ABOVE_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_ABOVE_B);
|
|
|
|
ADC122_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_ABOVE_B,0,0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_BELOW_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_BELOW_B);
|
|
|
|
ADC122_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_BELOW_B,0,0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_OUTSIDE_A_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_OUTSIDE_A_B);
|
|
|
|
ADC122_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_OUTSIDE_A_B,0,0);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn ARM_DRIVER_VERSION ADC1_GetVersion(void)
|
|
@brief Get ADC1 VERSION
|
|
@return DriverVersion
|
|
**/
|
|
static ARM_DRIVER_VERSION ADC122_GetVersion(void)
|
|
{
|
|
return DriverVersion;
|
|
}
|
|
/**
|
|
@fn ARM_ADC122_CAPABILITIES ADC122_GetCapabilities(void)
|
|
@brief Get ADC122 CAPABILITIES
|
|
@return DriverCapabilities
|
|
**/
|
|
static ARM_ADC_CAPABILITIES ADC122_GetCapabilities(void)
|
|
{
|
|
return DriverCapabilities;
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC122_Initialize(ARM_ADC_SignalEvent_t cb_event)
|
|
@brief : Initialize the ADC Interface
|
|
@parameter[1] : cb_event : Pointer to \ref ARM_ADC_SignalEvent_t
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC122_Initialize(ARM_ADC_SignalEvent_t cb_event)
|
|
{
|
|
return (ADC_Initialize(&ADC122_RES, cb_event));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC122_Uninitialize(void)
|
|
@brief : Un-Initialize the ADC Interface
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC122_Uninitialize(void)
|
|
{
|
|
return (ADC_Uninitialize(&ADC122_RES));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC122_Start(void)
|
|
@brief : start ADC driver
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC122_Start(void)
|
|
{
|
|
return (ADC_Start(&ADC122_RES));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC122_Stop(void)
|
|
@brief : stop ADC driver
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC122_Stop(void)
|
|
{
|
|
return (ADC_Stop(&ADC122_RES));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC122_PowerControl(ARM_POWER_STATE status)
|
|
@brief : Control ADC Interface power
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC122_PowerControl(ARM_POWER_STATE status)
|
|
{
|
|
return(ADC_PowerControl( &ADC122_RES, status));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC122_Control(uint32_t Control, uint32_t arg)
|
|
@brief : Control ADC Interface
|
|
@parameter[1] : Control : control operation
|
|
@parameter[2] : arg : Argument for operation
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC122_Control(uint32_t Control, uint32_t arg)
|
|
{
|
|
return (ADC_Control(&ADC122_RES, Control, arg));
|
|
}
|
|
|
|
extern ARM_DRIVER_ADC Driver_ADC122;
|
|
ARM_DRIVER_ADC Driver_ADC122 ={
|
|
ADC122_GetVersion,
|
|
ADC122_GetCapabilities,
|
|
ADC122_Initialize,
|
|
ADC122_Uninitialize,
|
|
ADC122_Start,
|
|
ADC122_Stop,
|
|
ADC122_PowerControl,
|
|
ADC122_Control
|
|
};
|
|
#endif /* RTE_ADC122 */
|
|
|
|
/* RTE_ADC24 */
|
|
#if (RTE_ADC24)
|
|
|
|
static ADC_RESOURCES ADC24_RES = {
|
|
.cb_event = NULL, /* ARM_ADC_SignalEvent_t */
|
|
.regs = (ADC_Type *)ADC24_BASE, /* ADC register base address */
|
|
.conv.user_input = RTE_ADC24_INPUT_NUM, /* user input */
|
|
.drv_instance = ADC_INSTANCE_ADC24_0, /* Driver instances */
|
|
.intr_done0_irq_num = (IRQn_Type) ADC24_DONE0_IRQ_IRQn, /* ADC DONE0 IRQ number */
|
|
.intr_done1_irq_num = (IRQn_Type) ADC24_DONE1_IRQ_IRQn, /* ADC DONE1 IRQ number */
|
|
.intr_cmpa_irq_num = (IRQn_Type) ADC24_CMPA_IRQ_IRQn, /* ADC CMPA IRQ number */
|
|
.intr_cmpb_irq_num = (IRQn_Type) ADC24_CMPB_IRQ_IRQn, /* ADC CMPB IRQ number */
|
|
.busy = 0, /* ADC busy */
|
|
.intr_done0_irq_priority = RTE_ADC24_DONE0_IRQ_PRIORITY, /* ADC done0 irq priority */
|
|
.intr_done1_irq_priority = RTE_ADC24_DONE1_IRQ_PRIORITY, /* ADC done1 irq priority */
|
|
.intr_cmpa_irq_priority = RTE_ADC24_CMPA_IRQ_PRIORITY, /* ADC cmpa irq priority */
|
|
.intr_cmpb_irq_priority = RTE_ADC24_CMPB_IRQ_PRIORITY, /* ADC cmpa irq priority */
|
|
.clock_div = RTE_ADC24_CLOCK_DIV, /* clock divisor */
|
|
.avg_sample_num = RTE_ADC24_AVG_SAMPLE_NUM, /* average sample number */
|
|
.shift_n_bit = RTE_ADC24_SHIFT_N_BIT, /* number of shift bit */
|
|
.shift_left_or_right = RTE_ADC24_SHIFT_LEFT_OR_RIGHT, /* shifting left to right */
|
|
.pga_enable = RTE_ADC24_PGA_EN,
|
|
.pga_value = RTE_ADC24_PGA_GAIN,
|
|
.bias = RTE_ADC24_BIAS,
|
|
.output_rate = RTE_ADC24_OUTPUT_RATE
|
|
};
|
|
|
|
/**
|
|
@fn : void ADC24_CMPB_IRQHandler (void)
|
|
@brief : DONE0 (AVG SAMPLE RDY) Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC24_DONE0_IRQHandler(void)
|
|
{
|
|
conv_info_t *conv = &(ADC24_RES.conv);
|
|
|
|
adc_done0_irq_handler(ADC24_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_COMPLETE)
|
|
{
|
|
/* set busy flag to 0U */
|
|
ADC24_RES.busy = 0U;
|
|
|
|
/* clearing conversion complete status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_COMPLETE);
|
|
|
|
ADC24_RES.cb_event(ARM_ADC_EVENT_CONVERSION_COMPLETE, conv->curr_channel, conv->sampled_value);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn : void ADC24_DONE1_IRQHandler (void)
|
|
@brief : DONE1 (All sample taken) Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC24_DONE1_IRQHandler (void)
|
|
{
|
|
conv_info_t *conv = &(ADC24_RES.conv);
|
|
|
|
adc_done1_irq_handler(ADC24_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_COMPLETE)
|
|
{
|
|
/* set busy flag to 0U */
|
|
ADC24_RES.busy = 0U;
|
|
|
|
/* clearing conversion complete status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_COMPLETE);
|
|
|
|
ADC24_RES.cb_event(ARM_ADC_EVENT_CONVERSION_COMPLETE, conv->curr_channel, conv->sampled_value);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn : void ADC24_CMPA_IRQHandler (void)
|
|
@brief : CMPA Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC24_CMPA_IRQHandler (void)
|
|
{
|
|
conv_info_t *conv = &(ADC24_RES.conv);
|
|
|
|
adc_cmpa_irq_handler(ADC24_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_ABOVE_A)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_ABOVE_A);
|
|
|
|
ADC24_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_ABOVE_A, 0, 0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_BELOW_A)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_BELOW_A);
|
|
|
|
ADC24_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_BELOW_A, 0, 0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_BETWEEN_A_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_BETWEEN_A_B);
|
|
|
|
ADC24_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_BETWEEN_A_B, 0, 0);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn : void ADC24_CMPB_IRQHandler (void)
|
|
@brief : CMPB Interrupt Handler
|
|
@parameter : NONE
|
|
@return : NONE
|
|
**/
|
|
void ADC24_CMPB_IRQHandler (void)
|
|
{
|
|
conv_info_t *conv = &(ADC24_RES.conv);
|
|
|
|
adc_cmpb_irq_handler(ADC24_RES.regs, conv);
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_ABOVE_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_ABOVE_B);
|
|
|
|
ADC24_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_ABOVE_B, 0, 0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_BELOW_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_BELOW_B);
|
|
|
|
ADC24_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_BELOW_B, 0, 0);
|
|
}
|
|
|
|
if (conv->status & ADC_CONV_STAT_CMP_THLD_OUTSIDE_A_B)
|
|
{
|
|
/* clearing comparator status */
|
|
conv->status = (conv->status & ~ADC_CONV_STAT_CMP_THLD_OUTSIDE_A_B);
|
|
|
|
ADC24_RES.cb_event(ARM_ADC_COMPARATOR_THRESHOLD_OUTSIDE_A_B, 0, 0);
|
|
}
|
|
}
|
|
|
|
/**
|
|
@fn ARM_DRIVER_VERSION ADC24_GetVersion(void)
|
|
@brief Get ADC24 VERSION
|
|
@return DriverVersion
|
|
**/
|
|
static ARM_DRIVER_VERSION ADC24_GetVersion(void)
|
|
{
|
|
return DriverVersion;
|
|
}
|
|
/**
|
|
@fn ARM_ADC24_CAPABILITIES ADC24_GetCapabilities(void)
|
|
@brief Get ADC24 CAPABILITIES
|
|
@return DriverCapabilities
|
|
**/
|
|
static ARM_ADC_CAPABILITIES ADC24_GetCapabilities(void)
|
|
{
|
|
return DriverCapabilities;
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC24_Initialize(ARM_ADC_SignalEvent_t cb_event)
|
|
@brief : Initialize the ADC Interface
|
|
@parameter[1] : cb_event : Pointer to \ref ARM_ADC_SignalEvent_t
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC24_Initialize(ARM_ADC_SignalEvent_t cb_event)
|
|
{
|
|
return (ADC_Initialize(&ADC24_RES, cb_event));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC24_Uninitialize(void)
|
|
@brief : Un-Initialize the ADC Interface
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC24_Uninitialize(void)
|
|
{
|
|
return (ADC_Uninitialize(&ADC24_RES));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC24_Start(void)
|
|
@brief : start ADC driver
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC24_Start(void)
|
|
{
|
|
return (ADC_Start(&ADC24_RES));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC24_Stop(void)
|
|
@brief : stop ADC driver
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC24_Stop(void)
|
|
{
|
|
return (ADC_Stop(&ADC24_RES));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC24_PowerControl(ARM_POWER_STATE status)
|
|
@brief : Control ADC Interface power
|
|
@parameter : NONE
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC24_PowerControl(ARM_POWER_STATE status)
|
|
{
|
|
return(ADC_PowerControl( &ADC24_RES, status));
|
|
}
|
|
|
|
/**
|
|
@fn : int32_t ADC24_Control(uint32_t Control, uint32_t arg)
|
|
@brief : Control ADC Interface
|
|
@parameter[1] : Control : control operation
|
|
@parameter[2] : arg : Argument for operation
|
|
@return : execution_status
|
|
**/
|
|
static int32_t ADC24_Control(uint32_t Control, uint32_t arg)
|
|
{
|
|
return (ADC_Control(&ADC24_RES, Control, arg));
|
|
}
|
|
|
|
extern ARM_DRIVER_ADC Driver_ADC24;
|
|
ARM_DRIVER_ADC Driver_ADC24 ={
|
|
ADC24_GetVersion,
|
|
ADC24_GetCapabilities,
|
|
ADC24_Initialize,
|
|
ADC24_Uninitialize,
|
|
ADC24_Start,
|
|
ADC24_Stop,
|
|
ADC24_PowerControl,
|
|
ADC24_Control
|
|
};
|
|
#endif /* RTE_ADC24 */
|