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155 lines
7.3 KiB
C
155 lines
7.3 KiB
C
/*
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* This file is part of the OpenMV project.
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*
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* Copyright (c) 2013-2022 Ibrahim Abdelkader <iabdalkader@openmv.io>
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* Copyright (c) 2013-2022 Kwabena W. Agyeman <kwagyeman@openmv.io>
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*
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* This work is licensed under the MIT license, see the file LICENSE for details.
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*
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* HM0360 register definitions.
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*/
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#ifndef __REG_REGS_H__
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#define __REG_REGS_H__
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// Read only registers
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#define MODEL_ID_H 0x0000
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#define MODEL_ID_L 0x0001
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#define SILICON_REV 0x0002
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#define FRAME_COUNT_H 0x0005
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#define FRAME_COUNT_L 0x0006
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#define PIXEL_ORDER 0x0007
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// Sensor mode control
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#define MODE_SELECT 0x0100
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#define IMG_ORIENTATION 0x0101
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#define EMBEDDED_LINE_EN 0x0102
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#define SW_RESET 0x0103
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#define COMMAND_UPDATE 0x0104
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// Sensor exposure gain control
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#define INTEGRATION_H 0x0202
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#define INTEGRATION_L 0x0203
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#define ANALOG_GAIN 0x0205
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#define DIGITAL_GAIN_H 0x020E
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#define DIGITAL_GAIN_L 0x020F
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// Clock control
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#define PLL1_CONFIG 0x0300
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#define PLL2_CONFIG 0x0301
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#define PLL3_CONFIG 0x0302
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// Frame timing control
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#define FRAME_LEN_LINES_H 0x0340
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#define FRAME_LEN_LINES_L 0x0341
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#define LINE_LEN_PCK_H 0x0342
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#define LINE_LEN_PCK_L 0x0343
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// Monochrome programming
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#define MONO_MODE 0x0370
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#define MONO_MODE_ISP 0x0371
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#define MONO_MODE_SEL 0x0372
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// Binning mode control
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#define H_SUBSAMPLE 0x0380
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#define V_SUBSAMPLE 0x0381
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#define BINNING_MODE 0x0382
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// Test pattern control
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#define TEST_PATTERN_MODE 0x0601
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// Black level control
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#define BLC_TGT 0x1004
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#define BLC2_TGT 0x1009
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#define MONO_CTRL 0x100A
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// VSYNC / HSYNC / pixel shift registers
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#define OPFM_CTRL 0x1014
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// Tone mapping registers
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#define CMPRS_CTRL 0x102F
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#define CMPRS_01 0x1030
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#define CMPRS_02 0x1031
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#define CMPRS_03 0x1032
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#define CMPRS_04 0x1033
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#define CMPRS_05 0x1034
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#define CMPRS_06 0x1035
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#define CMPRS_07 0x1036
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#define CMPRS_08 0x1037
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#define CMPRS_09 0x1038
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#define CMPRS_10 0x1039
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#define CMPRS_11 0x103A
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#define CMPRS_12 0x103B
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#define CMPRS_13 0x103C
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#define CMPRS_14 0x103D
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#define CMPRS_15 0x103E
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#define CMPRS_16 0x103F
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// Automatic exposure control
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#define AE_CTRL 0x2000
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#define AE_CTRL1 0x2001
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#define CNT_ORGH_H 0x2002
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#define CNT_ORGH_L 0x2003
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#define CNT_ORGV_H 0x2004
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#define CNT_ORGV_L 0x2005
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#define CNT_STH_H 0x2006
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#define CNT_STH_L 0x2007
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#define CNT_STV_H 0x2008
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#define CNT_STV_L 0x2009
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#define CTRL_PG_SKIPCNT 0x200A
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#define BV_WIN_WEIGHT_EN 0x200D
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#define MAX_INTG_H 0x2029
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#define MAX_INTG_L 0x202A
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#define MAX_AGAIN 0x202B
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#define MAX_DGAIN_H 0x202C
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#define MAX_DGAIN_L 0x202D
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#define MIN_INTG 0x202E
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#define MIN_AGAIN 0x202F
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#define MIN_DGAIN 0x2030
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#define T_DAMPING 0x2031
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#define N_DAMPING 0x2032
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#define ALC_TH 0x2033
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#define AE_TARGET_MEAN 0x2034
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#define AE_MIN_MEAN 0x2035
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#define AE_TARGET_ZONE 0x2036
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#define CONVERGE_IN_TH 0x2037
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#define CONVERGE_OUT_TH 0x2038
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#define FS_CTRL 0x203B
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#define FS_60HZ_H 0x203C
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#define FS_60HZ_L 0x203D
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#define FS_50HZ_H 0x203E
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#define FS_50HZ_L 0x203F
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#define FRAME_CNT_TH 0x205B
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#define AE_MEAN 0x205D
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#define AE_CONVERGE 0x2060
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#define AE_BLI_TGT 0x2070
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// Interrupt control
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#define PULSE_MODE 0x2061
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#define PULSE_TH_H 0x2062
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#define PULSE_TH_L 0x2063
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#define INT_INDIC 0x2064
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#define INT_CLEAR 0x2065
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// Motion detection control
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#define MD_CTRL 0x2080
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#define ROI_START_END_V 0x2081
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#define ROI_START_END_H 0x2082
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#define MD_TH_MIN 0x2083
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#define MD_TH_STR_L 0x2084
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#define MD_TH_STR_H 0x2085
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#define MD_LIGHT_COEF 0x2099
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#define MD_BLOCK_NUM_TH 0x209B
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#define MD_LATENCY 0x209C
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#define MD_LATENCY_TH 0x209D
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#define MD_CTRL1 0x209E
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// Context switch control registers
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#define PMU_CFG_3 0x3024
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#define PMU_CFG_4 0x3025
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// Operation mode control
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#define WIN_MODE 0x3030
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// IO and clock control
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#define PAD_REGISTER_07 0x3112
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// Register bits/values
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#define HIMAX_RESET 0x01
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#define HIMAX_MODE_STANDBY 0x00
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#define HIMAX_MODE_STREAMING 0x01 // I2C triggered streaming enable
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#define HIMAX_MODE_STREAMING_NFRAMES 0x03 // Output N frames
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#define HIMAX_MODE_STREAMING_TRIG 0x05 // Hardware Trigger
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#define HIMAX_SET_HMIRROR(r, x) ((r&0xFE)|((x&1)<<0))
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#define HIMAX_SET_VMIRROR(r, x) ((r&0xFD)|((x&1)<<1))
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#define PCLK_RISING_EDGE 0x00
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#define PCLK_FALLING_EDGE 0x01
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#define AE_CTRL_ENABLE 0x00
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#define AE_CTRL_DISABLE 0x01
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#endif //__REG_REGS_H__
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