mirror of
https://github.com/openmv/openmv.git
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2857 lines
106 KiB
XML
2857 lines
106 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
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<Device>
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<DeviceID>0x476</DeviceID>
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<Vendor>STMicroelectronics</Vendor>
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<Type>MCU</Type>
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<CPU>Cortex-M33</CPU>
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<Name>STM32U5Fx/5Gx</Name>
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<Series>STM32U5</Series>
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<Description>ARM 32-bit Cortex-M33 based device</Description>
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<Configurations>
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<!-- JTAG_SWD Interface -->
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<Interface name="JTAG_SWD">
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<Configuration number="0x0"> <!-- Single Bank non secure -->
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<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x0"/> </DBANK>
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<TZEN reference="0x0"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x0"/> </TZEN>
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</Configuration>
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<Configuration number="0x1"> <!-- Dual Bank non secure -->
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<DBANK reference="0x1"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x00200000"/> </DBANK>
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<TZEN reference="0x0"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x0"/> </TZEN>
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</Configuration>
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<Configuration number="0x2"> <!-- Single Bank secure + RDP=0xAA -->
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<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x0"/> </DBANK>
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<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
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<RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x000000AA"/> </RDP>
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</Configuration>
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<Configuration number="0x3"> <!-- Dual Bank secure + RDP=0xAA -->
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<DBANK reference="0x1"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x00200000"/> </DBANK>
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<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
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<RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x000000AA"/> </RDP>
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</Configuration>
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<Configuration number="0xA"> <!-- Single Bank + RDP=0x55 -->
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<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x0"/> </DBANK>
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<RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x00000055"/> </RDP>
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<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
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</Configuration>
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<Configuration number="0xB"> <!-- Dual Bank + RDP=0x55 -->
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<DBANK reference="0x1"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x00200000"/> </DBANK>
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<RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x00000055"/> </RDP>
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<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
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</Configuration>
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<Configuration number="0x4"> <!-- Single Bank secure -->
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<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x0"/> </DBANK>
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<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
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</Configuration>
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<Configuration number="0x5"> <!-- Dual Bank secure -->
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<DBANK reference="0x1"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x00200000"/> </DBANK>
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<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
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</Configuration>
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</Interface>
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<!-- Bootloader Interface -->
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<Interface name="Bootloader">
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<Configuration number="0x6"> <!-- Single Bank-->
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<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x0"/> </DBANK>
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<TZEN reference="0x0"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x0"/> </TZEN>
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</Configuration>
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<Configuration number="0x7"> <!-- Dual Bank-->
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<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x00200000"/> </DBANK>
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<TZEN reference="0x0"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x0"/> </TZEN>
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</Configuration>
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<Configuration number="0x8"> <!-- Single Bank secure-->
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<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x0"/> </DBANK>
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<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
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<!--<RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x000000AA"/> </RDP>-->
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</Configuration>
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<Configuration number="0x9"> <!-- Dual Bank seure-->
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<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x00200000"/> </DBANK>
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<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
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<!--<RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x000000AA"/> </RDP>-->
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</Configuration>
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</Interface>
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</Configurations>
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<!-- Peripherals -->
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<Peripherals>
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<!-- Embedded SRAM -->
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<Peripheral>
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<Name>Embedded SRAM</Name>
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<Type>Storage</Type>
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<Description/>
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<ErasedValue>0xFF</ErasedValue>
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<Access>RWE</Access>
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<!-- 96 KB -->
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<Configuration config="0,1,6,7,8,9,10,11">
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<Parameters address="0x20000000" name="SRAM" size="0x40000"/>
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<Description/>
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<Organization>Single</Organization>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x20000000" name="SRAM" occurrence="0x1" size="0x40000"/>
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</Field>
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</Bank>
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</Configuration>
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<Configuration config="2,3,4,5">
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<Parameters address="0x30000000" name="SRAM" size="0x40000"/>
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<Description/>
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<Organization>Single</Organization>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x30000000" name="SRAM" occurrence="0x1" size="0x40000"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- Embedded Flash -->
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<Peripheral>
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<Name>Embedded Flash</Name>
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<Type>Storage</Type>
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<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
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<ErasedValue>0xFF</ErasedValue>
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<Access>RWE</Access>
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<FlashSize address="0x0BFA0764" default="0x400000"/>
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<BootloaderVersion address="0x0BF99EFE"/>
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<DBGMCU_CR address="0xE0044004" mask="0x06"/>
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<DBGMCU_APB1_FZ address="0xE0044008" mask="0x1800"/>
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<Configuration config="0,6,10"> <!-- Single Bank -->
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<Parameters address="0x08000000" name=" 4096 Kbyte Embedded Flash" size="0x400000"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x10</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x08000000" name="sector0" occurrence="0x100" size="0x4000"/>
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</Field>
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</Bank>
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</Configuration>
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<Configuration config="1,7,11"> <!-- dual Bank -->
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<Parameters address="0x08000000" name=" 4 Mbyte Embedded Flash" size="0x400000"/>
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<Description/>
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<Organization>Dual</Organization>
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<Alignment>0x10</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x08000000" name="sector0" occurrence="0x100" size="0x2000"/>
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</Field>
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</Bank>
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<Bank name="Bank 2">
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<Field>
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<Parameters address="0x08200000" name="sector256" occurrence="0x100" size="0x2000"/>
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</Field>
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</Bank>
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</Configuration>
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<Configuration config="2,4,8"> <!-- Single Bank secure -->
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<Parameters address="0x0C000000" name=" 4 Mbyte Embedded Flash" size="0x400000"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x10</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x0c000000" name="sector0" occurrence="0x100" size="0x4000"/>
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</Field>
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</Bank>
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</Configuration>
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<Configuration config="3,5,9"> <!-- dual Bank secure -->
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<Parameters address="0x0c000000" name=" 4 Mbyte Embedded Flash" size="0x400000"/>
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<Description/>
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<Organization>Dual</Organization>
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<Alignment>0x10</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x0c000000" name="sector0" occurrence="0x100" size="0x2000"/>
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</Field>
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</Bank>
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<Bank name="Bank 2">
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<Field>
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<Parameters address="0x0c200000" name="sector256" occurrence="0x100" size="0x2000"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- Data EEPROM -->
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<Peripheral>
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<Name>Data EEPROM</Name>
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<Type>Storage</Type>
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<Description>The Data EEPROM memory block. It contains user data.</Description>
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<ErasedValue>0xFF</ErasedValue>
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<Access>RWE</Access>
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<Configuration config="2,4,7,9,10">
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<Parameters address="0x08000000" name=" 4 Mbyte Data EEPROM" size="0x400000"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x4</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x08000000" name="sector0" occurrence="0x100" size="0x4000"/>
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</Field>
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</Bank>
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</Configuration>
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<Configuration config="3,5,6,8,11">
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<Parameters address="0x08000000" name=" 2 Mbyte Data EEPROM" size="0x400000"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x4</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x08000000" name="sector0" occurrence="0x100" size="0x2000"/>
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</Field>
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</Bank>
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<Bank name="Bank 2">
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<Field>
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<Parameters address="0x08200000" name="sector256" occurrence="0x100" size="0x2000"/>
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</Field>
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</Bank>
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</Configuration>
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<!-- Dummy Config Just to avoid crash when TZEN=0 -->
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<Configuration config="1">
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<Parameters address="0x0C000000" name=" 4 Mbyte Data EEPROM" size="0x400000"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x4</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x0C000000" name="sector0" occurrence="0x100" size="0x2000"/>
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</Field>
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</Bank>
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<Bank name="Bank 2">
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<Field>
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<Parameters address="0x0C200000" name="sector256" occurrence="0x100" size="0x2000"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- OTP -->
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<Peripheral>
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<Name>OTP</Name>
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<Type>Storage</Type>
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<Description>The Data OTP memory block. It contains the one time programmable bits.</Description>
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<ErasedValue>0xFF</ErasedValue>
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<Access>RW</Access>
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<!-- 512 Bytes single bank -->
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<Configuration>
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<Parameters address="0x0BFA0000" name=" 512 Bytes Data OTP" size="0x200"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x4</Alignment>
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<Bank name="OTP">
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<Field>
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<Parameters address="0x0BFA0000" name="OTP" occurrence="0x1" size="0x200"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- Option Bytes -->
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<Peripheral>
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<Name>Option Bytes</Name>
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<Type>Configuration</Type>
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<Description/>
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<Access>RW</Access>
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<Configuration config="0,1,10,11">
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<Bank interface="JTAG_SWD"> <!-- Bank 1: address="0x40022040" name="Bank 1" size="0x20" -->
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<Parameters address="0x40022040" name="Bank 1" size="0x20"/>
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<Category>
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<Name>Read Out Protection</Name>
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<Field>
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<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>RDP</Name>
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<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
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<BitOffset>0x0</BitOffset>
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<BitWidth>0x8</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0xAA">Level 0, no protection</Val>
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<Val value="0xDC">Level 1, read protection of memories</Val>
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<Val value="0xCC">Level 2, chip protection</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>BOR Level</Name>
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<Field>
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<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>BOR_LEV</Name>
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<Description>These bits contain the VDD supply level threshold that activates/releases the reset.</Description>
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<BitOffset>0x8</BitOffset>
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<BitWidth>0x3</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">BOR Level 0, reset level threshold is around 1.7 V</Val>
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<Val value="0x1">BOR Level 1, reset level threshold is around 2.0 V</Val>
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<Val value="0x2">BOR Level 2, reset level threshold is around 2.2 V</Val>
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<Val value="0x3">BOR Level 3, reset level threshold is around 2.5 V</Val>
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<Val value="0x4">BOR Level 4, reset level threshold is around 2.8 V</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>User Configuration</Name>
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<Field>
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<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>TZEN</Name>
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<Description>Global TrustZone security enable. disable this OB by Unchecking TZEN + RDP regression from level 1 to 0 simultaneously</Description>
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<BitOffset>0x1F</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Global TrustZone security disabled</Val>
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<Val value="0x1">Global TrustZone security enabled</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>nRST_STOP</Name>
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<Description/>
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<BitOffset>0xC</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Reset generated when entering Stop mode</Val>
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<Val value="0x1">No reset generated when entering Stop mode</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>nRST_STDBY</Name>
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<Description/>
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<BitOffset>0xD</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Reset generated when entering Standby mode</Val>
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<Val value="0x1">No reset generated when entering Standby mode</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>nRST_SHDW</Name>
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<Description/>
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<BitOffset>0xE</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
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<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>SRAM1345_RST</Name>
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<Description>SRAM1, SRAM3, SRAM4 and SRAM5 erase upon system reset</Description>
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<BitOffset>0xF</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">SRAM1, SRAM3,SRAM4 and SRAM5 erased when a system reset occurs</Val>
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<Val value="0x1">SRAM1, SRAM3,SRAM4 and SRAM5 not erased when a system reset occurs</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>IWDG_SW</Name>
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<Description/>
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<BitOffset>0x10</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Hardware independent watchdog</Val>
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<Val value="0x1">Software independent watchdog</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>IWDG_STOP</Name>
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<Description/>
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<BitOffset>0x11</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Freeze IWDG counter in stop mode</Val>
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<Val value="0x1">IWDG counter active in stop mode</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>IWDG_STDBY</Name>
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<Description/>
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<BitOffset>0x12</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Freeze IWDG counter in standby mode</Val>
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<Val value="0x1">IWDG counter active in standby mode</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>WWDG_SW</Name>
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<Description/>
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<BitOffset>0x13</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Hardware window watchdog</Val>
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<Val value="0x1">Software window watchdog</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>SWAP_BANK</Name>
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<Description/>
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<BitOffset>0x14</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Bank 1 and bank 2 address are not swapped</Val>
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<Val value="0x1">Bank 1 and bank 2 address are swapped</Val>
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</Values>
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</Bit>
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<!--<Bit>
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<Name>DBANK</Name>
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<Description>Dual-bank on 1-Mbyte and 512-Kbyte Flash memory devices</Description>
|
|
<BitOffset>0x15</BitOffset>
|
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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|
<Values>
|
|
<Val value="0x0">Single bank Flash with contiguous address in bank 1</Val>
|
|
<Val value="0x1">Dual-bank Flash with contiguous addresses</Val>
|
|
</Values>
|
|
</Bit>-->
|
|
<Bit>
|
|
<Name>BKPRAM_ECC</Name>
|
|
<Description>SRAM2 parity check enable</Description>
|
|
<BitOffset>0x16</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Backup RAM ECC check enabled</Val>
|
|
<Val value="0x1">Backup RAM ECC check disabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM3_ECC</Name>
|
|
<Description>SRAM3 ECC detection and correction enable</Description>
|
|
<BitOffset>0x17</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM3 ECC check enabled</Val>
|
|
<Val value="0x1">SRAM3 ECC check disabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM2_ECC</Name>
|
|
<Description>SRAM2 ECC detection and correction enable</Description>
|
|
<BitOffset>0x18</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM2 ECC check enabled</Val>
|
|
<Val value="0x1">SRAM2 ECC check disabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM2_RST</Name>
|
|
<Description>SRAM2 Erase when system reset</Description>
|
|
<BitOffset>0x19</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM2 erased when a system reset occurs</Val>
|
|
<Val value="0x1">SRAM2 is not erased when a system reset occurs</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nSWBOOT0</Name>
|
|
<Description>Software BOOT0</Description>
|
|
<BitOffset>0x1A</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">BOOT0 taken from the option bit nBOOT0</Val>
|
|
<Val value="0x1">BOOT0 taken from PH3/BOOT0 pin</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nBOOT0</Name>
|
|
<Description>nBOOT0 option bit</Description>
|
|
<BitOffset>0x1B</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">nBOOT0 = 0</Val>
|
|
<Val value="0x1">nBOOT0 = 1</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>PA15_PUPEN</Name>
|
|
<Description>PA15 pull-up enable</Description>
|
|
<BitOffset>0x1C</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">USB power delivery dead-battery enabled/ TDI pull-up deactivated</Val>
|
|
<Val value="0x1">USB power delivery dead-battery disabled/ TDI pull-up activated</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IO_VDD_HSLV</Name>
|
|
<Description>High-speed IO at low VDD voltage configuration bit</Description>
|
|
<BitOffset>0x1D</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.5 V)</Val>
|
|
<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.5 V)</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IO_VDDIO2_HSLV</Name>
|
|
<Description>High-speed IO at low VDDIO2 voltage configuration bit</Description>
|
|
<BitOffset>0x1E</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.5 V)</Val>
|
|
<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.5 V)</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Boot Configuration</Name>
|
|
<Field>
|
|
<Parameters address="0x40022044" name="FLASH_NSBOOTADD0" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>NSBOOTADD0</Name>
|
|
<Description>Non-secure Boot base address 0</Description>
|
|
<BitOffset>0x7</BitOffset>
|
|
<BitWidth>0x19</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x80" offset="0x0000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x40022048" name="FLASH_NSBOOTADD1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>NSBOOTADD1</Name>
|
|
<Description>Non-secure Boot base address 1</Description>
|
|
<BitOffset>0x7</BitOffset>
|
|
<BitWidth>0x19</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x80" offset="0x0000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Write Protection 1</Name>
|
|
<Field>
|
|
<Parameters address="0x40022058" name="FLASH_WRP1AR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="0,10">
|
|
<Name>WRP1A_PSTRT</Name>
|
|
<Description>Bank 1 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="1,11">
|
|
<Name>WRP1A_PSTRT</Name>
|
|
<Description>Bank 1 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="0,10">
|
|
<Name>WRP1A_PEND</Name>
|
|
<Description>Bank 1 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="1,11">
|
|
<Name>WRP1A_PEND</Name>
|
|
<Description>Bank 1 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_1A</Name>
|
|
<Description>Bank 1 WPR first area A unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP1A start and end pages locked</Val>
|
|
<Val value="0x1">WRP1A start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x4002205C" name="FLASH_WRP1BR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="0,10">
|
|
<Name>WRP1B_PSTRT</Name>
|
|
<Description>Bank 1 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="1,11">
|
|
<Name>WRP1B_PSTRT</Name>
|
|
<Description>Bank 1 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="0,10">
|
|
<Name>WRP1B_PEND</Name>
|
|
<Description>Bank 1 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="1,11">
|
|
<Name>WRP1B_PEND</Name>
|
|
<Description>Bank 1 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_1B</Name>
|
|
<Description>Bank 1 WPR second area B unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP1B start and end pages locked</Val>
|
|
<Val value="0x1">WRP1B start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
</Bank>
|
|
<Bank interface="JTAG_SWD"> <!-- Bank 2: address="0x40022068" name="Bank 2" size="0x8" -->
|
|
<Parameters address="0x40022068" name="Bank 2" size="0x8"/>
|
|
<Category>
|
|
<Name>Write Protection 2</Name>
|
|
<Field>
|
|
<Parameters address="0x40022068" name="FLASH_WRP2AR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="0,10">
|
|
<Name>WRP2A_PSTRT</Name>
|
|
<Description>Bank 2 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="1,11">
|
|
<Name>WRP2A_PSTRT</Name>
|
|
<Description>Bank 2 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="0,10">
|
|
<Name>WRP2A_PEND</Name>
|
|
<Description>Bank 2 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="1,11">
|
|
<Name>WRP2A_PEND</Name>
|
|
<Description>Bank 2 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_2A</Name>
|
|
<Description>Bank 2 WPR first area A unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP2A start and end pages locked</Val>
|
|
<Val value="0x1">WRP2A start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x4002206C" name="FLASH_WRP2BR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="0,10">
|
|
<Name>WRP2B_PSTRT</Name>
|
|
<Description>Bank 2 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="1,11">
|
|
<Name>WRP2B_PSTRT</Name>
|
|
<Description>Bank 2 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="0,10">
|
|
<Name>WRP2B_PEND</Name>
|
|
<Description>Bank 2 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="1,11">
|
|
<Name>WRP2B_PEND</Name>
|
|
<Description>Bank 2 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_2B</Name>
|
|
<Description>Bank 2 WPR second area B unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP2B start and end pages locked</Val>
|
|
<Val value="0x1">WRP2B start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
</Bank>
|
|
</Configuration>
|
|
<Configuration config="2,3">
|
|
<Bank interface="JTAG_SWD"> <!-- Bank 1: address="0x50022040" name="Bank 1" size="0x28" -->
|
|
<Parameters address="0x50022040" name="Bank 1" size="0x20"/>
|
|
<Category>
|
|
<Name>Read Out Protection</Name>
|
|
<Field>
|
|
<Parameters address="0x50022040" name="FLASH_OPTR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>RDP</Name>
|
|
<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0xAA">Level 0, no protection</Val>
|
|
<Val value="0x55">Level 0.5, read protection not active, only non-secure debug access is possible. Only available when TrustZone is active (TZEN=1)</Val>
|
|
<Val value="0xDC">Level 1, read protection of memories</Val>
|
|
<Val value="0xCC">Level 2, chip protection</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>BOR Level</Name>
|
|
<Field>
|
|
<Parameters address="0x50022040" name="FLASH_OPTR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>BOR_LEV</Name>
|
|
<Description>These bits contain the VDD supply level threshold that activates/releases the reset.</Description>
|
|
<BitOffset>0x8</BitOffset>
|
|
<BitWidth>0x3</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">BOR Level 0, reset level threshold is around 1.7 V</Val>
|
|
<Val value="0x1">BOR Level 1, reset level threshold is around 2.0 V</Val>
|
|
<Val value="0x2">BOR Level 2, reset level threshold is around 2.2 V</Val>
|
|
<Val value="0x3">BOR Level 3, reset level threshold is around 2.5 V</Val>
|
|
<Val value="0x4">BOR Level 4, reset level threshold is around 2.8 V</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>User Configuration</Name>
|
|
<Field>
|
|
<Parameters address="0x50022040" name="FLASH_OPTR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>TZEN</Name>
|
|
<Description>Global TrustZone security enable. disable this OB by Unchecking TZEN + RDP regression from level 1 to 0 simultaneously</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Global TrustZone security disabled</Val>
|
|
<Val value="0x1">Global TrustZone security enabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nRST_STOP</Name>
|
|
<Description/>
|
|
<BitOffset>0xC</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Reset generated when entering Stop mode</Val>
|
|
<Val value="0x1">No reset generated when entering Stop mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nRST_STDBY</Name>
|
|
<Description/>
|
|
<BitOffset>0xD</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Reset generated when entering Standby mode</Val>
|
|
<Val value="0x1">No reset generated when entering Standby mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nRST_SHDW</Name>
|
|
<Description/>
|
|
<BitOffset>0xE</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
|
|
<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM1345_RST</Name>
|
|
<Description>SRAM1, SRAM3, SRAM4 and SRAM5 erase upon system reset</Description>
|
|
<BitOffset>0xF</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM1, SRAM3,SRAM4 and SRAM5 erased when a system reset occurs</Val>
|
|
<Val value="0x1">SRAM1, SRAM3,SRAM4 and SRAM5 not erased when a system reset occurs</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IWDG_SW</Name>
|
|
<Description/>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Hardware independent watchdog</Val>
|
|
<Val value="0x1">Software independent watchdog</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IWDG_STOP</Name>
|
|
<Description/>
|
|
<BitOffset>0x11</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Freeze IWDG counter in stop mode</Val>
|
|
<Val value="0x1">IWDG counter active in stop mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IWDG_STDBY</Name>
|
|
<Description/>
|
|
<BitOffset>0x12</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Freeze IWDG counter in standby mode</Val>
|
|
<Val value="0x1">IWDG counter active in standby mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>WWDG_SW</Name>
|
|
<Description/>
|
|
<BitOffset>0x13</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Hardware window watchdog</Val>
|
|
<Val value="0x1">Software window watchdog</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SWAP_BANK</Name>
|
|
<Description/>
|
|
<BitOffset>0x14</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Bank 1 and bank 2 address are not swapped</Val>
|
|
<Val value="0x1">Bank 1 and bank 2 address are swapped</Val>
|
|
</Values>
|
|
</Bit>
|
|
<!--<Bit>
|
|
<Name>DBANK</Name>
|
|
<Description>Dual-bank on 1-Mbyte and 512-Kbyte Flash memory devices</Description>
|
|
<BitOffset>0x15</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Single bank mode with 128 bits data read width</Val>
|
|
<Val value="0x1">Dual bank mode with 64 bits data</Val>
|
|
</Values>
|
|
</Bit>-->
|
|
<Bit>
|
|
<Name>SRAM2_PE</Name>
|
|
<Description>SRAM2 parity check enable</Description>
|
|
<BitOffset>0x18</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM2 parity check enable</Val>
|
|
<Val value="0x1">SRAM2 parity check disable</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM2_RST</Name>
|
|
<Description>SRAM2 Erase when system reset</Description>
|
|
<BitOffset>0x19</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM2 erased when a system reset occurs</Val>
|
|
<Val value="0x1">SRAM2 is not erased when a system reset occurs</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nSWBOOT0</Name>
|
|
<Description>Software BOOT0</Description>
|
|
<BitOffset>0x1A</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">BOOT0 taken from the option bit nBOOT0</Val>
|
|
<Val value="0x1">BOOT0 taken from PH3/BOOT0 pin</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nBOOT0</Name>
|
|
<Description>nBOOT0 option bit</Description>
|
|
<BitOffset>0x1B</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">nBOOT0 = 0</Val>
|
|
<Val value="0x1">nBOOT0 = 1</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>PA15_PUPEN</Name>
|
|
<Description>PA15 pull-up enable</Description>
|
|
<BitOffset>0x1C</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">USB power delivery dead-battery enabled/ TDI pull-up deactivated</Val>
|
|
<Val value="0x1">USB power delivery dead-battery disabled/ TDI pull-up activated</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>BKPRAM_ECC</Name>
|
|
<Description>SRAM2 parity check enable</Description>
|
|
<BitOffset>0x16</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Backup RAM ECC check enabled</Val>
|
|
<Val value="0x1">Backup RAM ECC check disabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM3_ECC</Name>
|
|
<Description>SRAM3 ECC detection and correction enable</Description>
|
|
<BitOffset>0x17</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM3 ECC check enabled</Val>
|
|
<Val value="0x1">SRAM3 ECC check disabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM2_ECC</Name>
|
|
<Description>SRAM2 ECC detection and correction enable</Description>
|
|
<BitOffset>0x18</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM2 ECC check enabled</Val>
|
|
<Val value="0x1">SRAM2 ECC check disabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IO_VDD_HSLV</Name>
|
|
<Description>High-speed IO at low VDD voltage configuration bit</Description>
|
|
<BitOffset>0x1D</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.5 V)</Val>
|
|
<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.5 V)</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IO_VDDIO2_HSLV</Name>
|
|
<Description>High-speed IO at low VDDIO2 voltage configuration bit</Description>
|
|
<BitOffset>0x1E</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.5 V)</Val>
|
|
<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.5 V)</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Boot Configuration</Name>
|
|
<Field>
|
|
<Parameters address="0x50022044" name="FLASH_NSBOOTADD0" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>NSBOOTADD0</Name>
|
|
<Description>Non-secure Boot base address 0</Description>
|
|
<BitOffset>0x7</BitOffset>
|
|
<BitWidth>0x19</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x80" offset="0x0000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x50022048" name="FLASH_NSBOOTADD1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>NSBOOTADD1</Name>
|
|
<Description>Non-secure Boot base address 1</Description>
|
|
<BitOffset>0x7</BitOffset>
|
|
<BitWidth>0x19</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x80" offset="0x0000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x5002204C" name="FLASH_SECBOOTADD0" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>SECBOOTADD0</Name>
|
|
<Description>Secure boot base address 0</Description>
|
|
<BitOffset>0x7</BitOffset>
|
|
<BitWidth>0x19</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x80" offset="0x0000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x5002204C" name="BOOT_LOCK" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>BOOT_LOCK</Name>
|
|
<Description> The boot is always forced to base address value programmed in SECBOOTADD0</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Boot based on the pad/option bit configuration</Val>
|
|
<Val value="0x1">Boot forced from base address memory</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Secure Area 1</Name>
|
|
<Field>
|
|
<Parameters address="0x50022050" name="FLASH_SECWM1R1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="2">
|
|
<Name>SECWM1_PSTRT</Name>
|
|
<Description>Start page of first secure area</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="3">
|
|
<Name>SECWM1_PSTRT</Name>
|
|
<Description>Start page of first secure area</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="2">
|
|
<Name>SECWM1_PEND</Name>
|
|
<Description>End page of first secure area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="3">
|
|
<Name>SECWM1_PEND</Name>
|
|
<Description>End page of first secure area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x50022054" name="FLASH_SECWM1R2" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>HDP1_PEND</Name>
|
|
<Description>End page of first hide protection area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0xC000000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>HDP1EN</Name>
|
|
<Description>Hide protection first area enable</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">No HDP area 1</Val>
|
|
<Val value="0x1">HDP first area is enabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Write Protection 1</Name>
|
|
<Field>
|
|
<Parameters address="0x50022058" name="FLASH_WRP1AR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="2">
|
|
<Name>WRP1A_PSTRT</Name>
|
|
<Description>Bank 1 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="3">
|
|
<Name>WRP1A_PSTRT</Name>
|
|
<Description>Bank 1 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="2">
|
|
<Name>WRP1A_PEND</Name>
|
|
<Description>Bank 1 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="3">
|
|
<Name>WRP1A_PEND</Name>
|
|
<Description>Bank 1 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_1A</Name>
|
|
<Description>Bank 1 WPR first area A unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP1A start and end pages locked</Val>
|
|
<Val value="0x1">WRP1A start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x5002205C" name="FLASH_WRP1BR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="2">
|
|
<Name>WRP1B_PSTRT</Name>
|
|
<Description>Bank 1 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="3">
|
|
<Name>WRP1B_PSTRT</Name>
|
|
<Description>Bank 1 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="2">
|
|
<Name>WRP1B_PEND</Name>
|
|
<Description>Bank 1 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="3">
|
|
<Name>WRP1B_PEND</Name>
|
|
<Description>Bank 1 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_1B</Name>
|
|
<Description>Bank 1 WPR second area B unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP1B start and end pages locked</Val>
|
|
<Val value="0x1">WRP1B start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
</Bank>
|
|
<Bank interface="JTAG_SWD"> <!-- Bank 2: address="0x50022060" name="Bank 2" size="0x10"-->
|
|
<Parameters address="0x50022060" name="Bank 2" size="0x10"/>
|
|
<Category>
|
|
<Name>Secure Area 2</Name>
|
|
<Field>
|
|
<Parameters address="0x50022060" name="FLASH_SECWM2R1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="2">
|
|
<Name>SECWM2_PSTRT</Name>
|
|
<Description>Start page of second secure area</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="3">
|
|
<Name>SECWM2_PSTRT</Name>
|
|
<Description>Start page of second secure area</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="2">
|
|
<Name>SECWM2_PEND</Name>
|
|
<Description>End page of second secure area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="3">
|
|
<Name>SECWM2_PEND</Name>
|
|
<Description>End page of second secure area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x50022064" name="FLASH_SECWM2R2" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>HDP2_PEND</Name>
|
|
<Description>End page of second hide protection area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0xC200000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>HDP2EN</Name>
|
|
<Description>Hide protection second area enable</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">No HDP area 2</Val>
|
|
<Val value="0x1">HDP second area is enabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Write Protection 2</Name>
|
|
<Field>
|
|
<Parameters address="0x50022068" name="FLASH_WRP2AR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="2">
|
|
<Name>WRP2A_PSTRT</Name>
|
|
<Description>Bank 2 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="3">
|
|
<Name>WRP2A_PSTRT</Name>
|
|
<Description>Bank 2 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="2">
|
|
<Name>WRP2A_PEND</Name>
|
|
<Description>Bank 2 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="3">
|
|
<Name>WRP2A_PEND</Name>
|
|
<Description>Bank 2 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_2A</Name>
|
|
<Description>Bank 2 WPR first area A unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP2A start and end pages locked</Val>
|
|
<Val value="0x1">WRP2A start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x5002206C" name="FLASH_WRP2BR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="2">
|
|
<Name>WRP2B_PSTRT</Name>
|
|
<Description>Bank 2 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="3">
|
|
<Name>WRP2B_PSTRT</Name>
|
|
<Description>Bank 2 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="2">
|
|
<Name>WRP2B_PEND</Name>
|
|
<Description>Bank 2 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="3">
|
|
<Name>WRP2B_PEND</Name>
|
|
<Description>Bank 2 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_2B</Name>
|
|
<Description>Bank 2 WPR second area B unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP2B start and end pages locked</Val>
|
|
<Val value="0x1">WRP2B start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
</Bank>
|
|
</Configuration>
|
|
<Configuration config="4,5">
|
|
<Bank interface="JTAG_SWD"> <!-- Bank 1: address="0x40022040" name="Bank 1" size="0x28"-->
|
|
<Parameters address="0x40022040" name="Bank 1" size="0x28"/>
|
|
<Category>
|
|
<Name>Read Out Protection</Name>
|
|
<Field>
|
|
<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>RDP</Name>
|
|
<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0xAA">Level 0, no protection</Val>
|
|
<Val value="0x55">Level 0.5, read protection not active, only non-secure debug access is possible. Only available when TrustZone is active (TZEN=1)</Val>
|
|
<Val value="0xDC">Level 1, read protection of memories</Val>
|
|
<Val value="0xCC">Level 2, chip protection</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>BOR Level</Name>
|
|
<Field>
|
|
<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>BOR_LEV</Name>
|
|
<Description>These bits contain the VDD supply level threshold that activates/releases the reset.</Description>
|
|
<BitOffset>0x8</BitOffset>
|
|
<BitWidth>0x3</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">BOR Level 0, reset level threshold is around 1.7 V</Val>
|
|
<Val value="0x1">BOR Level 1, reset level threshold is around 2.0 V</Val>
|
|
<Val value="0x2">BOR Level 2, reset level threshold is around 2.2 V</Val>
|
|
<Val value="0x3">BOR Level 3, reset level threshold is around 2.5 V</Val>
|
|
<Val value="0x4">BOR Level 4, reset level threshold is around 2.8 V</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>User Configuration</Name>
|
|
<Field>
|
|
<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>TZEN</Name>
|
|
<Description>Global TrustZone security enable. disable this OB by Unchecking TZEN + RDP regression from level 1 to 0 simultaneouslyDescription</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Global TrustZone security disabled</Val>
|
|
<Val value="0x1">Global TrustZone security enabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nRST_STOP</Name>
|
|
<Description/>
|
|
<BitOffset>0xC</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Reset generated when entering Stop mode</Val>
|
|
<Val value="0x1">No reset generated when entering Stop mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nRST_STDBY</Name>
|
|
<Description/>
|
|
<BitOffset>0xD</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Reset generated when entering Standby mode</Val>
|
|
<Val value="0x1">No reset generated when entering Standby mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nRST_SHDW</Name>
|
|
<Description/>
|
|
<BitOffset>0xE</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
|
|
<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM1345_RST</Name>
|
|
<Description>SRAM1, SRAM3, SRAM4 and SRAM5 erase upon system reset</Description>
|
|
<BitOffset>0xF</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM1, SRAM3,SRAM4 and SRAM5 erased when a system reset occurs</Val>
|
|
<Val value="0x1">SRAM1, SRAM3,SRAM4 and SRAM5 not erased when a system reset occurs</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IWDG_SW</Name>
|
|
<Description/>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Hardware independent watchdog</Val>
|
|
<Val value="0x1">Software independent watchdog</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IWDG_STOP</Name>
|
|
<Description/>
|
|
<BitOffset>0x11</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Freeze IWDG counter in stop mode</Val>
|
|
<Val value="0x1">IWDG counter active in stop mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IWDG_STDBY</Name>
|
|
<Description/>
|
|
<BitOffset>0x12</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Freeze IWDG counter in standby mode</Val>
|
|
<Val value="0x1">IWDG counter active in standby mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>WWDG_SW</Name>
|
|
<Description/>
|
|
<BitOffset>0x13</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Hardware window watchdog</Val>
|
|
<Val value="0x1">Software window watchdog</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SWAP_BANK</Name>
|
|
<Description/>
|
|
<BitOffset>0x14</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Bank 1 and bank 2 address are not swapped</Val>
|
|
<Val value="0x1">Bank 1 and bank 2 address are swapped</Val>
|
|
</Values>
|
|
</Bit>
|
|
<!--<Bit>
|
|
<Name>DBANK</Name>
|
|
<Description>Dual-bank on 1-Mbyte and 512-Kbyte Flash memory devices</Description>
|
|
<BitOffset>0x15</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Single bank mode with 128 bits data read width</Val>
|
|
<Val value="0x1">Dual bank mode with 64 bits data</Val>
|
|
</Values>
|
|
</Bit>-->
|
|
<Bit>
|
|
<Name>SRAM2_PE</Name>
|
|
<Description>SRAM2 parity check enable</Description>
|
|
<BitOffset>0x18</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM2 parity check enable</Val>
|
|
<Val value="0x1">SRAM2 parity check disable</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM2_RST</Name>
|
|
<Description>SRAM2 Erase when system reset</Description>
|
|
<BitOffset>0x19</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM2 erased when a system reset occurs</Val>
|
|
<Val value="0x1">SRAM2 is not erased when a system reset occurs</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nSWBOOT0</Name>
|
|
<Description>Software BOOT0</Description>
|
|
<BitOffset>0x1A</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">BOOT0 taken from the option bit nBOOT0</Val>
|
|
<Val value="0x1">BOOT0 taken from PH3/BOOT0 pin</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nBOOT0</Name>
|
|
<Description>nBOOT0 option bit</Description>
|
|
<BitOffset>0x1B</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">nBOOT0 = 0</Val>
|
|
<Val value="0x1">nBOOT0 = 1</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>PA15_PUPEN</Name>
|
|
<Description>PA15 pull-up enable</Description>
|
|
<BitOffset>0x1C</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">USB power delivery dead-battery enabled/ TDI pull-up deactivated</Val>
|
|
<Val value="0x1">USB power delivery dead-battery disabled/ TDI pull-up activated</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>BKPRAM_ECC</Name>
|
|
<Description>SRAM2 parity check enable</Description>
|
|
<BitOffset>0x16</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Backup RAM ECC check enabled</Val>
|
|
<Val value="0x1">Backup RAM ECC check disabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM3_ECC</Name>
|
|
<Description>SRAM3 ECC detection and correction enable</Description>
|
|
<BitOffset>0x17</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM3 ECC check enabled</Val>
|
|
<Val value="0x1">SRAM3 ECC check disabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM2_ECC</Name>
|
|
<Description>SRAM2 ECC detection and correction enable</Description>
|
|
<BitOffset>0x18</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM2 ECC check enabled</Val>
|
|
<Val value="0x1">SRAM2 ECC check disabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IO_VDD_HSLV</Name>
|
|
<Description>High-speed IO at low VDD voltage configuration bit</Description>
|
|
<BitOffset>0x1D</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.5 V)</Val>
|
|
<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.5 V)</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IO_VDDIO2_HSLV</Name>
|
|
<Description>High-speed IO at low VDDIO2 voltage configuration bit</Description>
|
|
<BitOffset>0x1E</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.5 V)</Val>
|
|
<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.5 V)</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Boot Configuration</Name>
|
|
<Field>
|
|
<Parameters address="0x40022044" name="FLASH_NSBOOTADD0" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>NSBOOTADD0</Name>
|
|
<Description>Non-secure Boot base address 0</Description>
|
|
<BitOffset>0x7</BitOffset>
|
|
<BitWidth>0x19</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x80" offset="0x0000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x40022048" name="FLASH_NSBOOTADD1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>NSBOOTADD1</Name>
|
|
<Description>Non-secure Boot base address 1</Description>
|
|
<BitOffset>0x7</BitOffset>
|
|
<BitWidth>0x19</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x80" offset="0x0000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x4002204C" name="FLASH_SECBOOTADD0" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>SECBOOTADD0</Name>
|
|
<Description>Secure boot base address 0</Description>
|
|
<BitOffset>0x7</BitOffset>
|
|
<BitWidth>0x19</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x80" offset="0x0000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x4002204C" name="BOOT_LOCK" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>BOOT_LOCK</Name>
|
|
<Description> The boot is always forced to base address value programmed in SECBOOTADD0</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Boot based on the pad/option bit configuration</Val>
|
|
<Val value="0x1">Boot forced from base address memory</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Secure Area 1</Name>
|
|
<Field>
|
|
<Parameters address="0x40022050" name="FLASH_SECWM1R1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="4">
|
|
<Name>SECWM1_PSTRT</Name>
|
|
<Description>Start page of first secure area</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>SECWM1_PSTRT</Name>
|
|
<Description>Start page of first secure area</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="4">
|
|
<Name>SECWM1_PEND</Name>
|
|
<Description>End page of first secure area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>SECWM1_PEND</Name>
|
|
<Description>End page of first secure area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x40022054" name="FLASH_SECWM1R2" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>HDP1_PEND</Name>
|
|
<Description>End page of first hide protection area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0xC000000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>HDP1EN</Name>
|
|
<Description>Hide protection first area enable</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">No HDP area 1</Val>
|
|
<Val value="0x1">HDP first area is enabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Write Protection 1</Name>
|
|
<Field>
|
|
<Parameters address="0x40022058" name="FLASH_WRP1AR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="4">
|
|
<Name>WRP1A_PSTRT</Name>
|
|
<Description>Bank 1 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>WRP1A_PSTRT</Name>
|
|
<Description>Bank 1 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="4">
|
|
<Name>WRP1A_PEND</Name>
|
|
<Description>Bank 1 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>WRP1A_PEND</Name>
|
|
<Description>Bank 1 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_1A</Name>
|
|
<Description>Bank 1 WPR first area A unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP1A start and end pages locked</Val>
|
|
<Val value="0x1">WRP1A start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x4002205C" name="FLASH_WRP1BR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="4">
|
|
<Name>WRP1B_PSTRT</Name>
|
|
<Description>Bank 1 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>WRP1B_PSTRT</Name>
|
|
<Description>Bank 1 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="4">
|
|
<Name>WRP1B_PEND</Name>
|
|
<Description>Bank 1 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>WRP1B_PEND</Name>
|
|
<Description>Bank 1 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_1B</Name>
|
|
<Description>Bank 1 WPR second area B unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP1B start and end pages locked</Val>
|
|
<Val value="0x1">WRP1B start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
</Bank>
|
|
<Bank interface="JTAG_SWD"> <!-- Bank 2: address="0x40022060" name="Bank 2" size="0x10"-->
|
|
<Parameters address="0x40022060" name="Bank 2" size="0x10"/>
|
|
<Category>
|
|
<Name>Secure Area 2</Name>
|
|
<Field>
|
|
<Parameters address="0x40022060" name="FLASH_SECWM2R1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="4">
|
|
<Name>SECWM2_PSTRT</Name>
|
|
<Description>Start page of second secure area</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>SECWM2_PSTRT</Name>
|
|
<Description>Start page of second secure area</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="4">
|
|
<Name>SECWM2_PEND</Name>
|
|
<Description>End page of second secure area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>SECWM2_PEND</Name>
|
|
<Description>End page of second secure area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x40022064" name="FLASH_SECWM2R2" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="4">
|
|
<Name>HDP2_PEND</Name>
|
|
<Description>End page of second hide protection area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0xC200000"/>
|
|
</Bit>
|
|
<Bit config="4">
|
|
<Name>HDP2EN</Name>
|
|
<Description>Hide protection second area enable</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">No HDP area 2</Val>
|
|
<Val value="0x1">HDP second area is enabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>HDP2_PEND</Name>
|
|
<Description>End page of second hide protection area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0xC200000"/>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>HDP2EN</Name>
|
|
<Description>Hide protection second area enable</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">No HDP area 2</Val>
|
|
<Val value="0x1">HDP second area is enabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Write Protection 2</Name>
|
|
<Field>
|
|
<Parameters address="0x40022068" name="FLASH_WRP2AR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="4">
|
|
<Name>WRP2A_PSTRT</Name>
|
|
<Description>Bank 2 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>WRP2A_PSTRT</Name>
|
|
<Description>Bank 2 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="4">
|
|
<Name>WRP2A_PEND</Name>
|
|
<Description>Bank 2 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>WRP2A_PEND</Name>
|
|
<Description>Bank 2 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_2A</Name>
|
|
<Description>Bank 2 WPR first area A unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP2A start and end pages locked</Val>
|
|
<Val value="0x1">WRP2A start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x4002206C" name="FLASH_WRP2BR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="4">
|
|
<Name>WRP2B_PSTRT</Name>
|
|
<Description>Bank 2 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>WRP2B_PSTRT</Name>
|
|
<Description>Bank 2 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="4">
|
|
<Name>WRP2B_PEND</Name>
|
|
<Description>Bank 2 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="5">
|
|
<Name>WRP2B_PEND</Name>
|
|
<Description>Bank 2 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_2B</Name>
|
|
<Description>Bank 2 WPR second area B unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP2B start and end pages locked</Val>
|
|
<Val value="0x1">WRP2B start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
</Bank>
|
|
</Configuration>
|
|
<Bank interface="Bootloader" name="OB">
|
|
<Parameters address="0x40022040" name="Bank 1" size="0x30"/>
|
|
<Category>
|
|
<Name>Read Out Protection</Name>
|
|
<Field>
|
|
<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="6,7">
|
|
<Name>RDP</Name>
|
|
<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0xAA">Level 0, no protection</Val>
|
|
<Val value="0xDC">Level 1, read protection of memories</Val>
|
|
<Val value="0xCC">Level 2, chip protection</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit config="8,9">
|
|
<Name>RDP</Name>
|
|
<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0xAA">Level 0, no protection</Val>
|
|
<Val value="0x55">Level 0.5, read protection not active, only non-secure debug access is possible. Only available when TrustZone is active (TZEN=1)</Val>
|
|
<Val value="0xDC">Level 1, read protection of memories</Val>
|
|
<Val value="0xCC">Level 2, chip protection</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>BOR Level</Name>
|
|
<Field>
|
|
<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>BOR_LEV</Name>
|
|
<Description>These bits contain the VDD supply level threshold that activates/releases the reset.</Description>
|
|
<BitOffset>0x8</BitOffset>
|
|
<BitWidth>0x3</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">BOR Level 0, reset level threshold is around 1.7 V</Val>
|
|
<Val value="0x1">BOR Level 1, reset level threshold is around 2.0 V</Val>
|
|
<Val value="0x2">BOR Level 2, reset level threshold is around 2.2 V</Val>
|
|
<Val value="0x3">BOR Level 3, reset level threshold is around 2.5 V</Val>
|
|
<Val value="0x4">BOR Level 4, reset level threshold is around 2.8 V</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>User Configuration</Name>
|
|
<Field>
|
|
<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>TZEN</Name>
|
|
<Description>Global TrustZone security enable. disable this OB by Unchecking TZEN + RDP regression from level 1 to 0 simultaneously</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Global TrustZone security disabled</Val>
|
|
<Val value="0x1">Global TrustZone security enabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nRST_STOP</Name>
|
|
<Description/>
|
|
<BitOffset>0xC</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Reset generated when entering Stop mode</Val>
|
|
<Val value="0x1">No reset generated when entering Stop mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nRST_STDBY</Name>
|
|
<Description/>
|
|
<BitOffset>0xD</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Reset generated when entering Standby mode</Val>
|
|
<Val value="0x1">No reset generated when entering Standby mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nRST_SHDW</Name>
|
|
<Description/>
|
|
<BitOffset>0xE</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
|
|
<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM1345_RST</Name>
|
|
<Description>SRAM1, SRAM3, SRAM4 and SRAM5 erase upon system reset</Description>
|
|
<BitOffset>0xF</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM1, SRAM3,SRAM4 and SRAM5 erased when a system reset occurs</Val>
|
|
<Val value="0x1">SRAM1, SRAM3,SRAM4 and SRAM5 not erased when a system reset occurs</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IWDG_SW</Name>
|
|
<Description/>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Hardware independent watchdog</Val>
|
|
<Val value="0x1">Software independent watchdog</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IWDG_STOP</Name>
|
|
<Description/>
|
|
<BitOffset>0x11</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Freeze IWDG counter in stop mode</Val>
|
|
<Val value="0x1">IWDG counter active in stop mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IWDG_STDBY</Name>
|
|
<Description/>
|
|
<BitOffset>0x12</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Freeze IWDG counter in standby mode</Val>
|
|
<Val value="0x1">IWDG counter active in standby mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>WWDG_SW</Name>
|
|
<Description/>
|
|
<BitOffset>0x13</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Hardware window watchdog</Val>
|
|
<Val value="0x1">Software window watchdog</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SWAP_BANK</Name>
|
|
<Description/>
|
|
<BitOffset>0x14</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Bank 1 and bank 2 address are not swapped</Val>
|
|
<Val value="0x1">Bank 1 and bank 2 address are swapped</Val>
|
|
</Values>
|
|
</Bit>
|
|
<!--<Bit>
|
|
<Name>DBANK</Name>
|
|
<Description>Dual-bank on 1-Mbyte and 512-Kbyte Flash memory devices</Description>
|
|
<BitOffset>0x15</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Single bank Flash with contiguous address in bank 1</Val>
|
|
<Val value="0x1">Dual-bank Flash with contiguous addresses</Val>
|
|
</Values>
|
|
</Bit>-->
|
|
<Bit>
|
|
<Name>BKPRAM_ECC</Name>
|
|
<Description>SRAM2 parity check enable</Description>
|
|
<BitOffset>0x16</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Backup RAM ECC check enabled</Val>
|
|
<Val value="0x1">Backup RAM ECC check disabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM3_ECC</Name>
|
|
<Description>SRAM3 ECC detection and correction enable</Description>
|
|
<BitOffset>0x17</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM3 ECC check enabled</Val>
|
|
<Val value="0x1">SRAM3 ECC check disabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM2_ECC</Name>
|
|
<Description>SRAM2 ECC detection and correction enable</Description>
|
|
<BitOffset>0x18</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM2 ECC check enabled</Val>
|
|
<Val value="0x1">SRAM2 ECC check disabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>SRAM2_RST</Name>
|
|
<Description>SRAM2 Erase when system reset</Description>
|
|
<BitOffset>0x19</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">SRAM2 erased when a system reset occurs</Val>
|
|
<Val value="0x1">SRAM2 is not erased when a system reset occurs</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nSWBOOT0</Name>
|
|
<Description>Software BOOT0</Description>
|
|
<BitOffset>0x1A</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">BOOT0 taken from the option bit nBOOT0</Val>
|
|
<Val value="0x1">BOOT0 taken from PH3/BOOT0 pin</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nBOOT0</Name>
|
|
<Description>nBOOT0 option bit</Description>
|
|
<BitOffset>0x1B</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">nBOOT0 = 0</Val>
|
|
<Val value="0x1">nBOOT0 = 1</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>PA15_PUPEN</Name>
|
|
<Description>PA15 pull-up enable</Description>
|
|
<BitOffset>0x1C</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">USB power delivery dead-battery enabled/ TDI pull-up deactivated</Val>
|
|
<Val value="0x1">USB power delivery dead-battery disabled/ TDI pull-up activated</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IO_VDD_HSLV</Name>
|
|
<Description>High-speed IO at low VDD voltage configuration bit</Description>
|
|
<BitOffset>0x1D</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.5 V)</Val>
|
|
<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.5 V)</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IO_VDDIO2_HSLV</Name>
|
|
<Description>High-speed IO at low VDDIO2 voltage configuration bit</Description>
|
|
<BitOffset>0x1E</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.5 V)</Val>
|
|
<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.5 V)</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Boot Configuration</Name>
|
|
<Field>
|
|
<Parameters address="0x40022044" name="FLASH_NSBOOTADD0" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="6,7,8,9">
|
|
<Name>NSBOOTADD0</Name>
|
|
<Description>Non-secure Boot base address 0</Description>
|
|
<BitOffset>0x7</BitOffset>
|
|
<BitWidth>0x19</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x80" offset="0x0000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x40022048" name="FLASH_NSBOOTADD1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="6,7,8,9">
|
|
<Name>NSBOOTADD1</Name>
|
|
<Description>Non-secure Boot base address 1</Description>
|
|
<BitOffset>0x7</BitOffset>
|
|
<BitWidth>0x19</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x80" offset="0x0000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x4002204C" name="FLASH_SECBOOTADD0" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="8,9">
|
|
<Name>SECBOOTADD0</Name>
|
|
<Description>Secure boot base address 0</Description>
|
|
<BitOffset>0x7</BitOffset>
|
|
<BitWidth>0x19</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x80" offset="0x0000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x4002204C" name="BOOT_LOCK" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="8,9">
|
|
<Name>BOOT_LOCK</Name>
|
|
<Description> The boot is always forced to base address value programmed in SECBOOTADD0</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Boot based on the pad/option bit configuration</Val>
|
|
<Val value="0x1">Boot forced from base address memory</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Secure Area 1</Name>
|
|
<Field>
|
|
<Parameters address="0x40022050" name="FLASH_SECWM1R1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="8">
|
|
<Name>SECWM1_PSTRT</Name>
|
|
<Description>Start page of first secure area</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="9">
|
|
<Name>SECWM1_PSTRT</Name>
|
|
<Description>Start page of first secure area</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="8">
|
|
<Name>SECWM1_PEND</Name>
|
|
<Description>End page of first secure area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="9">
|
|
<Name>SECWM1_PEND</Name>
|
|
<Description>End page of first secure area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x40022054" name="FLASH_SECWM1R2" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="8,9">
|
|
<Name>HDP1_PEND</Name>
|
|
<Description>End page of first hide protection area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0xC000000"/>
|
|
</Bit>
|
|
<Bit config="8,9">
|
|
<Name>HDP1EN</Name>
|
|
<Description>Hide protection first area enable</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">No HDP area 1</Val>
|
|
<Val value="0x1">HDP first area is enabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Write Protection 1</Name>
|
|
<Field>
|
|
<Parameters address="0x40022058" name="FLASH_WRP1AR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="6,8">
|
|
<Name>WRP1A_PSTRT</Name>
|
|
<Description>Bank 1 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="7,9">
|
|
<Name>WRP1A_PSTRT</Name>
|
|
<Description>Bank 1 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="6,8">
|
|
<Name>WRP1A_PEND</Name>
|
|
<Description>Bank 1 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="7,9">
|
|
<Name>WRP1A_PEND</Name>
|
|
<Description>Bank 1 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_1A</Name>
|
|
<Description>Bank 1 WPR first area A unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP1A start and end pages locked</Val>
|
|
<Val value="0x1">WRP1A start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x4002205C" name="FLASH_WRP1BR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="6,8">
|
|
<Name>WRP1B_PSTRT</Name>
|
|
<Description>Bank 1 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="7,9">
|
|
<Name>WRP1B_PSTRT</Name>
|
|
<Description>Bank 1 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="6,8">
|
|
<Name>WRP1B_PEND</Name>
|
|
<Description>Bank 1 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="7,9">
|
|
<Name>WRP1B_PEND</Name>
|
|
<Description>Bank 1 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_1B</Name>
|
|
<Description>Bank 1 WPR second area B unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP1B start and end pages locked</Val>
|
|
<Val value="0x1">WRP1B start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Secure Area 2</Name>
|
|
<Field>
|
|
<Parameters address="0x40022060" name="FLASH_SECWM2R1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="8">
|
|
<Name>SECWM2_PSTRT</Name>
|
|
<Description>Start page of second secure area</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="9">
|
|
<Name>SECWM2_PSTRT</Name>
|
|
<Description>Start page of second secure area</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="8">
|
|
<Name>SECWM2_PEND</Name>
|
|
<Description>End page of second secure area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="9">
|
|
<Name>SECWM2_PEND</Name>
|
|
<Description>End page of second secure area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x40022064" name="FLASH_SECWM2R2" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="8,9">
|
|
<Name>HDP2_PEND</Name>
|
|
<Description>End page of second hide protection area</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0xC200000"/>
|
|
</Bit>
|
|
<Bit config="8,9">
|
|
<Name>HDP2EN</Name>
|
|
<Description>Hide protection second area enable</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">No HDP area 2</Val>
|
|
<Val value="0x1">HDP second area is enabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Write Protection 2</Name>
|
|
<Field>
|
|
<Parameters address="0x40022068" name="FLASH_WRP2AR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="6,8">
|
|
<Name>WRP2A_PSTRT</Name>
|
|
<Description>Bank 2 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="7,9">
|
|
<Name>WRP2A_PSTRT</Name>
|
|
<Description>Bank 2 WPR first area "A" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="6,8">
|
|
<Name>WRP2A_PEND</Name>
|
|
<Description>Bank 2 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="7,9">
|
|
<Name>WRP2A_PEND</Name>
|
|
<Description>Bank 2 WPR first area "A" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_2A</Name>
|
|
<Description>Bank 2 WPR first area A unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP2A start and end pages locked</Val>
|
|
<Val value="0x1">WRP2A start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x4002206C" name="FLASH_WRP2BR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="6,8">
|
|
<Name>WRP2B_PSTRT</Name>
|
|
<Description>Bank 2 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="7,9">
|
|
<Name>WRP2B_PSTRT</Name>
|
|
<Description>Bank 2 WPR second area "B" start page</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit config="6,8">
|
|
<Name>WRP2B_PEND</Name>
|
|
<Description>Bank 2 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x08000000"/>
|
|
</Bit>
|
|
<Bit config="7,9">
|
|
<Name>WRP2B_PEND</Name>
|
|
<Description>Bank 2 WPR second area "B" end page</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x2000" offset="0x08200000"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>UNLOCK_2B</Name>
|
|
<Description>Bank 2 WPR second area B unlock</Description>
|
|
<BitOffset>0x1F</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">WRP2B start and end pages locked</Val>
|
|
<Val value="0x1">WRP2B start and end pages unlocked</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
</Bank>
|
|
<Bank interface="Bootloader" name="SetOEM1">
|
|
<Parameters address="0x40022070" name="Bank 2" size="0x8"/>
|
|
<Category>
|
|
<Name>RDP Level 1 Password</Name>
|
|
<Field>
|
|
<Parameters address="0x40022070" name="OEM1KEYR1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>OEM1KEYR1</Name>
|
|
<Description>OEM1 least significant bytes key</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x20</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0" offset="0x00000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x40022074" name="OEM1KEYR2" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>OEM1KEYR2</Name>
|
|
<Description>OEM1 most significant bytes key</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x20</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0" offset="0x00000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
</Bank>
|
|
<Bank interface="Bootloader" name="SetOEM2">
|
|
<Parameters address="0x40022078" name="Bank 3" size="0x8"/>
|
|
<Category>
|
|
<Name>RDP Level 2 Password </Name>
|
|
<Field>
|
|
<Parameters address="0x40022078" name="OEM2KEYR1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>OEM2KEYR1</Name>
|
|
<Description>OEM2 least significant bytes key</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x20</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0" offset="0x00000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x4002207C" name="OEM2KEYR2" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>OEM2KEYR2</Name>
|
|
<Description>OEM2 most significant bytes key</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x20</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0" offset="0x00000000"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
</Bank>
|
|
</Peripheral>
|
|
</Peripherals>
|
|
</Device>
|
|
</Root> |