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https://github.com/openmv/openmv.git
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355 lines
9.0 KiB
C
355 lines
9.0 KiB
C
#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include "stm32f4xx_hal.h"
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#include "sccb.h"
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#include "ov9650.h"
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#include "systick.h"
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#include "ov9650_regs.h"
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#define NUM_BR_LEVELS 7
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static const uint8_t default_regs[][2] = {
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/* See Implementation Guide */
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{REG_COM2, 0x01}, /* Output drive x2 */
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{REG_COM5, 0x00}, /* System clock */
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{REG_CLKRC, 0x81}, /* Clock control 30 FPS*/
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{REG_MVFP, 0x10}, /* Mirror/VFlip */
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{REG_OFON, 0x43}, /* Power down register */
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{REG_ACOM38, 0x12}, /* reserved */
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{REG_ADC, 0x91}, /* reserved */
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{REG_RSVD35, 0x81}, /* reserved */
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/* Default QQVGA-RGB565 */
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{REG_COM7, 0x14}, /* QVGA/RGB565 */
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{REG_COM1, 0x24}, /* QQVGA/Skip Option */
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{REG_COM3, 0x04}, /* Vario Pixels */
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{REG_COM4, 0x80}, /* Vario Pixels */
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{REG_COM15, 0xD0}, /* Output range 0x00-0xFF/RGB565*/
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/* YUV fmt /Special Effects Controls */
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{REG_TSLB, 0x01}, /* YUYV/DBLC Enable/Bitwise reverse*/
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{REG_MANU, 0x80}, /* Manual U */
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{REG_MANV, 0x80}, /* Manual V */
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/* Dummy pixels settings */
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{REG_EXHCH, 0x00}, /* Dummy Pixel Insert MSB */
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{REG_EXHCL, 0x00}, /* Dummy Pixel Insert LSB */
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{REG_ADVFH, 0x00}, /* Dummy Pixel Insert MSB */
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{REG_ADVFL, 0x00}, /* Dummy Pixel Insert LSB */
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/* See Implementation Guide Section 3.4.1.2 */
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{REG_COM8, 0xA7}, /* Enable Fast Mode AEC/Enable Banding Filter/AGC/AWB/AEC */
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{0x60, 0x8C}, /* Normal AWB, 0x0C for Advanced AWB */
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{REG_AEW, 0x70}, /* AGC/AEC Threshold Upper Limit */
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{REG_AEB, 0x64}, /* AGC/AEC Threshold Lower Limit */
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{REG_VPT, 0xC3}, /* Fast AEC operating region */
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/* See OV9650 Implementation Guide */
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{REG_COM11, 0x01}, /* Night Mode-Automatic/Manual Banding Filter */
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{REG_MBD, 0x1a}, /* MBD[7:0] Manual banding filter LSB */
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{REG_HV, 0x0A}, /* HV[0] Manual banding filter MSB */
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{REG_COM12, 0x04}, /* HREF options/ UV average */
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{REG_COM9, 0x20}, /* Gain ceiling [6:4]/Over-Exposure */
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{REG_COM16, 0x02}, /* Color matrix coeff double option */
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{REG_COM13, 0x10}, /* Gamma/Colour Matrix/UV delay */
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{REG_COM23, 0x00}, /* Disable Color bar/Analog Color Gain */
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{REG_PSHFT, 0x00}, /* Pixel delay after HREF */
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{REG_COM10, 0x00}, /* Slave mode, HREF vs HSYNC, signals negate */
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{REG_EDGE, 0xa6}, /* Edge enhancement treshhold and factor */
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{REG_COM6, 0x43}, /* HREF & ADBLC options */
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{REG_COM22, 0x20}, /* Edge enhancement/Denoising */
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/* Some registers discovered with probing */
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{REG_COM21, 0x00}, /* COM21[3] Digital Zoom */
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{REG_GRCOM, 0x24}, /* Enable Internal Regulator */
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{0xaa, 0x00}, /* some edge effect 0x80 */
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{0xab, 0x00}, /* makes image blurry 0x40 */
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#if 0
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/* When AEC is not used */
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{REG_AECH, 0x00}, /* Exposure Value MSB */
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{REG_AECHM, 0x00}, /* Exposure Value LSB */
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#endif
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#if 0
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/* Windowing Settings */
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{REG_HSTART, 0x1d}, /* Horiz start high bits */
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{REG_HSTOP, 0xbd}, /* Horiz stop high bits */
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{REG_HREF, 0xbf}, /* HREF pieces */
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{REG_VSTART, 0x00}, /* Vert start high bits */
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{REG_VSTOP, 0x80}, /* Vert stop high bits */
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{REG_VREF, 0x12}, /* Pieces of GAIN, VSTART, VSTOP */
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#endif
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#if 1
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/* gamma curve p */
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{0x6c, 0x40},
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{0x6d, 0x30},
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{0x6e, 0x4b},
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{0x6f, 0x60},
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{0x70, 0x70},
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{0x71, 0x70},
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{0x72, 0x70},
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{0x73, 0x70},
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{0x74, 0x60},
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{0x75, 0x60},
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{0x76, 0x50},
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{0x77, 0x48},
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{0x78, 0x3a},
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{0x79, 0x2e},
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{0x7a, 0x28},
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{0x7b, 0x22},
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/* Gamma curve T */
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{0x7c, 0x04},
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{0x7d, 0x07},
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{0x7e, 0x10},
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{0x7f, 0x28},
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{0x80, 0x36},
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{0x81, 0x44},
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{0x82, 0x52},
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{0x83, 0x60},
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{0x84, 0x6c},
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{0x85, 0x78},
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{0x86, 0x8c},
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{0x87, 0x9e},
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{0x88, 0xbb},
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{0x89, 0xd2},
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{0x8a, 0xe6},
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/* Reserved Registers, see OV965x App Note */
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{0x16, 0x07},
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{0x96, 0x04},
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{0x8e, 0x00},
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{0x94, 0x88},
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{0x95, 0x88},
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{0x5c, 0x96},
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{0x5d, 0x96},
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{0x5e, 0x10},
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{0x59, 0xeb},
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{0x5a, 0x9c},
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{0x5b, 0x55},
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#endif
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/* NULL reg */
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{0x00, 0x00}
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};
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static const uint8_t rgb565_regs[][2] = {
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/* See Implementation Guide */
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{REG_COM3, 0x04}, /* Vario Pixels */
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{REG_COM4, 0x80}, /* Vario Pixels */
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{REG_COM15, 0xD0}, /* Output range 0x00-0xFF/RGB565*/
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/* RGB color matrix */
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{REG_MTX1, 0x71},
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{REG_MTX2, 0x3e},
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{REG_MTX3, 0x0c},
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{REG_MTX4, 0x33},
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{REG_MTX5, 0x72},
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{REG_MTX6, 0x00},
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{REG_MTX7, 0x2b},
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{REG_MTX8, 0x66},
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{REG_MTX9, 0xd2},
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{REG_MTXS, 0x65},
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/* NULL reg */
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{0x00, 0x00}
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};
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static const uint8_t yuv422_regs[][2] = {
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/* See Implementation Guide */
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{REG_COM3, 0x04}, /* Vario Pixels */
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{REG_COM4, 0x80}, /* Vario Pixels */
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{REG_COM15, 0xC0}, /* Output range 0x00-0xFF */
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/* YUV color matrix */
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{REG_MTX1, 0x3a},
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{REG_MTX2, 0x3d},
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{REG_MTX3, 0x03},
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{REG_MTX4, 0x12},
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{REG_MTX5, 0x26},
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{REG_MTX6, 0x38},
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{REG_MTX7, 0x40},
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{REG_MTX8, 0x40},
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{REG_MTX9, 0x40},
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{REG_MTXS, 0x0d},
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/* NULL reg */
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{0x00, 0x00}
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};
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static int reset()
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{
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int i=0;
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const uint8_t (*regs)[2]=default_regs;
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/* Reset all registers */
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SCCB_Write(REG_COM7, 0x80);
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/* delay n ms */
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systick_sleep(10);
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/* Write initial regsiters */
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while (regs[i][0]) {
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SCCB_Write(regs[i][0], regs[i][1]);
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i++;
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}
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return 0;
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}
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static int set_pixformat(enum sensor_pixformat pixformat)
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{
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int i=0;
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const uint8_t (*regs)[2];
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uint8_t com7=0; /* framesize/RGB */
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/* read pixel format reg */
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com7 = SCCB_Read(REG_COM7);
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switch (pixformat) {
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case PIXFORMAT_RGB565:
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com7 |= REG_COM7_RGB;
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regs = rgb565_regs;
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break;
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case PIXFORMAT_YUV422:
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com7 &= (~REG_COM7_RGB);
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regs = yuv422_regs;
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break;
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case PIXFORMAT_GRAYSCALE:
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com7 &= (~REG_COM7_RGB);
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regs = yuv422_regs;
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break;
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default:
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return -1;
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}
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/* Set pixel format */
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SCCB_Write(REG_COM7, com7);
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/* Write pixel format registers */
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while (regs[i][0]) {
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SCCB_Write(regs[i][0], regs[i][1]);
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i++;
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}
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return 0;
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}
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static int set_framesize(enum sensor_framesize framesize)
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{
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uint8_t com7=0; /* framesize/RGB */
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uint8_t com1=0; /* Skip option */
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/* read COM7 RGB bit */
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com7 = (SCCB_Read(REG_COM7) & REG_COM7_RGB);
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switch (framesize) {
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case FRAMESIZE_QQCIF:
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com7 |= REG_COM7_QCIF;
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com1 |= REG_COM1_QQCIF|REG_COM1_SKIP2;
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break;
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case FRAMESIZE_QQVGA:
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com7 |= REG_COM7_QVGA;
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com1 |= REG_COM1_QQVGA|REG_COM1_SKIP2;
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break;
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case FRAMESIZE_QCIF:
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com7 |= REG_COM7_QCIF;
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break;
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default:
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return -1;
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}
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/* write the frame size registers */
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SCCB_Write(REG_COM1, com1);
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SCCB_Write(REG_COM7, com7);
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return 0;
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}
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static int set_framerate(enum sensor_framerate framerate)
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{
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/* Write framerate register */
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SCCB_Write(REG_CLKRC, framerate);
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return 0;
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}
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static int set_brightness(int level)
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{
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int i;
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static uint8_t regs[NUM_BR_LEVELS + 1][3] = {
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{ REG_AEW, REG_AEB, REG_VPT },
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{ 0x1c, 0x12, 0x50 }, /* -3 */
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{ 0x3d, 0x30, 0x71 }, /* -2 */
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{ 0x50, 0x44, 0x92 }, /* -1 */
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{ 0x70, 0x64, 0xc3 }, /* 0 */
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{ 0x90, 0x84, 0xd4 }, /* +1 */
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{ 0xc4, 0xbf, 0xf9 }, /* +2 */
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{ 0xd8, 0xd0, 0xfa }, /* +3 */
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};
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level += (NUM_BR_LEVELS / 2 + 1);
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if (level < 0 || level > NUM_BR_LEVELS) {
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return -1;
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}
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for (i=0; i<3; i++) {
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SCCB_Write(regs[0][i], regs[level][i]);
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}
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return 0;
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}
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static int set_exposure(int exposure)
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{
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uint8_t val;
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val = SCCB_Read(REG_COM1);
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/* exposure [1:0] */
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SCCB_Write(REG_COM1, val | (exposure&0x03));
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/* exposure [9:2] */
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SCCB_Write(REG_AECH, ((exposure>>2)&0xFF));
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/* exposure [15:10] */
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SCCB_Write(REG_AECHM, ((exposure>>10)&0x3F));
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return 0;
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}
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static int set_gainceiling(enum sensor_gainceiling gainceiling)
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{
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/* Write gain ceiling register */
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SCCB_Write(REG_COM9, (gainceiling<<4));
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return 0;
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}
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int ov9650_init(struct sensor_dev *sensor)
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{
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/* set HSYNC/VSYNC/PCLK polarity */
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sensor->vsync_pol = DCMI_VSPOLARITY_HIGH;
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sensor->hsync_pol = DCMI_HSPOLARITY_LOW;
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sensor->pixck_pol = DCMI_PCKPOLARITY_RISING;
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/* set function pointers */
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sensor->reset = reset;
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sensor->set_pixformat = set_pixformat;
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sensor->set_framesize = set_framesize;
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sensor->set_framerate = set_framerate;
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sensor->set_brightness= set_brightness;
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sensor->set_exposure = set_exposure;
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sensor->set_gainceiling = set_gainceiling;
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return 0;
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}
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