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152 lines
5.7 KiB
C
152 lines
5.7 KiB
C
/*
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* This file is part of the OpenMV project.
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* Copyright (c) 2013/2014 Ibrahim Abdelkader <i.abdalkader@gmail.com>
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* This work is licensed under the MIT license, see the file LICENSE for details.
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*
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* Board configuration and pin definitions.
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*
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*/
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#ifndef __OMV_BOARDCONFIG_H__
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#define __OMV_BOARDCONFIG_H__
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// Architecture info
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#define OMV_ARCH_STR "OMV2 F4 256 JPEG" // 33 chars max
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#define OMV_BOARD_TYPE "M4"
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#define OMV_UNIQUE_ID_ADDR 0x1FFF7A10
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#define OMV_XCLK_MCO (0U)
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#define OMV_XCLK_TIM (1U)
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// Sensor external clock source.
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#define OMV_XCLK_SOURCE (OMV_XCLK_TIM)
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// Sensor external clock timer frequency.
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#define OMV_XCLK_FREQUENCY (6000000)
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// Sensor PLL register value.
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#define OMV_OV7725_PLL_CONFIG (0x41) // x4
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// Have built-in RGB->LAB table.
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#define OMV_HAVE_LAB_TABLE
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// Bootloader LED GPIO port/pin
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#define OMV_BOOTLDR_LED_PIN (GPIO_PIN_2)
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#define OMV_BOOTLDR_LED_PORT (GPIOC)
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// RAW buffer size
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#define OMV_RAW_BUF_SIZE (153600)
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// If buffer size is bigger than this threshold, the quality is reduced.
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// This is only used for JPEG images sent to the IDE not normal compression.
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#define JPEG_QUALITY_THRESH (160*120*2)
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// Linker script constants (see the linker script template stm32fxxx.ld.S).
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// Note: fb_alloc is a stack-based, dynamically allocated memory on FB.
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// The maximum available fb_alloc memory = FB_ALLOC_SIZE + FB_SIZE - (w*h*bpp).
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// Note: fb_alloc overwrites the line buffer which is only used during readout.
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#define OMV_FB_MEMORY SRAM1 // Framebuffer, fb_alloc
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#define OMV_MAIN_MEMORY CCM // data, bss, stack and heap
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#define OMV_DMA_MEMORY SRAM2 // Misc DMA buffers
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#define OMV_FB_SIZE (151K) // FB memory: header + QVGA/GS image
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#define OMV_FB_ALLOC_SIZE (14K) // minimum fb alloc size
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#define OMV_STACK_SIZE (4K)
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#define OMV_HEAP_SIZE (52K)
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#define OMV_LINE_BUF_SIZE (2K) // Image line buffer round(320 * 2BPP * 2 buffers).
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#define OMV_MSC_BUF_SIZE (2K) // USB MSC bot data
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#define OMV_VFS_BUF_SIZE (1K) // VFS sturct + FATFS file buffer (624 bytes)
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#define OMV_FFS_BUF_SIZE (16K) // Flash filesystem cache
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#define OMV_JPEG_BUF_SIZE (8 * 1024) // IDE JPEG buffer size (header + data).
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#define OMV_BOOT_ORIGIN 0x08000000
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#define OMV_BOOT_LENGTH 16K
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#define OMV_TEXT_ORIGIN 0x08010000
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#define OMV_TEXT_LENGTH 960K
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#define OMV_CCM_ORIGIN 0x10000000
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#define OMV_CCM_LENGTH 64K
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#define OMV_SRAM1_ORIGIN 0x20000000
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#define OMV_SRAM1_LENGTH 163K
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#define OMV_SRAM2_ORIGIN 0x20028C00
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#define OMV_SRAM2_LENGTH 29K
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/* SCCB/I2C */
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#define SCCB_I2C (I2C1)
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#define SCCB_AF (GPIO_AF4_I2C1)
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#define SCCB_CLK_ENABLE() __I2C1_CLK_ENABLE()
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#define SCCB_CLK_DISABLE() __I2C1_CLK_DISABLE()
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#define SCCB_PORT (GPIOB)
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#define SCCB_SCL_PIN (GPIO_PIN_8)
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#define SCCB_SDA_PIN (GPIO_PIN_9)
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/* DCMI */
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#define DCMI_TIM (TIM1)
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#define DCMI_TIM_PIN (GPIO_PIN_8)
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#define DCMI_TIM_PORT (GPIOA)
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#define DCMI_TIM_AF (GPIO_AF1_TIM1)
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#define DCMI_TIM_CHANNEL (TIM_CHANNEL_1)
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#define DCMI_TIM_CLK_ENABLE() __TIM1_CLK_ENABLE()
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#define DCMI_TIM_CLK_DISABLE() __TIM1_CLK_DISABLE()
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#define DCMI_TIM_PCLK_FREQ() HAL_RCC_GetPCLK2Freq()
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#define DCMI_RESET_PIN (GPIO_PIN_10)
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#define DCMI_RESET_PORT (GPIOA)
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#define DCMI_PWDN_PIN (GPIO_PIN_5)
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#define DCMI_PWDN_PORT (GPIOB)
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#define DCMI_FREX_PIN (GPIO_PIN_9)
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#define DCMI_FREX_PORT (GPIOD)
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#define DCMI_EXPST_PIN (GPIO_PIN_8)
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#define DCMI_EXPST_PORT (GPIOD)
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#define DCMI_FSIN_PIN (GPIO_PIN_3)
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#define DCMI_FSIN_PORT (GPIOD)
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#define DCMI_D0_PIN (GPIO_PIN_6)
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#define DCMI_D1_PIN (GPIO_PIN_7)
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#define DCMI_D2_PIN (GPIO_PIN_0)
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#define DCMI_D3_PIN (GPIO_PIN_1)
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#define DCMI_D4_PIN (GPIO_PIN_4)
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#define DCMI_D5_PIN (GPIO_PIN_6)
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#define DCMI_D6_PIN (GPIO_PIN_5)
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#define DCMI_D7_PIN (GPIO_PIN_6)
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#define DCMI_D0_PORT (GPIOC)
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#define DCMI_D1_PORT (GPIOC)
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#define DCMI_D2_PORT (GPIOE)
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#define DCMI_D3_PORT (GPIOE)
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#define DCMI_D4_PORT (GPIOE)
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#define DCMI_D5_PORT (GPIOB)
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#define DCMI_D6_PORT (GPIOE)
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#define DCMI_D7_PORT (GPIOE)
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#define DCMI_HSYNC_PIN (GPIO_PIN_4)
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#define DCMI_VSYNC_PIN (GPIO_PIN_7)
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#define DCMI_PXCLK_PIN (GPIO_PIN_6)
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#define DCMI_HSYNC_PORT (GPIOA)
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#define DCMI_VSYNC_PORT (GPIOB)
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#define DCMI_PXCLK_PORT (GPIOA)
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#define DCMI_RESET_LOW() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_RESET)
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#define DCMI_RESET_HIGH() HAL_GPIO_WritePin(DCMI_RESET_PORT, DCMI_RESET_PIN, GPIO_PIN_SET)
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#define DCMI_PWDN_LOW() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_RESET)
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#define DCMI_PWDN_HIGH() HAL_GPIO_WritePin(DCMI_PWDN_PORT, DCMI_PWDN_PIN, GPIO_PIN_SET)
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#define DCMI_FREX_LOW() HAL_GPIO_WritePin(DCMI_FREX_PORT, DCMI_FREX_PIN, GPIO_PIN_RESET)
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#define DCMI_FREX_HIGH() HAL_GPIO_WritePin(DCMI_FREX_PORT, DCMI_FREX_PIN, GPIO_PIN_SET)
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#define DCMI_EXPST_LOW() HAL_GPIO_WritePin(DCMI_EXPST_PORT, DCMI_EXPST_PIN, GPIO_PIN_RESET)
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#define DCMI_EXPST_HIGH() HAL_GPIO_WritePin(DCMI_EXPST_PORT, DCMI_EXPST_PIN, GPIO_PIN_SET)
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#define DCMI_FSIN_LOW() HAL_GPIO_WritePin(DCMI_FSIN_PORT, DCMI_FSIN_PIN, GPIO_PIN_RESET)
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#define DCMI_FSIN_HIGH() HAL_GPIO_WritePin(DCMI_FSIN_PORT, DCMI_FSIN_PIN, GPIO_PIN_SET)
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#define DCMI_VSYNC_IRQN EXTI9_5_IRQn
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#define DCMI_VSYNC_IRQ_LINE (7)
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#endif //__OMV_BOARDCONFIG_H__
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