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322 lines
12 KiB
C
322 lines
12 KiB
C
/**
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******************************************************************************
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* @file stm32n6xx_hal_gpu2d.h
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* @author MCD Application Team
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* @brief Header file of GPU2D HAL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32N6xx_HAL_GPU2D_H
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#define STM32N6xx_HAL_GPU2D_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32n6xx_hal_def.h"
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#if defined (GPU2D)
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/** @addtogroup STM32N6xx_HAL_Driver
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* @{
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*/
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/** @defgroup GPU2D GPU2D
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* @brief GPU2D HAL module driver
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup GPU2D_Exported_Types GPU2D Exported Types
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* @{
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*/
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/**
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* @brief HAL GPU2D State enumeration definition
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*/
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typedef enum
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{
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HAL_GPU2D_STATE_RESET = 0x00U, /*!< GPU2D not yet initialized or disabled */
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HAL_GPU2D_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
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HAL_GPU2D_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
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HAL_GPU2D_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
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HAL_GPU2D_STATE_ERROR = 0x04U
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} HAL_GPU2D_StateTypeDef;
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/**
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* @brief GPU2D_TypeDef definition
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*/
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typedef uint32_t GPU2D_TypeDef;
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/**
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* @brief GPU2D handle Structure definition
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*/
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#if (USE_HAL_GPU2D_REGISTER_CALLBACKS == 1)
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typedef struct __GPU2D_HandleTypeDef
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#else
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typedef struct
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#endif /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 1 */
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{
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GPU2D_TypeDef Instance; /*!< GPU2D register base address. */
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HAL_LockTypeDef Lock; /*!< GPU2D lock. */
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__IO HAL_GPU2D_StateTypeDef State; /*!< GPU2D transfer state. */
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__IO uint32_t ErrorCode; /*!< GPU2D error code. */
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#if (USE_HAL_GPU2D_REGISTER_CALLBACKS == 1)
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void (* CommandListCpltCallback)(struct __GPU2D_HandleTypeDef *hgpu2d, uint32_t CmdListID); /*!< GPU2D Command Complete Callback */
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void (* MspInitCallback)(struct __GPU2D_HandleTypeDef *hgpu2d); /*!< GPU2D Msp Init callback */
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void (* MspDeInitCallback)(struct __GPU2D_HandleTypeDef *hgpu2d); /*!< GPU2D Msp DeInit callback */
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#endif /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 1 */
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} GPU2D_HandleTypeDef;
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#if (USE_HAL_GPU2D_REGISTER_CALLBACKS == 1)
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/**
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* @brief HAL GPU2D Callback ID enumeration definition
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*/
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typedef enum
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{
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HAL_GPU2D_MSPINIT_CB_ID = 0x00U, /*!< GPU2D MspInit callback ID */
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HAL_GPU2D_MSPDEINIT_CB_ID = 0x01U, /*!< GPU2D MspDeInit callback ID */
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} HAL_GPU2D_CallbackIDTypeDef;
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/** @defgroup HAL_GPU2D_Callback_pointer_definition HAL GPU2D Callback pointer definition
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* @brief HAL GPU2D Callback pointer definition
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* @{
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*/
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typedef void (*pGPU2D_CallbackTypeDef)(GPU2D_HandleTypeDef *hgpu2d); /*!< pointer to an GPU2D Callback function */
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typedef void (*pGPU2D_CommandListCpltCallbackTypeDef)(GPU2D_HandleTypeDef *hgpu2d, uint32_t CmdID); /*!< pointer to an GPU2D Command List Complete Callback function */
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#endif /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 1 */
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup GPU2D_Exported_Constants GPU2D Exported Constants
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* @{
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*/
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/** @defgroup GPU2D_Error_Code_definition GPU2D Error Code definition
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* @brief GPU2D Error Code definition
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* @{
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*/
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#define HAL_GPU2D_ERROR_NONE (0x00000000U) /*!< No error */
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#define HAL_GPU2D_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */
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#if (USE_HAL_GPU2D_REGISTER_CALLBACKS == 1)
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#define HAL_GPU2D_ERROR_INVALID_CALLBACK (0x00000002U) /*!< Invalid callback error */
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#endif /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 1 */
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/**
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* @}
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*/
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/** @defgroup GPU2D_Interrupt_configuration_definition GPU2D Interrupt configuration definition
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* @brief GPU2D Interrupt definition
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* @{
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*/
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#define GPU2D_IT_CLC 0x00000001U /*!< Command List Complete Interrupt */
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/**
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* @}
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*/
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/** @defgroup GPU2D_Flag_definition GPU2D Flag definition
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* @brief GPU2D Flags definition
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* @{
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*/
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#define GPU2D_FLAG_CLC 0x00000001U /*!< Command List Complete Interrupt Flag */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macros ------------------------------------------------------------*/
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/** @defgroup GPU2D_Exported_Macros GPU2D Exported Macros
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* @{
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*/
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/** @brief Reset GPU2D handle state
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* @param __HANDLE__: specifies the GPU2D handle.
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* @retval None
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*/
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#if (USE_HAL_GPU2D_REGISTER_CALLBACKS == 1)
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#define __HAL_GPU2D_RESET_HANDLE_STATE(__HANDLE__) do { \
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(__HANDLE__)->State = HAL_GPU2D_STATE_RESET; \
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(__HANDLE__)->MspInitCallback = NULL; \
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(__HANDLE__)->MspDeInitCallback = NULL; \
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(__HANDLE__)->CommandListCpltCallback = NULL; \
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} while(0)
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#else /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 0 */
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#define __HAL_GPU2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_GPU2D_STATE_RESET)
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#endif /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 1 */
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/* Interrupt & Flag management */
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/**
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* @brief Get the GPU2D pending flags.
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* @param __HANDLE__: GPU2D handle
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* @param __FLAG__: flag to check.
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* This parameter can be one of the following values:
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* @arg GPU2D_FLAG_CLC: Command List Complete interrupt mask
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* @retval The state of FLAG.
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*/
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#define __HAL_GPU2D_GET_FLAG(__HANDLE__, __FLAG__) (READ_REG(*(__IO uint32_t *)((uint32_t)(__HANDLE__)->Instance\
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+ GPU2D_ITCTRL)) & (__FLAG__))
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/**
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* @brief Clear the GPU2D pending flags.
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* @param __HANDLE__: GPU2D handle
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* @param __FLAG__: specifies the flag to clear.
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* This parameter can be one of the following values:
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* @arg GPU2D_FLAG_CLC: Command List Complete interrupt mask
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* @retval None
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*/
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#define __HAL_GPU2D_CLEAR_FLAG(__HANDLE__, __FLAG__) do { \
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__IO uint32_t *tmpreg = \
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(__IO uint32_t *)((uint32_t)(__HANDLE__)->Instance\
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+ GPU2D_ITCTRL); \
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CLEAR_BIT(*tmpreg, __FLAG__); \
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} while(0U)
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/**
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* @brief Check whether the specified GPU2D interrupt source is enabled or not.
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* @param __HANDLE__: GPU2D handle
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* @param __INTERRUPT__: specifies the GPU2D interrupt source to check.
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* This parameter can be one of the following values:
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* @arg GPU2D_IT_CLC: Command List Complete interrupt mask
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* @retval The state of INTERRUPT source.
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*/
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#define __HAL_GPU2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_REG(*(__IO uint32_t *)\
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((uint32_t)(__HANDLE__)->Instance\
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+ GPU2D_ITCTRL)) & (__INTERRUPT__))
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup GPU2D_Exported_Functions GPU2D Exported Functions
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* @{
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*/
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/** @addtogroup GPU2D_Exported_Functions_Group1 Initialization and de-initialization functions
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* @{
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*/
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/* Initialization and de-initialization functions *******************************/
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HAL_StatusTypeDef HAL_GPU2D_Init(GPU2D_HandleTypeDef *hgpu2d);
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HAL_StatusTypeDef HAL_GPU2D_DeInit(GPU2D_HandleTypeDef *hgpu2d);
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void HAL_GPU2D_MspInit(GPU2D_HandleTypeDef *hgpu2d);
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void HAL_GPU2D_MspDeInit(GPU2D_HandleTypeDef *hgpu2d);
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/* Callbacks Register/UnRegister functions ***********************************/
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#if (USE_HAL_GPU2D_REGISTER_CALLBACKS == 1)
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HAL_StatusTypeDef HAL_GPU2D_RegisterCallback(GPU2D_HandleTypeDef *hgpu2d, HAL_GPU2D_CallbackIDTypeDef CallbackID,
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pGPU2D_CallbackTypeDef pCallback);
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HAL_StatusTypeDef HAL_GPU2D_UnRegisterCallback(GPU2D_HandleTypeDef *hgpu2d, HAL_GPU2D_CallbackIDTypeDef CallbackID);
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HAL_StatusTypeDef HAL_GPU2D_RegisterCommandListCpltCallback(GPU2D_HandleTypeDef *hgpu2d,
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pGPU2D_CommandListCpltCallbackTypeDef pCallback);
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HAL_StatusTypeDef HAL_GPU2D_UnRegisterCommandListCpltCallback(GPU2D_HandleTypeDef *hgpu2d);
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#endif /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 1 */
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/**
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* @}
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*/
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/** @addtogroup GPU2D_Exported_Functions_Group2 IO operation functions
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* @{
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*/
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/* IO operation functions *******************************************************/
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uint32_t HAL_GPU2D_ReadRegister(const GPU2D_HandleTypeDef *hgpu2d, uint32_t offset);
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HAL_StatusTypeDef HAL_GPU2D_WriteRegister(GPU2D_HandleTypeDef *hgpu2d, uint32_t offset, uint32_t value);
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void HAL_GPU2D_IRQHandler(GPU2D_HandleTypeDef *hgpu2d);
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void HAL_GPU2D_ER_IRQHandler(GPU2D_HandleTypeDef *hgpu2d);
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void HAL_GPU2D_CommandListCpltCallback(GPU2D_HandleTypeDef *hgpu2d, uint32_t CmdListID);
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void HAL_GPU2D_ErrorCallback(GPU2D_HandleTypeDef *hgpu2d);
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/**
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* @}
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*/
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/** @addtogroup GPU2D_Exported_Functions_Group3 Peripheral State and Error functions
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* @{
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*/
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/* Peripheral State functions ***************************************************/
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HAL_GPU2D_StateTypeDef HAL_GPU2D_GetState(GPU2D_HandleTypeDef const *const hgpu2d);
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uint32_t HAL_GPU2D_GetError(GPU2D_HandleTypeDef const *const hgpu2d);
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/**
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* @}
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*/
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/* Private constants ---------------------------------------------------------*/
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/** @addtogroup GPU2D_Private_Constants GPU2D Private Constants
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* @{
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*/
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#define GPU2D_ITCTRL (0x0F8U) /*!< GPU2D Interrupt Control Register Offset */
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#define GPU2D_CLID (0x148U) /*!< GPU2D Last Command List Identifier Register Offset */
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#define GPU2D_BREAKPOINT (0x080U) /*!< GPU2D Breakpoint Register Offset */
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#define GPU2D_SYS_INTERRUPT (0xff8U) /*!< GPU2D System Interrupt Register Offset */
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/** @defgroup GPU2D_Offset GPU2D Last Register Offset
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* @{
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*/
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#define GPU2D_OFFSET 0x1000U /*!< Last GPU2D Register Offset */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup GPU2D_Private_Macros GPU2D Private Macros
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* @{
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*/
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#define IS_GPU2D_OFFSET(OFFSET) ((OFFSET) < GPU2D_OFFSET)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* defined (GPU2D) */
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32N6xx_HAL_GPU2D_H */
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